MFC: r342634 (partial)

o Don't allocate resources for SDMA in sdhci(4) if the controller or the
front-end doesn't support SDMA or the latter implements a platform-
specific transfer method instead. While at it, factor out allocation
and freeing of SDMA resources to sdhci_dma_{alloc,free}() in order to
keep the code more readable when adding support for ADMA variants.

o Base the size of the SDMA bounce buffer on MAXPHYS up to the maximum
of 512 KiB instead of using a fixed 4-KiB-buffer. With the default
MAXPHYS of 128 KiB and depending on the controller and medium, this
reduces the number of SDHCI interrupts by a factor of ~16 to ~32 on
sequential reads while an increase of throughput of up to ~84 % was
seen.

Front-ends for broken controllers that only support an SDMA buffer
boundary of a specific size may set SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY
and supply a size via struct sdhci_slot. According to Linux, only -
unsupported in stable/10 anyway - Qualcomm MSM-type SDHCI controllers
are affected by this, though.

Requested by: Shreyank Amartya (unconditional bump to 512 KiB)

o Introduce a SDHCI_DEPEND macro for specifying the dependency of the
front-end modules on the sdhci(4) one and bump the module version
of sdhci(4) to 2 via an also newly introduced SDHCI_VERSION in order
to ensure that all components are in sync WRT struct sdhci_slot.

o In sdhci(4):
- Make pointers const were applicable, and
- replace a few device_printf(9) calls with slot_printf() for
consistency.

MFC: r292180 (partial), r297127 (partial), r311911, r311923, r312939,
r313250, r313712, r314811 (partial), r314887 (partial), r315430,
r317981, r315466

o Move the DRIVER_MODULE() statements that declare mmc(4) to be a child
of the various bridge drivers out of dev/mmc.c and into the bridge
drivers.

o Add ACPI platform support for SDHCI driver.

o Fix some overly long lines, whitespace and other bugs according to
style(9) as well as spelling etc. in mmc(4), mmcsd(4) and sdhci(4).

o In the mmc(4) bridges and sdhci(4) (bus) front-ends:
- Remove redundant assignments of the default bus_generic_print_child
device method,
- use DEVMETHOD_END,
- use NULL instead of 0 for pointers.

o Trim/adjust includes.

o Add and use a MMC_DECLARE_BRIDGE macro for declaring mmc(4) bridges
as kernel drivers and their dependency onto mmc(4).

o Add support for eMMC "partitions". Besides the user data area, i. e.
the default partition, eMMC v4.41 and later devices can additionally
provide up to:
1 enhanced user data area partition
2 boot partitions
1 RPMB (Replay Protected Memory Block) partition
4 general purpose partitions (optionally with a enhanced or extended
attribute)

Besides simply subdividing eMMC devices, some Intel NUCs having UEFI
code in the boot partitions etc., another use case for the partition
support is the activation of pseudo-SLC mode, which manufacturers of
eMMC chips typically associate with the enhanced user data area and/
or the enhanced attribute of general purpose partitions.

CAVEAT EMPTOR: Partitioning eMMC devices is a one-time operation.

o Now that properly issuing CMD6 is crucial (so data isn't written to
the wrong partition for example), make a step into the direction of
correctly handling the timeout for these commands in the MMC layer.
Also, do a SEND_STATUS when CMD6 is invoked with an R1B response as
recommended by relevant specifications.

o Add an IOCTL interface to mmcsd(4); this is sufficiently compatible
with Linux so that the GNU mmc-utils can be ported to and used with
FreeBSD (note that due to the remaining deficiencies outlined above
SANITIZE operations issued by/with `mmc` currently most likely will
fail). These latter have been added to ports as sysutils/mmc-utils.
Among others, the `mmc` tool of mmc-utils allows for partitioning
eMMC devices (tested working).

o For devices following the eMMC specification v4.41 or later, year 0
is 2013 rather than 1997; so correct this for assembling the device
ID string properly.

o Let mmcsd.ko depend on mmc.ko. Additionally, bump MMC_VERSION as at
least for some of the above a matching pair is required.

MFC r307518:
Fix device delete child function.

When detaching device trees parent devices must be detached prior to
detaching its children. This is because parent devices can have
pointers to the child devices in their softcs which are not
invalidated by device_delete_child(). This can cause use after free
issues and panic().

Device drivers implementing trees, must ensure its detach function
detaches or deletes all its children before returning.

While at it remove now redundant device_detach() calls before
device_delete_child() and device_delete_children(), mostly in
the USB controller drivers.

Tested by: Jan Henrik Sylvester <me@janh.de>
Reviewed by: jhb
Differential Revision: https://reviews.freebsd.org/D8070

Always compile in PPS capture. Use the same device name used in 11-current.

This is a direct commit to 10-stable because the corresponding changes in 11
are bound up with all the device-tree rework for beaglebone. This somewhat
aligns the features between the two branches, from a user's perspective.

MFC r279816, r279826:

Attach the prcm clock driver early, so it can set the mpcore timer frequency.

Change the name of the dmtimer pps device from /dev/ppsN to /dev/dmtppsN.

MFC r276021, r279766:

Reduce the diff in the Ti aintc between head and arm_intrng

Fix spurious interrupts on arm am335x (beaglebone), by doing the EOI in
both the post-filter and post-thread callbacks.

MFC r279312:

Fix a number of -Wcast-qual warnings under sys/arm. No functional
change.

Submitted by: andrew

MFC r279311:

In sys/arm/ti/am335x/am335x_rtc.c, fix a clang 3.6.0 warning about
am33x_rtc_softc::sc_irq_res (which is an array) never being NULL.

Submitted by: andrew

MFC r274670, r274671, r276168:

Moves all the duplicate code to a single function.

Verify for invalid modes and unwanted flags before pass the new flags to
driver.

Make gpio_default_map_gpios() static. No functional changes.

Improves the GPIO API description a little bit.

gpio_pin_max must return the maximum supported pin number and not the total
number of pins on the system.

MFC r273799:

Make the GPIO children attach to the first unit available and not only to
unit 0.

This fix a bug where a GPIO controller could fail to attach its children
(gpioc and gpiobus) if another GPIO driver attach first.

MFC r277454, r277460, r277465, r277466, r277467, r277469, r277470, r277471,
r277472, r277473, r277474, r277475, r277476, r277477, r277478, r277479,
r277480, r277512, r277516:

Add inline implementations of arm bus_space_read/write_N().

Revise the arm bus_space implementation to avoid dereferencing the tag on
every operation to retrieve the bs_cookie value almost nothing actually uses.

Use the explicit member initializer style to init the bus_space struct.

Use arm/bus_space-v6.c for all armv6 systems

Consolidate many identical implementations of bus_space to a single
common tag and implementation shared by armv4 and armv6.

Micro-optimize the new arm inline bus_space implementation by grouping all
the data the inline functions access together at the start of the bus_space
struct so that they all fit in a single cache line.

MFC r276047: Add -march=armv7a to the kernel compile for all v7a ARM systems.

MFC r277958, r278061:

ti_pruss: make sure the mmap'ed memory region is uncacheable.

am335x_clk_pruss_activate(): use the L3F clock.

MFC r266969 and r276717:
Add 64-bit DMA support in the XHCI controller driver.
- Fix some comments and whitespaces while at it.
- Add support for PAE.

MFC r277042:

Add support to turn off Beaglebone with poweroff(8) or shutdown(8) -p.

To cut off the power we need to start the shutdown sequence by writing
the OFF bit on PMIC.

Once the PMIC is programmed the SoC needs to toggle the PMIC_PWR_ENABLE
pin when it is ready for the PMIC to cut off the power. This is done by
triggering the ALARM2 interrupt on SoC RTC.

The RTC driver only works in power management mode which means it won't
provide any kind of time keeping functionality. It only implements a way
to trigger the ALARM2 interrupt when requested.

MFC r261459, r273045, r273047.

r261459:
Remove trailing tabs causing false grep positives.

r273045:
Sort the files in the am355x directory.

r273047:
Remove the need for files.beaglebone and std.beaglebone by moving the one
option they defined into files.am335x.

MFC r276249:

Fix the musb initialization sequence on AM335x.

According to http://e2e.ti.com/support/arm/sitara_arm/f/791/t/210729 the
USB reset pulse has an undocumented duration of 200ns and during this
period the module must not be acessed.

We wait for 100us to take into account for some imprecision of the early
DELAY() loop.

This fixes the eventual 'External Non-Linefetch Abort (S)' that happens at
boot while resetting the musb subsystem.

While here, enable the USB subsystem clock before the first access.

MFC r273606:

Fix cpsw_detach() to not panic when called from cpsw_attach().

For an unkown reason (at moment), sometimes if_cpsw cannot read from PHY
and fails to attach calling cpsw_detach() which end up in a panic.

Fix it by doing the proper check before detach the miibus and also fix the
leak of few variables.

And to actually make it work, ether_ifattach() has to be moved to the end
of cpsw_attach() to avoid a race where calling ether_ifdetach() before
domain_init() (which will only run later on) would make it crash at
INP_INFO_RLOCK() on in_pcbpurgeif0().

Tested on: BBB (am335x)

MFC r276029:

Remove a volatile qualifier on return type that is ignored and results in
a -Wreturn-type warning when compiled with gcc.

MFC r275944, r275946, r275949, r275950:

Add code to set and reset open-drain mode on the bus when requested.

When command and data interrupts have been aggregated together, don't do
the data-completed processing if a command-error interrupt is also asserted.

Add a new sdhci quirk, SDHCI_QUIRK_WAITFOR_RESET_ASSERTED, to work around
TI OMAP controllers which will return the reset-in-progress bit as zero if
you read the status register too fast after setting the reset bit.

MFC r274641, r274644, r274822, r276049:

Allow i2c bus speed to be configured via hints, FDT data, and sysctl.

Implement bus speed setting for OMAP4, AM335x, and imx5/6.

Fix the i2c bus speed divisors for TI OMAP4 and AM335x to give the
advertised 100, 400, and 1000 KHz speeds.

PR: 195009

Clean up our ARM assembly:

MFC 275256:

Switch to the ARM unified assembly language as the clang integrated as only
supports it. Binutils supports it when the ".syntax unified" directive
is set.

Sponsored by: ABT Systems Ltd

MFC 275264:

Update _ENTRY to use _EENTRY to reduce the common code.

MFC 275321:

Remove extra labels, ENTRY_NP already provides them.

Sponsored by: ABT Systems Ltd

MFC 275322:

Correctly a few incorrect uses of ENTRY/EENTRY and END/EEND

Sponsored by: ABT Systems Ltd

MFC 275416:

Fix the name of the coprocessor to include the "p" prefix, the clang
integrated assembler expects this.

Sponsored by: ABT Systems Ltd

MFC 275418:

Switch to unified syntax so these can be built with clang 3.5.

Sponsored by: ABT Systems Ltd

MFC 275519:

Add missing END macros to some of the xscale functions.

Sponsored by: ABT Systems Ltd

MFC 275520:

Use the unified syntax in a few more assembly files

Sponsored by: ABT Systems Ltd

MFC 275521:

Set the alignment to 4-bytes after a string as clang 3.5 can switch to
thumb mode if this is incorrect.

Sponsored by: ABT Systems Ltd

MFC 275522:

Place the literal pool after a RET otherwise clang 3.5 tries to put it too
far away from a ldr psuedo instruction. With this clang will place the
literal value here where it's close enough to be loaded.

Sponsored by: ABT Systems Ltd

MFC 275523:

Switch to an armv6k cpu, without this clang 3.5 complains "bx lr" is
unsupported as it needs a newer cpu.

Sponsored by: ABT Systems Ltd

MFC 275524:

Switch to a .cpu directive. These will work when clang 3.5 is imported
where the .arch directive is a nop.

Sponsored by: ABT Systems Ltd

MFC r275376:

Allow multiple devices to mmap. It's impossible to prevent this with
checks on the open/close functions.

MFC: r266336, r270230 and r273263

r266336:
Allow us to compile the Ti iic driver for both OMAP4 and AM335x.

r270230:
Rewrite of ti_i2c based on gonzo's patch, fix the following bugs/problems:

. interrupt storm detected on "intr70:"; throttling interrupt source;

. Added access serialization on iicbus_transfer(), previously there was
no such protection and a new transfer could easily confuse the
controller;

. Add error checkings (i.e. stop the transfer when a error is detected
and do _not_ overwrite the previous error);

. On command done interrupt do not assume that the transfer was finished
sucessfully as we will receive the command done interrupt even after
errors;

. Simplify the FIFO handling;

. Reset the FIFO between the transfers as the FIFO may contain data from
the last (failed) transfer;

. Fix the iicbus speed for AM335x, which in turn will make better use of
the I2C noise filter (set to one internal clock cycle);

. Move the read and write handler to ithread instead of notifying the
requesting thread with wakeup(9);

. Fix the comments based on OMAP4 TRM.

The above changes allows me to read the EDID from my HDMI monitor on BBB
with gonzo's patches to support TDA19988 (which does 128 bytes reads) and
repeatedly scan the iicbus (with a modified i2c(8)) without lock up the bus.

r273263:
Fix the chan address for mtx_sleep() on bus wait. Without this fix the
threads waiting for the bus would never wake.

MFC r273281:
Style changes as pointed out by stas@.

MFC r273261:
Remove an unused mutex.

MFC r273258:
Make the ti_mbox and ti_pruss drivers optional.

MFC r273257:
Add a driver for the TI watchdog.

The TI watchdog timer is present on BeagleBone's. Since 2014, U-Boot
has been booting the BeagleBone with the watchdog enabled. We need
to
disable it on boot to avoid a spurious reset.
The timer isn't exactly precise, but it will do as a watchdog. This
is also a reflection of the watchdog(9) API.

In the future, we could handle interrupts, but the watchdog(9) API
needs to be a bit smarter before that can happen.

MFC: r270885, r270948

- Nuke unused sdhci_softc.
- Static'ize sdhci_debug local to sdhci.c.
- Const'ify PCI device description strings.
- Nuke redundant resource ID members from sdhci_pci_softc.
- Nuke unused hw.sdhci_pci.debug tunable.
- Add support for using MSI instead of INTx, controllable via the tunable
hw.sdhci.enable_msi (defaulting to on) and tested with a RICOH R5CE823 SD
controller.
- Use NULL instead of 0 for pointers.

MFC r267021:

FreeBSD, historically, has always used 8-bit addresses for i2c devices
(7-bit device address << 1), always leaving the room for the read/write
bit.

This commit convert ti_i2c and revert r259127 on bcm2835_bsc to make them
compatible with 8-bit addresses. Previous to this commit an i2c device
would have different addresses depending on the controller it was attached
to (by example, when compared to any iicbb(4) based i2c controller), which
was a pretty annoying behavior.

Also, update the PMIC i2c address on beaglebone* DTS files to match the
new address scheme.

Now the userland utilities need to do the correct slave address shifting
(but it is going to work with any i2c controller on the system).

Discussed with: ian

MFC r267834:

Clarify the expected usage of I2C 7-bit slave addresses on ioctl(2)
interface.

While here add the cross reference to iic(4) on iicbus(4).

CR: D210
Suggested by: jmg

MFC r266923:

Ignore IIC_ENOADDR from iicbus_reset() as it only means we have a
master-only controller.

This fixes the iic bus scan with i2c(8) (on supported controllers).

Tested with gpioiic(4).

MFC r267009:

Remove the unnecessary i2c slave address assignment.

The ti_i2c controller only works in the master mode and the i2c address
passed on iicbus_reset() is used to set the controller slave address when
operating as an i2c slave (which isn't currently supported).

When talking to a slave, the slave address is correctly provided to
ti_i2c_tranfer().

MFC r266960:

Configure the analog input 7 which, on BBB, is connected to the 3V3B rail
through a voltage divisor (R163 and R164 on page 4 of BBB schematic).

Add a note about this on ti_adc(4) man page. The ti_adc(4) man page will
first appear on 10.1-RELEASE.

Suggested by: Sulev-Madis Silber (ketas)
Manual page reviewed by: brueffer (D127)

MFC r266937:

Export two new settings for the AM335x PWM, the clock prescaler (clkdiv)
and the actual PWM frequency.

Enforce the maximum value for the period sysctl.

The frequency systcl now allows the direct setting of the PWM frequency
(it will try to find the better clkdiv and period for a given frequency,
i.e. the ones that will give the better PWM resolution).

This allows the use lower frequencies on the PWM. Without changing the
clock prescaler the minimum PWM frequency was 1.52kHz.

PWM frequencies checked with an osciloscope.

PWM output tested with some R/C servos at 50Hz.

MFC r269393, r269394, r269395:

Fix parsing of arch extensions in binutils/gas.
Use ".arch_extension sec" when compiling ARM TI code that uses the
security extensions.

MFC 266621: Eliminte spurious interrupts caused by ARM weak memory ordering.

MFC r264096, r264097, r264099 r264100, r264101, r264102, r264119:

Fixes to the ti_sdhci and sdhci drivers (fix clock divisor calcs).

Use the ti_sdhci driver instead of ti_mmchs for Pandaboard.

MFC 265035: Move duplicated code to print l2 config into the common code.

MFC 264019, 264041, 264048, 264049, 264050, 264051

Add support for event timers whose clock frequency can change while running.

Apparently all ARM configs build kern_et.c, but only a few of them also
build kern_clocksource.c, un-break the build by not referencing functions in
kern_clocksource if NO_EVENTTIMERS is defined.

Add variable-frequency support to the arm mpcore eventtimer driver.

mpcore_timer: Disable the timer and clear any pending bit, then setup the
new counter register values, then restart the timer. Also re-nest the parens
properly for casting the result of converting time and frequency to a count.

Adds the ADC driver for TI AM3xxx SoC family.

The ADC has a 12bit resolution and its raw output can be read via sysctl(8)
interface.

The driver allows the setup of ADC clock, samples average and open delay
(the number of clock cycles to wait before start the conversion).

The TSC_ADC module is set in the general purpose mode (no touchscreen
support).

Tested on Beaglebone-black.

Written based on AM335x TRM.

MFC 262952, 262958, 262966, 262979, 262980, 262986, 262987, 262995, 262997,
263030, 263033, 263034, 263056, 263057,

Remove all the redundant external declarations of exception vectors and
runtime setting of the pointers that's scattered around various places.

Remove all traces of support for ARM chips prior to the arm9 series.

Make the default exception handler vectors point to where I thought they
were already pointing: the default handlers (not a panic that says there
is no default handler).

Eliminate irq_dispatch.S. Move the data items it contained into
arm/intr.c and the functionality it provided into arm/exception.S.

Move the exception vector table (so-called "page0" data) into exception.S
and eliminate vectors.S.

Change the way the asm GET_CURTHREAD_PTR() macro is defined so that code
using it doesn't have to have an "AST_LOCALS" macro somewhere in the file.

Arrange for arm fork_trampoline() to return to userland via the standard
swi_exit code in exception.S instead of having its own inline expansion
of the DO_AST and PULLFRAME macros.

Now that the PUSHFRAME and PULLFRAME macros are used only in the swi
entry/exit code, they don't need to be macros. Except that didn't work
and the whole change was reverted.

Remove some unnecessary indirection and jump right to the handler functions.

Use panic rather than printf to "handle" an arm26 address exception
(should never happen on arm32).

Remove the unreferenced DATA() macro.

Remove #include <machine/asmacros.h> from files that don't need it.

MFC 257774, 256760, 262916, 262905, 262918, 262919, 262920, 262921, 262924,
262925, 262929, 262932, 262935, 262940, 262941, 262942, 262948, 262949,
262950

Strip arm/conf/DEFAULTS down to just items that are mandatory for running
the architecture.

Move all the files named foo/common.c to foo/foo_common.c

Initial cut for DTS on the hl201 board.

Add commented out dts for sam9260ek as well as early printf support.

Make clock optional on uart nodes, then back it out ("I don't know what I
was thinking, but it is lame.")

Set the baud rate if it isn't 0

Make at91_soc_id() public.

Properly round at91 resource on unmapping.

Move AT91 AIC related stuff to own file.

Fix another bug in multicast filtering. i.MX uses 6 bits from MSB in
LE CRC32 for the hash value, not the lowest 6 bits in BE CRC32.

Follow r262916 with one more config file that references a renamed common.c

Remove bogus AT91 define that causes compile errors. Most of the defines
for SAM9X are going away soonish anyway (once FDT works), but until
then...

Remove all dregs of a per-thread undefined-exception-mode stack.

Rework the VFP code that handles demand-based save and restore of state.

Always call vfp_discard() on thread death.

When a thread begins life it doesn't own the VFP hardware state on any cpu.

Make undefined exception entry MP-safe.

MFC 258211, 257775, 258096,

Add mbox and pruss drivers to ti build.

Use common bus_space-v6 instead of local copies.

MFC 262695, 262708, 262709, 262710, 262711, 262728, 262870, 262877, 262880,
262885, 262891, 262903,

imx6: Add a tunable to set the number of active cores, enable SMP by default.

ffec: Fix multicast filtering.

Allwinner a10/a20...
- Add gpio and clock bits for A10/A20's EMAC ethernet controller driver
- EMAC gpio configuration
- EMAC clock activation
- Add Static Random Access Memory controller driver for A10/A20.
A10/A20's SRAM is used by devices, such as CPU, EMAC,
for extra fast memory or as cache.
- Add EMAC 10/100 Ethernet controller driver for A10/A20.
It is available mostly in A10 devices like Hackberry, Marsboard,
Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
like cubieboard2.
TX performance can be improved using both channels 0 and 1.
RX performance is poor and needs improvement with the assistance of
external DMA controller in case there
- Add EMAC and SRAM controller entries to FDT.
- Add EMAC device to kernel config files and enable EMAC, SRAM drivers.

OMAP: When calculating the MPU freq, make sure not to overflow.

Vybrid:
- Add driver for Port control and interrupts (PORT).
- Export panel info to DTS
- Reset all the layers before setup first one
- Enable display

nandfs: Slight code reordering to make error branch last.

Add option TMPFS to arm/conf/DEFAULTS, remove it from the few configs
that have it individually. Concensus on freebsd-arm@ is that it should
be included in all ARM kernels.

Fix the arm sys_sigreturn(): its argument is a struct ucontext, not a
struct sigframe containing the struct ucontext.

MFC r262534, r262548, r262549, r262552, r262568, r262581, r262583, r262584,
r262585, r262587, r262696, r262712

Replace many pasted identical definitions of cpu_initclocks() with a common
implementation in arm/machdep.c.

aicasm: Don't complain about missing prototypes to ease bootstrap issues.

Vybrid: Add driver for Inter-Integrated Circuit (I2C).

imx6: Initialize the Low Power Mode bits to keep the ARM cores running
during WFI.

All our current ARM multi-core systems have all cores in one package with
a shared L2 cache, reflect that in the common cpu_topo() routine.

mpcore timer: Supply a DELAY() implementation via weak linkage, so that
SoC-specific code can supply a better implementation.

imx6: Add some rudimentary voltage control.

Add an armv7 implementation of cpu_sleep().

Add __used attribute so that the DELAY implementation doesn't get
optimized away as unreferenced, causing linker errors when trying to
resolve the weak reference to the missing function.

MFC r262409, r262411, r262413, r262420, r262426, r262427, r262440, r262456,
r262482, r262483, r262531,

Move the declaration for mpentry() into a header file instead of pasting
it into a bunch of different .c files.

If the L2 cache type is PIPT, pass a physical address for a flush.

Actually set the proper bit to indicate TTB shared memory.

Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.

Invalidate caches immediately upon entry to init_secondary(). Also set
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.

Add the bits needed to run SMP on imx6.

Invalidate the SCU cache tag ram on all 4 cores, not just 1-3.

Minor tweaks to the imx GPT timer

Vybrid enhancements...
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
- Add support for Quartz Module.
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock

MFC r259270

After r266105 ofw_iicbuc.c will be built by default for any kernel which
includes options 'iicbus' and 'fdt'. Remove the (now) unnecessary entries.

MFC r261414, r261415, r261417, r261418, r261419

Don't call device_set_ivars() for the mmchs

Change the way pcpu and curthread are stored per-core

Invalidate cachelines for bounce pages on PREREAD too, there may still be
stale entries from a previous transfer.

Only use the CPU ID register if SMP is defined. Some non-MPCore armv6 cpu,
such as the one found in the RPi, don't have it, and just hang when we try
to access it.

MFC r261410

Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

MFC r259125, r264019, r264083, r264153, r264197

r259125:
Fix a few typos on the scm (control module) pin mux definitions.

r264019:
Fix some of the style(9) problems on ti_gpio.

Remove redundant code and declarations.

r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.

Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.

Do a better job freeing resources when there are errors and on
ti_gpio_detach().

r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.

On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.

On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.

On AM335x, each set of registers controls each one of the interrupt
lines.

- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.

- Remove stray whitespace.

r264197:
Partially revert r264083.

While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.

Removes the module reset for now as more investigation is needed.

MFC r261252, r261279, r261304, r261305, r261322, r261336, r261337, r261338,
r261353

Fix the name of the dts file for the HL201...

When mapping an address, the bsh needs the same offset we do for other things.

Add explicit depends on bus_if.h and device_if.h to avoid a
chicken and egg problem in some compilation environments.

Switch to using PAs rather than VAs for the addresses we map for
devices. This is a nop, except for what's reported by atmelbus for the
resources.

Comment cleanups. Move things around for diff reduction against FDT work.

MFC r258046, r258047, r258050, r259035, r259036, r259037, r261842, r261843,
r261844, r261845, r261846, r262194, r262522, r262559

r258046:
Fix a typo on a comment in ofw_bus_if.m, the default method will return -1
when a node doesn't exist.

r258047:
Move the KASSERT() check to the point before the increase of number of pins.

r258050:
Fix gpiobus to return BUS_PROBE_GENERIC insted of BUS_PROBE_SPECIFIC (0) so
it can be overriden by its OFW/FDT version.

Give a chance for GPIO devices that implement the device_identify method to
attach.

r259035:
Remove unnecessary includes and an unused softc variable. While here apply
two minor style(9) fixes.

r259036:
Move the GPIOBUS_SET_PINFLAGS(..., ..., pin, GPIO_PIN_OUTPUT) to led(4)
control callback function. This makes gpioled(4) works even if the pin
is accidentally set to an input.

r259037:
Fix the pin value reading on AM335x. Because of the inverted logic it was
always returning '0' for all the reads, even for the outputs. It is now
known to work with gpioiic(4) and gpioled(4).

r261842:
Add an OFW GPIO compatible bus. This allows the use of the DTS files to
describe GPIO bindings in the system.

Move the GPIOBUS lock macros to gpiobusvar.h as they are now shared between
the OFW and the non OFW versions of GPIO bus.

Export gpiobus_print_pins() so it can also be used on the OFW GPIO bus.

r261843:
Add OFW support to the in tree gpio compatible devices: gpioiic(4) and
gpioled(4).

Tested on RPi and BBB (using the hardware I2C controller and gpioiic(4) for
the I2C tests). It was also verified for regressions on RSPRO (MIPS/ar71xx)
used as reference for a non OFW-based system.

Update the gpioled(4) and gpioiic(4) man pages with some details and
examples about the FDT/OFW support.

Some compatibility details pointed out by imp@ will follow in subsequent
commits.

r261844:
Allow the use of OFW I2C bus together with iicbb(4) on OFW-based systems.

This change makes ofw_iicbus attach to iicbb(4) controllers in addition to
the already supported i2c host bridges (iichb).

On iicbb(4) allow the direct access of the OFW parent node by its children,
so they can be directly attached to iicbb(4) node on the DTS without the
need of describing the i2c bus.

r261845:
Allow the use of the OFW GPIO bus for ti_gpio and bcm2835_gpio. With this
change the gpio children can be described as directly connected to the GPIO
controller without the need of describing the OFW GPIO bus itself on the
DTS file.

With this commit the OFW GPIO bus is fully functional on BBB and RPi.

GPIO controllers which want to use the OFW GPIO bus will need similar
changes.

r261846:
Make the gpioled(4) work out of the box on BBB.

Add gpioled(4) to BEAGLEBONE kernel and add the description of the four
on-board leds of beaglebone-black to its DTS file.

r262194:
Remove an unnecessary header.

r262522:
Fix make depend for iicbus.

r262559:
Inspired by r262522, fix make depend. This fixes the build of gpio modules.

MFC r258209, r258210, r261211,

Add a driver for the Texas Instruments Mailbox hardware.

Add a driver for the TI Programmable Realtime Unit Subsystem.

fix args to mtx_init

MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375

Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.

In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0

In pmap_mapdev(), first check whether a static mapping exists,

Convert TI static device mapping to use the new arm_devmap_add_entry(),

Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.

Eliminate use of fdt_immr_addr(), it's not needed for tegra

Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.

Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.

Add #include <machine/fdt.h> to a few files that used to get it via pollution

Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.

Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.

Switch RPi to using arm_devmap_add_entry() to set up static device mapping.

Allow 'no static device mappings' to potentially work.

Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.

Switch a10 to using arm_devmap_add_entry() to set up static device mapping.

MFC r259750, r260245: Add PPS support to the am335x timer driver.

MFC r259744, cleanups to move global vars into softc, use named values, etc.

MFC r259739, r259743: Shorten DMTIMER_->DMT_, #define all register constants.

MFC r259099: Fix a small error in calculating length of DELAY().

MFC r259126:

Activate the device before attempt to access any of its registers. Without
this change we may end up with a panic (Fatal kernel mode data abort:
'External Non-Linefetch Abort (S)') as described in
http://e2e.ti.com/support/arm/sitara_arm/f/791/t/276862.aspx.

It is now possible to bring up I2C1 and I2C2 on BBB.

MFC r262408 (by ian):

Eliminate an unused-var warning by wrapping #if 0 around some tables of
values that were probably entered "for completeness" from a datasheet, and
for all I know may be useful/necessary some day.

MFC r258356:

Bugfixes... the host capabilties from FDT data are stored in host.caps, not
host.host_ocr, examine the correct field when setting up the hardware. Also,
the offset for the capabilties register should be 0x140, not 0x240.

MFC r257669, r257672, r257673, r257676, r257678:

Call initarm_lastaddr() later in the init sequence, after establishing
static device mappings, rather than as the first of the initializations
that a platform can hook into. This allows a platform to allocate KVA
from the top of the address space downwards for things like static device
mapping, and return the final "last usable address" result after that and
other early init work is done.

Because some platforms were doing work in initarm_lastaddr() that needs to
be done early, add a new initarm_early_init() routine and move the early
init code to that routine on those platforms.

Make PTE_DEVICE a synonym for PTE_NOCACHE on armv4, to make it easier to
share the same code on both architectures.

Add new helper routines for arm static device mapping. The new code
allocates kva space from the top down for the device mappings and builds
entries in an internal table which is automatically used later by
arm_devmap_bootstrap(). The platform code just calls the new
arm_devmap_add_entry() function as many times as it needs to (up to 32
entries allowed; most platforms use 2 or 3 at most).

Remove imx local devmap code and use the essentially identical common
code that got moved from imx_machdep.c to arm/devmap.c.

MFC r257648, r257649, r257660:

Begin reducing code duplication in arm pmap.c and pmap-v6.c by factoring
out common code related to mapping device memory into a new devmap.c file.

Remove the growing duplication of code that used pmap_devmap_find_pa() and
then did some math with the returned results to generate a virtual address,
and likewise in reverse to get a physical address. Now there are a pair
of functions, arm_devmap_vtop() and arm_devmap_ptov(), to do that. The
bus_space_map() implementations are rewritten in terms of these.

Move remaining code and data related to static device mapping into the
new devmap.[ch] files. Emphasize the MD nature of these things by using
the prefix arm_devmap_ on the function and type names (already a few of
these things found their way into MI code, hopefully it will be harder to
do by accident in the future).

MFC r257518, r257519:

TI sdhci driver improvements, mostly related to fdt data...

Use the published compatible strings (our own invention, "ti,mmchs" is
still accepted as well, for now).

Don't blindly turn on 8-bit bus mode, because even though the controller
supports it, the board has to be wired appropriately as well. Use the
published property (bus-width=<n>) and honor all the valid values (1,4,8).

The eMMC device on a Beaglebone Black is wired for 8-bit, update the dts.

The mmchs controller can inherently do both 1.8v and 3.0v on the first
device and 1.8v only on other devices, unless an external transceiver is
used. Set the voltage automatically for the first device and honor
the published fdt property (ti,dualvolt) for other devices.

MFC r257258, r257265: Include headers (if_var.h and others) where needed.

The change that triggered the need for this on head was r257244. That
hasn't been MFC'd yet, but there's no harm in paving the way for it with
this MFC.

MFC r257201, r257202

Retire arm_remap_nocache() and the data and constants associated with it.

MFC r257199, r257200, r257217:

Remove all #include <machine/pmap.h> from arm code. It's already
included by vm/pmap.h, which is a prerequisite for arm/machine/pmap.h
so there's no reason to ever include it directly.

Remove #include <machine/frame.h> from all the arm code that doesn't
really need it. That would be almost everywhere it was included. Add
it in a couple files that really do need it and were previously getting
it by accident via another header.

Remove the last dregs of trapframe_t. It turns out only arm was using
this type, so remove it to make arm code more consistant with other
platforms.

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Add support for uarts other than the serial console in TI OMAP SoCs.

The TI uart hardware is ns16550-compatible, except that before it can
be used the clocks and power have to be enabled and a non-standard
mode control register has to be set to put the device in uart mode
(as opposed to irDa or other serial protocols). This adds the extra
code in an extension to the standard ns8250 probe routine, and the
rest of the driver is just the standard ns8250 code.

Make the noop clock successfully do nothing, because doing nothing and
returning an error status (which the NULL method pointers caused) isn't
nearly as useful.

Define the uart clocks so that they can be en/disabled at runtime.

Make the standard sdhci(4) driver work for the TI OMAP family SoCs.
The MMCHS hardware is pretty much a standard SDHCI v2.0 controller with a
couple quirks, which are now supported by sdhci(4) as of r254507.

This should work for all TI SoCs that use the MMCHS hardware, but it has
only been tested on AM335x right now, so this enables it on those platforms
but leaves the existing ti_mmchs driver in place for other OMAP variants
until they can be tested.

This initial incarnation lacks DMA support (coming soon). Even without it
this improves performance pretty noticibly over the ti_mmchs driver,
primarily because it now does multiblock IO.

Let the platform calculate the timer frequency at runtime, and use that for
the omap4, instead of relying on the (wrong) value provided in the dts.

Initialisation routines for the mailbox, spinlock and PRU-ICSS clocks.

Improve a comment.

Add IDs for TPS65217C and TPS65217D

- AM335x requires updated soft-reset logic too

- Add USBSS driver for AM335x SoC. Driver is a wrapper around Mentors Graphic
USB OTG core.

Don't clear the SYSCONFIG register on boot.

This follows section 18.4.2.2 SD Soft Reset Flow in the TI AM335x Technical
Reference Manual and seems to fix the "ti_mmchs0: Error: current cmd NULL,
already done?" messages.

Add support for ePWM submodule of PWMSS

ePWM is controlled by sysctl nodes dev.am335x_pwm.N.period,
dev.am335x_pwm.N.dutyA and dev.am335x_pwm.N.dutyB that controls
PWM period and duty cycles for channels A and B respectively.

Period and duty cycle are measured in clock ticks. Default
clock frequency for AM335x PWM subsystem is 100MHz

- Request non-cached memory for framebuffer
- Properly probe/initialize syscons

Print the 'setting internal ...' message only with bootverbose.

Increase the maximum KVM available on TI chips. Not sure why we suddenly need
that much, but that lets me boot with 1GB of RAM.

AM335x LCD controller driver with syscons support

Limitations:
- Raster mode only
- 24 and 32 bpp only

Add PWM module driver for AM335x. Only eCAS subsystem is supported

Export function to configure eCAS submodule from another drivers.
It's used to control LCD panel backlight on AM335x EVM.

Add SCM registers definitions for AM335x platform

Add clock definitions for LCD controller and PWM module

Back out r250768 until I can further investigate why it might
be causing problems with the BeagleBone Black boot.

Label the mmc child after the parent.

- Correct mispellings of word resource

Submitted by: Christoph Mallon <christoph.mallon@gmx.de>

Properly clean "spurious interrupt" state

Suggested by: Ian Lepore

Add a macro that gets the physical address of a memory mapped device
register from a bus space resource.

Note that this macro is just for ARM, and is intended to have a short
lifespan. The DMA engines in some SoCs need the physical address of a
memory-mapped device register as one of the arguments for the transfer.
Several scattered ad-hoc solutions have been converted to use this macro,
which now also serves to mark the places where a more complete fix needs
to be applied (after that fix has been designed).

MFcalloutng:
Switch eventtimers(9) from using struct bintime to sbintime_t.
Even before this not a single driver really supported full dynamic range of
struct bintime even in theory, not speaking about practical inexpediency.
This change legitimates the status quo and cleans up the code.

Fix typo

- Initialize GPIO_OE register based on pinmux configuration

Although AM335x TRM states that GPIO_OE register is not used and just
reflects pads configuration in practice it does control pin behavior
and shoiuld be set in addition to pinmux setup

Fix off-by-one error in sanity checks

- Fix off-by-one error when returning max pin number
- Fix GPIOGET for output pins. Requesting state for
output pin is valid operation, get the state from
TI_GPIO_DATAOUTX register

Fix copy-paste error in bus_space_unmap argument

While I'm at it - fix some style(9) issues

Submitted by: Mikael Urankar

Another overhaul of the CPSW driver for BeagleBone

Major changes:
* Finally tracked down the flow control setting that
seems to have been causing TX stalls and watchdog timeouts
* RX and TX paths now share a lot more code
* TX interrupt is no longer used; we instead GC finished
tx queue entries at the bottom of the start routine.
* TX start now queues fragmented packets directly; it only
invokes defrag() for occasional very fragmented packets.
* "sysctl dev.cpsw" dumps controller statistics and queue counts
* Host Error Interrupt will give extensive debugging information
if the controller chokes on the queued data.

Fix case for some signal names.

Submitted by: Emmanuel Vadot <elbarto@megadrive.org>

Filled in missing pads for AM335x / Beaglebone.

Submitted by: Emmanuel Vadot <elbarto@megadrive.org>

Clarify the error messages for unrecognized pins and muxtypes.

Define IPI_IRQ_START and IPI_IRQ_END.

- Identify more devices for OMAP4 SoC (up to OMAP4470)
- Whitespace fixes

Shuffle the TX underrun to work the same way as the RX underrun,
as suggested by YongHyeon PYUN.

While trying to track down the root cause for
TX stalls in this driver, I've also had some
time to evaluate the effectiveness of different
watchdog strategies.

This is the latest attempt, which consolidates
all of the watchdog logic in one place and
consistently detects TX stalls and resets within
a couple of seconds.

Overhauled CPSW driver for TI CPSW Ethernet module
(as used in AM335x SoC for BeagleBone).

Among other things:
* Watchdog reset doesn't hang the driver.
* Disconnecting cable doesn't hang the driver.
* ifconfig up/down doesn't hang the driver
* Out-of-memory no longer panics the driver.

Known issues:
* Doesn't have good support for fragmented packets
(calls m_defrag() on TX, assumes RX packets are never fragmented)
* Promisc and allmulti still unimplimented
* addmulti and delmulti still unimplemented
* TX queue still stalls (but watchdog now consistently recovers in ~5s)
* No sysctl monitoring
* Only supports port0
* No switch configuration support
* Not tested on anything but BeagleBone

Committed from: BeagleBone

PL310 driver update:

- Add pl310.disable tunable to disable L2 cache altogether. In
order to make sure that it's 100% disabled we use cache event
counters for cache line eviction and read allocate events
and panic if any of these counters increased. This is purely
for debugging purpose
- Direct access DEBUG_CTRL and CTRL might be unavailable in
unsecure mode, so use platform-specific functions for
these registers
- Replace #if 1 with proper erratum numbers
- Add erratum 753970 workaround
- Remove wait function for atomic operations
- Protect cache operations with spin mutex in order to prevent race condition
- Disable instruction cache prefetch and make sure data cache
prefetch is enabled in OMAP4-specific intialization

Mechanically substitute flags from historic mbuf allocator with
malloc(9) flags within sys.

Exceptions:

- sys/contrib not touched
- sys/mbuf.h edited manually

Fix spelling.

Strip trailing newline.

Merge the FDT versions of initarm.

The copies of initarm used on platforms with FDT support were almost
identical. The differences were pulled out into separate functions that
were called by initarm.

This change merges the, now identical, copies of initarm and a few of it's
support functions. This is a step towards a common kernel on ARMv6.

Fix SMP build for omap4

Submitted by: Giovanni Trematerra <gianni at freebsd DOT org>

Missing paren.

Pointy hat:me

set the kernelname from the boot loader environment.
This fixes kern.bootfile sysctl.

Submitted by: Giovanni Trematerra

Do proper padding of runt packets using code copied from bge(4).

Reviewed by: gnn

Refer to headers locally. This makes it a lot easier
to build this driver out-of-tree.

remove duplicate semicolons where possible.

Approved by: cperciva
MFC after: 1 week

Don't repeat the POSTREAD dma sync.

Replace deprecated M_DONTWAIT with M_NOWAIT.

Fix an mbuf leak in cpsw driver, clean up mbuf management:
* Record TX mbufs when we get them so we can release them.
* Set TX/RX mbuf slots to NULL when we are no longer responsible for them
* Move dma sync on RX into RX intr routine

Cut-and-paste dropped semicolon.

Name cpsw_stop to cpsw_stop_locked consistently with other functions
in this file that assume locks are already held.

Return correct packet size.

Remove unused variables from the OMAP ehci code.

Pull out the SoC specific parts of initarm into separate functions

Update different versions of physmap_init to be identical in preparation
for merging them.

Reduce the diff between the FDT implementations of initarm.
This only touches whitespace and comments.

Create a common set_stackptrs in sys/arm/machdep.c.

On single core devices set_stackptrs is only ever called with cpu = 0 in
initarm and will be identical to the existing function. On SMP this needs
to be implemented for sys/arm/mp_machdep.c, but the implementations are
identical for each SoC.

remove some unnecessary debugging statements, dead code and incorrect
comment...

Reviewed by: gnn, imp

Correct double "the the"

Approved by: cperciva
MFC after: 3 days

Correctly fetch the MAC address.

Break down the bytes directly into the softc;
the intermediate buffer isn't needed here.
Break down the bytes in the correct order.

Style cleanup

After r239366, fix the ti_edma3.c driver to use the
exact name as used in the FDT.

Set machine correctly on ARM. This allows universe to use the correct world
when building each kernel.

Reviewed by: imp

Specify architecture for assembler

Merging of projects/armv6, part 10

- Support for Texas Instruments SoCs:
- AM335x
- OMAP4

- Kernel configs, DTS for Beaglebone and Pandaboard

Submitted by: Ben Gray, Damjan Marion