versatile_sic.c revision 266152
1/*- 2 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD: stable/10/sys/arm/versatile/versatile_sic.c 266152 2014-05-15 16:11:06Z ian $"); 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/bus.h> 34#include <sys/kernel.h> 35#include <sys/ktr.h> 36#include <sys/module.h> 37#include <sys/rman.h> 38#include <machine/bus.h> 39#include <machine/intr.h> 40 41#include <dev/fdt/fdt_common.h> 42#include <dev/ofw/openfirm.h> 43#include <dev/ofw/ofw_bus.h> 44#include <dev/ofw/ofw_bus_subr.h> 45 46#ifdef DEBUG 47#define dprintf(fmt, args...) printf(fmt, ##args) 48#else 49#define dprintf(fmt, args...) 50#endif 51 52#define SIC_STATUS 0x00 53#define SIC_RAWSTAT 0x04 54#define SIC_ENABLE 0x08 55#define SIC_ENSET 0x08 56#define SIC_ENCLR 0x0C 57#define SIC_SOFTINTSET 0x10 58#define SIC_SOFTINTCLR 0x14 59#define SIC_PICENABLE 0x20 60#define SIC_PICENSET 0x20 61#define SIC_PICENCLR 0x24 62 63struct versatile_sic_softc { 64 device_t sc_dev; 65 struct resource * mem_res; 66}; 67 68#define sic_read_4(sc, reg) \ 69 bus_read_4(sc->mem_res, (reg)) 70#define sic_write_4(sc, reg, val) \ 71 bus_write_4(sc->mem_res, (reg), (val)) 72 73static int 74versatile_sic_probe(device_t dev) 75{ 76 77 if (!ofw_bus_status_okay(dev)) 78 return (ENXIO); 79 80 if (!ofw_bus_is_compatible(dev, "arm,versatile-sic")) 81 return (ENXIO); 82 device_set_desc(dev, "ARM Versatile SIC"); 83 return (BUS_PROBE_DEFAULT); 84} 85 86static int 87versatile_sic_attach(device_t dev) 88{ 89 struct versatile_sic_softc *sc = device_get_softc(dev); 90 uint32_t pass_irqs; 91 int rid; 92 93 sc->sc_dev = dev; 94 95 /* Request memory resources */ 96 rid = 0; 97 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 98 RF_ACTIVE); 99 if (sc->mem_res == NULL) { 100 device_printf(dev, "Error: could not allocate memory resources\n"); 101 return (ENXIO); 102 } 103 104 /* Disable all interrupts on SIC */ 105 sic_write_4(sc, SIC_ENCLR, 0xffffffff); 106 107 /* 108 * XXX: Enable IRQ3 for KMI 109 * Should be replaced by proper interrupts cascading 110 */ 111 sic_write_4(sc, SIC_ENSET, (1 << 3)); 112 113 /* 114 * Let PCI and Ethernet interrupts pass through 115 * IRQ25, IRQ27..IRQ31 116 */ 117 pass_irqs = (0x1f << 27) | (1 << 25); 118 sic_write_4(sc, SIC_PICENSET, pass_irqs); 119 120 return (0); 121} 122 123static device_method_t versatile_sic_methods[] = { 124 DEVMETHOD(device_probe, versatile_sic_probe), 125 DEVMETHOD(device_attach, versatile_sic_attach), 126 { 0, 0 } 127}; 128 129static driver_t versatile_sic_driver = { 130 "sic", 131 versatile_sic_methods, 132 sizeof(struct versatile_sic_softc), 133}; 134 135static devclass_t versatile_sic_devclass; 136 137DRIVER_MODULE(sic, simplebus, versatile_sic_driver, versatile_sic_devclass, 0, 0); 138