am335x.dtsi revision 266338
1/*-
2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 * 
26 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/am335x.dtsi 266338 2014-05-17 19:06:46Z loos $
27 */
28
29/ {
30	#address-cells = <1>;
31	#size-cells = <1>;
32
33	interrupt-parent = <&AINTC>;
34
35	SOC: am335x {
36		#address-cells = <1>;
37		#size-cells = <1>;
38		compatible = "simple-bus";
39		ranges;
40		bus-frequency = <0>;
41
42		AINTC: interrupt-controller@48200000 {
43			compatible = "ti,aintc";
44			interrupt-controller;
45			#address-cells = <0>;
46			#interrupt-cells = <1>;
47			reg =	< 0x48200000 0x1000 >;
48		};
49
50		scm@44e10000 {
51			compatible = "ti,scm";
52			reg =	< 0x44e10000 0x2000 >;
53		};
54
55		prcm@44E00000 {
56			compatible = "am335x,prcm";
57			#address-cells = <1>;
58			#size-cells = <1>;
59			reg = < 0x44E00000 0x1300 >;
60		};
61
62		dmtimers@44E05000 {
63			compatible = "ti,am335x-dmtimer";
64			#address-cells = <1>;
65			#size-cells = <1>;
66			reg =	< 0x44E05000 0x1000
67				  0x44E31000 0x1000
68				  0x48040000 0x1000
69				  0x48042000 0x1000
70				  0x48044000 0x1000
71				  0x48046000 0x1000
72				  0x48048000 0x1000
73				  0x4804A000 0x1000 >;
74			interrupts = < 66 67 68 69 92 93 94 95 >;
75			interrupt-parent = <&AINTC>;
76		};
77
78		adc0: adc@44E0D000 {
79			compatible = "ti,adc";
80			reg = <0x44E0D000 0x2000>;
81			interrupts = < 16 >;
82			interrupt-parent = <&AINTC>;
83 		};
84 		
85		GPIO: gpio {
86			#gpio-cells = <3>;
87			compatible = "ti,gpio";
88			gpio-controller;
89			reg =<	0x44E07000 0x1000
90				0x4804C000 0x1000
91				0x481AC000 0x1000
92				0x481AE000 0x1000 >;
93			interrupts = < 96 97 98 99 32 33 62 63 >;
94			interrupt-parent = <&AINTC>;
95		};
96
97		uart0: serial@44E09000 {
98			compatible = "ti,ns16550";
99			reg = <0x44E09000 0x1000>;
100			reg-shift = <2>;
101			interrupts = < 72 >;
102			interrupt-parent = <&AINTC>;
103 			clock-frequency = < 48000000 >;
104			uart-device-id = < 0 >;
105 		};
106 		
107 		uart1: serial@48022000 {
108 			compatible = "ti,ns16550";
109 			reg = <0x48022000 0x1000>;
110 			reg-shift = <2>;
111 			interrupts = < 73 >;
112 			interrupt-parent = <&AINTC>;
113 			clock-frequency = < 48000000 >; 
114			uart-device-id = < 1 >;
115			status = "disabled";
116 		};
117 		
118 		uart2: serial@48024000 {
119 			compatible = "ti,ns16550";
120 			reg = <0x48024000 0x1000>;
121 			reg-shift = <2>;
122 			interrupts = < 74 >;
123 			interrupt-parent = <&AINTC>;
124 			clock-frequency = < 48000000 >; 
125			uart-device-id = < 2 >;
126			status = "disabled";
127 		};
128 		
129 		uart3: serial@481a6000 {
130 			compatible = "ti,ns16550";
131 			reg = <0x481A6000 0x1000>;
132 			reg-shift = <2>;
133 			interrupts = < 44 >;
134 			interrupt-parent = <&AINTC>;
135 			clock-frequency = < 48000000 >; 
136			uart-device-id = < 3 >;
137			status = "disabled";
138 		};
139 
140 		uart4: serial@481a8000 {
141 			compatible = "ti,ns16550";
142 			reg = <0x481A8000 0x1000>;
143 			reg-shift = <2>;
144 			interrupts = < 45 >;
145 			interrupt-parent = <&AINTC>;
146 			clock-frequency = < 48000000 >; 
147			uart-device-id = < 4 >;
148			status = "disabled";
149 		};
150 
151 		uart5: serial@481aa000 {
152 			compatible = "ti,ns16550";
153 			reg = <0x481AA000 0x1000>;
154 			reg-shift = <2>;
155 			interrupts = < 46 >;
156 			interrupt-parent = <&AINTC>;
157 			clock-frequency = < 48000000 >; 
158			uart-device-id = < 5 >;
159			status = "disabled";
160  		};
161
162		edma3@49000000 {
163			compatible = "ti,edma3";
164			reg =<	0x49000000 0x100000	/* Channel Controller Regs */
165				0x49800000 0x100000	/* Transfer Controller 0 Regs */
166				0x49900000 0x100000	/* Transfer Controller 1 Regs */
167				0x49a00000 0x100000 >;	/* Transfer Controller 2 Regs */
168			interrupts = <12 13 14>;
169			interrupt-parent = <&AINTC>;
170		};
171
172		mmchs0@48060000 {
173			compatible = "ti,omap3-hsmmc", "ti,mmchs";
174			reg =<0x48060000 0x1000 >;
175			interrupts = <64>;
176			interrupt-parent = <&AINTC>;
177			mmchs-device-id = <0>;
178			mmchs-wp-gpio-pin = <0xffffffff>;
179			ti,dual-volt;
180		};
181
182		mmchs1@481D8000 {
183			compatible = "ti,omap3-hsmmc", "ti,mmchs";
184			reg =<0x481D8000 0x1000 >;
185			interrupts = <28>;
186			interrupt-parent = <&AINTC>;
187			mmchs-device-id = <1>;
188			mmchs-wp-gpio-pin = <0xffffffff>;
189			status = "disabled";
190		};
191
192		enet0: ethernet@4A100000 {
193			#address-cells = <1>;
194			#size-cells = <1>;
195			compatible = "ti,cpsw";
196			reg = <0x4A100000 0x4000>;
197			interrupts = <40 41 42 43>;
198			interrupt-parent = <&AINTC>;
199			phy-handle = <&phy0>;
200			mdio@0 {
201				#address-cells = <1>;
202				#size-cells = <0>;
203				compatible = "ti,cpsw-mdio";
204				phy0: ethernet-phy@0 {
205					reg = <0x0>;
206				};
207			};
208		};
209
210		i2c0: i2c@44e0b000 {
211			#address-cells = <1>;
212			#size-cells = <0>;
213			compatible = "ti,i2c";
214			reg =<	0x44e0b000 0x1000 >;
215			interrupts = <70>;
216			interrupt-parent = <&AINTC>;
217			i2c-device-id = <0>;
218		};
219
220		i2c1: i2c@4802a000 {
221			#address-cells = <1>;
222			#size-cells = <0>;
223			compatible = "ti,i2c";
224			reg =<  0x4802a000 0x1000 >;
225			interrupts = <71>;
226			interrupt-parent = <&AINTC>;
227			i2c-device-id = <1>;
228		};
229
230		i2c2: i2c@4819c000 {
231			#address-cells = <1>;
232			#size-cells = <0>;
233			compatible = "ti,i2c";
234			reg =<  0x4819c000 0x1000 >;
235			interrupts = <30>;
236			interrupt-parent = <&AINTC>;
237			i2c-device-id = <2>;
238		};
239
240		pwm@48300000 {
241			compatible = "ti,am335x-pwm";
242			#address-cells = <1>;
243			#size-cells = <1>;
244			reg = < 0x48300000 0x100	/* PWMSS0 */
245				0x48300100 0x80		/* eCAP0 */
246				0x48300180 0x80		/* eQEP0 */
247				0x48300200 0x60		/* ePWM0 */
248			>;
249			interrupts = <86 58>; /* ePWM0INT, ePWM0_TZINT */
250			interrupt-parent = <&AINTC>;
251			pwm-device-id = <0>;
252		};
253
254		pwm@48302000 {
255			compatible = "ti,am335x-pwm";
256			#address-cells = <1>;
257			#size-cells = <1>;
258			reg = < 0x48302000 0x100	/* PWMSS1 */
259				0x48302100 0x80		/* eCAP1 */
260				0x48302180 0x80		/* eQEP1 */
261				0x48302200 0x60		/* ePWM1 */
262			>;
263			interrupts = <87 59>; /* ePWM1INT, ePWM1_TZINT */
264			interrupt-parent = <&AINTC>;
265			pwm-device-id = <1>;
266		};
267
268		pwm@48304000 {
269			compatible = "ti,am335x-pwm";
270			#address-cells = <1>;
271			#size-cells = <1>;
272			reg = < 0x48304000 0x100	/* PWMSS2 */
273				0x48304100 0x80		/* eCAP2 */
274				0x48304180 0x80		/* eQEP2 */
275				0x48304200 0x60		/* ePWM2 */
276			>;
277			interrupts = <88 60>; /* ePWM2INT, ePWM2_TZINT */
278			interrupt-parent = <&AINTC>;
279			pwm-device-id = <2>;
280		};
281
282		lcd: lcd@4830e000 {
283			#address-cells = <1>;
284			#size-cells = <0>;
285			compatible = "ti,am335x-lcd";
286			reg =<	0x4830e000 0x1000 >;
287			interrupts = <36>;
288			interrupt-parent = <&AINTC>;
289		};
290
291 		usb@47400000 {
292 			#address-cells = <1>;
293 			#size-cells = <0>;
294 			compatible = "ti,musb-am33xx";
295 			reg =<	0x47400000 0x1000	/* USBSS */
296 				0x47401000 0x300	/* USB0 */
297 				0x47401300 0x100 	/* USB0_PHY */
298 				0x47401400 0x400 	/* USB0_CORE */
299 				0x47401800 0x300 	/* USB1 */
300 				0x47401B00 0x100 	/* USB1_PHY */
301 				0x47401C00 0x400 	/* USB1_CORE */
302 			>;
303 			interrupts = <17 18 19>;
304 			interrupt-parent = <&AINTC>;
305 			/* 1 - Host Mode, 0 - Device Mode */
306 			modemask = <2>;
307 		};
308
309		mbox0@480C8000 {
310			compatible = "am335x,system-mbox";
311			reg = < 0x480C8000 0x1000 >;
312			interrupts = <77>;
313			interrupt-parent = <&AINTC>;
314		};
315
316		spinlock0@480CA000 {
317			compatible = "am335x,spinlock";
318			reg = < 0x480CA000 0x1000 >;
319		};
320
321		pruss@4A300000 {
322			compatible = "ti,pruss-v2";
323			reg = <0x4A300000 0x80000>;
324 			interrupt-parent = <&AINTC>;
325			interrupts = <20 21 22 23 24 25 26 27>;
326		};
327	};
328};
329