zy7_ehci.c revision 308402 
1/*-
2 * Copyright (c) 2012-2013 Thomas Skibo
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: stable/10/sys/arm/xilinx/zy7_ehci.c 308402 2016-11-07 09:19:04Z hselasky $
27 */
28
29/*
30 * A host-controller driver for Zynq-7000's USB OTG controller.
31 *
32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
33 * (v1.4) November 16, 2012.  Xilinx doc UG585.  Ch. 15 covers the USB
34 * controller and register definitions are in appendix B.34.
35 */
36
37
38#include <sys/cdefs.h>
39__FBSDID("$FreeBSD: stable/10/sys/arm/xilinx/zy7_ehci.c 308402 2016-11-07 09:19:04Z hselasky $");
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/bus.h>
44#include <sys/conf.h>
45#include <sys/kernel.h>
46#include <sys/lock.h>
47#include <sys/module.h>
48#include <sys/mutex.h>
49#include <sys/condvar.h>
50#include <sys/resource.h>
51#include <sys/rman.h>
52
53#include <machine/bus.h>
54#include <machine/resource.h>
55#include <machine/stdarg.h>
56
57#include <dev/fdt/fdt_common.h>
58#include <dev/ofw/ofw_bus.h>
59#include <dev/ofw/ofw_bus_subr.h>
60
61#include <dev/usb/usb.h>
62#include <dev/usb/usbdi.h>
63
64#include <dev/usb/usb_core.h>
65#include <dev/usb/usb_busdma.h>
66#include <dev/usb/usb_process.h>
67#include <dev/usb/usb_util.h>
68
69#include <dev/usb/usb_controller.h>
70#include <dev/usb/usb_bus.h>
71#include <dev/usb/controller/ehci.h>
72#include <dev/usb/controller/ehcireg.h>
73
74
75/* Register definitions. */
76#define ZY7_USB_ID				0x0000
77#define ZY7_USB_HWGENERAL			0x0004
78#define ZY7_USB_HWHOST				0x0008
79#define ZY7_USB_HWDEVICE			0x000c
80#define ZY7_USB_HWTXBUF				0x0010
81#define ZY7_USB_HWRXBUF				0x0014
82#define ZY7_USB_GPTIMER0LD			0x0080
83#define ZY7_USB_GPTIMER0CTRL			0x0084
84#define ZY7_USB_GPTIMER1LD			0x0088
85#define ZY7_USB_GPTIMER1CTRL			0x008c
86#define ZY7_USB_SBUSCFG				0x0090
87#define ZY7_USB_CAPLENGTH_HCIVERSION		0x0100
88#define ZY7_USB_HCSPARAMS			0x0104
89#define ZY7_USB_HCCPARAMS			0x0108
90#define ZY7_USB_DCIVERSION			0x0120
91#define ZY7_USB_DCCPARAMS			0x0124
92#define ZY7_USB_USBCMD				0x0140
93#define ZY7_USB_USBSTS				0x0144
94#define ZY7_USB_USBINTR				0x0148
95#define ZY7_USB_FRINDEX				0x014c
96#define ZY7_USB_PERIODICLISTBASE_DEICEADDR 	0x0154
97#define ZY7_USB_ASYNCLISTADDR_ENDPOINTLISTADDR 	0x0158
98#define ZY7_USB_TTCTRL				0x015c
99#define ZY7_USB_BURSTSIZE			0x0160
100#define ZY7_USB_TXFILLTUNING			0x0164
101#define   ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT		16
102#define   ZY7_USB_TXFILLTUNING_TXFIFOTHRES_MASK		(0x3f<<16)
103#define ZY7_USB_TXTFILLTUNING			0x0168
104#define ZY7_USB_IC_USB				0x016c
105#define ZY7_USB_ULPI_VIEWPORT			0x0170
106#define   ZY7_USB_ULPI_VIEWPORT_WU			(1<<31)
107#define   ZY7_USB_ULPI_VIEWPORT_RUN			(1<<30)
108#define   ZY7_USB_ULPI_VIEWPORT_RW			(1<<29)
109#define   ZY7_USB_ULPI_VIEWPORT_SS			(1<<27)
110#define   ZY7_USB_ULPI_VIEWPORT_PORT_MASK		(7<<24)
111#define   ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT		24
112#define   ZY7_USB_ULPI_VIEWPORT_ADDR_MASK		(0xff<<16)
113#define   ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT		16
114#define   ZY7_USB_ULPI_VIEWPORT_DATARD_MASK		(0xff<<8)
115#define   ZY7_USB_ULPI_VIEWPORT_DATARD_SHIFT		8
116#define   ZY7_USB_ULPI_VIEWPORT_DATAWR_MASK		(0xff<<0)
117#define   ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT		0
118#define ZY7_USB_ENDPTNAK			0x0178
119#define ZY7_USB_ENDPTNAKEN			0x017c
120#define ZY7_USB_CONFIGFLAG			0x0180
121#define ZY7_USB_PORTSC(n)			(0x0180+4*(n))
122#define   ZY7_USB_PORTSC_PTS_MASK			(3<<30)
123#define   ZY7_USB_PORTSC_PTS_SHIFT			30
124#define   ZY7_USB_PORTSC_PTS_UTMI			(0<<30)
125#define   ZY7_USB_PORTSC_PTS_ULPI			(2<<30)
126#define   ZY7_USB_PORTSC_PTS_SERIAL			(3<<30)
127#define   ZY7_USB_PORTSC_PTW				(1<<28)
128#define   ZY7_USB_PORTSC_PTS2				(1<<25)
129#define ZY7_USB_OTGSC				0x01a4
130#define ZY7_USB_USBMODE				0x01a8
131#define ZY7_USB_ENDPTSETUPSTAT			0x01ac
132#define ZY7_USB_ENDPTPRIME			0x01b0
133#define ZY7_USB_ENDPTFLUSH			0x01b4
134#define ZY7_USB_ENDPTSTAT			0x01b8
135#define ZY7_USB_ENDPTCOMPLETE			0x01bc
136#define ZY7_USB_ENDPTCTRL(n)			(0x01c0+4*(n))
137
138#define EHCI_REG_OFFSET	ZY7_USB_CAPLENGTH_HCIVERSION
139#define EHCI_REG_SIZE	0x100
140
141static int
142zy7_phy_config(device_t dev, bus_space_tag_t io_tag, bus_space_handle_t bsh)
143{
144	phandle_t node;
145	char buf[64];
146	uint32_t portsc;
147	int tries;
148
149	node = ofw_bus_get_node(dev);
150
151	if (OF_getprop(node, "phy_type", buf, sizeof(buf)) > 0) {
152		portsc = bus_space_read_4(io_tag, bsh, ZY7_USB_PORTSC(1));
153		portsc &= ~(ZY7_USB_PORTSC_PTS_MASK | ZY7_USB_PORTSC_PTW |
154			    ZY7_USB_PORTSC_PTS2);
155
156		if (strcmp(buf,"ulpi") == 0)
157			portsc |= ZY7_USB_PORTSC_PTS_ULPI;
158		else if (strcmp(buf,"utmi") == 0)
159			portsc |= ZY7_USB_PORTSC_PTS_UTMI;
160		else if (strcmp(buf,"utmi-wide") == 0)
161			portsc |= (ZY7_USB_PORTSC_PTS_UTMI |
162				   ZY7_USB_PORTSC_PTW);
163		else if (strcmp(buf, "serial") == 0)
164			portsc |= ZY7_USB_PORTSC_PTS_SERIAL;
165
166		bus_space_write_4(io_tag, bsh, ZY7_USB_PORTSC(1), portsc);
167	}
168
169	if (OF_getprop(node, "phy_vbus_ext", buf, sizeof(buf)) >= 0) {
170
171		/* Tell PHY that VBUS is supplied externally. */
172		bus_space_write_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT,
173				  ZY7_USB_ULPI_VIEWPORT_RUN |
174				  ZY7_USB_ULPI_VIEWPORT_RW |
175				  (0 << ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT) |
176				  (0x0b << ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT) |
177				  (0x60 << ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT)
178			);
179
180		tries = 100;
181		while ((bus_space_read_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT) &
182			ZY7_USB_ULPI_VIEWPORT_RUN) != 0) {
183			if (--tries < 0)
184				return (-1);
185			DELAY(1);
186		}
187	}
188
189	return (0);
190}
191
192static int
193zy7_ehci_probe(device_t dev)
194{
195
196	if (!ofw_bus_status_okay(dev))
197		return (ENXIO);
198
199	if (!ofw_bus_is_compatible(dev, "xlnx,zy7_ehci"))
200		return (ENXIO);
201
202	device_set_desc(dev, "Zynq-7000 EHCI USB 2.0 controller");
203	return (0);
204}
205
206static int zy7_ehci_detach(device_t dev);
207
208static int
209zy7_ehci_attach(device_t dev)
210{
211	ehci_softc_t *sc = device_get_softc(dev);
212	bus_space_handle_t bsh;
213	int err, rid;
214
215	/* initialize some bus fields */
216	sc->sc_bus.parent = dev;
217	sc->sc_bus.devices = sc->sc_devices;
218	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
219	sc->sc_bus.dma_bits = 32;
220
221	/* get all DMA memory */
222	if (usb_bus_mem_alloc_all(&sc->sc_bus,
223	    USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc))
224		return (ENOMEM);
225
226	/* Allocate memory. */
227	rid = 0;
228	sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
229					       &rid, RF_ACTIVE);
230	if (sc->sc_io_res == NULL) {
231		device_printf(dev, "Can't allocate memory");
232		zy7_ehci_detach(dev);
233		return (ENOMEM);
234	}
235
236	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
237	bsh = rman_get_bushandle(sc->sc_io_res);
238	sc->sc_io_size = EHCI_REG_SIZE;
239
240	if (bus_space_subregion(sc->sc_io_tag, bsh, EHCI_REG_OFFSET,
241				sc->sc_io_size, &sc->sc_io_hdl) != 0)
242		panic("%s: unable to subregion USB host registers",
243		      device_get_name(dev));
244
245	/* Allocate IRQ. */
246	rid = 0;
247	sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
248						RF_ACTIVE);
249	if (sc->sc_irq_res == NULL) {
250		device_printf(dev, "Can't allocate IRQ\n");
251		zy7_ehci_detach(dev);
252		return (ENOMEM);
253	}
254
255	/* Add USB device */
256	sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
257	if (!sc->sc_bus.bdev) {
258		device_printf(dev, "Could not add USB device\n");
259		zy7_ehci_detach(dev);
260		return (ENXIO);
261	}
262	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
263	device_set_desc(sc->sc_bus.bdev, "Zynq-7000 ehci USB 2.0 controller");
264
265	strcpy(sc->sc_vendor, "Xilinx"); /* or IP vendor? */
266
267	/* Activate the interrupt */
268	err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
269			     NULL, (driver_intr_t *)ehci_interrupt, sc,
270			     &sc->sc_intr_hdl);
271	if (err) {
272		device_printf(dev, "Cannot setup IRQ\n");
273		zy7_ehci_detach(dev);
274		return (err);
275	}
276
277	/* Customization. */
278	sc->sc_flags |= EHCI_SCFLG_SETMODE | EHCI_SCFLG_TT |
279		EHCI_SCFLG_NORESTERM;
280
281	/* Modify FIFO burst threshold from 2 to 8. */
282	bus_space_write_4(sc->sc_io_tag, bsh,
283			  ZY7_USB_TXFILLTUNING,
284			  8 << ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT);
285
286	/* Handle PHY options. */
287	if (zy7_phy_config(dev, sc->sc_io_tag, bsh) < 0) {
288		device_printf(dev, "Cannot config phy!\n");
289		zy7_ehci_detach(dev);
290		return (EIO);
291	}
292
293	/* Init ehci. */
294	err = ehci_init(sc);
295	if (!err) {
296		sc->sc_flags |= EHCI_SCFLG_DONEINIT;
297		err = device_probe_and_attach(sc->sc_bus.bdev);
298	}
299	if (err) {
300		device_printf(dev, "USB init failed err=%d\n", err);
301		zy7_ehci_detach(dev);
302		return (err);
303	}
304
305	return (0);
306}
307
308static int
309zy7_ehci_detach(device_t dev)
310{
311	ehci_softc_t *sc = device_get_softc(dev);
312
313	/* during module unload there are lots of children leftover */
314	device_delete_children(dev);
315
316	sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
317
318	if (sc->sc_irq_res && sc->sc_intr_hdl)
319		/* call ehci_detach() after ehci_init() called after
320		 * successful bus_setup_intr().
321		 */
322		ehci_detach(sc);
323
324	if (sc->sc_irq_res) {
325		if (sc->sc_intr_hdl != NULL)
326			bus_teardown_intr(dev, sc->sc_irq_res,
327					  sc->sc_intr_hdl);
328		bus_release_resource(dev, SYS_RES_IRQ,
329			     rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
330	}
331
332	if (sc->sc_io_res)
333		bus_release_resource(dev, SYS_RES_MEMORY,
334			     rman_get_rid(sc->sc_io_res), sc->sc_io_res);
335	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
336
337	return (0);
338}
339
340static device_method_t ehci_methods[] = {
341	/* Device interface */
342	DEVMETHOD(device_probe,		zy7_ehci_probe),
343	DEVMETHOD(device_attach, 	zy7_ehci_attach),
344	DEVMETHOD(device_detach, 	zy7_ehci_detach),
345	DEVMETHOD(device_suspend, 	bus_generic_suspend),
346	DEVMETHOD(device_resume, 	bus_generic_resume),
347	DEVMETHOD(device_shutdown, 	bus_generic_shutdown),
348
349	/* Bus interface */
350	DEVMETHOD(bus_print_child, bus_generic_print_child),
351
352	DEVMETHOD_END
353};
354
355static driver_t ehci_driver = {
356	"ehci",
357	ehci_methods,
358	sizeof(struct ehci_softc),
359};
360static devclass_t ehci_devclass;
361
362DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, NULL, NULL);
363MODULE_DEPEND(ehci, usb, 1, 1, 1);
364