am335x.dtsi revision 278079
1/*-
2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 * 
26 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/am335x.dtsi 278079 2015-02-02 12:48:13Z loos $
27 */
28
29/ {
30	#address-cells = <1>;
31	#size-cells = <1>;
32
33	interrupt-parent = <&AINTC>;
34
35	SOC: am335x {
36		#address-cells = <1>;
37		#size-cells = <1>;
38		compatible = "simple-bus";
39		ranges;
40		bus-frequency = <0>;
41
42		AINTC: interrupt-controller@48200000 {
43			compatible = "ti,aintc";
44			interrupt-controller;
45			#address-cells = <0>;
46			#interrupt-cells = <1>;
47			reg =	< 0x48200000 0x1000 >;
48		};
49
50		scm@44e10000 {
51			compatible = "ti,scm";
52			reg =	< 0x44e10000 0x2000 >;
53		};
54
55		prcm@44E00000 {
56			compatible = "am335x,prcm";
57			#address-cells = <1>;
58			#size-cells = <1>;
59			reg = < 0x44E00000 0x1300 >;
60		};
61
62		dmtimers@44E05000 {
63			compatible = "ti,am335x-dmtimer";
64			#address-cells = <1>;
65			#size-cells = <1>;
66			reg =	< 0x44E05000 0x1000
67				  0x44E31000 0x1000
68				  0x48040000 0x1000
69				  0x48042000 0x1000
70				  0x48044000 0x1000
71				  0x48046000 0x1000
72				  0x48048000 0x1000
73				  0x4804A000 0x1000 >;
74			interrupts = < 66 67 68 69 92 93 94 95 >;
75			interrupt-parent = <&AINTC>;
76		};
77
78		rtc: rtc@44E3E000 {
79			compatible = "ti,da830-rtc";
80			reg = <0x44E3E000 0x1000>;
81			interrupts = < 75 76 >;
82			interrupt-parent = <&AINTC>;
83		};
84
85		adc0: adc@44E0D000 {
86			compatible = "ti,adc";
87			reg = <0x44E0D000 0x2000>;
88			interrupts = < 16 >;
89			interrupt-parent = <&AINTC>;
90 		};
91
92		wdt1@44E35000 {
93			compatible = "ti,omap3-wdt";
94			reg = <0x44E35000 0x1000>;
95			interrupts = <91>;
96			interrupt-parent = <&AINTC>;
97		};
98 		
99		GPIO: gpio {
100			#gpio-cells = <3>;
101			compatible = "ti,gpio";
102			gpio-controller;
103			reg =<	0x44E07000 0x1000
104				0x4804C000 0x1000
105				0x481AC000 0x1000
106				0x481AE000 0x1000 >;
107			interrupts = < 96 97 98 99 32 33 62 63 >;
108			interrupt-parent = <&AINTC>;
109		};
110
111		uart0: serial@44E09000 {
112			compatible = "ti,ns16550";
113			reg = <0x44E09000 0x1000>;
114			reg-shift = <2>;
115			interrupts = < 72 >;
116			interrupt-parent = <&AINTC>;
117 			clock-frequency = < 48000000 >;
118			uart-device-id = < 0 >;
119 		};
120 		
121 		uart1: serial@48022000 {
122 			compatible = "ti,ns16550";
123 			reg = <0x48022000 0x1000>;
124 			reg-shift = <2>;
125 			interrupts = < 73 >;
126 			interrupt-parent = <&AINTC>;
127 			clock-frequency = < 48000000 >; 
128			uart-device-id = < 1 >;
129			status = "disabled";
130 		};
131 		
132 		uart2: serial@48024000 {
133 			compatible = "ti,ns16550";
134 			reg = <0x48024000 0x1000>;
135 			reg-shift = <2>;
136 			interrupts = < 74 >;
137 			interrupt-parent = <&AINTC>;
138 			clock-frequency = < 48000000 >; 
139			uart-device-id = < 2 >;
140			status = "disabled";
141 		};
142 		
143 		uart3: serial@481a6000 {
144 			compatible = "ti,ns16550";
145 			reg = <0x481A6000 0x1000>;
146 			reg-shift = <2>;
147 			interrupts = < 44 >;
148 			interrupt-parent = <&AINTC>;
149 			clock-frequency = < 48000000 >; 
150			uart-device-id = < 3 >;
151			status = "disabled";
152 		};
153 
154 		uart4: serial@481a8000 {
155 			compatible = "ti,ns16550";
156 			reg = <0x481A8000 0x1000>;
157 			reg-shift = <2>;
158 			interrupts = < 45 >;
159 			interrupt-parent = <&AINTC>;
160 			clock-frequency = < 48000000 >; 
161			uart-device-id = < 4 >;
162			status = "disabled";
163 		};
164 
165 		uart5: serial@481aa000 {
166 			compatible = "ti,ns16550";
167 			reg = <0x481AA000 0x1000>;
168 			reg-shift = <2>;
169 			interrupts = < 46 >;
170 			interrupt-parent = <&AINTC>;
171 			clock-frequency = < 48000000 >; 
172			uart-device-id = < 5 >;
173			status = "disabled";
174  		};
175
176		edma3@49000000 {
177			compatible = "ti,edma3";
178			reg =<	0x49000000 0x100000	/* Channel Controller Regs */
179				0x49800000 0x100000	/* Transfer Controller 0 Regs */
180				0x49900000 0x100000	/* Transfer Controller 1 Regs */
181				0x49a00000 0x100000 >;	/* Transfer Controller 2 Regs */
182			interrupts = <12 13 14>;
183			interrupt-parent = <&AINTC>;
184		};
185
186		mmchs0@48060000 {
187			compatible = "ti,omap3-hsmmc", "ti,mmchs";
188			reg =<0x48060000 0x1000 >;
189			interrupts = <64>;
190			interrupt-parent = <&AINTC>;
191			mmchs-device-id = <0>;
192			mmchs-wp-gpio-pin = <0xffffffff>;
193			ti,dual-volt;
194		};
195
196		mmchs1@481D8000 {
197			compatible = "ti,omap3-hsmmc", "ti,mmchs";
198			reg =<0x481D8000 0x1000 >;
199			interrupts = <28>;
200			interrupt-parent = <&AINTC>;
201			mmchs-device-id = <1>;
202			mmchs-wp-gpio-pin = <0xffffffff>;
203			status = "disabled";
204		};
205
206		enet0: ethernet@4A100000 {
207			#address-cells = <1>;
208			#size-cells = <1>;
209			compatible = "ti,cpsw";
210			reg = <0x4A100000 0x4000>;
211			interrupts = <40 41 42 43>;
212			interrupt-parent = <&AINTC>;
213			phy-handle = <&phy0>;
214			mdio@0 {
215				#address-cells = <1>;
216				#size-cells = <0>;
217				compatible = "ti,cpsw-mdio";
218				phy0: ethernet-phy@0 {
219					reg = <0x0>;
220				};
221			};
222		};
223
224		i2c0: i2c@44e0b000 {
225			#address-cells = <1>;
226			#size-cells = <0>;
227			compatible = "ti,i2c";
228			reg =<	0x44e0b000 0x1000 >;
229			interrupts = <70>;
230			interrupt-parent = <&AINTC>;
231			i2c-device-id = <0>;
232		};
233
234		i2c1: i2c@4802a000 {
235			#address-cells = <1>;
236			#size-cells = <0>;
237			compatible = "ti,i2c";
238			reg =<  0x4802a000 0x1000 >;
239			interrupts = <71>;
240			interrupt-parent = <&AINTC>;
241			i2c-device-id = <1>;
242		};
243
244		i2c2: i2c@4819c000 {
245			#address-cells = <1>;
246			#size-cells = <0>;
247			compatible = "ti,i2c";
248			reg =<  0x4819c000 0x1000 >;
249			interrupts = <30>;
250			interrupt-parent = <&AINTC>;
251			i2c-device-id = <2>;
252		};
253
254		pwm@48300000 {
255			compatible = "ti,am335x-pwm";
256			#address-cells = <1>;
257			#size-cells = <1>;
258			reg = < 0x48300000 0x100	/* PWMSS0 */
259				0x48300100 0x80		/* eCAP0 */
260				0x48300180 0x80		/* eQEP0 */
261				0x48300200 0x60		/* ePWM0 */
262			>;
263			interrupts = <86 58>; /* ePWM0INT, ePWM0_TZINT */
264			interrupt-parent = <&AINTC>;
265			pwm-device-id = <0>;
266		};
267
268		pwm@48302000 {
269			compatible = "ti,am335x-pwm";
270			#address-cells = <1>;
271			#size-cells = <1>;
272			reg = < 0x48302000 0x100	/* PWMSS1 */
273				0x48302100 0x80		/* eCAP1 */
274				0x48302180 0x80		/* eQEP1 */
275				0x48302200 0x60		/* ePWM1 */
276			>;
277			interrupts = <87 59>; /* ePWM1INT, ePWM1_TZINT */
278			interrupt-parent = <&AINTC>;
279			pwm-device-id = <1>;
280		};
281
282		pwm@48304000 {
283			compatible = "ti,am335x-pwm";
284			#address-cells = <1>;
285			#size-cells = <1>;
286			reg = < 0x48304000 0x100	/* PWMSS2 */
287				0x48304100 0x80		/* eCAP2 */
288				0x48304180 0x80		/* eQEP2 */
289				0x48304200 0x60		/* ePWM2 */
290			>;
291			interrupts = <88 60>; /* ePWM2INT, ePWM2_TZINT */
292			interrupt-parent = <&AINTC>;
293			pwm-device-id = <2>;
294		};
295
296		lcd: lcd@4830e000 {
297			#address-cells = <1>;
298			#size-cells = <0>;
299			compatible = "ti,am335x-lcd";
300			reg =<	0x4830e000 0x1000 >;
301			interrupts = <36>;
302			interrupt-parent = <&AINTC>;
303		};
304
305 		usb@47400000 {
306 			#address-cells = <1>;
307 			#size-cells = <0>;
308 			compatible = "ti,musb-am33xx";
309 			reg =<	0x47400000 0x1000	/* USBSS */
310 				0x47401000 0x300	/* USB0 */
311 				0x47401300 0x100 	/* USB0_PHY */
312 				0x47401400 0x400 	/* USB0_CORE */
313 				0x47401800 0x300 	/* USB1 */
314 				0x47401B00 0x100 	/* USB1_PHY */
315 				0x47401C00 0x400 	/* USB1_CORE */
316 			>;
317 			interrupts = <17 18 19>;
318 			interrupt-parent = <&AINTC>;
319 			/* 1 - Host Mode, 0 - Device Mode */
320 			modemask = <2>;
321 		};
322
323		mbox0@480C8000 {
324			compatible = "am335x,system-mbox";
325			reg = < 0x480C8000 0x1000 >;
326			interrupts = <77>;
327			interrupt-parent = <&AINTC>;
328		};
329
330		spinlock0@480CA000 {
331			compatible = "am335x,spinlock";
332			reg = < 0x480CA000 0x1000 >;
333		};
334
335		pruss@4A300000 {
336			compatible = "ti,pruss-v2";
337			reg = <0x4A300000 0x80000>;
338 			interrupt-parent = <&AINTC>;
339			interrupts = <20 21 22 23 24 25 26 27>;
340		};
341	};
342};
343