pandaboard.dts revision 266751
1/*-
2 * Copyright (c) 2011 The FreeBSD Foundation
3 * All rights reserved.
4 *
5 * Developed by Damjan Marion <damjan.marion@gmail.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 * 
28 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/pandaboard.dts 266751 2014-05-27 15:30:24Z ian $
29 */
30
31/dts-v1/;
32
33/ {
34	model = "pandaboard";
35	compatible = "pandaboard", "ti,omap4430";
36	#address-cells = <1>;
37	#size-cells = <1>;
38
39	interrupt-parent = <&GIC>;
40
41	aliases {
42		soc = &SOC;
43		uart3 = &uart3;
44	};
45
46	memory {
47		device_type = "memory";
48		reg = < 0x80000000 0x40000000 >;	/* 1GB RAM at 0x0 */
49	};
50
51	SOC: omap4430 {
52		#address-cells = <1>;
53		#size-cells = <1>;
54		compatible = "simple-bus";
55		ranges;
56		bus-frequency = <0>;
57
58		GIC: interrupt-controller@48241000 {
59			compatible = "arm,gic";
60			interrupt-controller;
61			#address-cells = <0>;
62			#interrupt-cells = <1>;
63			reg =	< 0x48241000 0x1000 >,	/* Distributor Registers */
64				< 0x48240100 0x0100 >;	/* CPU Interface Registers */
65		};
66
67		omap4_prcm@4a306000 {
68	   		compatible = "ti,omap4_prcm";
69   			reg =<  0x4a306000 0x2000
70			    0x4a004000 0x1000
71			    0x4a008000 0x8000>;
72		};
73				     
74		pl310@48242000 {
75			compatible = "arm,pl310";
76			reg = < 0x48242000 0x1000 >;
77			interrupts = < 32 >;
78			interrupt-parent = < &GIC >;
79		};
80		mp_tmr@48240200 {
81			compatible = "arm,mpcore-timers";
82			#address-cells = <1>;
83			#size-cells = <0>;
84			reg =	< 0x48240200 0x100 >, /* Global Timer Registers */
85				< 0x48240600 0x100 >; /* Private Timer Registers */
86			interrupts = < 27 29 >;
87			interrupt-parent = < &GIC >;
88		};
89
90		uart3: serial@48020000 {
91			compatible = "ns16550";
92			reg = <0x48020000 0x1000>;
93			reg-shift = <2>;
94			interrupts = < 106 >;
95			interrupt-parent = <&GIC>;
96			clock-frequency = < 48000000 >; /* 48Mhz clock for all uarts */
97							/* (techref 17.3.1.1) */
98		};
99
100		scm@4a100000 {
101			compatible = "ti,scm";
102			reg =	< 0x4a100000 0x1000 >;
103			/* Set of triplets < padname, muxname, padstate> */
104			scm-pad-config = 
105				"ag19", "usbb1_ulpiphy_stp", "output",
106				"ae18", "usbb1_ulpiphy_clk", "input_pulldown",
107				"af19", "usbb1_ulpiphy_dir", "input_pulldown",
108				"ae19", "usbb1_ulpiphy_nxt", "input_pulldown",
109				"af18", "usbb1_ulpiphy_dat0", "input_pulldown",
110				"ag18", "usbb1_ulpiphy_dat1", "input_pulldown",
111				"ae17", "usbb1_ulpiphy_dat2", "input_pulldown",
112				"af17", "usbb1_ulpiphy_dat3", "input_pulldown",
113				"ah17", "usbb1_ulpiphy_dat4", "input_pulldown",
114				"ae16", "usbb1_ulpiphy_dat5", "input_pulldown",
115				"af16", "usbb1_ulpiphy_dat6", "input_pulldown",
116				"ag16", "usbb1_ulpiphy_dat7", "input_pulldown";
117		};
118
119		GPIO: gpio {
120			#gpio-cells = <3>;
121			compatible = "ti,gpio";
122			gpio-controller;
123			reg =<	0x4a310000 0x1000
124				0x48055000 0x1000
125				0x48057000 0x1000
126				0x48059000 0x1000
127				0x4805b000 0x1000
128				0x4805d000 0x1000>;
129			interrupts = <61 62 63 64 65 66>;
130			interrupt-parent = <&GIC>;
131		};
132
133		ehci {
134			compatible = "ti,usb-ehci", "usb-ehci";
135			/* 
136			 * USB port PHY configuration is a tuple: <mode, reset, gpio_pin>
137			 * mode is one of the following values:
138			 *   0 - unknown
139			 *   1 - PHY
140			 *   2 - TLL
141			 *   3 - HSIC
142			 *
143			 * reset indicates (if non-zero) if port reset is required 
144			 * gpio_pin - GPIO pin that is used to perform reset
145			 */
146			phy-config = <  1 0 0
147					0 0 0
148					0 0 0>;
149			reg = < 0x4a064c00 0x100	/* EHCI regs */
150				0x4a064000 0x700	/* UHH regs */
151				0x4a062000 0x1000>;	/* TLL regs */
152			interrupts = <109>;
153			interrupt-parent = <&GIC>;
154		};
155
156		I2C1: i2c@x48070000 {
157			compatible = "ti,i2c";
158			reg =<	0x48070000 0x100 >;
159			interrupts = <88>;
160			interrupt-parent = <&GIC>;
161			i2c-device-id = <1>;
162		};
163
164		sdma@x48070000 {
165			compatible = "ti,sdma";
166			reg =<	0x4A056000 0x1000 >;
167			interrupts = <44 45 46 47>;
168			interrupt-parent = <&GIC>;
169		};
170
171		mmc@x4809C000 {
172			compatible = "ti,mmchs";
173			reg =<0x4809C000 0x1000 >;
174			interrupts = <115>;
175			interrupt-parent = <&GIC>;
176			mmchs-device-id = <1>;
177			non-removable; /* XXX need real solution */
178		};
179
180	};
181
182	chosen {
183		stdin = "uart3";
184		stdout = "uart3";
185	};
186};
187