machdep.c revision 266203
1/* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3/*- 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 1994-1998 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Brinicombe 22 * for the NetBSD Project. 23 * 4. The name of the company nor the name of the author may be used to 24 * endorse or promote products derived from this software without specific 25 * prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * Machine dependant functions for kernel setup 40 * 41 * Created : 17/09/94 42 * Updated : 18/04/01 updated for new wscons 43 */ 44 45#include "opt_compat.h" 46#include "opt_ddb.h" 47#include "opt_platform.h" 48#include "opt_sched.h" 49#include "opt_timer.h" 50 51#include <sys/cdefs.h> 52__FBSDID("$FreeBSD: stable/10/sys/arm/arm/machdep.c 266203 2014-05-16 00:14:50Z ian $"); 53 54#include <sys/param.h> 55#include <sys/proc.h> 56#include <sys/systm.h> 57#include <sys/bio.h> 58#include <sys/buf.h> 59#include <sys/bus.h> 60#include <sys/cons.h> 61#include <sys/cpu.h> 62#include <sys/exec.h> 63#include <sys/imgact.h> 64#include <sys/kdb.h> 65#include <sys/kernel.h> 66#include <sys/ktr.h> 67#include <sys/linker.h> 68#include <sys/lock.h> 69#include <sys/malloc.h> 70#include <sys/msgbuf.h> 71#include <sys/mutex.h> 72#include <sys/pcpu.h> 73#include <sys/ptrace.h> 74#include <sys/rwlock.h> 75#include <sys/sched.h> 76#include <sys/signalvar.h> 77#include <sys/syscallsubr.h> 78#include <sys/sysctl.h> 79#include <sys/sysent.h> 80#include <sys/sysproto.h> 81#include <sys/uio.h> 82 83#include <vm/vm.h> 84#include <vm/pmap.h> 85#include <vm/vm_map.h> 86#include <vm/vm_object.h> 87#include <vm/vm_page.h> 88#include <vm/vm_pager.h> 89 90#include <machine/armreg.h> 91#include <machine/atags.h> 92#include <machine/cpu.h> 93#include <machine/devmap.h> 94#include <machine/frame.h> 95#include <machine/intr.h> 96#include <machine/machdep.h> 97#include <machine/md_var.h> 98#include <machine/metadata.h> 99#include <machine/pcb.h> 100#include <machine/physmem.h> 101#include <machine/reg.h> 102#include <machine/trap.h> 103#include <machine/undefined.h> 104#include <machine/vmparam.h> 105#include <machine/sysarch.h> 106 107#ifdef FDT 108#include <dev/fdt/fdt_common.h> 109#include <dev/ofw/openfirm.h> 110#endif 111 112#ifdef DEBUG 113#define debugf(fmt, args...) printf(fmt, ##args) 114#else 115#define debugf(fmt, args...) 116#endif 117 118struct pcpu __pcpu[MAXCPU]; 119struct pcpu *pcpup = &__pcpu[0]; 120 121static struct trapframe proc0_tf; 122uint32_t cpu_reset_address = 0; 123int cold = 1; 124vm_offset_t vector_page; 125 126int (*_arm_memcpy)(void *, void *, int, int) = NULL; 127int (*_arm_bzero)(void *, int, int) = NULL; 128int _min_memcpy_size = 0; 129int _min_bzero_size = 0; 130 131extern int *end; 132#ifdef DDB 133extern vm_offset_t ksym_start, ksym_end; 134#endif 135 136#ifdef FDT 137/* 138 * This is the number of L2 page tables required for covering max 139 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 140 * stacks etc.), uprounded to be divisible by 4. 141 */ 142#define KERNEL_PT_MAX 78 143 144static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 145 146extern u_int data_abort_handler_address; 147extern u_int prefetch_abort_handler_address; 148extern u_int undefined_handler_address; 149 150vm_paddr_t pmap_pa; 151 152struct pv_addr systempage; 153static struct pv_addr msgbufpv; 154struct pv_addr irqstack; 155struct pv_addr undstack; 156struct pv_addr abtstack; 157static struct pv_addr kernelstack; 158 159#endif 160 161#if defined(LINUX_BOOT_ABI) 162#define LBABI_MAX_BANKS 10 163 164uint32_t board_id; 165struct arm_lbabi_tag *atag_list; 166char linux_command_line[LBABI_MAX_COMMAND_LINE + 1]; 167char atags[LBABI_MAX_COMMAND_LINE * 2]; 168uint32_t memstart[LBABI_MAX_BANKS]; 169uint32_t memsize[LBABI_MAX_BANKS]; 170uint32_t membanks; 171#endif 172 173static uint32_t board_revision; 174/* hex representation of uint64_t */ 175static char board_serial[32]; 176 177SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes"); 178SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD, 179 &board_revision, 0, "Board revision"); 180SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD, 181 board_serial, 0, "Board serial"); 182 183int vfp_exists; 184SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD, 185 &vfp_exists, 0, "Floating point support enabled"); 186 187void 188board_set_serial(uint64_t serial) 189{ 190 191 snprintf(board_serial, sizeof(board_serial)-1, 192 "%016jx", serial); 193} 194 195void 196board_set_revision(uint32_t revision) 197{ 198 199 board_revision = revision; 200} 201 202void 203sendsig(catcher, ksi, mask) 204 sig_t catcher; 205 ksiginfo_t *ksi; 206 sigset_t *mask; 207{ 208 struct thread *td; 209 struct proc *p; 210 struct trapframe *tf; 211 struct sigframe *fp, frame; 212 struct sigacts *psp; 213 int onstack; 214 int sig; 215 int code; 216 217 td = curthread; 218 p = td->td_proc; 219 PROC_LOCK_ASSERT(p, MA_OWNED); 220 sig = ksi->ksi_signo; 221 code = ksi->ksi_code; 222 psp = p->p_sigacts; 223 mtx_assert(&psp->ps_mtx, MA_OWNED); 224 tf = td->td_frame; 225 onstack = sigonstack(tf->tf_usr_sp); 226 227 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 228 catcher, sig); 229 230 /* Allocate and validate space for the signal handler context. */ 231 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 232 SIGISMEMBER(psp->ps_sigonstack, sig)) { 233 fp = (struct sigframe *)(td->td_sigstk.ss_sp + 234 td->td_sigstk.ss_size); 235#if defined(COMPAT_43) 236 td->td_sigstk.ss_flags |= SS_ONSTACK; 237#endif 238 } else 239 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 240 241 /* make room on the stack */ 242 fp--; 243 244 /* make the stack aligned */ 245 fp = (struct sigframe *)STACKALIGN(fp); 246 /* Populate the siginfo frame. */ 247 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 248 frame.sf_si = ksi->ksi_info; 249 frame.sf_uc.uc_sigmask = *mask; 250 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 251 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE; 252 frame.sf_uc.uc_stack = td->td_sigstk; 253 mtx_unlock(&psp->ps_mtx); 254 PROC_UNLOCK(td->td_proc); 255 256 /* Copy the sigframe out to the user's stack. */ 257 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 258 /* Process has trashed its stack. Kill it. */ 259 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 260 PROC_LOCK(p); 261 sigexit(td, SIGILL); 262 } 263 264 /* Translate the signal if appropriate. */ 265 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 266 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 267 268 /* 269 * Build context to run handler in. We invoke the handler 270 * directly, only returning via the trampoline. Note the 271 * trampoline version numbers are coordinated with machine- 272 * dependent code in libc. 273 */ 274 275 tf->tf_r0 = sig; 276 tf->tf_r1 = (register_t)&fp->sf_si; 277 tf->tf_r2 = (register_t)&fp->sf_uc; 278 279 /* the trampoline uses r5 as the uc address */ 280 tf->tf_r5 = (register_t)&fp->sf_uc; 281 tf->tf_pc = (register_t)catcher; 282 tf->tf_usr_sp = (register_t)fp; 283 tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode)); 284 285 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 286 tf->tf_usr_sp); 287 288 PROC_LOCK(p); 289 mtx_lock(&psp->ps_mtx); 290} 291 292struct kva_md_info kmi; 293 294/* 295 * arm32_vector_init: 296 * 297 * Initialize the vector page, and select whether or not to 298 * relocate the vectors. 299 * 300 * NOTE: We expect the vector page to be mapped at its expected 301 * destination. 302 */ 303 304extern unsigned int page0[], page0_data[]; 305void 306arm_vector_init(vm_offset_t va, int which) 307{ 308 unsigned int *vectors = (int *) va; 309 unsigned int *vectors_data = vectors + (page0_data - page0); 310 int vec; 311 312 /* 313 * Loop through the vectors we're taking over, and copy the 314 * vector's insn and data word. 315 */ 316 for (vec = 0; vec < ARM_NVEC; vec++) { 317 if ((which & (1 << vec)) == 0) { 318 /* Don't want to take over this vector. */ 319 continue; 320 } 321 vectors[vec] = page0[vec]; 322 vectors_data[vec] = page0_data[vec]; 323 } 324 325 /* Now sync the vectors. */ 326 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int)); 327 328 vector_page = va; 329 330 if (va == ARM_VECTORS_HIGH) { 331 /* 332 * Assume the MD caller knows what it's doing here, and 333 * really does want the vector page relocated. 334 * 335 * Note: This has to be done here (and not just in 336 * cpu_setup()) because the vector page needs to be 337 * accessible *before* cpu_startup() is called. 338 * Think ddb(9) ... 339 * 340 * NOTE: If the CPU control register is not readable, 341 * this will totally fail! We'll just assume that 342 * any system that has high vector support has a 343 * readable CPU control register, for now. If we 344 * ever encounter one that does not, we'll have to 345 * rethink this. 346 */ 347 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 348 } 349} 350 351static void 352cpu_startup(void *dummy) 353{ 354 struct pcb *pcb = thread0.td_pcb; 355 const unsigned int mbyte = 1024 * 1024; 356#ifdef ARM_TP_ADDRESS 357#ifndef ARM_CACHE_LOCK_ENABLE 358 vm_page_t m; 359#endif 360#endif 361 362 identify_arm_cpu(); 363 364 vm_ksubmap_init(&kmi); 365 366 /* 367 * Display the RAM layout. 368 */ 369 printf("real memory = %ju (%ju MB)\n", 370 (uintmax_t)arm32_ptob(realmem), 371 (uintmax_t)arm32_ptob(realmem) / mbyte); 372 printf("avail memory = %ju (%ju MB)\n", 373 (uintmax_t)arm32_ptob(cnt.v_free_count), 374 (uintmax_t)arm32_ptob(cnt.v_free_count) / mbyte); 375 if (bootverbose) { 376 arm_physmem_print_tables(); 377 arm_devmap_print_table(); 378 } 379 380 bufinit(); 381 vm_pager_bufferinit(); 382 pcb->un_32.pcb32_und_sp = (u_int)thread0.td_kstack + 383 USPACE_UNDEF_STACK_TOP; 384 pcb->un_32.pcb32_sp = (u_int)thread0.td_kstack + 385 USPACE_SVC_STACK_TOP; 386 vector_page_setprot(VM_PROT_READ); 387 pmap_set_pcb_pagedir(pmap_kernel(), pcb); 388 pmap_postinit(); 389#ifdef ARM_TP_ADDRESS 390#ifdef ARM_CACHE_LOCK_ENABLE 391 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 392 arm_lock_cache_line(ARM_TP_ADDRESS); 393#else 394 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 395 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 396#endif 397 *(uint32_t *)ARM_RAS_START = 0; 398 *(uint32_t *)ARM_RAS_END = 0xffffffff; 399#endif 400} 401 402SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 403 404/* 405 * Flush the D-cache for non-DMA I/O so that the I-cache can 406 * be made coherent later. 407 */ 408void 409cpu_flush_dcache(void *ptr, size_t len) 410{ 411 412 cpu_dcache_wb_range((uintptr_t)ptr, len); 413#ifdef ARM_L2_PIPT 414 cpu_l2cache_wb_range((uintptr_t)vtophys(ptr), len); 415#else 416 cpu_l2cache_wb_range((uintptr_t)ptr, len); 417#endif 418} 419 420/* Get current clock frequency for the given cpu id. */ 421int 422cpu_est_clockrate(int cpu_id, uint64_t *rate) 423{ 424 425 return (ENXIO); 426} 427 428void 429cpu_idle(int busy) 430{ 431 432 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", 433 busy, curcpu); 434#ifndef NO_EVENTTIMERS 435 if (!busy) { 436 critical_enter(); 437 cpu_idleclock(); 438 } 439#endif 440 if (!sched_runnable()) 441 cpu_sleep(0); 442#ifndef NO_EVENTTIMERS 443 if (!busy) { 444 cpu_activeclock(); 445 critical_exit(); 446 } 447#endif 448 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", 449 busy, curcpu); 450} 451 452int 453cpu_idle_wakeup(int cpu) 454{ 455 456 return (0); 457} 458 459int 460fill_regs(struct thread *td, struct reg *regs) 461{ 462 struct trapframe *tf = td->td_frame; 463 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r)); 464 regs->r_sp = tf->tf_usr_sp; 465 regs->r_lr = tf->tf_usr_lr; 466 regs->r_pc = tf->tf_pc; 467 regs->r_cpsr = tf->tf_spsr; 468 return (0); 469} 470int 471fill_fpregs(struct thread *td, struct fpreg *regs) 472{ 473 bzero(regs, sizeof(*regs)); 474 return (0); 475} 476 477int 478set_regs(struct thread *td, struct reg *regs) 479{ 480 struct trapframe *tf = td->td_frame; 481 482 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r)); 483 tf->tf_usr_sp = regs->r_sp; 484 tf->tf_usr_lr = regs->r_lr; 485 tf->tf_pc = regs->r_pc; 486 tf->tf_spsr &= ~PSR_FLAGS; 487 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS; 488 return (0); 489} 490 491int 492set_fpregs(struct thread *td, struct fpreg *regs) 493{ 494 return (0); 495} 496 497int 498fill_dbregs(struct thread *td, struct dbreg *regs) 499{ 500 return (0); 501} 502int 503set_dbregs(struct thread *td, struct dbreg *regs) 504{ 505 return (0); 506} 507 508 509static int 510ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v) 511{ 512 struct iovec iov; 513 struct uio uio; 514 515 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED); 516 iov.iov_base = (caddr_t) v; 517 iov.iov_len = sizeof(u_int32_t); 518 uio.uio_iov = &iov; 519 uio.uio_iovcnt = 1; 520 uio.uio_offset = (off_t)addr; 521 uio.uio_resid = sizeof(u_int32_t); 522 uio.uio_segflg = UIO_SYSSPACE; 523 uio.uio_rw = UIO_READ; 524 uio.uio_td = td; 525 return proc_rwmem(td->td_proc, &uio); 526} 527 528static int 529ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v) 530{ 531 struct iovec iov; 532 struct uio uio; 533 534 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED); 535 iov.iov_base = (caddr_t) &v; 536 iov.iov_len = sizeof(u_int32_t); 537 uio.uio_iov = &iov; 538 uio.uio_iovcnt = 1; 539 uio.uio_offset = (off_t)addr; 540 uio.uio_resid = sizeof(u_int32_t); 541 uio.uio_segflg = UIO_SYSSPACE; 542 uio.uio_rw = UIO_WRITE; 543 uio.uio_td = td; 544 return proc_rwmem(td->td_proc, &uio); 545} 546 547int 548ptrace_single_step(struct thread *td) 549{ 550 struct proc *p; 551 int error; 552 553 KASSERT(td->td_md.md_ptrace_instr == 0, 554 ("Didn't clear single step")); 555 p = td->td_proc; 556 PROC_UNLOCK(p); 557 error = ptrace_read_int(td, td->td_frame->tf_pc + 4, 558 &td->td_md.md_ptrace_instr); 559 if (error) 560 goto out; 561 error = ptrace_write_int(td, td->td_frame->tf_pc + 4, 562 PTRACE_BREAKPOINT); 563 if (error) 564 td->td_md.md_ptrace_instr = 0; 565 td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4; 566out: 567 PROC_LOCK(p); 568 return (error); 569} 570 571int 572ptrace_clear_single_step(struct thread *td) 573{ 574 struct proc *p; 575 576 if (td->td_md.md_ptrace_instr) { 577 p = td->td_proc; 578 PROC_UNLOCK(p); 579 ptrace_write_int(td, td->td_md.md_ptrace_addr, 580 td->td_md.md_ptrace_instr); 581 PROC_LOCK(p); 582 td->td_md.md_ptrace_instr = 0; 583 } 584 return (0); 585} 586 587int 588ptrace_set_pc(struct thread *td, unsigned long addr) 589{ 590 td->td_frame->tf_pc = addr; 591 return (0); 592} 593 594void 595cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 596{ 597} 598 599void 600spinlock_enter(void) 601{ 602 struct thread *td; 603 register_t cspr; 604 605 td = curthread; 606 if (td->td_md.md_spinlock_count == 0) { 607 cspr = disable_interrupts(I32_bit | F32_bit); 608 td->td_md.md_spinlock_count = 1; 609 td->td_md.md_saved_cspr = cspr; 610 } else 611 td->td_md.md_spinlock_count++; 612 critical_enter(); 613} 614 615void 616spinlock_exit(void) 617{ 618 struct thread *td; 619 register_t cspr; 620 621 td = curthread; 622 critical_exit(); 623 cspr = td->td_md.md_saved_cspr; 624 td->td_md.md_spinlock_count--; 625 if (td->td_md.md_spinlock_count == 0) 626 restore_interrupts(cspr); 627} 628 629/* 630 * Clear registers on exec 631 */ 632void 633exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 634{ 635 struct trapframe *tf = td->td_frame; 636 637 memset(tf, 0, sizeof(*tf)); 638 tf->tf_usr_sp = stack; 639 tf->tf_usr_lr = imgp->entry_addr; 640 tf->tf_svc_lr = 0x77777777; 641 tf->tf_pc = imgp->entry_addr; 642 tf->tf_spsr = PSR_USR32_MODE; 643} 644 645/* 646 * Get machine context. 647 */ 648int 649get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 650{ 651 struct trapframe *tf = td->td_frame; 652 __greg_t *gr = mcp->__gregs; 653 654 if (clear_ret & GET_MC_CLEAR_RET) 655 gr[_REG_R0] = 0; 656 else 657 gr[_REG_R0] = tf->tf_r0; 658 gr[_REG_R1] = tf->tf_r1; 659 gr[_REG_R2] = tf->tf_r2; 660 gr[_REG_R3] = tf->tf_r3; 661 gr[_REG_R4] = tf->tf_r4; 662 gr[_REG_R5] = tf->tf_r5; 663 gr[_REG_R6] = tf->tf_r6; 664 gr[_REG_R7] = tf->tf_r7; 665 gr[_REG_R8] = tf->tf_r8; 666 gr[_REG_R9] = tf->tf_r9; 667 gr[_REG_R10] = tf->tf_r10; 668 gr[_REG_R11] = tf->tf_r11; 669 gr[_REG_R12] = tf->tf_r12; 670 gr[_REG_SP] = tf->tf_usr_sp; 671 gr[_REG_LR] = tf->tf_usr_lr; 672 gr[_REG_PC] = tf->tf_pc; 673 gr[_REG_CPSR] = tf->tf_spsr; 674 675 return (0); 676} 677 678/* 679 * Set machine context. 680 * 681 * However, we don't set any but the user modifiable flags, and we won't 682 * touch the cs selector. 683 */ 684int 685set_mcontext(struct thread *td, const mcontext_t *mcp) 686{ 687 struct trapframe *tf = td->td_frame; 688 const __greg_t *gr = mcp->__gregs; 689 690 tf->tf_r0 = gr[_REG_R0]; 691 tf->tf_r1 = gr[_REG_R1]; 692 tf->tf_r2 = gr[_REG_R2]; 693 tf->tf_r3 = gr[_REG_R3]; 694 tf->tf_r4 = gr[_REG_R4]; 695 tf->tf_r5 = gr[_REG_R5]; 696 tf->tf_r6 = gr[_REG_R6]; 697 tf->tf_r7 = gr[_REG_R7]; 698 tf->tf_r8 = gr[_REG_R8]; 699 tf->tf_r9 = gr[_REG_R9]; 700 tf->tf_r10 = gr[_REG_R10]; 701 tf->tf_r11 = gr[_REG_R11]; 702 tf->tf_r12 = gr[_REG_R12]; 703 tf->tf_usr_sp = gr[_REG_SP]; 704 tf->tf_usr_lr = gr[_REG_LR]; 705 tf->tf_pc = gr[_REG_PC]; 706 tf->tf_spsr = gr[_REG_CPSR]; 707 708 return (0); 709} 710 711/* 712 * MPSAFE 713 */ 714int 715sys_sigreturn(td, uap) 716 struct thread *td; 717 struct sigreturn_args /* { 718 const struct __ucontext *sigcntxp; 719 } */ *uap; 720{ 721 struct sigframe sf; 722 struct trapframe *tf; 723 int spsr; 724 725 if (uap == NULL) 726 return (EFAULT); 727 if (copyin(uap->sigcntxp, &sf, sizeof(sf))) 728 return (EFAULT); 729 /* 730 * Make sure the processor mode has not been tampered with and 731 * interrupts have not been disabled. 732 */ 733 spsr = sf.sf_uc.uc_mcontext.__gregs[_REG_CPSR]; 734 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 735 (spsr & (I32_bit | F32_bit)) != 0) 736 return (EINVAL); 737 /* Restore register context. */ 738 tf = td->td_frame; 739 set_mcontext(td, &sf.sf_uc.uc_mcontext); 740 741 /* Restore signal mask. */ 742 kern_sigprocmask(td, SIG_SETMASK, &sf.sf_uc.uc_sigmask, NULL, 0); 743 744 return (EJUSTRETURN); 745} 746 747 748/* 749 * Construct a PCB from a trapframe. This is called from kdb_trap() where 750 * we want to start a backtrace from the function that caused us to enter 751 * the debugger. We have the context in the trapframe, but base the trace 752 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 753 * enough for a backtrace. 754 */ 755void 756makectx(struct trapframe *tf, struct pcb *pcb) 757{ 758 pcb->un_32.pcb32_r8 = tf->tf_r8; 759 pcb->un_32.pcb32_r9 = tf->tf_r9; 760 pcb->un_32.pcb32_r10 = tf->tf_r10; 761 pcb->un_32.pcb32_r11 = tf->tf_r11; 762 pcb->un_32.pcb32_r12 = tf->tf_r12; 763 pcb->un_32.pcb32_pc = tf->tf_pc; 764 pcb->un_32.pcb32_lr = tf->tf_usr_lr; 765 pcb->un_32.pcb32_sp = tf->tf_usr_sp; 766} 767 768/* 769 * Fake up a boot descriptor table 770 */ 771vm_offset_t 772fake_preload_metadata(struct arm_boot_params *abp __unused) 773{ 774#ifdef DDB 775 vm_offset_t zstart = 0, zend = 0; 776#endif 777 vm_offset_t lastaddr; 778 int i = 0; 779 static uint32_t fake_preload[35]; 780 781 fake_preload[i++] = MODINFO_NAME; 782 fake_preload[i++] = strlen("kernel") + 1; 783 strcpy((char*)&fake_preload[i++], "kernel"); 784 i += 1; 785 fake_preload[i++] = MODINFO_TYPE; 786 fake_preload[i++] = strlen("elf kernel") + 1; 787 strcpy((char*)&fake_preload[i++], "elf kernel"); 788 i += 2; 789 fake_preload[i++] = MODINFO_ADDR; 790 fake_preload[i++] = sizeof(vm_offset_t); 791 fake_preload[i++] = KERNVIRTADDR; 792 fake_preload[i++] = MODINFO_SIZE; 793 fake_preload[i++] = sizeof(uint32_t); 794 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR; 795#ifdef DDB 796 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) { 797 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM; 798 fake_preload[i++] = sizeof(vm_offset_t); 799 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4); 800 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM; 801 fake_preload[i++] = sizeof(vm_offset_t); 802 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8); 803 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8); 804 zend = lastaddr; 805 zstart = *(uint32_t *)(KERNVIRTADDR + 4); 806 ksym_start = zstart; 807 ksym_end = zend; 808 } else 809#endif 810 lastaddr = (vm_offset_t)&end; 811 fake_preload[i++] = 0; 812 fake_preload[i] = 0; 813 preload_metadata = (void *)fake_preload; 814 815 return (lastaddr); 816} 817 818void 819pcpu0_init(void) 820{ 821#if ARM_ARCH_6 || ARM_ARCH_7A || defined(CPU_MV_PJ4B) 822 set_curthread(&thread0); 823#endif 824 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 825 PCPU_SET(curthread, &thread0); 826#ifdef VFP 827 PCPU_SET(cpu, 0); 828#endif 829} 830 831#if defined(LINUX_BOOT_ABI) 832vm_offset_t 833linux_parse_boot_param(struct arm_boot_params *abp) 834{ 835 struct arm_lbabi_tag *walker; 836 uint32_t revision; 837 uint64_t serial; 838 839 /* 840 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2 841 * is atags or dtb pointer. If all of these aren't satisfied, 842 * then punt. 843 */ 844 if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0)) 845 return 0; 846 847 board_id = abp->abp_r1; 848 walker = (struct arm_lbabi_tag *) 849 (abp->abp_r2 + KERNVIRTADDR - abp->abp_physaddr); 850 851 /* xxx - Need to also look for binary device tree */ 852 if (ATAG_TAG(walker) != ATAG_CORE) 853 return 0; 854 855 atag_list = walker; 856 while (ATAG_TAG(walker) != ATAG_NONE) { 857 switch (ATAG_TAG(walker)) { 858 case ATAG_CORE: 859 break; 860 case ATAG_MEM: 861 arm_physmem_hardware_region(walker->u.tag_mem.start, 862 walker->u.tag_mem.size); 863 break; 864 case ATAG_INITRD2: 865 break; 866 case ATAG_SERIAL: 867 serial = walker->u.tag_sn.low | 868 ((uint64_t)walker->u.tag_sn.high << 32); 869 board_set_serial(serial); 870 break; 871 case ATAG_REVISION: 872 revision = walker->u.tag_rev.rev; 873 board_set_revision(revision); 874 break; 875 case ATAG_CMDLINE: 876 /* XXX open question: Parse this for boothowto? */ 877 bcopy(walker->u.tag_cmd.command, linux_command_line, 878 ATAG_SIZE(walker)); 879 break; 880 default: 881 break; 882 } 883 walker = ATAG_NEXT(walker); 884 } 885 886 /* Save a copy for later */ 887 bcopy(atag_list, atags, 888 (char *)walker - (char *)atag_list + ATAG_SIZE(walker)); 889 890 return fake_preload_metadata(abp); 891} 892#endif 893 894#if defined(FREEBSD_BOOT_LOADER) 895vm_offset_t 896freebsd_parse_boot_param(struct arm_boot_params *abp) 897{ 898 vm_offset_t lastaddr = 0; 899 void *mdp; 900 void *kmdp; 901 902 /* 903 * Mask metadata pointer: it is supposed to be on page boundary. If 904 * the first argument (mdp) doesn't point to a valid address the 905 * bootloader must have passed us something else than the metadata 906 * ptr, so we give up. Also give up if we cannot find metadta section 907 * the loader creates that we get all this data out of. 908 */ 909 910 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL) 911 return 0; 912 preload_metadata = mdp; 913 kmdp = preload_search_by_type("elf kernel"); 914 if (kmdp == NULL) 915 return 0; 916 917 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 918 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); 919 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t); 920#ifdef DDB 921 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 922 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 923#endif 924 preload_addr_relocate = KERNVIRTADDR - abp->abp_physaddr; 925 return lastaddr; 926} 927#endif 928 929vm_offset_t 930default_parse_boot_param(struct arm_boot_params *abp) 931{ 932 vm_offset_t lastaddr; 933 934#if defined(LINUX_BOOT_ABI) 935 if ((lastaddr = linux_parse_boot_param(abp)) != 0) 936 return lastaddr; 937#endif 938#if defined(FREEBSD_BOOT_LOADER) 939 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0) 940 return lastaddr; 941#endif 942 /* Fall back to hardcoded metadata. */ 943 lastaddr = fake_preload_metadata(abp); 944 945 return lastaddr; 946} 947 948/* 949 * Stub version of the boot parameter parsing routine. We are 950 * called early in initarm, before even VM has been initialized. 951 * This routine needs to preserve any data that the boot loader 952 * has passed in before the kernel starts to grow past the end 953 * of the BSS, traditionally the place boot-loaders put this data. 954 * 955 * Since this is called so early, things that depend on the vm system 956 * being setup (including access to some SoC's serial ports), about 957 * all that can be done in this routine is to copy the arguments. 958 * 959 * This is the default boot parameter parsing routine. Individual 960 * kernels/boards can override this weak function with one of their 961 * own. We just fake metadata... 962 */ 963__weak_reference(default_parse_boot_param, parse_boot_param); 964 965/* 966 * Initialize proc0 967 */ 968void 969init_proc0(vm_offset_t kstack) 970{ 971 proc_linkup0(&proc0, &thread0); 972 thread0.td_kstack = kstack; 973 thread0.td_pcb = (struct pcb *) 974 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 975 thread0.td_pcb->pcb_flags = 0; 976 thread0.td_frame = &proc0_tf; 977 pcpup->pc_curpcb = thread0.td_pcb; 978} 979 980void 981set_stackptrs(int cpu) 982{ 983 984 set_stackptr(PSR_IRQ32_MODE, 985 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 986 set_stackptr(PSR_ABT32_MODE, 987 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 988 set_stackptr(PSR_UND32_MODE, 989 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 990} 991 992#ifdef FDT 993static char * 994kenv_next(char *cp) 995{ 996 997 if (cp != NULL) { 998 while (*cp != 0) 999 cp++; 1000 cp++; 1001 if (*cp == 0) 1002 cp = NULL; 1003 } 1004 return (cp); 1005} 1006 1007static void 1008print_kenv(void) 1009{ 1010 int len; 1011 char *cp; 1012 1013 debugf("loader passed (static) kenv:\n"); 1014 if (kern_envp == NULL) { 1015 debugf(" no env, null ptr\n"); 1016 return; 1017 } 1018 debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp); 1019 1020 len = 0; 1021 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp)) 1022 debugf(" %x %s\n", (uint32_t)cp, cp); 1023} 1024 1025void * 1026initarm(struct arm_boot_params *abp) 1027{ 1028 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1029 struct pv_addr kernel_l1pt; 1030 struct pv_addr dpcpu; 1031 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 1032 uint32_t memsize, l2size; 1033 char *env; 1034 void *kmdp; 1035 u_int l1pagetable; 1036 int i, j, err_devmap, mem_regions_sz; 1037 1038 lastaddr = parse_boot_param(abp); 1039 arm_physmem_kernaddr = abp->abp_physaddr; 1040 1041 memsize = 0; 1042 set_cpufuncs(); 1043 1044 /* 1045 * Find the dtb passed in by the boot loader. 1046 */ 1047 kmdp = preload_search_by_type("elf kernel"); 1048 if (kmdp != NULL) 1049 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1050 else 1051 dtbp = (vm_offset_t)NULL; 1052 1053#if defined(FDT_DTB_STATIC) 1054 /* 1055 * In case the device tree blob was not retrieved (from metadata) try 1056 * to use the statically embedded one. 1057 */ 1058 if (dtbp == (vm_offset_t)NULL) 1059 dtbp = (vm_offset_t)&fdt_static_dtb; 1060#endif 1061 1062 if (OF_install(OFW_FDT, 0) == FALSE) 1063 panic("Cannot install FDT"); 1064 1065 if (OF_init((void *)dtbp) != 0) 1066 panic("OF_init failed with the found device tree"); 1067 1068 /* Grab physical memory regions information from device tree. */ 1069 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 1070 panic("Cannot get physical memory regions"); 1071 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1072 1073 /* Grab reserved memory regions information from device tree. */ 1074 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1075 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1076 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1077 1078 /* Platform-specific initialisation */ 1079 initarm_early_init(); 1080 1081 pcpu0_init(); 1082 1083 /* Do basic tuning, hz etc */ 1084 init_param1(); 1085 1086 /* Calculate number of L2 tables needed for mapping vm_page_array */ 1087 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 1088 l2size = (l2size >> L1_S_SHIFT) + 1; 1089 1090 /* 1091 * Add one table for end of kernel map, one for stacks, msgbuf and 1092 * L1 and L2 tables map and one for vectors map. 1093 */ 1094 l2size += 3; 1095 1096 /* Make it divisible by 4 */ 1097 l2size = (l2size + 3) & ~3; 1098 1099 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 1100 1101 /* Define a macro to simplify memory allocation */ 1102#define valloc_pages(var, np) \ 1103 alloc_pages((var).pv_va, (np)); \ 1104 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 1105 1106#define alloc_pages(var, np) \ 1107 (var) = freemempos; \ 1108 freemempos += (np * PAGE_SIZE); \ 1109 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 1110 1111 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 1112 freemempos += PAGE_SIZE; 1113 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 1114 1115 for (i = 0, j = 0; i < l2size; ++i) { 1116 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 1117 valloc_pages(kernel_pt_table[i], 1118 L2_TABLE_SIZE / PAGE_SIZE); 1119 j = i; 1120 } else { 1121 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 1122 L2_TABLE_SIZE_REAL * (i - j); 1123 kernel_pt_table[i].pv_pa = 1124 kernel_pt_table[i].pv_va - KERNVIRTADDR + 1125 abp->abp_physaddr; 1126 1127 } 1128 } 1129 /* 1130 * Allocate a page for the system page mapped to 0x00000000 1131 * or 0xffff0000. This page will just contain the system vectors 1132 * and can be shared by all processes. 1133 */ 1134 valloc_pages(systempage, 1); 1135 1136 /* Allocate dynamic per-cpu area. */ 1137 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 1138 dpcpu_init((void *)dpcpu.pv_va, 0); 1139 1140 /* Allocate stacks for all modes */ 1141 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 1142 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 1143 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 1144 valloc_pages(kernelstack, KSTACK_PAGES * MAXCPU); 1145 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 1146 1147 /* 1148 * Now we start construction of the L1 page table 1149 * We start by mapping the L2 page tables into the L1. 1150 * This means that we can replace L1 mappings later on if necessary 1151 */ 1152 l1pagetable = kernel_l1pt.pv_va; 1153 1154 /* 1155 * Try to map as much as possible of kernel text and data using 1156 * 1MB section mapping and for the rest of initial kernel address 1157 * space use L2 coarse tables. 1158 * 1159 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 1160 * and kernel structures 1161 */ 1162 l2_start = lastaddr & ~(L1_S_OFFSET); 1163 for (i = 0 ; i < l2size - 1; i++) 1164 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 1165 &kernel_pt_table[i]); 1166 1167 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 1168 1169 /* Map kernel code and data */ 1170 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 1171 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 1172 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1173 1174 /* Map L1 directory and allocated L2 page tables */ 1175 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 1176 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1177 1178 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 1179 kernel_pt_table[0].pv_pa, 1180 L2_TABLE_SIZE_REAL * l2size, 1181 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1182 1183 /* Map allocated DPCPU, stacks and msgbuf */ 1184 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 1185 freemempos - dpcpu.pv_va, 1186 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1187 1188 /* Link and map the vector page */ 1189 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 1190 &kernel_pt_table[l2size - 1]); 1191 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 1192 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 1193 1194 /* Establish static device mappings. */ 1195 err_devmap = initarm_devmap_init(); 1196 arm_devmap_bootstrap(l1pagetable, NULL); 1197 vm_max_kernel_address = initarm_lastaddr(); 1198 1199 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 1200 pmap_pa = kernel_l1pt.pv_pa; 1201 setttb(kernel_l1pt.pv_pa); 1202 cpu_tlb_flushID(); 1203 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 1204 1205 /* 1206 * Now that proper page tables are installed, call cpu_setup() to enable 1207 * instruction and data caches and other chip-specific features. 1208 */ 1209 cpu_setup(""); 1210 1211 /* 1212 * Only after the SOC registers block is mapped we can perform device 1213 * tree fixups, as they may attempt to read parameters from hardware. 1214 */ 1215 OF_interpret("perform-fixup", 0); 1216 1217 initarm_gpio_init(); 1218 1219 cninit(); 1220 1221 debugf("initarm: console initialized\n"); 1222 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1223 debugf(" boothowto = 0x%08x\n", boothowto); 1224 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1225 print_kenv(); 1226 1227 env = getenv("kernelname"); 1228 if (env != NULL) 1229 strlcpy(kernelname, env, sizeof(kernelname)); 1230 1231 if (err_devmap != 0) 1232 printf("WARNING: could not fully configure devmap, error=%d\n", 1233 err_devmap); 1234 1235 initarm_late_init(); 1236 1237 /* 1238 * Pages were allocated during the secondary bootstrap for the 1239 * stacks for different CPU modes. 1240 * We must now set the r13 registers in the different CPU modes to 1241 * point to these stacks. 1242 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1243 * of the stack memory. 1244 */ 1245 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1246 1247 set_stackptrs(0); 1248 1249 /* 1250 * We must now clean the cache again.... 1251 * Cleaning may be done by reading new data to displace any 1252 * dirty data in the cache. This will have happened in setttb() 1253 * but since we are boot strapping the addresses used for the read 1254 * may have just been remapped and thus the cache could be out 1255 * of sync. A re-clean after the switch will cure this. 1256 * After booting there are no gross relocations of the kernel thus 1257 * this problem will not occur after initarm(). 1258 */ 1259 cpu_idcache_wbinv_all(); 1260 1261 /* Set stack for exception handlers */ 1262 data_abort_handler_address = (u_int)data_abort_handler; 1263 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 1264 undefined_handler_address = (u_int)undefinedinstruction_bounce; 1265 undefined_init(); 1266 1267 init_proc0(kernelstack.pv_va); 1268 1269 arm_intrnames_init(); 1270 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1271 pmap_bootstrap(freemempos, &kernel_l1pt); 1272 msgbufp = (void *)msgbufpv.pv_va; 1273 msgbufinit(msgbufp, msgbufsize); 1274 mutex_init(); 1275 1276 /* 1277 * Exclude the kernel (and all the things we allocated which immediately 1278 * follow the kernel) from the VM allocation pool but not from crash 1279 * dumps. virtual_avail is a global variable which tracks the kva we've 1280 * "allocated" while setting up pmaps. 1281 * 1282 * Prepare the list of physical memory available to the vm subsystem. 1283 */ 1284 arm_physmem_exclude_region(abp->abp_physaddr, 1285 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1286 arm_physmem_init_kernel_globals(); 1287 1288 init_param2(physmem); 1289 kdb_init(); 1290 1291 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1292 sizeof(struct pcb))); 1293} 1294#endif 1295