MFC r281828, r289083, r289084, r289091, r289093, r289095, r289097, r289098,
r289104, r289105, r289118: various i2c fixes...

Fix numerous issues in iic(4) and iicbus(4):
--Allow multiple open iic fds by storing addressing state in cdevpriv
--Fix, as much as possible, the baked-in race conditions in the iic
ioctl interface by requesting bus ownership on I2CSTART, releasing it on
I2CSTOP/I2CRSTCARD, and requiring bus ownership by the current cdevpriv
to use the I/O ioctls
--Reduce internal iic buffer size and remove 1K read/write limit by
iteratively calling iicbus_read/iicbus_write
--Eliminate dynamic allocation in I2CWRITE/I2CREAD
--Move handling of I2CRDWR to separate function and improve error handling
--Add new I2CSADDR ioctl to store address in current cdevpriv so that
I2CSTART is not needed for read(2)/write(2) to work
--Redesign iicbus_request_bus() and iicbus_release_bus():
--iicbus_request_bus() no longer falls through if the bus is already
owned by the requesting device. Multiple threads on the same device may
want exclusive access. Also, iicbus_release_bus() was never
device-recursive anyway.
--Previously, if IICBUS_CALLBACK failed in iicbus_release_bus(), but
the following iicbus_poll() call succeeded, IICBUS_CALLBACK would not be
issued again
--Do not hold iicbus mtx during IICBUS_CALLBACK call. There are
several drivers that may sleep in IICBUS_CALLBACK, if IIC_WAIT is passed.
--Do not loop in iicbus_request_bus if IICBUS_CALLBACK returns
EWOULDBLOCK; instead pass that to the caller so that it can retry if so
desired.

Bugfix: Exit the transfer loop if any read or write operation fails. Also,
perform a stop operation on the bus if there was an error, otherwise the
bus will remain hung forever. Consistantly use 'if (error != 0)' style in
the function.

Mostly rewrite the imx i2c driver. This started out as an attempt to fix
one specific problem: the driver didn't check for ACK/NAK after writing a
slave address byte to the bus, and some slaves signal that they are busy
(such as when completing an internal write to flash memory) by sending a
NAK in response to being addressed.

Use IIC_EBUSBSY and IIC_BUSERR status values consistantly across all drivers.
Make it clearer what each one means in the comments that define them.

Add iic2errno(), a helper function to translate IIC_Exxxxx status values to
errno values that are at least vaguely equivelent. Also add a new status
value, IIC_ERESOURCE, to indicate a failure to acquire memory or other
required resources to complete a transaction.

Return only IIC_Exxxx status values from iicbus-layer functions. Most of
these functions are thin wrappers around calling the hardware-layer driver,
but some of them do sanity checks and return an error.

Add a short name, IIC_INTRWAIT, for the common case (IIC_INTR | IIC_WAIT).

Replace a local sx lock that allowed only one client at a time to access
an eeprom device with iicbus_request/release_bus(), which achieves the
same effect and also keeps other i2c slave drivers from clashing on the bus.

MFC r279723, r279724:

Define new linker set, UART_FDT_CLASS_AND_DEVICE, for registering full
(class and device) FDT UART. Define second one, UART_FDT_CLASS, for UART
class only.

Move the uart_class definitions and fdt compat data into the individual
uart implementations, and export them using the new linker-set mechanism.

MFC r277132: Rename Exynos UART driver functions. No functional change.

MFC r266942, r266944:

Do only receive chars if there are some data in the buffer.
This fixes operation on newer Exynos boards.

Rename exynos uart driver filenames.

MFC r274670, r274671, r276168:

Moves all the duplicate code to a single function.

Verify for invalid modes and unwanted flags before pass the new flags to
driver.

Make gpio_default_map_gpios() static. No functional changes.

Improves the GPIO API description a little bit.

gpio_pin_max must return the maximum supported pin number and not the total
number of pins on the system.

MFC r273799:

Make the GPIO children attach to the first unit available and not only to
unit 0.

This fix a bug where a GPIO controller could fail to attach its children
(gpioc and gpiobus) if another GPIO driver attach first.

MFC r277454, r277460, r277465, r277466, r277467, r277469, r277470, r277471,
r277472, r277473, r277474, r277475, r277476, r277477, r277478, r277479,
r277480, r277512, r277516:

Add inline implementations of arm bus_space_read/write_N().

Revise the arm bus_space implementation to avoid dereferencing the tag on
every operation to retrieve the bs_cookie value almost nothing actually uses.

Use the explicit member initializer style to init the bus_space struct.

Use arm/bus_space-v6.c for all armv6 systems

Consolidate many identical implementations of bus_space to a single
common tag and implementation shared by armv4 and armv6.

Micro-optimize the new arm inline bus_space implementation by grouping all
the data the inline functions access together at the start of the bus_space
struct so that they all fit in a single cache line.

MFC r272103: Move s3c2xx0 into the samsung directory.

MFC r276047: Add -march=armv7a to the kernel compile for all v7a ARM systems.

MFC r266943, r266950, r267390:

Add support for Exynos 5420 Octa - 8-core (big.LITTLE) ARM machine
Enable SMP for both Exynos5 models we support.

MFC r266969 and r276717:
Add 64-bit DMA support in the XHCI controller driver.
- Fix some comments and whitespaces while at it.
- Add support for PAE.

MFC 264150: Exynos: Correct the end address of the video frame buffer.

MFC 264052, 264057, 264065, 264094, 264103, 264120

Actually save the mpcore clock frequency retrieved from fdt data.

imx6..
- Don't call sdhci_init_slot() until after handling the FDT properties
related to detecting card presence.
- Flag several sysctl variables as tunables.
- Rework the cpu frequency management code for imx6 to add "operating
points" and min/max frequency controls.

generic timer...
- Setup both secure and non-secure timer IRQs.
We don't know our ARM security state, so one of them will operate.
- Don't set frequency, since it's unpossible in non-secure state.
Only rely on DTS clock-frequency value or get clock from timer.

MFC 263910, 263913, 263914, 263933, 263934, 263935, 263936, 263981, 263982,

Add more flags for the fpexc register from the ARM1176JZF-S Manual

Initialise fpscr to a sane value when we create the pcb. This sets NaNs to
be the default NaN and for denormalised numbers to be flushed to zero.

VFP fixes/cleanups for ARM11:
* Save the required VFP registers on context switch. If the exception bit
is set we need to save and restore the FPINST register, and if the fp2v
bit is also set we need to save and restore FPINST2.
* Move saving and restoring the floating point control registers to C.
* Clear the fpexc exception and fp2v flags on a floating-point exception.
* Signal a SIGFPE if the fpexc exception flag is set on an undefined
instruction. This is how the ARM core signals to software there is a
floating-point exception.

Add Cortex-A15 cpu id revisions.

Exynos/Arndale...
- Merge SoC-common parts
- Enable iicbus device
- Directly call kmem_alloc_contig to allocate framebuffer memory
and pass VM_MEMATTR_UNCACHEABLE (no-cache, no-buffer).
This fixes screen refreshing problem when data is updated too slowly.
- Add support for keyboard used in Samsung Chromebook (ARM machine)
Support covers device drivers for:
- Interrupt Combiner
- gpio/pad, External Interrupts Controller (pad)
- I2C Interface
- Chrome Embedded Controller
- Chrome Keyboard
- Use new gpio dev class in EHCI driver
- Expand device tree information
- Release i2c bus on detach.

MFC 263250, 263251, 263424, 263425, 263426, 263427, 263430, 263431

Use the same cache terminology as the ARM docs in comments. No
functional changes.

Use armv7 TLB flush code, not arm11, for cortex-a processors.

Exynos/ Arndale...
- Disable debugging by default.
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add driver for Display Controller.
- Add support for Samsung Chromebook (ARM Cortex A15 machine).
- Rename mct and ehci drivers files to match common naming.

MFC 262952, 262958, 262966, 262979, 262980, 262986, 262987, 262995, 262997,
263030, 263033, 263034, 263056, 263057,

Remove all the redundant external declarations of exception vectors and
runtime setting of the pointers that's scattered around various places.

Remove all traces of support for ARM chips prior to the arm9 series.

Make the default exception handler vectors point to where I thought they
were already pointing: the default handlers (not a panic that says there
is no default handler).

Eliminate irq_dispatch.S. Move the data items it contained into
arm/intr.c and the functionality it provided into arm/exception.S.

Move the exception vector table (so-called "page0" data) into exception.S
and eliminate vectors.S.

Change the way the asm GET_CURTHREAD_PTR() macro is defined so that code
using it doesn't have to have an "AST_LOCALS" macro somewhere in the file.

Arrange for arm fork_trampoline() to return to userland via the standard
swi_exit code in exception.S instead of having its own inline expansion
of the DO_AST and PULLFRAME macros.

Now that the PUSHFRAME and PULLFRAME macros are used only in the swi
entry/exit code, they don't need to be macros. Except that didn't work
and the whole change was reverted.

Remove some unnecessary indirection and jump right to the handler functions.

Use panic rather than printf to "handle" an arm26 address exception
(should never happen on arm32).

Remove the unreferenced DATA() macro.

Remove #include <machine/asmacros.h> from files that don't need it.

MFC 257774, 256760, 262916, 262905, 262918, 262919, 262920, 262921, 262924,
262925, 262929, 262932, 262935, 262940, 262941, 262942, 262948, 262949,
262950

Strip arm/conf/DEFAULTS down to just items that are mandatory for running
the architecture.

Move all the files named foo/common.c to foo/foo_common.c

Initial cut for DTS on the hl201 board.

Add commented out dts for sam9260ek as well as early printf support.

Make clock optional on uart nodes, then back it out ("I don't know what I
was thinking, but it is lame.")

Set the baud rate if it isn't 0

Make at91_soc_id() public.

Properly round at91 resource on unmapping.

Move AT91 AIC related stuff to own file.

Fix another bug in multicast filtering. i.MX uses 6 bits from MSB in
LE CRC32 for the hash value, not the lowest 6 bits in BE CRC32.

Follow r262916 with one more config file that references a renamed common.c

Remove bogus AT91 define that causes compile errors. Most of the defines
for SAM9X are going away soonish anyway (once FDT works), but until
then...

Remove all dregs of a per-thread undefined-exception-mode stack.

Rework the VFP code that handles demand-based save and restore of state.

Always call vfp_discard() on thread death.

When a thread begins life it doesn't own the VFP hardware state on any cpu.

Make undefined exception entry MP-safe.

MFC 258211, 257775, 258096,

Add mbox and pruss drivers to ti build.

Use common bus_space-v6 instead of local copies.

MFC r262409, r262411, r262413, r262420, r262426, r262427, r262440, r262456,
r262482, r262483, r262531,

Move the declaration for mpentry() into a header file instead of pasting
it into a bunch of different .c files.

If the L2 cache type is PIPT, pass a physical address for a flush.

Actually set the proper bit to indicate TTB shared memory.

Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.

Invalidate caches immediately upon entry to init_secondary(). Also set
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.

Add the bits needed to run SMP on imx6.

Invalidate the SCU cache tag ram on all 4 cores, not just 1-3.

Minor tweaks to the imx GPT timer

Vybrid enhancements...
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
- Add support for Quartz Module.
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock

MFC r261410

Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

MFC r261252, r261279, r261304, r261305, r261322, r261336, r261337, r261338,
r261353

Fix the name of the dts file for the HL201...

When mapping an address, the bsh needs the same offset we do for other things.

Add explicit depends on bus_if.h and device_if.h to avoid a
chicken and egg problem in some compilation environments.

Switch to using PAs rather than VAs for the addresses we map for
devices. This is a nop, except for what's reported by atmelbus for the
resources.

Comment cleanups. Move things around for diff reduction against FDT work.

MFC r258779,r258780,r258787,r258822:

Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit. Instead use (1U << 31) which gets the
expected result.

Similar to the (1 << 31) case it is not defined to do (2 << 30).

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

MFC r257669, r257672, r257673, r257676, r257678:

Call initarm_lastaddr() later in the init sequence, after establishing
static device mappings, rather than as the first of the initializations
that a platform can hook into. This allows a platform to allocate KVA
from the top of the address space downwards for things like static device
mapping, and return the final "last usable address" result after that and
other early init work is done.

Because some platforms were doing work in initarm_lastaddr() that needs to
be done early, add a new initarm_early_init() routine and move the early
init code to that routine on those platforms.

Make PTE_DEVICE a synonym for PTE_NOCACHE on armv4, to make it easier to
share the same code on both architectures.

Add new helper routines for arm static device mapping. The new code
allocates kva space from the top down for the device mappings and builds
entries in an internal table which is automatically used later by
arm_devmap_bootstrap(). The platform code just calls the new
arm_devmap_add_entry() function as many times as it needs to (up to 32
entries allowed; most platforms use 2 or 3 at most).

Remove imx local devmap code and use the essentially identical common
code that got moved from imx_machdep.c to arm/devmap.c.

MFC r257648, r257649, r257660:

Begin reducing code duplication in arm pmap.c and pmap-v6.c by factoring
out common code related to mapping device memory into a new devmap.c file.

Remove the growing duplication of code that used pmap_devmap_find_pa() and
then did some math with the returned results to generate a virtual address,
and likewise in reverse to get a physical address. Now there are a pair
of functions, arm_devmap_vtop() and arm_devmap_ptov(), to do that. The
bus_space_map() implementations are rewritten in terms of these.

Move remaining code and data related to static device mapping into the
new devmap.[ch] files. Emphasize the MD nature of these things by using
the prefix arm_devmap_ on the function and type names (already a few of
these things found their way into MI code, hopefully it will be harder to
do by accident in the future).

MFC r257201, r257202

Retire arm_remap_nocache() and the data and constants associated with it.

MFC r257199, r257200, r257217:

Remove all #include <machine/pmap.h> from arm code. It's already
included by vm/pmap.h, which is a prerequisite for arm/machine/pmap.h
so there's no reason to ever include it directly.

Remove #include <machine/frame.h> from all the arm code that doesn't
really need it. That would be almost everywhere it was included. Add
it in a couple files that really do need it and were previously getting
it by accident via another header.

Remove the last dregs of trapframe_t. It turns out only arm was using
this type, so remove it to make arm code more consistant with other
platforms.

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

- Enable unmapped buffers on Exynos5 again, because
board now able to see all the 2GB ram it has
- Also unbreak gcc build

Approved by: cognet (mentor)
Approved by: re (marius)

Increase the max KVA available for general consumption on the Exynos 5.

Submitted by: Ruslan Bukin <br@bsdpad.com>

Import basic support for Samsung Exynos 5 support.

Submitted by: Ruslan Bukin <br@bsdpad.com>
Reviewed by: gonzo