exynos5250.dtsi revision 266352
1/*- 2 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/exynos5250.dtsi 266352 2014-05-17 20:52:10Z ian $ 27 */ 28 29/ { 30 compatible = "samsung,exynos5250"; 31 #address-cells = <1>; 32 #size-cells = <1>; 33 interrupt-parent = <&GIC>; 34 35 aliases { 36 soc = &SOC; 37 serial0 = &serial0; 38 serial1 = &serial1; 39 clk0 = &clk0; 40 dp0 = &dp0; 41 fimd0 = &fimd0; 42 }; 43 44 SOC: Exynos5@0 { 45 #address-cells = <1>; 46 #size-cells = <1>; 47 compatible = "simple-bus"; 48 ranges; 49 bus-frequency = <0>; 50 51 GIC: interrupt-controller@10481000 { 52 compatible = "arm,gic"; 53 reg = < 0x10481000 0x1000 >, /* Distributor Registers */ 54 < 0x10482000 0x2000 >; /* CPU Interface Registers */ 55 interrupt-controller; 56 #address-cells = <0>; 57 #interrupt-cells = <1>; 58 }; 59 60 combiner: interrupt-controller@10440000 { 61 compatible = "exynos,combiner"; 62 reg = <0x10440000 0x1000>; 63 interrupts = < 32 33 34 35 36 37 38 39 64 40 41 42 43 44 45 46 47 65 48 49 50 51 52 53 54 55 66 56 57 58 59 60 61 62 63 >; 67 interrupt-parent = <&GIC>; 68 }; 69 70 clk0: clk@10010000 { 71 compatible = "exynos,clk"; 72 reg = < 0x10020000 0x20000 >; 73 }; 74 75 mct { 76 compatible = "exynos,mct"; 77 reg = < 0x101C0000 0x1000 >; 78 clock-frequency = <24000000>; 79 }; 80 81 generic_timer { 82 compatible = "arm,armv7-timer"; 83 clock-frequency = <24000000>; 84 interrupts = < 29 30 27 26 >; 85 interrupt-parent = <&GIC>; 86 }; 87 88 pwm { 89 compatible = "samsung,s3c24x0-timer"; 90 reg = <0x12DD0000 0x1000>; 91 interrupts = < 71 >; 92 interrupt-parent = <&GIC>; 93 clock-frequency = <24000000>; 94 }; 95 96 pad0: pad@11400000 { 97 compatible = "exynos,pad"; 98 status = "disabled"; 99 reg = <0x11400000 0x1000>, /* gpio left */ 100 <0x13400000 0x1000>, /* gpio right */ 101 <0x10D10000 0x1000>, /* gpio c2c */ 102 <0x03860000 0x1000>; 103 interrupts = < 78 77 82 79 >; 104 interrupt-parent = <&GIC>; 105 }; 106 107 usb@12110000 { 108 compatible = "exynos,usb-ehci", "usb-ehci"; 109 reg = <0x12110000 0x1000>, /* EHCI */ 110 <0x12130000 0x1000>, /* EHCI host ctrl */ 111 <0x10040000 0x1000>, /* Power */ 112 <0x10050230 0x10>; /* Sysreg */ 113 interrupts = < 103 >; 114 interrupt-parent = <&GIC>; 115 }; 116 117 usb@12120000 { 118 compatible = "exynos,usb-ohci", "usb-ohci"; 119 reg = <0x12120000 0x10000>; 120 interrupts = < 103 >; 121 interrupt-parent = <&GIC>; 122 }; 123 124 sdhci@12200000 { 125 compatible = "sdhci_generic"; 126 reg = <0x12200000 0x1000>; 127 interrupts = <107>; 128 interrupt-parent = <&GIC>; 129 clock-frequency = <24000000>; /* TODO: verify freq */ 130 }; 131 132 sdhci@12210000 { 133 compatible = "sdhci_generic"; 134 reg = <0x12210000 0x1000>; 135 interrupts = <108>; 136 interrupt-parent = <&GIC>; 137 clock-frequency = <24000000>; 138 }; 139 140 sdhci@12220000 { 141 compatible = "sdhci_generic"; 142 reg = <0x12220000 0x1000>; 143 interrupts = <109>; 144 interrupt-parent = <&GIC>; 145 clock-frequency = <24000000>; 146 }; 147 148 sdhci@12230000 { 149 compatible = "sdhci_generic"; 150 reg = <0x12230000 0x1000>; 151 interrupts = <110>; 152 interrupt-parent = <&GIC>; 153 clock-frequency = <24000000>; 154 }; 155 156 serial0: serial@12C00000 { 157 compatible = "exynos"; 158 reg = <0x12C00000 0x100>; 159 interrupts = < 83 >; 160 interrupt-parent = <&GIC>; 161 clock-frequency = < 100000000 >; 162 current-speed = <115200>; 163 }; 164 165 serial1: serial@12C10000 { 166 compatible = "exynos"; 167 reg = <0x12C10000 0x100>; 168 interrupts = < 84 >; 169 interrupt-parent = <&GIC>; 170 clock-frequency = < 100000000 >; 171 current-speed = <115200>; 172 }; 173 174 serial2: serial@12C20000 { 175 compatible = "exynos"; 176 reg = <0x12C20000 0x100>; 177 interrupts = < 85 >; 178 interrupt-parent = <&GIC>; 179 clock-frequency = < 100000000 >; 180 current-speed = <115200>; 181 }; 182 183 serial3: serial@12C30000 { 184 compatible = "exynos"; 185 reg = <0x12C30000 0x100>; 186 interrupts = < 86 >; 187 interrupt-parent = <&GIC>; 188 clock-frequency = < 100000000 >; 189 current-speed = <115200>; 190 }; 191 192 i2c0: i2c@12C60000 { 193 compatible = "exynos,i2c"; 194 status = "disabled"; 195 reg = <0x12C60000 0x10000>; 196 interrupts = < 88 >; 197 interrupt-parent = <&GIC>; 198 }; 199 200 i2c1: i2c@12C70000 { 201 compatible = "exynos,i2c"; 202 status = "disabled"; 203 reg = <0x12C70000 0x10000>; 204 interrupts = < 89 >; 205 interrupt-parent = <&GIC>; 206 }; 207 208 i2c2: i2c@12C80000 { 209 compatible = "exynos,i2c"; 210 status = "disabled"; 211 reg = <0x12C80000 0x10000>; 212 interrupts = < 90 >; 213 interrupt-parent = <&GIC>; 214 }; 215 216 i2c3: i2c@12C90000 { 217 compatible = "exynos,i2c"; 218 status = "disabled"; 219 reg = <0x12C90000 0x10000>; 220 interrupts = < 91 >; 221 interrupt-parent = <&GIC>; 222 }; 223 224 i2c4: i2c@12CA0000 { 225 compatible = "exynos,i2c"; 226 status = "disabled"; 227 reg = <0x12CA0000 0x10000>; 228 interrupts = < 92 >; 229 interrupt-parent = <&GIC>; 230 }; 231 232 i2c5: i2c@12CB0000 { 233 compatible = "exynos,i2c"; 234 status = "disabled"; 235 reg = <0x12CB0000 0x10000>; 236 interrupts = < 93 >; 237 interrupt-parent = <&GIC>; 238 }; 239 240 i2c6: i2c@12CC0000 { 241 compatible = "exynos,i2c"; 242 status = "disabled"; 243 reg = <0x12CC0000 0x10000>; 244 interrupts = < 94 >; 245 interrupt-parent = <&GIC>; 246 }; 247 248 i2c7: i2c@12CD0000 { 249 compatible = "exynos,i2c"; 250 status = "disabled"; 251 reg = <0x12CD0000 0x10000>; 252 interrupts = < 95 >; 253 interrupt-parent = <&GIC>; 254 }; 255 256 fimd0: fimd@14400000 { 257 compatible = "exynos,fimd"; 258 status = "disabled"; 259 reg = < 0x14400000 0x10000 >, /* fimd */ 260 < 0x14420000 0x10000 >, /* disp */ 261 < 0x10050000 0x220 >; /* sysreg */ 262 interrupt-parent = <&GIC>; 263 }; 264 265 dp0: dp@145B0000 { 266 compatible = "exynos,dp"; 267 status = "disabled"; 268 reg = < 0x145B0000 0x10000 >, 269 < 0x10040720 0x10 >; /* PHY */ 270 interrupt-parent = <&GIC>; 271 }; 272 }; 273}; 274