exynos5250.dtsi revision 266341
1193267Sjkim/*-
2193267Sjkim * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
3193267Sjkim * All rights reserved.
4193267Sjkim *
5193267Sjkim * Redistribution and use in source and binary forms, with or without
6193267Sjkim * modification, are permitted provided that the following conditions
7217355Sjkim * are met:
8217355Sjkim * 1. Redistributions of source code must retain the above copyright
9193267Sjkim *    notice, this list of conditions and the following disclaimer.
10193267Sjkim * 2. Redistributions in binary form must reproduce the above copyright
11217355Sjkim *    notice, this list of conditions and the following disclaimer in the
12217355Sjkim *    documentation and/or other materials provided with the distribution.
13217355Sjkim *
14217355Sjkim * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15217355Sjkim * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16217355Sjkim * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17217355Sjkim * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18217355Sjkim * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19217355Sjkim * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20217355Sjkim * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21217355Sjkim * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22217355Sjkim * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23217355Sjkim * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24217355Sjkim * SUCH DAMAGE.
25193267Sjkim *
26217355Sjkim * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/exynos5250.dtsi 266341 2014-05-17 19:37:04Z ian $
27217355Sjkim */
28217355Sjkim
29193267Sjkim/ {
30217355Sjkim	compatible = "samsung,exynos5250";
31217355Sjkim	#address-cells = <1>;
32217355Sjkim	#size-cells = <1>;
33217355Sjkim	interrupt-parent = <&GIC>;
34217355Sjkim
35217355Sjkim	aliases {
36217355Sjkim		soc = &SOC;
37217355Sjkim		serial0 = &serial0;
38217355Sjkim		serial1 = &serial1;
39217355Sjkim		clk0 = &clk0;
40217355Sjkim		dp0 = &dp0;
41217355Sjkim		fimd0 = &fimd0;
42217355Sjkim	};
43193267Sjkim
44193267Sjkim	SOC: Exynos5@0 {
45193267Sjkim		#address-cells = <1>;
46213800Sjkim		#size-cells = <1>;
47213800Sjkim		compatible = "simple-bus";
48209734Sjkim		ranges;
49209734Sjkim		bus-frequency = <0>;
50193267Sjkim
51228110Sjkim		GIC: interrupt-controller@10481000 {
52228110Sjkim			compatible = "arm,gic";
53228110Sjkim			reg =	< 0x10481000 0x1000 >,	/* Distributor Registers */
54228110Sjkim				< 0x10482000 0x2000 >;	/* CPU Interface Registers */
55228110Sjkim			interrupt-controller;
56223480Sjkim			#address-cells = <0>;
57193267Sjkim			#interrupt-cells = <1>;
58193267Sjkim		};
59193267Sjkim
60193267Sjkim		combiner: interrupt-controller@10440000 {
61193267Sjkim			compatible = "exynos,combiner";
62193267Sjkim			reg = <0x10440000 0x1000>;
63193267Sjkim			interrupts = < 32 33 34 35 36 37 38 39
64209734Sjkim				       40 41 42 43 44 45 46 47
65193267Sjkim				       48 49 50 51 52 53 54 55
66193267Sjkim				       56 57 58 59 60 61 62 63 >;
67193267Sjkim			interrupt-parent = <&GIC>;
68193267Sjkim		};
69193267Sjkim
70193267Sjkim		clk0: clk@10010000 {
71193267Sjkim			compatible = "exynos,clk";
72193267Sjkim			reg = < 0x10020000 0x20000 >;
73193267Sjkim		};
74193267Sjkim
75193267Sjkim		mct {
76193267Sjkim			compatible = "exynos,mct";
77193267Sjkim			reg = < 0x101C0000 0x1000 >;
78193267Sjkim			clock-frequency = <24000000>;
79193267Sjkim		};
80193267Sjkim
81193267Sjkim		generic_timer {
82193267Sjkim			compatible = "arm,armv7-timer";
83193267Sjkim			clock-frequency = <24000000>;
84193267Sjkim		};
85193267Sjkim
86193267Sjkim		pwm {
87213800Sjkim			compatible = "samsung,s3c24x0-timer";
88193267Sjkim			reg = <0x12DD0000 0x1000>;
89213800Sjkim			interrupts = < 71 >;
90213800Sjkim			interrupt-parent = <&GIC>;
91213800Sjkim			clock-frequency = <24000000>;
92213800Sjkim		};
93213800Sjkim
94193267Sjkim		pad0: pad@11400000 {
95193267Sjkim			compatible = "exynos,pad";
96193267Sjkim			status = "disabled";
97193267Sjkim			reg = <0x11400000 0x1000>, /* gpio left */
98193267Sjkim			      <0x13400000 0x1000>, /* gpio right */
99193267Sjkim			      <0x10D10000 0x1000>, /* gpio c2c */
100193267Sjkim			      <0x03860000 0x1000>;
101193267Sjkim			interrupts = < 78 77 82 79 >;
102213800Sjkim			interrupt-parent = <&GIC>;
103193267Sjkim		};
104193267Sjkim
105193267Sjkim		usb@12110000 {
106193267Sjkim			compatible = "exynos,usb-ehci", "usb-ehci";
107213800Sjkim			reg = <0x12110000 0x1000>, /* EHCI */
108213800Sjkim			      <0x12130000 0x1000>, /* EHCI host ctrl */
109193267Sjkim			      <0x10040000 0x1000>, /* Power */
110193267Sjkim			      <0x10050230 0x10>; /* Sysreg */
111193267Sjkim			interrupts = < 103 >;
112193267Sjkim			interrupt-parent = <&GIC>;
113193267Sjkim		};
114193267Sjkim
115193267Sjkim		usb@12120000 {
116193267Sjkim			compatible = "exynos,usb-ohci", "usb-ohci";
117213800Sjkim			reg = <0x12120000 0x10000>;
118213800Sjkim			interrupts = < 103 >;
119193267Sjkim			interrupt-parent = <&GIC>;
120193267Sjkim		};
121193267Sjkim
122193267Sjkim		sdhci@12200000 {
123193267Sjkim			compatible = "sdhci_generic";
124193267Sjkim			reg = <0x12200000 0x1000>;
125193267Sjkim			interrupts = <107>;
126193267Sjkim			interrupt-parent = <&GIC>;
127193267Sjkim			clock-frequency = <24000000>; /* TODO: verify freq */
128193267Sjkim		};
129193267Sjkim
130193267Sjkim		sdhci@12210000 {
131193267Sjkim			compatible = "sdhci_generic";
132193267Sjkim			reg = <0x12210000 0x1000>;
133213800Sjkim			interrupts = <108>;
134193267Sjkim			interrupt-parent = <&GIC>;
135193267Sjkim			clock-frequency = <24000000>;
136193267Sjkim		};
137193267Sjkim
138193267Sjkim		sdhci@12220000 {
139193267Sjkim			compatible = "sdhci_generic";
140193267Sjkim			reg = <0x12220000 0x1000>;
141193267Sjkim			interrupts = <109>;
142193267Sjkim			interrupt-parent = <&GIC>;
143193267Sjkim			clock-frequency = <24000000>;
144193267Sjkim		};
145193267Sjkim
146193267Sjkim		sdhci@12230000 {
147193267Sjkim			compatible = "sdhci_generic";
148193267Sjkim			reg = <0x12230000 0x1000>;
149193267Sjkim			interrupts = <110>;
150213800Sjkim			interrupt-parent = <&GIC>;
151213800Sjkim			clock-frequency = <24000000>;
152193267Sjkim		};
153213800Sjkim
154193267Sjkim		serial0: serial@12C00000 {
155193267Sjkim			compatible = "exynos";
156193267Sjkim			reg = <0x12C00000 0x100>;
157193267Sjkim			interrupts = < 83 >;
158193267Sjkim			interrupt-parent = <&GIC>;
159193267Sjkim			clock-frequency = < 100000000 >;
160193267Sjkim			current-speed = <115200>;
161193267Sjkim		};
162193267Sjkim
163193267Sjkim		serial1: serial@12C10000 {
164193267Sjkim			compatible = "exynos";
165193267Sjkim			reg = <0x12C10000 0x100>;
166193267Sjkim			interrupts = < 84 >;
167193267Sjkim			interrupt-parent = <&GIC>;
168193267Sjkim			clock-frequency = < 100000000 >;
169193267Sjkim			current-speed = <115200>;
170193267Sjkim		};
171193267Sjkim
172193267Sjkim		serial2: serial@12C20000 {
173193267Sjkim			compatible = "exynos";
174193267Sjkim			reg = <0x12C20000 0x100>;
175193267Sjkim			interrupts = < 85 >;
176193267Sjkim			interrupt-parent = <&GIC>;
177193267Sjkim			clock-frequency = < 100000000 >;
178193267Sjkim			current-speed = <115200>;
179193267Sjkim		};
180213800Sjkim
181213800Sjkim		serial3: serial@12C30000 {
182213800Sjkim			compatible = "exynos";
183193267Sjkim			reg = <0x12C30000 0x100>;
184213800Sjkim			interrupts = < 86 >;
185193267Sjkim			interrupt-parent = <&GIC>;
186193267Sjkim			clock-frequency = < 100000000 >;
187193267Sjkim			current-speed = <115200>;
188193267Sjkim		};
189193267Sjkim
190193267Sjkim		i2c0: i2c@12C60000 {
191193267Sjkim			compatible = "exynos,i2c";
192193267Sjkim			status = "disabled";
193193267Sjkim			reg = <0x12C60000 0x10000>;
194193267Sjkim			interrupts = < 88 >;
195193267Sjkim			interrupt-parent = <&GIC>;
196193267Sjkim		};
197193267Sjkim
198193267Sjkim		i2c1: i2c@12C70000 {
199193267Sjkim			compatible = "exynos,i2c";
200193267Sjkim			status = "disabled";
201193267Sjkim			reg = <0x12C70000 0x10000>;
202193267Sjkim			interrupts = < 89 >;
203193267Sjkim			interrupt-parent = <&GIC>;
204193267Sjkim		};
205193267Sjkim
206193267Sjkim		i2c2: i2c@12C80000 {
207193267Sjkim			compatible = "exynos,i2c";
208193267Sjkim			status = "disabled";
209193267Sjkim			reg = <0x12C80000 0x10000>;
210193267Sjkim			interrupts = < 90 >;
211193267Sjkim			interrupt-parent = <&GIC>;
212193267Sjkim		};
213193267Sjkim
214193267Sjkim		i2c3: i2c@12C90000 {
215193267Sjkim			compatible = "exynos,i2c";
216193267Sjkim			status = "disabled";
217193267Sjkim			reg = <0x12C90000 0x10000>;
218193267Sjkim			interrupts = < 91 >;
219193267Sjkim			interrupt-parent = <&GIC>;
220193267Sjkim		};
221193267Sjkim
222193267Sjkim		i2c4: i2c@12CA0000 {
223193267Sjkim			compatible = "exynos,i2c";
224193267Sjkim			status = "disabled";
225193267Sjkim			reg = <0x12CA0000 0x10000>;
226193267Sjkim			interrupts = < 92 >;
227193267Sjkim			interrupt-parent = <&GIC>;
228193267Sjkim		};
229193267Sjkim
230193267Sjkim		i2c5: i2c@12CB0000 {
231193267Sjkim			compatible = "exynos,i2c";
232193267Sjkim			status = "disabled";
233193267Sjkim			reg = <0x12CB0000 0x10000>;
234193267Sjkim			interrupts = < 93 >;
235193267Sjkim			interrupt-parent = <&GIC>;
236193267Sjkim		};
237193267Sjkim
238193267Sjkim		i2c6: i2c@12CC0000 {
239193267Sjkim			compatible = "exynos,i2c";
240213800Sjkim			status = "disabled";
241193267Sjkim			reg = <0x12CC0000 0x10000>;
242193267Sjkim			interrupts = < 94 >;
243193267Sjkim			interrupt-parent = <&GIC>;
244193267Sjkim		};
245193267Sjkim
246193267Sjkim		i2c7: i2c@12CD0000 {
247193267Sjkim			compatible = "exynos,i2c";
248193267Sjkim			status = "disabled";
249193267Sjkim			reg = <0x12CD0000 0x10000>;
250193267Sjkim			interrupts = < 95 >;
251193267Sjkim			interrupt-parent = <&GIC>;
252193267Sjkim		};
253193267Sjkim
254193267Sjkim		fimd0: fimd@14400000 {
255193267Sjkim			compatible = "exynos,fimd";
256193267Sjkim			status = "disabled";
257193267Sjkim			reg = < 0x14400000 0x10000 >, /* fimd */
258193267Sjkim			      < 0x14420000 0x10000 >, /* disp */
259193267Sjkim			      < 0x10050000 0x220 >; /* sysreg */
260193267Sjkim			interrupt-parent = <&GIC>;
261193267Sjkim		};
262193267Sjkim
263193267Sjkim		dp0: dp@145B0000 {
264193267Sjkim			compatible = "exynos,dp";
265193267Sjkim			status = "disabled";
266213800Sjkim			reg = < 0x145B0000 0x10000 >,
267213800Sjkim			      < 0x10040720 0x10 >; /* PHY */
268193267Sjkim			interrupt-parent = <&GIC>;
269193267Sjkim		};
270193267Sjkim	};
271193267Sjkim};
272193267Sjkim