MFC r283291: don't use CALLOUT_MPSAFE with callout_init()

The main purpose of this MFC is to reduce conflicts for other merges.
Parts of the original change have already "trickled down" via individual MFCs.

MFC r257334, r257336, r257337, r257338, r257341, r257342, r257343, r257370,
r257368, r257416

Hints-only devices should return BUS_PROBE_NOWILDCARD from their probe
methods.

MFC r258779,r258780,r258787,r258822:

Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit. Instead use (1U << 31) which gets the
expected result.

Similar to the (1 << 31) case it is not defined to do (2 << 30).

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Fixes for the Netlogic XLP on-chip RSA block driver

The changes are to:
* Use contigmalloc/contigfree which handling microcode buffer
* Use a different buffer to send microcode to each engine
* Swap microcode in little-endian compilation
* Fix freeback message queue id field
* Simplify xlp_get_rsa_opsize() to remove unnecessary checks
* Fix NULL check after use in xlp_free_cmd_params()
* Do better error handling when the hardware returns error
* Fix error codes in few cases

Submitted by: Vekatesh J. V. <venkatesh.vivekanandan@broadcom.com>
Approved by: re (hrs)

Style fixes for the Netlogic XLP RSA driver

Updates to the Netlogic XLP on-chp RSA block driver. The changes are
to follow style(9) guidelines, to improve readability and to remove
unnecessary initialization.

No changes to logic have been introduced by this commit.

Submitted by: Venkatesh J. V. <venkatesh.vivekanandan@broadcom.com>
Approved by: re (hrs)

Netlogic XLP network driver update

Changes are to
- update board and network interface detection logic
- fix reading onboard CPLD in little-endian config
- print NAE frequency conrrectly for Bx chips
- update XAUI config to disable Rx/Tx until interface is up

Submitted by: Venkatesh J V <venkatesh.vivekanandan@broadcom.com>

Fix incorrect KASSERTs in xlpge

Fix for crash in Netlogic XLP network accelerator driver when invariants
are enabled - use correct the condition for KASSERT.

MFcalloutng:
Switch eventtimers(9) from using struct bintime to sbintime_t.
Even before this not a single driver really supported full dynamic range of
struct bintime even in theory, not speaking about practical inexpediency.
This change legitimates the status quo and cleans up the code.

Little-endian and other fixes for Broadcom XLP network driver

The changes are:
- the microcore code loaded into the NAE has to be byteswapped
in LE
- the descriptors in memory for a P2P NAE descriptor has to be
byteswapped in LE
- the m_data pointer is already cacheline aligned, so the
unnecessary m_adj to cacheline size can be removed
- fix mask used to obtain physical address from the Tx freeback
descriptor
- fix a compile error in code under #ifdef

Obtained from: Venkatesh J V <venkatesh.vivekanandan@broadcom.com>

Fix credit configuration on Broadcom XLP CMS

The CMS output queue credit configuration register is 64 bit, so use
a 64 bit variable while updating it.
Obtained from: Venkatesh J V <venkatesh.vivekanandan@broadcom.com>

Broadcom XLP network driver update for XLP 8xx B1 rev

Update MDIO reset code to support Broadcom XLP B1 revisions.
Update nlm_xlpge_ioctl, nlm_xlpge_port_enable need not be
called after nlm_xlpge_init.

Obtained from: Venkatesh J V <venkatesh.vivekanandan@broadcom.com>

Minor updates to the Broadcom XLP NAE driver

Remove unnecessary SGMII initialization code from nae.c. While there
clean up some prints and whitespace.

Broadcom XLP updates for the new firmware

Support few more versions of board firmware. In case the security
block is disabled, enable it at boot. Also increase the excluded
memory region to cover the area used by the firmware to initialize
devices.

Little-endian fix for PCI on Broadcom XLP.

Update the function xlp_pcib_hardware_swap_enable() to do nothing
when BYTE_ORDER is not BIG_ENDIAN. PCIe hardware swap is not requred
in little-endian mode as the endianness matches that of CPU.

Mechanically substitute flags from historic mbuf allocator with
malloc(9) flags within sys.

Exceptions:

- sys/contrib not touched
- sys/mbuf.h edited manually

Add correct range parameter in XLP DTS

r239274 added support for ranges. Update XLP DTS to provide the correct
range parameter for the XLP SoC bus. Also fix bus_space_map method
for XLP bus space.

Submitted by: Sreekanth M. <sreekanth.molagavalli@broadcom.com>

Define and exclude DRAM regions used by hardware/bootloder on XLP

Fix xlp_mem_init() - remove the ad-hoc code for excluding memory regions
and use an array of regions.

Support Netlogic XLP 8xx B1 revisions in xlpge.

Updates to the MDIO access code for the new revision of the
XLP chip.

Identify Netlogic XLP 8xx B1 chip revisions

Add functions to check for 8xx B0 and 3xx Ax revisions which will
be used in network block initialization.

Fix PCIe hardware swap configuration for Netlogic XLP

The last 12 bits of the limit registers have to be set to 1. These
bits are not significant in bridge BARs and are 0 on read, but the
bits are valid in the swap limit register and needs to be set.

Remove unnecessary assembly code.

The compiler should generate lw/sw corresponding to register
operations.

Supply endianness implied by the -m flag when compiling ucore code.

Fix little-endian built.

Fix size of PCI softc.

Resource allocation for XLP SoC SDHCI slots

The on-chip SD slots do not have PCI BARs corresponding to them, so
this has to be handled in the custom SoC memory allocation.

Provide memory resource for rids corresponding to BAR 0 and 1 in
the custom allocation code.

Update memory and resource allocation code for SoC devices

The XLP on-chip devices have PCI configuration headers, but some of the
devices need custom resource allocation code.
- devices with no MEM/IO BARs with registers in PCIe extended reg
space have to be handled in memory resource allocation
- devices without INTPIN/INTLINE in PCI header can be supported
by having these faked with a shadow register.
- Some devices does not allow 8/16 bit access to the register space,
he default bus space cannot be used for these.

Subclass pci and override attach and resource allocation methods to
take care of this.

Remove earlier code which did this partially.

NOR flash driver for XLP.

The NOR interface on the SoC appears on the top level PCI bus. Add
a simple driver for this.

XLP UART code udpate.

Move XLP PCI UART device to sys/mips/nlm/dev/ directory. Other
drivers for the XLP SoC devices will be added here as well.
Update uart_cpu_xlp.c and uart_pci_xlp.c use macros for uart port,
speed and IO frequency.

xlpge : driver for XLP network accelerator

Features:
- network driver for the four 10G interfaces and two management ports
on XLP 8xx.
- Support 4xx and 3xx variants of the processor.
- Source code and firmware building for the 16 mips32r2 micro-code engines
in the Network Accelerator.
- Basic initialization code for Packet ordering Engine.

Submitted by: Prabhath Raman (prabhath at netlogicmicro com)
[refactored and fixed up for style by jchandra]

Support for EEPROM and CPLD on XLP EVP boards.

On XLP evaluation platform, the board information is stored
in an I2C eeprom and the network block configuration is available
from a CPLD connected to the GBU (NOR flash bus). Add support
for both of these.

Opencrypto driver for XLP Security and RSA/ECC blocks

Support for the Security and RSA blocks on XLP SoC. Even though
the XLP supports many more algorithms, only the ones supported
in OCF have been added.

Submitted by: Venkatesh J. V. (venkatesh at netlogicmicro com)

I2C support for XLP, add hints for I2C devices and update PCI resource
allocation code.

XLP PCIe code update.

- XLP supports hardware swap for PCIe IO/MEM accesses. Since we
are in big-endian mode, enable hardware swap and use the normal
bus space.
- move some printfs to bootverbose, and remove others.
- fix SoC device resource allocation code
- Do not use '|' while updating PCIE_BRIDGE_MSI_ADDRL
- some style fixes

In collaboration with: Venkatesh J. V. (venkatesh at netlogicmicro com)

Update the L1D cache flush sequence when enabling threads.

Added more comments to the code.

Switch to interrupt based message handling for XLP 8xx B0.

Fixup some style issues in the file as well.

Support for XLP4xx and XLP 8xx B0 revision

- Add 4xx processor IDs, add workaround in CPU detection code.
- Update frequency detection code for XLP 8xx.
- Add setting device frequency code.
- Update processor ID checking code.

Fixes to the XLP startup code.

Changes are:
- Correct the order of calling init functions.
- Fix up checking excluding reset area.

o) Use ABI, not ISA_* options, to determine whether to compile bits if libkern
required for the ABI the kernel is being built for.
XXX This is implemented in a kind-of nasty way that involves including source
files, but it's still an improvement.
o) Retire ISA_* options since they're unused and were always wrong.

Remove platform APIs which are not used by any code and which had only stub
implementations or no implementation on all platforms.

Some of these functions might be good ideas, but their semantics were unclear
given the lack of implementation, and an unlucky porter could be fooled into
trying to implement them or, worse, being baffled when something like
platform_trap_enter() failed to be called.

Fix N32 compilation again for XLP.

Disable DDB/KDB related options for N32, and add back a cast that was
lost during the last set of updates.

Reported by: gonzo, bz

Fix XLP compilation.

Add definitions of LSU_DEBUG_ADDR and LSU_DEBUG_DATA0, the code that uses
it was added in r227799

Reported by: gonzo

- There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
(bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
since r52045) but even recently added device drivers do this unnecessarily.
Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
Discussed with: jhb
- Also while at it, use __FBSDID.

Do dcache flush on CPU core before enabling threads.

The dcache flush has to be done using the core control registers before
splitting the L1D cache by enabling the hardware threads.

Also replace .word calls for mfcr/mtcr with a C macro.

In collaboration with: prabhath at netlogicmicro com

Merge XLP 3XX updates and related rework.

* Update message station (CMS) code, read queue ids from PCI header.
* Use interrupts to wakeup message handling threads on 3XX
* Update PIC code, read interrupt information from PCI header instead
of using fixed values.
* Update PCI interrupt handling for the PIC change.
* Update code for getting chip frequency, new code support XLP 3XX
* Misc style(9) fixes

In collaboration with: prabhath at netlogicmicro com (CMS/PIC)
venkatesh at netlogicmicro.com (PCI)

Remove unused variable ubase.

This vaiable is initialized but not used.

Remvoe unused file

mips/nlm/uart_cpu_xlp.c has replaced uart_bus_xlp_iodi.c

Fix USB compilation, and add USB options to XLP conf

Remove obsolete header file included in usb_init.c

Whitespace fixes in XLP HAL files.

Also fixup a macro in iomap.h

Rearrange XLP configuration files.

Create std.XLP for configuration options, which is included by the
conf files. The files XLP, XLPN32 and XLP64 will have mostly ABI related
options.

Also move uart and pci to mips/nlm/std.xlp since all XLP configurations
needs these devices.

Obtained from: prabhath at netlogicmicro com (intial version)

Fix XLP compile failure on n32 abi.

Reported by: bz@

Support for booting XLP using FDT.

- update xlp_machdep.c to read arguments from FDT if FDT support is
compiled in.
- define rmi_uart_bus_space, and use it as fdtbus_bs_tag
- update conf files for FDT support
- add default dts file xlp-basic.dts

- change "is is" to "is" or "it is"
- change "the the" to "the"

Approved by: lstewart
Approved by: sahil (mentor)
MFC after: 3 days

MIPS XLP platform code update.

* Update the hardware access register definitions and functions to bring
them in line with other Netlogic software.
* Update the platform bus to use PCI even for on-chip devices. Add a dummy
PCI driver to ignore on-chip devices which do not need driver.
* Provide memory and IRQ resource allocation code for on-chip devices
which cannot get it from PCI config.
* add support for on-chip PCI and USB interfaces.
* update conf files, enable pci and retain old MAXCPU until we can support
>32 cpus.

Approved by: re(kib), jmallett

MIPS changes for Netlogic XLP support.

This patch adds support for the Netlogic XLP mips64 processors in
the common MIPS code. The changes are :

- Add CPU_NLM processor type
- Add cases for CPU_NLM, mostly were CPU_RMI is used.
- Update cache flush changes for CPU_NLM
- Add kernel build configuration files for xLP.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by: bz(re), jmallett, imp(mips)

Add MIPS platform files for Netlogic XLP SoC.

Processor, UART, PIC and Messaging Network code. Also add
sys/mips/nlm/hal for on-chip device registers.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by: bz(re), jmallett, imp(mips)