/haiku/3rdparty/kallisti5/ |
H A D | licenseReport.rb | 28 entry.values.first.each do |pattern|
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/haiku/docs/develop/kits/storage/resources/ |
H A D | ResourcesFormat.tex | 133 Therefore two values have to be known: The size of the actual ELF file and the
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/haiku/headers/os/interface/ |
H A D | ChannelControl.h | 10 // independent values, with minima and maxima. 83 const int32* values); 84 status_t SetAllValue(int32 values); 151 int32 channelCount, const int32* values);
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/haiku/headers/private/audio/ |
H A D | hmulti_audio.h | 71 /* sample rate values */ 72 /* various fixed sample rates we support (for hard-sync clocked values) */ 97 /* format values */ 140 /* interface_flags values */ 146 /* "Soft" buffers means you can change the pointer values and the driver will still be happy. */ 195 /* designation values */ 228 /* connector values */ 447 values; 536 /* possible flags values for what is available (in and out) */
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/haiku/src/add-ons/accelerants/radeon/ |
H A D | crtc.c | 20 crtc_regs *values ) 27 OUTREGP( regs, RADEON_CRTC_GEN_CNTL, values->crtc_gen_cntl, 30 OUTREG( regs, RADEON_CRTC_H_TOTAL_DISP, values->crtc_h_total_disp ); 31 OUTREG( regs, RADEON_CRTC_H_SYNC_STRT_WID, values->crtc_h_sync_strt_wid ); 32 OUTREG( regs, RADEON_CRTC_V_TOTAL_DISP, values->crtc_v_total_disp ); 33 OUTREG( regs, RADEON_CRTC_V_SYNC_STRT_WID, values->crtc_v_sync_strt_wid ); 34 OUTREG( regs, RADEON_CRTC_OFFSET_CNTL, values->crtc_offset_cntl ); 35 OUTREG( regs, RADEON_CRTC_PITCH, values->crtc_pitch ); 38 OUTREGP( regs, RADEON_CRTC2_GEN_CNTL, values->crtc_gen_cntl, 44 OUTREG( regs, RADEON_CRTC2_H_TOTAL_DISP, values [all...] |
H A D | flat_panel.c | 21 accelerator_info *ai, fp_regs *values ) 25 values->fp_horz_stretch = INREG( regs, RADEON_FP_HORZ_STRETCH ); 26 values->fp_vert_stretch = INREG( regs, RADEON_FP_VERT_STRETCH ); 30 fp_info *flatpanel, display_mode *mode, bool use_rmx, fp_regs *values ) 38 values->fp_horz_stretch &= 42 values->fp_vert_stretch &= 62 values->fp_horz_stretch = flatpanel->panel_xres << RADEON_HORZ_PANEL_SIZE_SHIFT; 65 values->fp_horz_stretch &= 74 values->fp_horz_stretch = stretch 75 | (values [all...] |
H A D | impactv.c | 127 // these values are not scaled 418 impactv_params *params, impactv_regs *values, int crtc_idx, 428 values->tv_ftotal = timing->f_total; 432 values->tv_vscaler_cntl1 = RADEON_TV_VSCALER_CNTL1_Y_W_EN; 434 values->tv_vscaler_cntl1 = 435 (values->tv_vscaler_cntl1 & 0xe3ff0000) | 440 values->tv_vscaler_cntl1 |= RADEON_TV_VSCALER_CNTL1_RESTART_FIELD; 442 values->tv_vscaler_cntl1 |= 4 << RADEON_TV_VSCALER_CNTL1_Y_DEL_W_SIG_SHIFT; 444 values->tv_vscaler_cntl1 |= 2 << RADEON_TV_VSCALER_CNTL1_Y_DEL_W_SIG_SHIFT; 446 values 416 Radeon_CalcImpacTVRegisters( accelerator_info *ai, display_mode *mode, impactv_params *params, impactv_regs *values, int crtc_idx, bool internal_encoder, tv_standard_e tv_format, display_device_e display_device ) argument 741 getHorTimingTableAddr( impactv_regs *values, bool internal_encoder ) argument 788 Radeon_ImpacTVwriteHorTimingTable( accelerator_info *ai, impactv_write_FIFO write, impactv_regs *values, bool internal_encoder ) argument [all...] |
H A D | internal_tv_out.c | 91 accelerator_info *ai, impactv_regs *values, const register_mapping *mapping ) 97 *(uint32 *)((char *)(values) + mapping->offset) );*/ 99 OUTREG( regs, mapping->address, *(uint32 *)((char *)(values) + mapping->offset) ); 108 accelerator_info *ai, impactv_regs *values, const register_mapping *mapping ) 112 *(uint32 *)((char *)(values) + mapping->offset) );*/ 115 mapping->address, *(uint32 *)((char *)(values) + mapping->offset) ); 188 accelerator_info *ai, impactv_regs *values ) 190 uint32 orig_tv_master_cntl = values->tv_master_cntl; 196 values->tv_master_cntl |= 205 writeMMIORegList( ai, values, intern_reg_mapping_before_pl 90 writeMMIORegList( accelerator_info *ai, impactv_regs *values, const register_mapping *mapping ) argument 107 writePLLRegList( accelerator_info *ai, impactv_regs *values, const register_mapping *mapping ) argument 230 readMMIORegList( accelerator_info *ai, impactv_regs *values, const register_mapping *mapping ) argument 248 readPLLRegList( accelerator_info *ai, impactv_regs *values, const register_mapping *mapping ) argument [all...] |
H A D | monitor_routing.c | 27 accelerator_info *ai, routing_regs *values ) 31 values->dac_cntl = INREG( regs, RADEON_DAC_CNTL ); 32 values->dac_cntl2 = INREG( regs, RADEON_DAC_CNTL2 ); 33 values->crtc_ext_cntl = INREG( regs, RADEON_CRTC_EXT_CNTL ); 34 values->crtc2_gen_cntl = INREG( regs, RADEON_CRTC2_GEN_CNTL ); 35 values->disp_output_cntl = INREG( regs, RADEON_DISP_OUTPUT_CNTL ); 36 values->pixclks_cntl = Radeon_INPLL( ai->regs, ai->si->asic, RADEON_PIXCLKS_CNTL ); 37 values->vclk_ecp_cntl = Radeon_INPLL( ai->regs, ai->si->asic, RADEON_VCLK_ECP_CNTL ); 47 values->disp_hw_debug = INREG( regs, RADEON_DISP_HW_DEBUG ); 51 values [all...] |
H A D | set_mode.h | 13 // PLL divider values 115 // Bios values used by Mobility Asics 209 display_mode *mode, crtc_regs *values ); 211 crtc_regs *values ); 216 void Radeon_CalcPLLRegisters( const display_mode *mode, const pll_dividers *dividers, pll_regs *values ); 217 void Radeon_ProgramPLL( accelerator_info *ai, int crtc_idx, pll_regs *values ); 233 void Radeon_ReadRMXRegisters( accelerator_info *ai, fp_regs *values ); 234 void Radeon_CalcRMXRegisters( fp_info *flatpanel, display_mode *mode, bool use_rmx, fp_regs *values ); 235 void Radeon_ProgramRMXRegisters( accelerator_info *ai, fp_regs *values ); 237 void Radeon_ReadFPRegisters( accelerator_info *ai, fp_regs *values ); [all...] |
H A D | theatre_out.c | 107 accelerator_info *ai, impactv_regs *values, const register_mapping *mapping ) 111 *(uint32 *)((char *)(values) + mapping->offset) ); 114 *(uint32 *)((char *)(values) + mapping->offset) );*/ 180 accelerator_info *ai, impactv_regs *values ) 182 uint32 orig_tv_master_cntl = values->tv_master_cntl; 188 values->tv_master_cntl |= 197 writeTheatreRegList( ai, values, theatre_reg_mapping_start ); 209 Radeon_ImpacTVwriteHorTimingTable( ai, Radeon_TheatreWriteFIFO, values, false ); 210 Radeon_ImpacTVwriteVertTimingTable( ai, Radeon_TheatreWriteFIFO, values ); 214 values 106 writeTheatreRegList( accelerator_info *ai, impactv_regs *values, const register_mapping *mapping ) argument 220 readTheatreRegList( accelerator_info *ai, impactv_regs *values, const register_mapping *mapping ) argument [all...] |
/haiku/src/add-ons/kernel/busses/scsi/usb/ |
H A D | settings.c | 156 strncpy(to, dp->values[0], size); 173 char *value = dp->values[0]; 208 uint16 id = strtoul(dp->values[0], NULL, 0) & 0xffff; 260 } /*enumerate parameter values (product ids) */ 279 if(dp && dp->value_count > 0 && dp->values[0]){ 280 uint16 id = strtoul(dp->values[0], NULL, 0) & 0xffff;
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/haiku/src/add-ons/kernel/drivers/audio/ac97/auich/ |
H A D | multi.h | 36 void (*get) (void *card, const void *cookie, int32 type, float *values); 37 void (*set) (void *card, const void *cookie, int32 type, float *values);
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/haiku/src/add-ons/kernel/drivers/audio/ac97/auvia/ |
H A D | multi.h | 39 void (*get) (void *card, const void *cookie, int32 type, float *values); 40 void (*set) (void *card, const void *cookie, int32 type, float *values);
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/haiku/src/add-ons/kernel/drivers/audio/ac97/es1370/ |
H A D | multi.h | 16 void (*get) (void *card, const void *cookie, int32 type, float *values); 17 void (*set) (void *card, const void *cookie, int32 type, float *values);
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/haiku/src/add-ons/kernel/drivers/audio/ac97/sis7018/ |
H A D | Mixer.cpp | 626 int32 Id= Info->values[i].id; 638 Info->values[i].enable = (RegValue & mask) == mask; 640 Reg, Info->values[i].enable, RegValue); 645 Info->values[i].mux = (RegValue | (RegValue >> 8)) & 0x7; 647 Reg, Info->values[i].mux, RegValue); 656 Info->values[i].gain = mult * gain - base; 658 Reg, Info->values[i].gain, mult, base, gain); 664 Info->values[i].gain = mult * gain - base; 666 Reg, Info->values[i].gain, mult, base, gain); 679 int32 Id = Info->values[ [all...] |
/haiku/src/add-ons/kernel/drivers/audio/echo/ |
H A D | multi.h | 39 void (*get) (void *card, MIXER_AUDIO_CHANNEL, int32 type, float *values); 40 void (*set) (void *card, MIXER_AUDIO_CHANNEL, int32 type, float *values);
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/haiku/src/add-ons/kernel/drivers/audio/emuxki/ |
H A D | multi.h | 36 void (*get) (void *card, const void *cookie, int32 type, float *values); 37 void (*set) (void *card, const void *cookie, int32 type, float *values);
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/haiku/src/add-ons/kernel/drivers/audio/generic/ |
H A D | multi.c | 143 multi_mix_value *values; local 148 original_values = info.values; 150 values = (multi_mix_value *)malloc(allocSize); 151 if (values == NULL) 154 if (!IS_USER_ADDRESS(info.values) 155 || user_memcpy(values, info.values, allocSize) < B_OK) { 156 free(values); 159 info.values = values; 181 multi_mix_value *values; local [all...] |
/haiku/src/add-ons/kernel/drivers/audio/hda/ |
H A D | hda_multi_audio.cpp | 698 id = mmvi->values[i].id - MULTI_CONTROL_FIRSTID; 711 mmvi->values[i].enable = (resp[0] & AMP_MUTE) != 0; 713 mmvi->values[i].enable); 720 mmvi->values[i].gain = (0.0 + value - AMP_CAP_OFFSET(control->capabilities)) 723 control->nid, mmvi->values[i].gain, value); 729 mmvi->values[i].mux = 0; 740 mmvi->values[i].mux = j; 748 control->nid, mmvi->values[i].mux); 754 mmvi->values[i].mux = resp & 0xff; 756 control->nid, mmvi->values[ [all...] |
/haiku/src/add-ons/kernel/drivers/audio/ice1712/ |
H A D | multi.cpp | 32 const char *values[], int32 parent, int32 nb_combo, const char *name); 616 ice1712UI_CreateCombo(multi_mix_control **p_mmc, const char *values[], argument 635 //The values 636 for (i = 0; values[i] != NULL; i++) { 640 strcpy(mmc->name, values[i]); 886 multi_mix_value *mmv = &(data->values[i]); 919 multi_mix_value *mmv = &(data->values[i]);
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/haiku/src/add-ons/kernel/file_systems/nfs4/ |
H A D | Inode.cpp | 87 AttrValue* values; local 89 result = reply.GetAttr(&values, &count); 94 if (count < 5 || values[4].fAttribute != FATTR4_FILEID) 97 inode->fInfo.fFileId = values[4].fData.fValue64; 102 inode->fType = values[0].fData.fValue32; 109 inode->fChange = values[1].fData.fValue64; 112 size = values[2].fData.fValue64; 117 = reinterpret_cast<FileSystemId*>(values[3].fData.fPointer); 119 delete[] values; 123 delete[] values; 510 AttrValue* values; local [all...] |
H A D | NFS4Inode.cpp | 48 AttrValue* values; local 50 result = reply.GetAttr(&values, &count); 55 *change = values[0].fData.fValue64; 56 delete[] values; 162 AttrValue* values; local 165 result = reply.GetAttr(&values, &count); 169 *change = values[0].fData.fValue64; 170 delete[] values; 183 result = reply.GetAttr(&values, &count); 189 = reinterpret_cast<FileSystemId*>(values[ 282 GetStat(AttrValue** values, uint32* count, OpenAttrCookie* cookie) argument 519 AttrValue* values; local 858 AttrValue* values; local 936 AttrValue* values; local [all...] |
H A D | NFS4Inode.h | 44 status_t GetStat(AttrValue** values, uint32* count,
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H A D | RootInode.cpp | 84 AttrValue* values; local 86 result = reply.GetAttr(&values, &count); 90 if (count >= next && values[next].fAttribute == FATTR4_FILES_FREE) { 91 fInfoCache.free_nodes = values[next].fData.fValue64; 95 if (count >= next && values[next].fAttribute == FATTR4_FILES_TOTAL) { 96 fInfoCache.total_nodes = values[next].fData.fValue64; 101 if (count >= next && values[next].fAttribute == FATTR4_MAXREAD) { 102 ioSize = min_c(ioSize, values[next].fData.fValue64); 106 if (count >= next && values[next].fAttribute == FATTR4_MAXWRITE) { 107 ioSize = min_c(ioSize, values[nex [all...] |