Lines Matching refs:values
20 crtc_regs *values )
27 OUTREGP( regs, RADEON_CRTC_GEN_CNTL, values->crtc_gen_cntl,
30 OUTREG( regs, RADEON_CRTC_H_TOTAL_DISP, values->crtc_h_total_disp );
31 OUTREG( regs, RADEON_CRTC_H_SYNC_STRT_WID, values->crtc_h_sync_strt_wid );
32 OUTREG( regs, RADEON_CRTC_V_TOTAL_DISP, values->crtc_v_total_disp );
33 OUTREG( regs, RADEON_CRTC_V_SYNC_STRT_WID, values->crtc_v_sync_strt_wid );
34 OUTREG( regs, RADEON_CRTC_OFFSET_CNTL, values->crtc_offset_cntl );
35 OUTREG( regs, RADEON_CRTC_PITCH, values->crtc_pitch );
38 OUTREGP( regs, RADEON_CRTC2_GEN_CNTL, values->crtc_gen_cntl,
44 OUTREG( regs, RADEON_CRTC2_H_TOTAL_DISP, values->crtc_h_total_disp );
45 OUTREG( regs, RADEON_CRTC2_H_SYNC_STRT_WID, values->crtc_h_sync_strt_wid );
46 OUTREG( regs, RADEON_CRTC2_V_TOTAL_DISP, values->crtc_v_total_disp );
47 OUTREG( regs, RADEON_CRTC2_V_SYNC_STRT_WID, values->crtc_v_sync_strt_wid );
48 OUTREG( regs, RADEON_CRTC2_OFFSET_CNTL, values->crtc_offset_cntl );
49 OUTREG( regs, RADEON_CRTC2_PITCH, values->crtc_pitch );
70 display_mode *mode, crtc_regs *values )
83 values->crtc_gen_cntl =
88 values->crtc_gen_cntl = RADEON_CRTC2_EN
95 values->crtc_h_total_disp =
103 values->crtc_h_sync_strt_wid =
108 values->crtc_v_total_disp =
114 values->crtc_v_sync_strt_wid =
120 values->crtc_offset_cntl = 0;
122 values->crtc_pitch = Radeon_RoundVWidth( mode->virtual_width, vc->bpp ) / 8;
124 SHOW_FLOW( 2, "crtc_pitch=%ld", values->crtc_pitch );
126 values->crtc_pitch |= values->crtc_pitch << 16;