Searched refs:entry (Results 1 - 16 of 16) sorted by relevance

/broadcom-cfe-1.4.2/cfe/arch/ppc/common/src/
H A Dexchandler.c151 * install_handler(vec,entry)
158 * entry - location of handler
164 static void install_handler(uint32_t vec,uint32_t entry) argument
188 *v++ = 0x3c000000 | (entry >> 16);
189 *v++ = 0x60000000 | (entry & 0xFFFF);
205 static void install_apientry(uint32_t vec,uint32_t entry) argument
228 *vp++ = 0x3c000000 | (entry >> 16);
229 *vp++ = 0x60000000 | (entry & 0xFFFF);
/broadcom-cfe-1.4.2/cfe/main/
H A Dcfe_fatfs.c148 * Directory entry offsets and values
480 * fat_getentry(fatfs,entry)
482 * Read a FAT entry. This is more involved than you'd think,
484 * and the nasty case where a 12-bit FAT entry crosses a sector
489 * entry - index of FAT entry
492 * FAT entry, or <0 if an error occured
495 static int fat_getfatentry(fatfs_t *fatfs,int entry) argument
508 odd = entry & 1;
509 byteoffset = ((entry
589 fat_getrootdirentry(fatfs_t *fatfs,int entryidx,uint8_t *entry) argument
655 fat_dumpdirentry(uint8_t *entry) argument
[all...]
/broadcom-cfe-1.4.2/cfe/ui/
H A Dui_pcicmds.c464 /* Sets Map table entry in 1280/1480 PCI config space */
467 int entry; local
476 entry = atoi(argv[0]);
477 if(entry >= BCM1480_PHB_MAPENTRIES) {
478 printf("\n Invalid map table entry");
485 pci_conf_write(0, R_BCM1480_PHB_MAP(entry), addr);
525 "Sets Map table entry in PCI Config space",
/broadcom-cfe-1.4.2/cfe/arch/mips/common/src/
H A Dinit_mips.S324 * CPU API entry (needs to be in this file for the SVR4 PIC build)
686 33: add v0,8 # Advance to next entry
691 * entry, or the first two entries if entry #2 has its
698 lw t0,4(REG_PLTGOT) # Skip first entry
699 bge t0,zero,1f # and second entry if high bit set
730 add REG_PLTGOT,4 # next GOT entry
731 add v0,16 # next SYM entry
767 add t1,t1,REG_SYMTAB # t1 points at symtab entry
1024 * a1 - entry vecto
[all...]
H A Dinit_ram.S238 * later on. The fragment of the ROM-based entry points vector
416 * a1 - entry vector
421 * a0 - entry vector
466 la a2,cpu_apientry # A2 = API entry
471 LR t0,0(sp) # entry point
H A Dzipstart_init.S549 * a0 - entry vector
637 * API entry
647 1: li v0,-1 # No entry point installed
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/
H A Dsb1250_pci_machdep.c1518 uint32_t entry;
1533 entry = (addr & PHB_MAP_ADDR_MASK) | PHB_MAP_ENABLE;
1535 entry |= PHB_MAP_L2CA;
1537 entry |= PHB_MAP_ENDIAN;
1538 pci_conf_write32(SB1250_PCI_BRIDGE, PHB_MAP_REG_BASE + 4*i, entry);
1517 uint32_t entry; local
H A Dsb1250_altcpu.S341 sd zero,8(t1) # Reset address of CPU1 (2nd entry in table)
743 la a2,cpu_apientry # A2 = firmware entry vector
H A Dsb1_cpuinit.S238 mtc0 zero,C0_TLBHI # TLB entry (high half)
H A Dsb1250_l2cache.S119 # Loop through each entry and each way
H A Ddiag_l2cache.S2640 # Loop through each entry and each way
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/
H A Dsb1_cpuinit.S239 mtc0 zero,C0_TLBHI # TLB entry (high half)
H A Dbcm1480_pci_machdep.c1541 uint32_t entry;
1556 entry = (addr & M_BCM1480_PHB_MAP_ADDR) | M_BCM1480_PHB_MAP_ENABLE;
1558 entry |= M_BCM1480_PHB_MAP_L2CA;
1560 entry |= M_BCM1480_PHB_MAP_ENDIAN;
1561 pci_conf_write32(BCM1400_PCI_BRIDGE, R_BCM1480_PHB_MAP(i), entry);
1540 uint32_t entry; local
H A Dbcm1480_altcpu.S852 la a2,cpu_apientry # A2 = firmware entry vector
H A Dbcm1480_l2cache.S118 # Loop through each entry and each way
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/src/
H A Dbcmcore_cpuinit.S171 mtc0 zero,C0_TLBHI # TLB entry (high half)
449 * a 16MB boundary. Each entry is 16 bytes, and there
459 * Bits 3..0: 16 bytes for table entry

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