Searched refs:INTSTAT (Results 1 - 20 of 20) sorted by relevance

/freebsd-10.1-release/sys/dev/aic/
H A Daic.c480 while (!(aic_inb(aic, DMASTAT) & INTSTAT) &&
483 return !(aic_inb(aic, DMASTAT) & INTSTAT);
877 if (dmastat & (INTSTAT|DFIFOFULL))
915 if (dmastat & INTSTAT)
947 if (dmastat & (INTSTAT|DFIFOEMP))
950 if (dmastat & INTSTAT)
983 if (dmastat & INTSTAT) {
1029 (aic_inb(aic, DMASTAT) & INTSTAT) == 0)
1189 if (!(aic_inb(aic, DMASTAT) & INTSTAT))
H A Daic6360reg.h293 #define INTSTAT 0x20 macro
/freebsd-10.1-release/sys/dev/tx/
H A Dif_tx.c872 while (i-- && ((status = CSR_READ_4(sc, INTSTAT)) & INTSTAT_INT_ACTV)) {
873 CSR_WRITE_4(sc, INTSTAT, status);
1310 CSR_WRITE_4(sc, INTSTAT, CSR_READ_4(sc, INTSTAT));
1444 status = CSR_READ_4(sc, INTSTAT) &
1455 status = CSR_READ_4(sc, INTSTAT);
1531 if (CSR_READ_4(sc, INTSTAT) & INTSTAT_TXIDLE)
1536 if ((CSR_READ_4(sc, INTSTAT) & INTSTAT_TXIDLE) == 0)
H A Dif_txreg.h41 #define INTSTAT 0x0004 /* Interrupt status. See below */ macro
/freebsd-10.1-release/sys/dev/ahb/
H A Dahbreg.h98 #define INTSTAT 0x0D6 macro
H A Dahb.c854 intstat = ahb_inb(ahb, INTSTAT);
/freebsd-10.1-release/sys/dev/aic7xxx/
H A Daic79xx_osm.h190 ahd_inb(ahd, INTSTAT);
H A Daic7xxx_osm.h186 ahc_inb(ahc, INTSTAT);
H A Daic7xxx.seq644 mvi INTSTAT,CMDCMPLT ret;
1693 mvi INTSTAT,CMDCMPLT ret;
1828 mvi INTSTAT, OUT_OF_RANGE;
1832 mvi INTSTAT, OUT_OF_RANGE;
1840 mvi INTSTAT, OUT_OF_RANGE;
1844 mvi INTSTAT, OUT_OF_RANGE;
2400 mov INTSTAT, SINDEX;
H A Daic7xxx_inline.h114 if ((ahc_inb(ahc, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) == 0)
593 intstat = ahc_inb(ahc, INTSTAT);
631 * copy of INTSTAT separately.
H A Daic79xx_pci.c505 if ((ahd_inb(ahd, INTSTAT) & PCIINT) != 0) {
517 if ((ahd_inb(ahd, INTSTAT) & PCIINT) != 0) {
826 intstat = ahd_inb(ahd, INTSTAT);
H A Daic79xx_inline.h226 if ((ahd_inb(ahd, INTSTAT) & ~CMDCMPLT) == 0)
921 intstat = ahd_inb(ahd, INTSTAT);
961 * copy of INTSTAT separately.
H A Daic7xxx_pci.c1196 if ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0
1208 && ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0
H A Daic7xxx.reg800 register INTSTAT {
H A Daic7xxx_reg.h679 ahc_print_register(NULL, 0, "INTSTAT", 0x91, regvalue, cur_col, wrap)
1518 #define INTSTAT 0x91 macro
H A Daic79xx.seq286 mvi INTSTAT, CMDCMPLT;
H A Daic7xxx.c5212 intstat = ahc_inb(ahc, INTSTAT);
5215 intstat = ahc_inb(ahc, INTSTAT);
5222 printf("Infinite interrupt loop, INTSTAT = %x",
5223 ahc_inb(ahc, INTSTAT));
H A Daic79xx.c7176 intstat = ahd_inb(ahd, INTSTAT);
7179 intstat = ahd_inb(ahd, INTSTAT);
7188 printf("Infinite interrupt loop, INTSTAT = %x",
7189 ahd_inb(ahd, INTSTAT));
9044 ahd_intstat_print(ahd_inb(ahd, INTSTAT), &cur_col, 50);
H A Daic79xx.reg102 register INTSTAT {
H A Daic79xx_reg.h28 ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap)
2388 #define INTSTAT 0x01 macro

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