| /broadcom-cfe-1.4.2/cfe/arch/mips/board/vcs/src/ |
| H A D | vcs_init.S | 65 #define CALLKSEG1(x) la k0,x ; or k0,K1BASE ; jal k0
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| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/ |
| H A D | bcm1480_l1cache.S | 107 li t2,K1BASE
123 li t2,K1BASE
165 li t2,K1BASE
197 li t2,K1BASE
200 li t2,K1BASE
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| H A D | bcm1480_ircpoll.S | 112 la v0, K1BASE + A_BCM1480_IMR_CPU0_BASE
147 la v0, K1BASE + A_BCM1480_IMR_CPU0_BASE
182 la v0, K1BASE + A_BCM1480_IMR_CPU0_BASE
205 la v0, K1BASE + A_BCM1480_IMR_CPU0_BASE
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| H A D | sb1_cpuinit.S | 256 li t0,K1BASE /* tlbhi = impossible vpn */
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| H A D | bcm1480_altcpu.S | 182 or ra,K1BASE
544 or gp,gp,K1BASE
751 or gp,gp,K1BASE
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| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/ |
| H A D | sb1250_l1cache.S | 115 li t2,K1BASE
131 li t2,K1BASE
173 li t2,K1BASE
205 li t2,K1BASE
208 li t2,K1BASE
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| H A D | sb1250_ircpoll.S | 122 la v0, K1BASE + A_IMR_CPU0_BASE
149 la v0, K1BASE + A_IMR_CPU0_BASE
200 la v0, K1BASE + A_IMR_CPU0_BASE
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| H A D | sb1250_altcpu.S | 140 or ra,K1BASE
439 or gp,gp,K1BASE
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| H A D | sb1_cpuinit.S | 255 li t0,K1BASE /* tlbhi = impossible vpn */
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| H A D | diag_l2cache.S | 2682 li v0, ~K1BASE
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| /broadcom-cfe-1.4.2/cfe/arch/mips/common/src/ |
| H A D | lib_physio.S | 76 or a0,a0,K1BASE ; \
84 or a0,a0,K1BASE ; \
106 or a0,a0,K1BASE ; \
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| H A D | init_ram.S | 133 * to either K0BASE or K1BASE depending on whether we're running
137 #define KSEGBASE K1BASE /* JTAG RAM version always uncached */
193 * cached versions of CFE, so we need to OR in K1BASE in the
242 li t2,K1BASE # and uncached space.
245 or t3,K1BASE
533 or ra,K1BASE
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| H A D | dev_flash_all.S | 104 or flashbase,K1BASE
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| H A D | zipstart_init.S | 95 or k1,K1BASE ; \
209 * cached versions of CFE, so we need to OR in K1BASE in the
631 or sp,K1BASE
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| H A D | exception.S | 185 li t1,K1BASE
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| H A D | apientry.S | 488 or t0,K1BASE
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| H A D | init_mips.S | 150 * to either K0BASE or K1BASE depending on whether we're running
157 #define KSEGBASE K1BASE
300 * cached versions of CFE, so we need to OR in K1BASE in the
353 or gp,gp,K1BASE
599 or TEXTBASE,K1BASE
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| H A D | dev_flashop_engine.S | 142 or reg_base,K1BASE /* 32-bit, regular KSEG */
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| /broadcom-cfe-1.4.2/cfe/arch/mips/common/include/ |
| H A D | mipsmacros.h | 321 #define JAL_KSEG1(x) LA t9,x ; or t9,K1BASE ; jalr t9
|
| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/include/ |
| H A D | sbmips32.h | 101 #define K1BASE (_ACAST32_ 0xa0000000) /* kernel unmapped uncached */ macro
114 #define PHYS_TO_K1(pa) (K1BASE | (pa))
124 #define ISK1SEG(va) ((va) >= K1BASE && (va) <= (K1BASE + K1SIZE - 1))
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| /broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/include/ |
| H A D | sbmips.h | 129 #define K1BASE (_ACAST32_ 0xa0000000) /* kernel unmapped uncached */ macro
154 #define PHYS_TO_K1(pa) (K1BASE | (pa))
174 #define ISK1SEG(va) ((va) >= K1BASE && (va) <= (K1BASE + K1SIZE - 1))
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| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/src/ |
| H A D | bcmcore_cpuinit.S | 195 li t0,K1BASE /* tlbhi = impossible vpn */
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| /broadcom-cfe-1.4.2/cfe/verif/ |
| H A D | vapi.S | 95 or t0,K1BASE ; \
684 or t0,K1BASE # Make K1seg
1042 or ra,K1BASE
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| /broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/src/ |
| H A D | cfe_dmtest.c | 69 else if (va - K1BASE >= 0 && va - K1BASE < K1SIZE)
|