Searched hist:154 (Results 1 - 19 of 19) sorted by relevance
| /freebsd-10-stable/sys/dev/aha/ | ||
| H A D | ahareg.h | diff 42887 Wed Jan 20 04:21:27 MST 1999 imp o enable plug and play support for the aha driver. Given the cumbersome pnp system in freebsd, I'm not sure how useful this will be, but my 1542CP seems to work well in plug and play mode and does seem to probe correctly at all the oddball addresses/irq/drqs that I tried. [[ I was unable to get /kernel.conf or /kernel.config to read in, so I wasn't able to verify that this method of userconfig works. that's one thing that makes pnp so hard to use in the current scheme. Pointers to the right new way of doing this accepted. ]] o Add some kludges to maybe bring support for 1540A/1542A into the driver. Since I have no 154xA cards, and the only person I know that has them hasn't given me feedback, I'm making this commit blind. o Honor unit numbers that are in the config file now. This allows one to hard wire the unit numbers (and have high unit numbers for plug and pray devices, which can't seem to be hardwired) and have the cards not migrate from aha1 -> aha0 should aha0 go on the fritz. I didn't verify that hard wired scsi busses would work, but did verify that hard wired aha addresses did work to a limited extent. Both aha0 and aha1 must be hardwired, or when the card that was in aha0 goes away, the probe for aha0 might pick up the card that otherwise would have been aha1. diff 41047 Tue Nov 10 04:44:42 MST 1998 gibbs Fix probes when a port address is specified. Convert from BT'isms to AHA'isms Don't fail the probe if the illegal command bit is set in the status register. If the BusLogic MultiMaster probe preceeded us, it may well have determined that the card we are attaching to was not a true MultiMaster by sending us a command that fails on the 154X. Reset the adapter before doing the inquiry. This provides extra sanity and will also clear the illegal command status bit that my be left over from the MultiMaster probe. 39225 Tue Sep 15 05:39:55 MDT 1998 gibbs Adaptec 154X SCSI-Host Adapter driver for CAM. Submitted by: Warner Losh <imp@village.org> |
| H A D | aha_isa.c | diff 42887 Wed Jan 20 04:21:27 MST 1999 imp o enable plug and play support for the aha driver. Given the cumbersome pnp system in freebsd, I'm not sure how useful this will be, but my 1542CP seems to work well in plug and play mode and does seem to probe correctly at all the oddball addresses/irq/drqs that I tried. [[ I was unable to get /kernel.conf or /kernel.config to read in, so I wasn't able to verify that this method of userconfig works. that's one thing that makes pnp so hard to use in the current scheme. Pointers to the right new way of doing this accepted. ]] o Add some kludges to maybe bring support for 1540A/1542A into the driver. Since I have no 154xA cards, and the only person I know that has them hasn't given me feedback, I'm making this commit blind. o Honor unit numbers that are in the config file now. This allows one to hard wire the unit numbers (and have high unit numbers for plug and pray devices, which can't seem to be hardwired) and have the cards not migrate from aha1 -> aha0 should aha0 go on the fritz. I didn't verify that hard wired scsi busses would work, but did verify that hard wired aha addresses did work to a limited extent. Both aha0 and aha1 must be hardwired, or when the card that was in aha0 goes away, the probe for aha0 might pick up the card that otherwise would have been aha1. 39225 Tue Sep 15 05:39:55 MDT 1998 gibbs Adaptec 154X SCSI-Host Adapter driver for CAM. Submitted by: Warner Losh <imp@village.org> |
| /freebsd-10-stable/sys/dev/mmc/ | ||
| H A D | mmcbus_if.m | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | mmc_subr.c | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | mmc_subr.h | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | mmc_private.h | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | mmc_ioctl.h | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | mmcbr_if.m | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | bridge.h | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | mmcsd.c | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | mmcbrvar.h | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | mmcreg.h | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | mmc.c | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| /freebsd-10-stable/sys/dev/sdhci/ | ||
| H A D | sdhci_if.m | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | sdhci_acpi.c | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | sdhci_pci.c | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | sdhci.c | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| H A D | sdhci.h | diff 322120 Sun Aug 06 16:21:07 MDT 2017 marius MFC: r319350, r320620, r321385, r321490, r321588, r321948 o Use SDHCI_CAN_DRIVE_TYPE_{A,C,D} to check for driver type support in SDHCI_CAPABILITIES2 instead of SDHCI_CTRL2_DRIVER_TYPE_{A,C,D} which are meant for setting the driver type in SDHCI_HOST_CONTROL2. o Correct a typo in the comment part of r320577 (MFCed to stable/10 in r320899). o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to sdhci(4), mmc(4) and mmcsd(4). On the system where the addition of DDR52 support increased the read throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields ~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than quadrupled compared to pre-r315598 (pre-r318495 in stable/10). However, in fact this isn't a feature-only change; there are boards based on Intel Bay Trail where DDR52 is problematic and the suggested workaround is to use HS200 mode instead. So far exact details are unknown, however, i. e. whether that's due to a defect in these SoCs or on the boards. Moreover, due to the above changes requiring to be aware of possible MMC siblings in the fast path of mmc(4), corresponding information now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(), now longer will trigger a panic in low memory situations and all of mmc(4) operate on the same set of child devices. o Fix a bug in the failure reporting of mmcsd_delete() that could lead to a panic. o Fix 2 bugs on resume, one in mmcsd(4) that could lead to a panic and another one in mmc(4) that could lead to devices no longer working. o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1] o Fix missing variable initialization in mmc_switch_status(). [2] o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3] o Handle the case of device_add_child(9) failing, for example due to a memory shortage, gracefully in mmc(4) and sdhci(4), including not leaking memory for the instance variables in case of mmc(4), also fixing [4]. o Correctly use the size of a pointer rather than that of a pointer to a pointer (this bug was present in head r321385 only, i. e. not in a stable branch). [5] o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd() gracefully instead of calling panic(9). o Again, check and handle the return values of some additional function calls in mmc(4) instead of assuming that everything went right or mark non-fatal errors by casting the return value to void. o Correct a typo in the Linux IOCTL compatibility; it should have been MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI. o Now that we are reaching ever faster speeds (more improvement in this regard is to be expected when adding ADMA support to sdhci(4)), apply a few micro-optimizations to mmc(4), mmcsd(4) and sdhci(4). o Correct confusing and error prone mix-ups between "br" or "bridge" in mmc(4) and mmcsd(4) where - according to the terminology outlined in comments of bridge.h and mmcbr_if.m around since their addition in r163516 - the bus is meant and used instead. o Remove comment lines from bridge.h incorrectly suggesting that there would be a MMC bridge base class driver. o Update comments in bridge.h regarding the star topology of SD and SDIO; since version 3.00 of the SDHCI specification, for eSD and eSDIO bus topologies are actually possible in form of so called "shared buses" (in some subcontext later on renamed to "embedded" buses). Reported by: Coverity CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4], 1378432 [5] |
| /freebsd-10-stable/sys/dev/pccard/ | ||
| H A D | pccarddevs | diff 89103 Tue Jan 08 18:52:23 MST 2002 imp Catch up to NetBSD: 1.156 pooka; Socket Low-Power CF WLAN 1.155 ichiro; IBM Smart Capture Card II 1.152-154 ichiro; Fujitsu CF EtherCard and FMV-181,182,182A 1.151 christos; Symbol Spectrum24 |
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