1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * (C) Copyright 2013 - 2014 Xilinx, Inc 4 * 5 * Michal Simek <michal.simek@amd.com> 6 */ 7 8#include <command.h> 9#include <image.h> 10#include <log.h> 11#include <spl.h> 12#include <asm/io.h> 13#include <asm/u-boot.h> 14#include <linux/stringify.h> 15 16void board_boot_order(u32 *spl_boot_list) 17{ 18 spl_boot_list[0] = BOOT_DEVICE_NOR; 19 spl_boot_list[1] = BOOT_DEVICE_RAM; 20 spl_boot_list[2] = BOOT_DEVICE_SPI; 21} 22 23/* Board initialization after bss clearance */ 24void spl_board_init(void) 25{ 26 /* enable console uart printing */ 27 preloader_console_init(); 28} 29 30#ifdef CONFIG_SPL_OS_BOOT 31void __noreturn jump_to_image_linux(struct spl_image_info *spl_image) 32{ 33 debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg); 34 typedef void (*image_entry_arg_t)(char *, ulong, ulong) 35 __attribute__ ((noreturn)); 36 image_entry_arg_t image_entry = 37 (image_entry_arg_t)spl_image->entry_point; 38 39 image_entry(NULL, 0, (ulong)spl_image->arg); 40} 41 42int spl_start_uboot(void) 43{ 44 return 0; 45} 46#endif /* CONFIG_SPL_OS_BOOT */ 47 48int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) 49{ 50 __asm__ __volatile__ ( 51 "mts rmsr, r0;" \ 52 "brai " __stringify(CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR)); 53 54 return 0; 55} 56