1#ifndef __ASM_SH_SE73180_H
2#define __ASM_SH_SE73180_H
3
4/*
5 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
6 *
7 * SH-Mobile SolutionEngine 73180 support
8 */
9
10/* Box specific addresses.  */
11
12/* Area 0 */
13#define PA_ROM		0x00000000	/* EPROM */
14#define PA_ROM_SIZE	0x00400000	/* EPROM size 4M byte(Actually 2MB) */
15#define PA_FROM		0x00400000	/* Flash ROM */
16#define PA_FROM_SIZE	0x00400000	/* Flash size 4M byte */
17#define PA_SRAM		0x00800000	/* SRAM */
18#define PA_FROM_SIZE	0x00400000	/* SRAM size 4M byte */
19/* Area 1 */
20#define PA_EXT1		0x04000000
21#define PA_EXT1_SIZE	0x04000000
22/* Area 2 */
23#define PA_EXT2		0x08000000
24#define PA_EXT2_SIZE	0x04000000
25/* Area 3 */
26#define PA_SDRAM	0x0c000000
27#define PA_SDRAM_SIZE	0x04000000
28/* Area 4 */
29#define PA_PCIC		0x10000000	/* MR-SHPC-01 PCMCIA */
30#define PA_MRSHPC       0xb03fffe0      /* MR-SHPC-01 PCMCIA controller */
31#define PA_MRSHPC_MW1   0xb0400000      /* MR-SHPC-01 memory window base */
32#define PA_MRSHPC_MW2   0xb0500000      /* MR-SHPC-01 attribute window base */
33#define PA_MRSHPC_IO    0xb0600000      /* MR-SHPC-01 I/O window base */
34#define MRSHPC_OPTION   (PA_MRSHPC + 6)
35#define MRSHPC_CSR      (PA_MRSHPC + 8)
36#define MRSHPC_ISR      (PA_MRSHPC + 10)
37#define MRSHPC_ICR      (PA_MRSHPC + 12)
38#define MRSHPC_CPWCR    (PA_MRSHPC + 14)
39#define MRSHPC_MW0CR1   (PA_MRSHPC + 16)
40#define MRSHPC_MW1CR1   (PA_MRSHPC + 18)
41#define MRSHPC_IOWCR1   (PA_MRSHPC + 20)
42#define MRSHPC_MW0CR2   (PA_MRSHPC + 22)
43#define MRSHPC_MW1CR2   (PA_MRSHPC + 24)
44#define MRSHPC_IOWCR2   (PA_MRSHPC + 26)
45#define MRSHPC_CDCR     (PA_MRSHPC + 28)
46#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
47#define PA_LED		0xb0C00000	/* LED */
48#define LED_SHIFT       0
49#define PA_DIPSW	0xb0900000	/* Dip switch 31 */
50#define PA_EPLD_MODESET	0xb0a00000	/* FPGA Mode set register */
51#define PA_EPLD_ST1	0xb0a80000	/* FPGA Interrupt status register1 */
52#define PA_EPLD_ST2	0xb0ac0000	/* FPGA Interrupt status register2 */
53/* Area 5 */
54#define PA_EXT5		0x14000000
55#define PA_EXT5_SIZE	0x04000000
56/* Area 6 */
57#define PA_LCD1		0xb8000000
58#define PA_LCD2		0xb8800000
59
60#define __IO_PREFIX	sh73180se
61#include <asm/io_generic.h>
62
63/* arch/sh/boards/se/73180/irq.c */
64int shmse_irq_demux(int irq);
65
66#endif  /* __ASM_SH_SE73180_H */
67