1 2#ifndef _TX3912_H_ 3#define _TX3912_H_ 4 5#define TX3912_CLK_CTRL 0x01c0 6 7/* 8 * Clock control register values 9 */ 10#define TX3912_CLK_CTRL_CHICLKDIV_MASK 0xff000000 11#define TX3912_CLK_CTRL_ENCLKTEST 0x00800000 12#define TX3912_CLK_CTRL_CLKTESTSELSIB 0x00400000 13#define TX3912_CLK_CTRL_CHIMCLKSEL 0x00200000 14#define TX3912_CLK_CTRL_CHICLKDIR 0x00100000 15#define TX3912_CLK_CTRL_ENCHIMCLK 0x00080000 16#define TX3912_CLK_CTRL_ENVIDCLK 0x00040000 17#define TX3912_CLK_CTRL_ENMBUSCLK 0x00020000 18#define TX3912_CLK_CTRL_ENSPICLK 0x00010000 19#define TX3912_CLK_CTRL_ENTIMERCLK 0x00008000 20#define TX3912_CLK_CTRL_ENFASTTIMERCLK 0x00004000 21#define TX3912_CLK_CTRL_SIBMCLKDIR 0x00002000 22#define TX3912_CLK_CTRL_reserved1 0x00001000 23#define TX3912_CLK_CTRL_ENSIBMCLK 0x00000800 24#define TX3912_CLK_CTRL_SIBMCLKDIV_6 0x00000600 25#define TX3912_CLK_CTRL_SIBMCLKDIV_5 0x00000500 26#define TX3912_CLK_CTRL_SIBMCLKDIV_4 0x00000400 27#define TX3912_CLK_CTRL_SIBMCLKDIV_3 0x00000300 28#define TX3912_CLK_CTRL_SIBMCLKDIV_2 0x00000200 29#define TX3912_CLK_CTRL_SIBMCLKDIV_1 0x00000100 30#define TX3912_CLK_CTRL_CSERSEL 0x00000080 31#define TX3912_CLK_CTRL_CSERDIV_6 0x00000060 32#define TX3912_CLK_CTRL_CSERDIV_5 0x00000050 33#define TX3912_CLK_CTRL_CSERDIV_4 0x00000040 34#define TX3912_CLK_CTRL_CSERDIV_3 0x00000030 35#define TX3912_CLK_CTRL_CSERDIV_2 0x00000020 36#define TX3912_CLK_CTRL_CSERDIV_1 0x00000010 37#define TX3912_CLK_CTRL_ENCSERCLK 0x00000008 38#define TX3912_CLK_CTRL_ENIRCLK 0x00000004 39#define TX3912_CLK_CTRL_ENUARTACLK 0x00000002 40#define TX3912_CLK_CTRL_ENUARTBCLK 0x00000001 41 42 43#define TX3912_INT1_CLEAR 0x0100 44#define TX3912_INT2_CLEAR 0x0104 45#define TX3912_INT3_CLEAR 0x0108 46#define TX3912_INT4_CLEAR 0x010c 47#define TX3912_INT5_CLEAR 0x0110 48#define TX3912_INT1_ENABLE 0x0118 49#define TX3912_INT2_ENABLE 0x011c 50#define TX3912_INT3_ENABLE 0x0120 51#define TX3912_INT4_ENABLE 0x0124 52#define TX3912_INT5_ENABLE 0x0128 53#define TX3912_INT6_ENABLE 0x012c 54#define TX3912_INT1_STATUS 0x0100 55#define TX3912_INT2_STATUS 0x0104 56#define TX3912_INT3_STATUS 0x0108 57#define TX3912_INT4_STATUS 0x010c 58#define TX3912_INT5_STATUS 0x0110 59#define TX3912_INT6_STATUS 0x0114 60 61/* 62 * Interrupt 2 register values 63 */ 64#define TX3912_INT2_UARTARXINT 0x80000000 65#define TX3912_INT2_UARTARXOVERRUNINT 0x40000000 66#define TX3912_INT2_UARTAFRAMEERRINT 0x20000000 67#define TX3912_INT2_UARTABREAKINT 0x10000000 68#define TX3912_INT2_UARTAPARITYINT 0x08000000 69#define TX3912_INT2_UARTATXINT 0x04000000 70#define TX3912_INT2_UARTATXOVERRUNINT 0x02000000 71#define TX3912_INT2_UARTAEMPTYINT 0x01000000 72#define TX3912_INT2_UARTADMAFULLINT 0x00800000 73#define TX3912_INT2_UARTADMAHALFINT 0x00400000 74#define TX3912_INT2_UARTBRXINT 0x00200000 75#define TX3912_INT2_UARTBRXOVERRUNINT 0x00100000 76#define TX3912_INT2_UARTBFRAMEERRINT 0x00080000 77#define TX3912_INT2_UARTBBREAKINT 0x00040000 78#define TX3912_INT2_UARTBPARITYINT 0x00020000 79#define TX3912_INT2_UARTBTXINT 0x00010000 80#define TX3912_INT2_UARTBTXOVERRUNINT 0x00008000 81#define TX3912_INT2_UARTBEMPTYINT 0x00004000 82#define TX3912_INT2_UARTBDMAFULLINT 0x00002000 83#define TX3912_INT2_UARTBDMAHALFINT 0x00001000 84#define TX3912_INT2_UARTA_RX_BITS 0xf8000000 85#define TX3912_INT2_UARTA_TX_BITS 0x07c00000 86#define TX3912_INT2_UARTB_RX_BITS 0x003e0000 87#define TX3912_INT2_UARTB_TX_BITS 0x0001f000 88 89/* 90 * Interrupt 5 register values 91 */ 92#define TX3912_INT5_RTCINT 0x80000000 93#define TX3912_INT5_ALARMINT 0x40000000 94#define TX3912_INT5_PERINT 0x20000000 95#define TX3912_INT5_STPTIMERINT 0x10000000 96#define TX3912_INT5_POSPWRINT 0x08000000 97#define TX3912_INT5_NEGPWRINT 0x04000000 98#define TX3912_INT5_POSPWROKINT 0x02000000 99#define TX3912_INT5_NEGPWROKINT 0x01000000 100#define TX3912_INT5_POSONBUTINT 0x00800000 101#define TX3912_INT5_NEGONBUTINT 0x00400000 102#define TX3912_INT5_SPIBUFAVAILINT 0x00200000 103#define TX3912_INT5_SPIERRINT 0x00100000 104#define TX3912_INT5_SPIRCVINT 0x00080000 105#define TX3912_INT5_SPIEMPTYINT 0x00040000 106#define TX3912_INT5_IRCONSMINT 0x00020000 107#define TX3912_INT5_CARSTINT 0x00010000 108#define TX3912_INT5_POSCARINT 0x00008000 109#define TX3912_INT5_NEGCARINT 0x00004000 110#define TX3912_INT5_IOPOSINT6 0x00002000 111#define TX3912_INT5_IOPOSINT5 0x00001000 112#define TX3912_INT5_IOPOSINT4 0x00000800 113#define TX3912_INT5_IOPOSINT3 0x00000400 114#define TX3912_INT5_IOPOSINT2 0x00000200 115#define TX3912_INT5_IOPOSINT1 0x00000100 116#define TX3912_INT5_IOPOSINT0 0x00000080 117#define TX3912_INT5_IONEGINT6 0x00000040 118#define TX3912_INT5_IONEGINT5 0x00000020 119#define TX3912_INT5_IONEGINT4 0x00000010 120#define TX3912_INT5_IONEGINT3 0x00000008 121#define TX3912_INT5_IONEGINT2 0x00000004 122#define TX3912_INT5_IONEGINT1 0x00000002 123#define TX3912_INT5_IONEGINT0 0x00000001 124 125/* 126 * Interrupt 6 status register values 127 */ 128#define TX3912_INT6_STATUS_IRQHIGH 0x80000000 129#define TX3912_INT6_STATUS_IRQLOW 0x40000000 130#define TX3912_INT6_STATUS_reserved6 0x3fffffc0 131#define TX3912_INT6_STATUS_INTVEC_POSNEGPWROKINT 0x0000003c 132#define TX3912_INT6_STATUS_INTVEC_ALARMINT 0x00000038 133#define TX3912_INT6_STATUS_INTVEC_PERINT 0x00000034 134#define TX3912_INT6_STATUS_INTVEC_reserved5 0x00000030 135#define TX3912_INT6_STATUS_INTVEC_UARTARXINT 0x0000002c 136#define TX3912_INT6_STATUS_INTVEC_UARTBRXINT 0x00000028 137#define TX3912_INT6_STATUS_INTVEC_reserved4 0x00000024 138#define TX3912_INT6_STATUS_INTVEC_IOPOSINT65 0x00000020 139#define TX3912_INT6_STATUS_INTVEC_reserved3 0x0000001c 140#define TX3912_INT6_STATUS_INTVEC_IONEGINT65 0x00000018 141#define TX3912_INT6_STATUS_INTVEC_reserved2 0x00000014 142#define TX3912_INT6_STATUS_INTVEC_SNDDMACNTINT 0x00000010 143#define TX3912_INT6_STATUS_INTVEC_TELDMACNTINT 0x0000000c 144#define TX3912_INT6_STATUS_INTVEC_CHIDMACNTINT 0x00000008 145#define TX3912_INT6_STATUS_INTVEC_IOPOSNEGINT0 0x00000004 146#define TX3912_INT6_STATUS_INTVEC_STDHANDLER 0x00000000 147#define TX3912_INT6_STATUS_reserved1 0x00000003 148 149/* 150 * Interrupt 6 enable register values 151 */ 152#define TX3912_INT6_ENABLE_reserved5 0xfff80000 153#define TX3912_INT6_ENABLE_GLOBALEN 0x00040000 154#define TX3912_INT6_ENABLE_IRQPRITEST 0x00020000 155#define TX3912_INT6_ENABLE_IRQTEST 0x00010000 156#define TX3912_INT6_ENABLE_PRIORITYMASK_POSNEGPWROKINT 0x00008000 157#define TX3912_INT6_ENABLE_PRIORITYMASK_ALARMINT 0x00004000 158#define TX3912_INT6_ENABLE_PRIORITYMASK_PERINT 0x00002000 159#define TX3912_INT6_ENABLE_PRIORITYMASK_reserved4 0x00001000 160#define TX3912_INT6_ENABLE_PRIORITYMASK_UARTARXINT 0x00000800 161#define TX3912_INT6_ENABLE_PRIORITYMASK_UARTBRXINT 0x00000400 162#define TX3912_INT6_ENABLE_PRIORITYMASK_reserved3 0x00000200 163#define TX3912_INT6_ENABLE_PRIORITYMASK_IOPOSINT65 0x00000100 164#define TX3912_INT6_ENABLE_PRIORITYMASK_reserved2 0x00000080 165#define TX3912_INT6_ENABLE_PRIORITYMASK_IONEGINT65 0x00000040 166#define TX3912_INT6_ENABLE_PRIORITYMASK_reserved1 0x00000020 167#define TX3912_INT6_ENABLE_PRIORITYMASK_SNDDMACNTINT 0x00000010 168#define TX3912_INT6_ENABLE_PRIORITYMASK_TELDMACNTINT 0x00000008 169#define TX3912_INT6_ENABLE_PRIORITYMASK_CHIDMACNTINT 0x00000004 170#define TX3912_INT6_ENABLE_PRIORITYMASK_IOPOSNEGINT0 0x00000002 171#define TX3912_INT6_ENABLE_PRIORITYMASK_STDHANDLER 0x00000001 172#define TX3912_INT6_ENABLE_HIGH_PRIORITY 0x0000ffff 173 174 175#define TX3912_POWER_CTRL 0x01c4 176 177/* 178 * Power control register values 179 */ 180#define TX3912_POWER_CTRL_ONBUTN 0x80000000 181#define TX3912_POWER_CTRL_PWRINT 0x40000000 182#define TX3912_POWER_CTRL_PWROK 0x20000000 183#define TX3912_POWER_CTRL_VIDRF_MASK 0x18000000 184#define TX3912_POWER_CTRL_SLOWBUS 0x04000000 185#define TX3912_POWER_CTRL_DIVMOD 0x02000000 186#define TX3912_POWER_CTRL_reserved2 0x01ff0000 187#define TX3912_POWER_CTRL_STPTIMERVAL_MASK 0x0000f000 188#define TX3912_POWER_CTRL_ENSTPTIMER 0x00000800 189#define TX3912_POWER_CTRL_ENFORCESHUTDWN 0x00000400 190#define TX3912_POWER_CTRL_FORCESHUTDWN 0x00000200 191#define TX3912_POWER_CTRL_FORCESHUTDWNOCC 0x00000100 192#define TX3912_POWER_CTRL_SELC2MS 0x00000080 193#define TX3912_POWER_CTRL_reserved1 0x00000040 194#define TX3912_POWER_CTRL_BPDBVCC3 0x00000020 195#define TX3912_POWER_CTRL_STOPCPU 0x00000010 196#define TX3912_POWER_CTRL_DBNCONBUTN 0x00000008 197#define TX3912_POWER_CTRL_COLDSTART 0x00000004 198#define TX3912_POWER_CTRL_PWRCS 0x00000002 199#define TX3912_POWER_CTRL_VCCON 0x00000001 200 201 202#define TX3912_RTC_HIGH 0x0140 203#define TX3912_RTC_LOW 0x0144 204#define TX3912_RTC_ALARM_HIGH 0x0148 205#define TX3912_RTC_ALARM_LOW 0x014c 206#define TX3912_TIMER_CTRL 0x0150 207#define TX3912_TIMER_PERIOD 0x0154 208 209/* 210 * Timer control register values 211 */ 212#define TX3912_TIMER_CTRL_FREEZEPRE 0x00000080 213#define TX3912_TIMER_CTRL_FREEZERTC 0x00000040 214#define TX3912_TIMER_CTRL_FREEZETIMER 0x00000020 215#define TX3912_TIMER_CTRL_ENPERTIMER 0x00000010 216#define TX3912_TIMER_CTRL_RTCCLEAR 0x00000008 217#define TX3912_TIMER_CTRL_TESTC8MS 0x00000004 218#define TX3912_TIMER_CTRL_ENTESTCLK 0x00000002 219#define TX3912_TIMER_CTRL_ENRTCTST 0x00000001 220 221/* 222 * The periodic timer has granularity of 868 nanoseconds which 223 * results in a count of (1.152 x 10^6 / 100) in order to achieve 224 * a 10 millisecond periodic system clock. 225 */ 226#define TX3912_SYS_TIMER_VALUE (1152000/HZ) 227 228 229#define TX3912_UARTA_CTRL1 0x00b0 230#define TX3912_UARTA_CTRL2 0x00b4 231#define TX3912_UARTA_DMA_CTRL1 0x00b8 232#define TX3912_UARTA_DMA_CTRL2 0x00bc 233#define TX3912_UARTA_DMA_CNT 0x00c0 234#define TX3912_UARTA_DATA 0x00c4 235#define TX3912_UARTB_CTRL1 0x00c8 236#define TX3912_UARTB_CTRL2 0x00cc 237#define TX3912_UARTB_DMA_CTRL1 0x00d0 238#define TX3912_UARTB_DMA_CTRL2 0x00d4 239#define TX3912_UARTB_DMA_CNT 0x00d8 240#define TX3912_UARTB_DATA 0x00dc 241 242/* 243 * UART Control Register 1 values 244 */ 245#define TX3912_UART_CTRL1_UARTON 0x80000000 246#define TX3912_UART_CTRL1_EMPTY 0x40000000 247#define TX3912_UART_CTRL1_PRXHOLDFULL 0x20000000 248#define TX3912_UART_CTRL1_RXHOLDFULL 0x10000000 249#define TX3912_UART_CTRL1_reserved1 0x0fff0000 250#define TX3912_UART_CTRL1_ENDMARX 0x00008000 251#define TX3912_UART_CTRL1_ENDMATX 0x00004000 252#define TX3912_UART_CTRL1_TESTMODE 0x00002000 253#define TX3912_UART_CTRL1_ENBREAKHALT 0x00001000 254#define TX3912_UART_CTRL1_ENDMATEST 0x00000800 255#define TX3912_UART_CTRL1_ENDMALOOP 0x00000400 256#define TX3912_UART_CTRL1_PULSEOPT1 0x00000200 257#define TX3912_UART_CTRL1_PULSEOPT1 0x00000100 258#define TX3912_UART_CTRL1_DTINVERT 0x00000080 259#define TX3912_UART_CTRL1_DISTXD 0x00000040 260#define TX3912_UART_CTRL1_TWOSTOP 0x00000020 261#define TX3912_UART_CTRL1_LOOPBACK 0x00000010 262#define TX3912_UART_CTRL1_BIT_7 0x00000008 263#define TX3912_UART_CTRL1_EVENPARITY 0x00000004 264#define TX3912_UART_CTRL1_ENPARITY 0x00000002 265#define TX3912_UART_CTRL1_ENUART 0x00000001 266 267/* 268 * UART Control Register 2 values 269 */ 270#define TX3912_UART_CTRL2_B230400 0x0000 /* 0 */ 271#define TX3912_UART_CTRL2_B115200 0x0001 /* 1 */ 272#define TX3912_UART_CTRL2_B76800 0x0002 /* 2 */ 273#define TX3912_UART_CTRL2_B57600 0x0003 /* 3 */ 274#define TX3912_UART_CTRL2_B38400 0x0005 /* 5 */ 275#define TX3912_UART_CTRL2_B19200 0x000b /* 11 */ 276#define TX3912_UART_CTRL2_B9600 0x0016 /* 22 */ 277#define TX3912_UART_CTRL2_B4800 0x002f /* 47 */ 278#define TX3912_UART_CTRL2_B2400 0x005f /* 95 */ 279#define TX3912_UART_CTRL2_B1200 0x00bf /* 191 */ 280#define TX3912_UART_CTRL2_B600 0x017f /* 383 */ 281#define TX3912_UART_CTRL2_B300 0x02ff /* 767 */ 282 283#define TX3912_VIDEO_CTRL1 0x0028 284#define TX3912_VIDEO_CTRL2 0x002c 285#define TX3912_VIDEO_CTRL3 0x0030 286#define TX3912_VIDEO_CTRL4 0x0034 287#define TX3912_VIDEO_CTRL5 0x0038 288#define TX3912_VIDEO_CTRL6 0x003c 289#define TX3912_VIDEO_CTRL7 0x0040 290#define TX3912_VIDEO_CTRL8 0x0044 291#define TX3912_VIDEO_CTRL9 0x0048 292#define TX3912_VIDEO_CTRL10 0x004c 293#define TX3912_VIDEO_CTRL11 0x0050 294#define TX3912_VIDEO_CTRL12 0x0054 295#define TX3912_VIDEO_CTRL13 0x0058 296#define TX3912_VIDEO_CTRL14 0x005c 297 298/* 299 * Video Control Register 1 values 300 */ 301#define TX3912_VIDEO_CTRL1_LINECNT 0xffc00000 302#define TX3912_VIDEO_CTRL1_LOADDLY 0x00200000 303#define TX3912_VIDEO_CTRL1_BAUDVAL 0x001f0000 304#define TX3912_VIDEO_CTRL1_VIDDONEVAL 0x0000fe00 305#define TX3912_VIDEO_CTRL1_ENFREEZEFRAME 0x00000100 306#define TX3912_VIDEO_CTRL1_BITSEL_MASK 0x000000c0 307#define TX3912_VIDEO_CTRL1_BITSEL_8BIT_COLOR 0x000000c0 308#define TX3912_VIDEO_CTRL1_BITSEL_4BIT_GRAY 0x00000080 309#define TX3912_VIDEO_CTRL1_BITSEL_2BIT_GRAY 0x00000040 310#define TX3912_VIDEO_CTRL1_DISPSPLIT 0x00000020 311#define TX3912_VIDEO_CTRL1_DISP8 0x00000010 312#define TX3912_VIDEO_CTRL1_DFMODE 0x00000008 313#define TX3912_VIDEO_CTRL1_INVVID 0x00000004 314#define TX3912_VIDEO_CTRL1_DISPON 0x00000002 315#define TX3912_VIDEO_CTRL1_ENVID 0x00000001 316 317#endif /* _TX3912_H_ */ 318