1/* 2 * SDL Inc. RISCom/N2 synchronous serial card driver for Linux 3 * 4 * Copyright (C) 1998-2003 Krzysztof Halasa <khc@pm.waw.pl> 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License 8 * as published by the Free Software Foundation. 9 * 10 * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/> 11 * 12 * Note: integrated CSU/DSU/DDS are not supported by this driver 13 * 14 * Sources of information: 15 * Hitachi HD64570 SCA User's Manual 16 * SDL Inc. PPP/HDLC/CISCO driver 17 */ 18 19#include <linux/module.h> 20#include <linux/kernel.h> 21#include <linux/slab.h> 22#include <linux/types.h> 23#include <linux/fcntl.h> 24#include <linux/in.h> 25#include <linux/string.h> 26#include <linux/errno.h> 27#include <linux/init.h> 28#include <linux/ioport.h> 29#include <linux/moduleparam.h> 30#include <linux/netdevice.h> 31#include <linux/hdlc.h> 32#include <asm/io.h> 33#include "hd64570.h" 34 35 36static const char* version = "SDL RISCom/N2 driver version: 1.15"; 37static const char* devname = "RISCom/N2"; 38 39#undef DEBUG_PKT 40#define DEBUG_RINGS 41 42#define USE_WINDOWSIZE 16384 43#define USE_BUS16BITS 1 44#define CLOCK_BASE 9830400 /* 9.8304 MHz */ 45#define MAX_PAGES 16 /* 16 RAM pages at max */ 46#define MAX_RAM_SIZE 0x80000 /* 512 KB */ 47#if MAX_RAM_SIZE > MAX_PAGES * USE_WINDOWSIZE 48#undef MAX_RAM_SIZE 49#define MAX_RAM_SIZE (MAX_PAGES * USE_WINDOWSIZE) 50#endif 51#define N2_IOPORTS 0x10 52#define NEED_DETECT_RAM 53#define NEED_SCA_MSCI_INTR 54#define MAX_TX_BUFFERS 10 55 56static char *hw = NULL; 57 58/* RISCom/N2 Board Registers */ 59 60/* PC Control Register */ 61#define N2_PCR 0 62#define PCR_RUNSCA 1 /* Run 64570 */ 63#define PCR_VPM 2 /* Enable VPM - needed if using RAM above 1 MB */ 64#define PCR_ENWIN 4 /* Open window */ 65#define PCR_BUS16 8 /* 16-bit bus */ 66 67 68/* Memory Base Address Register */ 69#define N2_BAR 2 70 71 72/* Page Scan Register */ 73#define N2_PSR 4 74#define WIN16K 0x00 75#define WIN32K 0x20 76#define WIN64K 0x40 77#define PSR_WINBITS 0x60 78#define PSR_DMAEN 0x80 79#define PSR_PAGEBITS 0x0F 80 81 82/* Modem Control Reg */ 83#define N2_MCR 6 84#define CLOCK_OUT_PORT1 0x80 85#define CLOCK_OUT_PORT0 0x40 86#define TX422_PORT1 0x20 87#define TX422_PORT0 0x10 88#define DSR_PORT1 0x08 89#define DSR_PORT0 0x04 90#define DTR_PORT1 0x02 91#define DTR_PORT0 0x01 92 93 94typedef struct port_s { 95 struct net_device *dev; 96 struct card_s *card; 97 spinlock_t lock; /* TX lock */ 98 sync_serial_settings settings; 99 int valid; /* port enabled */ 100 int rxpart; /* partial frame received, next frame invalid*/ 101 unsigned short encoding; 102 unsigned short parity; 103 u16 rxin; /* rx ring buffer 'in' pointer */ 104 u16 txin; /* tx ring buffer 'in' and 'last' pointers */ 105 u16 txlast; 106 u8 rxs, txs, tmc; /* SCA registers */ 107 u8 phy_node; /* physical port # - 0 or 1 */ 108 u8 log_node; /* logical port # */ 109}port_t; 110 111 112 113typedef struct card_s { 114 u8 __iomem *winbase; /* ISA window base address */ 115 u32 phy_winbase; /* ISA physical base address */ 116 u32 ram_size; /* number of bytes */ 117 u16 io; /* IO Base address */ 118 u16 buff_offset; /* offset of first buffer of first channel */ 119 u16 rx_ring_buffers; /* number of buffers in a ring */ 120 u16 tx_ring_buffers; 121 u8 irq; /* IRQ (3-15) */ 122 123 port_t ports[2]; 124 struct card_s *next_card; 125}card_t; 126 127 128static card_t *first_card; 129static card_t **new_card = &first_card; 130 131 132#define sca_reg(reg, card) (0x8000 | (card)->io | \ 133 ((reg) & 0x0F) | (((reg) & 0xF0) << 6)) 134#define sca_in(reg, card) inb(sca_reg(reg, card)) 135#define sca_out(value, reg, card) outb(value, sca_reg(reg, card)) 136#define sca_inw(reg, card) inw(sca_reg(reg, card)) 137#define sca_outw(value, reg, card) outw(value, sca_reg(reg, card)) 138 139#define port_to_card(port) ((port)->card) 140#define log_node(port) ((port)->log_node) 141#define phy_node(port) ((port)->phy_node) 142#define winsize(card) (USE_WINDOWSIZE) 143#define winbase(card) ((card)->winbase) 144#define get_port(card, port) ((card)->ports[port].valid ? \ 145 &(card)->ports[port] : NULL) 146 147 148 149static __inline__ u8 sca_get_page(card_t *card) 150{ 151 return inb(card->io + N2_PSR) & PSR_PAGEBITS; 152} 153 154 155static __inline__ void openwin(card_t *card, u8 page) 156{ 157 u8 psr = inb(card->io + N2_PSR); 158 outb((psr & ~PSR_PAGEBITS) | page, card->io + N2_PSR); 159} 160 161 162 163#include "hd6457x.c" 164 165 166 167static void n2_set_iface(port_t *port) 168{ 169 card_t *card = port->card; 170 int io = card->io; 171 u8 mcr = inb(io + N2_MCR); 172 u8 msci = get_msci(port); 173 u8 rxs = port->rxs & CLK_BRG_MASK; 174 u8 txs = port->txs & CLK_BRG_MASK; 175 176 switch(port->settings.clock_type) { 177 case CLOCK_INT: 178 mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0; 179 rxs |= CLK_BRG_RX; /* BRG output */ 180 txs |= CLK_RXCLK_TX; /* RX clock */ 181 break; 182 183 case CLOCK_TXINT: 184 mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0; 185 rxs |= CLK_LINE_RX; /* RXC input */ 186 txs |= CLK_BRG_TX; /* BRG output */ 187 break; 188 189 case CLOCK_TXFROMRX: 190 mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0; 191 rxs |= CLK_LINE_RX; /* RXC input */ 192 txs |= CLK_RXCLK_TX; /* RX clock */ 193 break; 194 195 default: /* Clock EXTernal */ 196 mcr &= port->phy_node ? ~CLOCK_OUT_PORT1 : ~CLOCK_OUT_PORT0; 197 rxs |= CLK_LINE_RX; /* RXC input */ 198 txs |= CLK_LINE_TX; /* TXC input */ 199 } 200 201 outb(mcr, io + N2_MCR); 202 port->rxs = rxs; 203 port->txs = txs; 204 sca_out(rxs, msci + RXS, card); 205 sca_out(txs, msci + TXS, card); 206 sca_set_port(port); 207} 208 209 210 211static int n2_open(struct net_device *dev) 212{ 213 port_t *port = dev_to_port(dev); 214 int io = port->card->io; 215 u8 mcr = inb(io + N2_MCR) | (port->phy_node ? TX422_PORT1:TX422_PORT0); 216 int result; 217 218 result = hdlc_open(dev); 219 if (result) 220 return result; 221 222 mcr &= port->phy_node ? ~DTR_PORT1 : ~DTR_PORT0; /* set DTR ON */ 223 outb(mcr, io + N2_MCR); 224 225 outb(inb(io + N2_PCR) | PCR_ENWIN, io + N2_PCR); /* open window */ 226 outb(inb(io + N2_PSR) | PSR_DMAEN, io + N2_PSR); /* enable dma */ 227 sca_open(dev); 228 n2_set_iface(port); 229 return 0; 230} 231 232 233 234static int n2_close(struct net_device *dev) 235{ 236 port_t *port = dev_to_port(dev); 237 int io = port->card->io; 238 u8 mcr = inb(io+N2_MCR) | (port->phy_node ? TX422_PORT1 : TX422_PORT0); 239 240 sca_close(dev); 241 mcr |= port->phy_node ? DTR_PORT1 : DTR_PORT0; /* set DTR OFF */ 242 outb(mcr, io + N2_MCR); 243 hdlc_close(dev); 244 return 0; 245} 246 247 248 249static int n2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 250{ 251 const size_t size = sizeof(sync_serial_settings); 252 sync_serial_settings new_line; 253 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync; 254 port_t *port = dev_to_port(dev); 255 256#ifdef DEBUG_RINGS 257 if (cmd == SIOCDEVPRIVATE) { 258 sca_dump_rings(dev); 259 return 0; 260 } 261#endif 262 if (cmd != SIOCWANDEV) 263 return hdlc_ioctl(dev, ifr, cmd); 264 265 switch(ifr->ifr_settings.type) { 266 case IF_GET_IFACE: 267 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL; 268 if (ifr->ifr_settings.size < size) { 269 ifr->ifr_settings.size = size; /* data size wanted */ 270 return -ENOBUFS; 271 } 272 if (copy_to_user(line, &port->settings, size)) 273 return -EFAULT; 274 return 0; 275 276 case IF_IFACE_SYNC_SERIAL: 277 if(!capable(CAP_NET_ADMIN)) 278 return -EPERM; 279 280 if (copy_from_user(&new_line, line, size)) 281 return -EFAULT; 282 283 if (new_line.clock_type != CLOCK_EXT && 284 new_line.clock_type != CLOCK_TXFROMRX && 285 new_line.clock_type != CLOCK_INT && 286 new_line.clock_type != CLOCK_TXINT) 287 return -EINVAL; /* No such clock setting */ 288 289 if (new_line.loopback != 0 && new_line.loopback != 1) 290 return -EINVAL; 291 292 memcpy(&port->settings, &new_line, size); /* Update settings */ 293 n2_set_iface(port); 294 return 0; 295 296 default: 297 return hdlc_ioctl(dev, ifr, cmd); 298 } 299} 300 301 302 303static void n2_destroy_card(card_t *card) 304{ 305 int cnt; 306 307 for (cnt = 0; cnt < 2; cnt++) 308 if (card->ports[cnt].card) { 309 struct net_device *dev = port_to_dev(&card->ports[cnt]); 310 unregister_hdlc_device(dev); 311 } 312 313 if (card->irq) 314 free_irq(card->irq, card); 315 316 if (card->winbase) { 317 iounmap(card->winbase); 318 release_mem_region(card->phy_winbase, USE_WINDOWSIZE); 319 } 320 321 if (card->io) 322 release_region(card->io, N2_IOPORTS); 323 if (card->ports[0].dev) 324 free_netdev(card->ports[0].dev); 325 if (card->ports[1].dev) 326 free_netdev(card->ports[1].dev); 327 kfree(card); 328} 329 330 331 332static int __init n2_run(unsigned long io, unsigned long irq, 333 unsigned long winbase, long valid0, long valid1) 334{ 335 card_t *card; 336 u8 cnt, pcr; 337 int i; 338 339 if (io < 0x200 || io > 0x3FF || (io % N2_IOPORTS) != 0) { 340 printk(KERN_ERR "n2: invalid I/O port value\n"); 341 return -ENODEV; 342 } 343 344 if (irq < 3 || irq > 15 || irq == 6) { 345 printk(KERN_ERR "n2: invalid IRQ value\n"); 346 return -ENODEV; 347 } 348 349 if (winbase < 0xA0000 || winbase > 0xFFFFF || (winbase & 0xFFF) != 0) { 350 printk(KERN_ERR "n2: invalid RAM value\n"); 351 return -ENODEV; 352 } 353 354 card = kmalloc(sizeof(card_t), GFP_KERNEL); 355 if (card == NULL) { 356 printk(KERN_ERR "n2: unable to allocate memory\n"); 357 return -ENOBUFS; 358 } 359 memset(card, 0, sizeof(card_t)); 360 361 card->ports[0].dev = alloc_hdlcdev(&card->ports[0]); 362 card->ports[1].dev = alloc_hdlcdev(&card->ports[1]); 363 if (!card->ports[0].dev || !card->ports[1].dev) { 364 printk(KERN_ERR "n2: unable to allocate memory\n"); 365 n2_destroy_card(card); 366 return -ENOMEM; 367 } 368 369 if (!request_region(io, N2_IOPORTS, devname)) { 370 printk(KERN_ERR "n2: I/O port region in use\n"); 371 n2_destroy_card(card); 372 return -EBUSY; 373 } 374 card->io = io; 375 376 if (request_irq(irq, &sca_intr, 0, devname, card)) { 377 printk(KERN_ERR "n2: could not allocate IRQ\n"); 378 n2_destroy_card(card); 379 return(-EBUSY); 380 } 381 card->irq = irq; 382 383 if (!request_mem_region(winbase, USE_WINDOWSIZE, devname)) { 384 printk(KERN_ERR "n2: could not request RAM window\n"); 385 n2_destroy_card(card); 386 return(-EBUSY); 387 } 388 card->phy_winbase = winbase; 389 card->winbase = ioremap(winbase, USE_WINDOWSIZE); 390 if (!card->winbase) { 391 printk(KERN_ERR "n2: ioremap() failed\n"); 392 n2_destroy_card(card); 393 return -EFAULT; 394 } 395 396 outb(0, io + N2_PCR); 397 outb(winbase >> 12, io + N2_BAR); 398 399 switch (USE_WINDOWSIZE) { 400 case 16384: 401 outb(WIN16K, io + N2_PSR); 402 break; 403 404 case 32768: 405 outb(WIN32K, io + N2_PSR); 406 break; 407 408 case 65536: 409 outb(WIN64K, io + N2_PSR); 410 break; 411 412 default: 413 printk(KERN_ERR "n2: invalid window size\n"); 414 n2_destroy_card(card); 415 return -ENODEV; 416 } 417 418 pcr = PCR_ENWIN | PCR_VPM | (USE_BUS16BITS ? PCR_BUS16 : 0); 419 outb(pcr, io + N2_PCR); 420 421 card->ram_size = sca_detect_ram(card, card->winbase, MAX_RAM_SIZE); 422 423 /* number of TX + RX buffers for one port */ 424 i = card->ram_size / ((valid0 + valid1) * (sizeof(pkt_desc) + 425 HDLC_MAX_MRU)); 426 427 card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS); 428 card->rx_ring_buffers = i - card->tx_ring_buffers; 429 430 card->buff_offset = (valid0 + valid1) * sizeof(pkt_desc) * 431 (card->tx_ring_buffers + card->rx_ring_buffers); 432 433 printk(KERN_INFO "n2: RISCom/N2 %u KB RAM, IRQ%u, " 434 "using %u TX + %u RX packets rings\n", card->ram_size / 1024, 435 card->irq, card->tx_ring_buffers, card->rx_ring_buffers); 436 437 if (card->tx_ring_buffers < 1) { 438 printk(KERN_ERR "n2: RAM test failed\n"); 439 n2_destroy_card(card); 440 return -EIO; 441 } 442 443 pcr |= PCR_RUNSCA; /* run SCA */ 444 outb(pcr, io + N2_PCR); 445 outb(0, io + N2_MCR); 446 447 sca_init(card, 0); 448 for (cnt = 0; cnt < 2; cnt++) { 449 port_t *port = &card->ports[cnt]; 450 struct net_device *dev = port_to_dev(port); 451 hdlc_device *hdlc = dev_to_hdlc(dev); 452 453 if ((cnt == 0 && !valid0) || (cnt == 1 && !valid1)) 454 continue; 455 456 port->phy_node = cnt; 457 port->valid = 1; 458 459 if ((cnt == 1) && valid0) 460 port->log_node = 1; 461 462 spin_lock_init(&port->lock); 463 SET_MODULE_OWNER(dev); 464 dev->irq = irq; 465 dev->mem_start = winbase; 466 dev->mem_end = winbase + USE_WINDOWSIZE - 1; 467 dev->tx_queue_len = 50; 468 dev->do_ioctl = n2_ioctl; 469 dev->open = n2_open; 470 dev->stop = n2_close; 471 hdlc->attach = sca_attach; 472 hdlc->xmit = sca_xmit; 473 port->settings.clock_type = CLOCK_EXT; 474 port->card = card; 475 476 if (register_hdlc_device(dev)) { 477 printk(KERN_WARNING "n2: unable to register hdlc " 478 "device\n"); 479 port->card = NULL; 480 n2_destroy_card(card); 481 return -ENOBUFS; 482 } 483 sca_init_sync_port(port); /* Set up SCA memory */ 484 485 printk(KERN_INFO "%s: RISCom/N2 node %d\n", 486 dev->name, port->phy_node); 487 } 488 489 *new_card = card; 490 new_card = &card->next_card; 491 492 return 0; 493} 494 495 496 497static int __init n2_init(void) 498{ 499 if (hw==NULL) { 500#ifdef MODULE 501 printk(KERN_INFO "n2: no card initialized\n"); 502#endif 503 return -EINVAL; /* no parameters specified, abort */ 504 } 505 506 printk(KERN_INFO "%s\n", version); 507 508 do { 509 unsigned long io, irq, ram; 510 long valid[2] = { 0, 0 }; /* Default = both ports disabled */ 511 512 io = simple_strtoul(hw, &hw, 0); 513 514 if (*hw++ != ',') 515 break; 516 irq = simple_strtoul(hw, &hw, 0); 517 518 if (*hw++ != ',') 519 break; 520 ram = simple_strtoul(hw, &hw, 0); 521 522 if (*hw++ != ',') 523 break; 524 while(1) { 525 if (*hw == '0' && !valid[0]) 526 valid[0] = 1; /* Port 0 enabled */ 527 else if (*hw == '1' && !valid[1]) 528 valid[1] = 1; /* Port 1 enabled */ 529 else 530 break; 531 hw++; 532 } 533 534 if (!valid[0] && !valid[1]) 535 break; /* at least one port must be used */ 536 537 if (*hw == ':' || *hw == '\x0') 538 n2_run(io, irq, ram, valid[0], valid[1]); 539 540 if (*hw == '\x0') 541 return first_card ? 0 : -EINVAL; 542 }while(*hw++ == ':'); 543 544 printk(KERN_ERR "n2: invalid hardware parameters\n"); 545 return first_card ? 0 : -EINVAL; 546} 547 548 549static void __exit n2_cleanup(void) 550{ 551 card_t *card = first_card; 552 553 while (card) { 554 card_t *ptr = card; 555 card = card->next_card; 556 n2_destroy_card(ptr); 557 } 558} 559 560 561module_init(n2_init); 562module_exit(n2_cleanup); 563 564MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>"); 565MODULE_DESCRIPTION("RISCom/N2 serial port driver"); 566MODULE_LICENSE("GPL v2"); 567module_param(hw, charp, 0444); 568MODULE_PARM_DESC(hw, "io,irq,ram,ports:io,irq,..."); 569