1/*
2 * arch/sh/drivers/pci/pci.c
3 *
4 * Copyright (c) 2002 M. R. Brown  <mrbrown@linux-sh.org>
5 * Copyright (c) 2004 - 2006 Paul Mundt  <lethal@linux-sh.org>
6 *
7 * These functions are collected here to reduce duplication of common
8 * code amongst the many platform-specific PCI support code files.
9 *
10 * These routines require the following board-specific routines:
11 * void pcibios_fixup_irqs();
12 *
13 * See include/asm-sh/pci.h for more information.
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License.  See the file "COPYING" in the main directory of this archive
17 * for more details.
18 */
19#include <linux/kernel.h>
20#include <linux/pci.h>
21#include <linux/init.h>
22#include <asm/io.h>
23
24static inline u8 bridge_swizzle(u8 pin, u8 slot)
25{
26	return (((pin - 1) + slot) % 4) + 1;
27}
28
29static u8 __init simple_swizzle(struct pci_dev *dev, u8 *pinp)
30{
31	u8 pin = *pinp;
32
33	while (dev->bus->parent) {
34		pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
35		/* Move up the chain of bridges. */
36		dev = dev->bus->self;
37	}
38	*pinp = pin;
39
40	/* The slot is the slot of the last bridge. */
41	return PCI_SLOT(dev->devfn);
42}
43
44static int __init pcibios_init(void)
45{
46	struct pci_channel *p;
47	struct pci_bus *bus;
48	int busno;
49
50#ifdef CONFIG_PCI_AUTO
51	/* assign resources */
52	busno = 0;
53	for (p = board_pci_channels; p->pci_ops != NULL; p++)
54		busno = pciauto_assign_resources(busno, p) + 1;
55#endif
56
57	/* scan the buses */
58	busno = 0;
59	for (p = board_pci_channels; p->pci_ops != NULL; p++) {
60		bus = pci_scan_bus(busno, p->pci_ops, p);
61		busno = bus->subordinate + 1;
62	}
63
64	pci_fixup_irqs(simple_swizzle, pcibios_map_platform_irq);
65
66	return 0;
67}
68subsys_initcall(pcibios_init);
69
70/*
71 *  Called after each bus is probed, but before its children
72 *  are examined.
73 */
74void __init pcibios_fixup_bus(struct pci_bus *bus)
75{
76	pci_read_bridge_bases(bus);
77}
78
79void
80pcibios_update_resource(struct pci_dev *dev, struct resource *root,
81			struct resource *res, int resource)
82{
83	u32 new, check;
84	int reg;
85
86	new = res->start | (res->flags & PCI_REGION_FLAG_MASK);
87	if (resource < 6) {
88		reg = PCI_BASE_ADDRESS_0 + 4*resource;
89	} else if (resource == PCI_ROM_RESOURCE) {
90		res->flags |= IORESOURCE_ROM_ENABLE;
91		new |= PCI_ROM_ADDRESS_ENABLE;
92		reg = dev->rom_base_reg;
93	} else {
94		/*
95		 * Somebody might have asked allocation of a non-standard
96		 * resource
97		 */
98		return;
99	}
100
101	pci_write_config_dword(dev, reg, new);
102	pci_read_config_dword(dev, reg, &check);
103	if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ?
104		PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) {
105		printk(KERN_ERR "PCI: Error while updating region "
106		       "%s/%d (%08x != %08x)\n", pci_name(dev), resource,
107		       new, check);
108	}
109}
110
111void pcibios_align_resource(void *data, struct resource *res,
112			    resource_size_t size, resource_size_t align)
113			    __attribute__ ((weak));
114
115/*
116 * We need to avoid collisions with `mirrored' VGA ports
117 * and other strange ISA hardware, so we always want the
118 * addresses to be allocated in the 0x000-0x0ff region
119 * modulo 0x400.
120 */
121void pcibios_align_resource(void *data, struct resource *res,
122			    resource_size_t size, resource_size_t align)
123{
124	if (res->flags & IORESOURCE_IO) {
125		resource_size_t start = res->start;
126
127		if (start & 0x300) {
128			start = (start + 0x3ff) & ~0x3ff;
129			res->start = start;
130		}
131	}
132}
133
134int pcibios_enable_device(struct pci_dev *dev, int mask)
135{
136	u16 cmd, old_cmd;
137	int idx;
138	struct resource *r;
139
140	pci_read_config_word(dev, PCI_COMMAND, &cmd);
141	old_cmd = cmd;
142	for(idx=0; idx<6; idx++) {
143		if (!(mask & (1 << idx)))
144			continue;
145		r = &dev->resource[idx];
146		if (!r->start && r->end) {
147			printk(KERN_ERR "PCI: Device %s not available because "
148			       "of resource collisions\n", pci_name(dev));
149			return -EINVAL;
150		}
151		if (r->flags & IORESOURCE_IO)
152			cmd |= PCI_COMMAND_IO;
153		if (r->flags & IORESOURCE_MEM)
154			cmd |= PCI_COMMAND_MEMORY;
155	}
156	if (dev->resource[PCI_ROM_RESOURCE].start)
157		cmd |= PCI_COMMAND_MEMORY;
158	if (cmd != old_cmd) {
159		printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n",
160		       pci_name(dev), old_cmd, cmd);
161		pci_write_config_word(dev, PCI_COMMAND, cmd);
162	}
163	return 0;
164}
165
166/*
167 *  If we set up a device for bus mastering, we need to check and set
168 *  the latency timer as it may not be properly set.
169 */
170unsigned int pcibios_max_latency = 255;
171
172void pcibios_set_master(struct pci_dev *dev)
173{
174	u8 lat;
175	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
176	if (lat < 16)
177		lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
178	else if (lat > pcibios_max_latency)
179		lat = pcibios_max_latency;
180	else
181		return;
182	printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
183	       pci_name(dev), lat);
184	pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
185}
186
187void __init pcibios_update_irq(struct pci_dev *dev, int irq)
188{
189	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
190}
191
192void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
193{
194	unsigned long start = pci_resource_start(dev, bar);
195	unsigned long len = pci_resource_len(dev, bar);
196	unsigned long flags = pci_resource_flags(dev, bar);
197
198	if (unlikely(!len || !start))
199		return NULL;
200	if (maxlen && len > maxlen)
201		len = maxlen;
202
203	/*
204	 * Presently the IORESOURCE_MEM case is a bit special, most
205	 * SH7751 style PCI controllers have PCI memory at a fixed
206	 * location in the address space where no remapping is desired
207	 * (typically at 0xfd000000, but is_pci_memaddr() will know
208	 * best). With the IORESOURCE_MEM case more care has to be taken
209	 * to inhibit page table mapping for legacy cores, but this is
210	 * punted off to __ioremap().
211	 *					-- PFM.
212	 */
213	if (flags & IORESOURCE_IO)
214		return ioport_map(start, len);
215	if (flags & IORESOURCE_MEM)
216		return ioremap(start, len);
217
218	return NULL;
219}
220EXPORT_SYMBOL(pci_iomap);
221
222void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
223{
224	iounmap(addr);
225}
226EXPORT_SYMBOL(pci_iounmap);
227