1/* 2 * arch/ppc/platforms/prpmc750.h 3 * 4 * Definitions for Motorola PrPMC750 board support 5 * 6 * Author: Matt Porter <mporter@mvista.com> 7 * 8 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under 9 * the terms of the GNU General Public License version 2. This program 10 * is licensed "as is" without any warranty of any kind, whether express 11 * or implied. 12 */ 13 14#ifdef __KERNEL__ 15#ifndef __ASM_PRPMC750_H__ 16#define __ASM_PRPMC750_H__ 17 18/* 19 * Due to limitations imposed by legacy hardware (primarily IDE controllers), 20 * the PrPMC750 carrier board operates using a PReP address map. 21 * 22 * From Processor (physical) -> PCI: 23 * PCI Mem Space: 0xc0000000 - 0xfe000000 -> 0x00000000 - 0x3e000000 (768 MB) 24 * PCI I/O Space: 0x80000000 - 0x90000000 -> 0x00000000 - 0x10000000 (256 MB) 25 * Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area 26 * 27 * From PCI -> Processor (physical): 28 * System Memory: 0x80000000 -> 0x00000000 29 */ 30 31#define PRPMC750_ISA_IO_BASE PREP_ISA_IO_BASE 32#define PRPMC750_ISA_MEM_BASE PREP_ISA_MEM_BASE 33 34/* PCI Memory space mapping info */ 35#define PRPMC750_PCI_MEM_SIZE 0x30000000U 36#define PRPMC750_PROC_PCI_MEM_START PRPMC750_ISA_MEM_BASE 37#define PRPMC750_PROC_PCI_MEM_END (PRPMC750_PROC_PCI_MEM_START + \ 38 PRPMC750_PCI_MEM_SIZE - 1) 39#define PRPMC750_PCI_MEM_START 0x00000000U 40#define PRPMC750_PCI_MEM_END (PRPMC750_PCI_MEM_START + \ 41 PRPMC750_PCI_MEM_SIZE - 1) 42 43/* PCI I/O space mapping info */ 44#define PRPMC750_PCI_IO_SIZE 0x10000000U 45#define PRPMC750_PROC_PCI_IO_START PRPMC750_ISA_IO_BASE 46#define PRPMC750_PROC_PCI_IO_END (PRPMC750_PROC_PCI_IO_START + \ 47 PRPMC750_PCI_IO_SIZE - 1) 48#define PRPMC750_PCI_IO_START 0x00000000U 49#define PRPMC750_PCI_IO_END (PRPMC750_PCI_IO_START + \ 50 PRPMC750_PCI_IO_SIZE - 1) 51 52/* System memory mapping info */ 53#define PRPMC750_PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET 54#define PRPMC750_PCI_PHY_MEM_OFFSET (PRPMC750_ISA_MEM_BASE-PRPMC750_PCI_MEM_START) 55 56/* Register address definitions */ 57#define PRPMC750_HAWK_SMC_BASE 0xfef80000U 58#define PRPMC750_HAWK_PPC_REG_BASE 0xfeff0000U 59 60#define PRPMC750_BASE_BAUD 1843200 61#define PRPMC750_SERIAL_0 0xfef88000 62#define PRPMC750_SERIAL_0_DLL (PRPMC750_SERIAL_0 + (UART_DLL << 4)) 63#define PRPMC750_SERIAL_0_DLM (PRPMC750_SERIAL_0 + (UART_DLM << 4)) 64#define PRPMC750_SERIAL_0_LCR (PRPMC750_SERIAL_0 + (UART_LCR << 4)) 65 66#define PRPMC750_STATUS_REG 0xfef88080 67#define PRPMC750_BAUDOUT_MASK 0x02 68#define PRPMC750_MONARCH_MASK 0x01 69 70#define PRPMC750_MODRST_REG 0xfef880a0 71#define PRPMC750_MODRST_MASK 0x01 72 73#define PRPMC750_PIRQ_REG 0xfef880b0 74#define PRPMC750_SEL1_MASK 0x02 75#define PRPMC750_SEL0_MASK 0x01 76 77#define PRPMC750_TBEN_REG 0xfef880c0 78#define PRPMC750_TBEN_MASK 0x01 79 80/* UART Defines. */ 81#define RS_TABLE_SIZE 4 82 83/* Rate for the 1.8432 Mhz clock for the onboard serial chip */ 84#define BASE_BAUD (PRPMC750_BASE_BAUD / 16) 85 86#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF 87 88#define SERIAL_PORT_DFNS \ 89 { 0, BASE_BAUD, PRPMC750_SERIAL_0, 1, STD_COM_FLAGS, \ 90 iomem_base: (unsigned char *)PRPMC750_SERIAL_0, \ 91 iomem_reg_shift: 4, \ 92 io_type: SERIAL_IO_MEM } /* ttyS0 */ 93 94#endif /* __ASM_PRPMC750_H__ */ 95#endif /* __KERNEL__ */ 96