1config PPC_CELL 2 bool 3 default n 4 5config PPC_CELL_NATIVE 6 bool 7 select PPC_CELL 8 select PPC_DCR_MMIO 9 select PPC_OF_PLATFORM_PCI 10 select PPC_INDIRECT_IO 11 select PPC_NATIVE 12 select MPIC 13 default n 14 15config PPC_IBM_CELL_BLADE 16 bool "IBM Cell Blade" 17 depends on PPC_MULTIPLATFORM && PPC64 18 select PPC_CELL_NATIVE 19 select PPC_RTAS 20 select MMIO_NVRAM 21 select PPC_UDBG_16550 22 select UDBG_RTAS_CONSOLE 23 24menu "Cell Broadband Engine options" 25 depends on PPC_CELL 26 27config SPU_FS 28 tristate "SPU file system" 29 default m 30 depends on PPC_CELL 31 select SPU_BASE 32 select MEMORY_HOTPLUG 33 help 34 The SPU file system is used to access Synergistic Processing 35 Units on machines implementing the Broadband Processor 36 Architecture. 37 38config SPU_FS_64K_LS 39 bool "Use 64K pages to map SPE local store" 40 # we depend on PPC_MM_SLICES for now rather than selecting 41 # it because we depend on hugetlbfs hooks being present. We 42 # will fix that when the generic code has been improved to 43 # not require hijacking hugetlbfs hooks. 44 depends on SPU_FS && PPC_MM_SLICES && !PPC_64K_PAGES 45 default y 46 select PPC_HAS_HASH_64K 47 help 48 This option causes SPE local stores to be mapped in process 49 address spaces using 64K pages while the rest of the kernel 50 uses 4K pages. This can improve performances of applications 51 using multiple SPEs by lowering the TLB pressure on them. 52 53config SPU_BASE 54 bool 55 default n 56 57config CBE_RAS 58 bool "RAS features for bare metal Cell BE" 59 depends on PPC_CELL_NATIVE 60 default y 61 62config CBE_THERM 63 tristate "CBE thermal support" 64 default m 65 depends on CBE_RAS 66 67config CBE_CPUFREQ 68 tristate "CBE frequency scaling" 69 depends on CBE_RAS && CPU_FREQ 70 default m 71 help 72 This adds the cpufreq driver for Cell BE processors. 73 For details, take a look at <file:Documentation/cpu-freq/>. 74 If you don't have such processor, say N 75 76endmenu 77