1/* $OpenBSD: sisfb.c,v 1.2 2010/12/26 15:40:59 miod Exp $ */ 2 3/* 4 * Copyright (c) 2010 Miodrag Vallat. 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19/* 20 * Minimalistic driver for the SIS315 Pro frame buffer found on the 21 * Lemote Fuloong 2F systems. 22 * Does not support accelaration, mode change, secondary output, or 23 * anything fancy. 24 */ 25 26#include <sys/cdefs.h> 27__KERNEL_RCSID(0, "$NetBSD: sisfb.c,v 1.9 2023/08/08 06:57:20 mrg Exp $"); 28 29#include <sys/param.h> 30#include <sys/systm.h> 31#include <sys/device.h> 32#include <sys/bus.h> 33#include <sys/kauth.h> 34 35#include <uvm/uvm_extern.h> 36 37#include <dev/pci/pcireg.h> 38#include <dev/pci/pcivar.h> 39#include <dev/pci/pcidevs.h> 40#include <dev/pci/pciio.h> 41 42#include <dev/videomode/videomode.h> 43 44#include <dev/wscons/wsdisplayvar.h> 45#include <dev/wscons/wsconsio.h> 46#include <dev/wsfont/wsfont.h> 47#include <dev/rasops/rasops.h> 48#include <dev/wscons/wsdisplay_vconsvar.h> 49#include <dev/pci/wsdisplay_pci.h> 50 51#include <dev/i2c/i2cvar.h> 52 53#include <dev/pci/sisfb.h> 54 55struct sisfb_softc; 56 57/* minimal frame buffer information, suitable for early console */ 58 59struct sisfb { 60 struct sisfb_softc *sc; 61 uint8_t cmap[256 * 3]; 62 63 bus_space_tag_t fbt; 64 bus_space_handle_t fbh; 65 bus_addr_t fbbase; 66 bus_size_t fbsize; 67 68 bus_space_tag_t mmiot; 69 bus_space_handle_t mmioh; 70 bus_addr_t mmiobase; 71 bus_size_t mmiosize; 72 73 bus_space_tag_t iot; 74 bus_space_handle_t ioh; 75 bus_addr_t iobase; 76 bus_size_t iosize; 77 78 struct vcons_screen vcs; 79 struct wsscreen_descr wsd; 80 81 int fb_depth; 82 int fb_width; 83 int fb_height; 84 int fb_stride; 85 void *fb_addr; 86}; 87 88struct sisfb_softc { 89 device_t sc_dev; 90 struct sisfb *sc_fb; 91 struct sisfb sc_fb_store; 92 93 struct vcons_data vd; 94 struct wsscreen_list sc_wsl; 95 const struct wsscreen_descr *sc_scrlist[1]; 96 int sc_nscr; 97 int sc_mode; 98 99 pci_chipset_tag_t sc_pc; 100 pcitag_t sc_pt; 101}; 102 103int sisfb_match(device_t, cfdata_t, void *); 104void sisfb_attach(device_t, device_t, void *); 105 106CFATTACH_DECL_NEW(sisfb, sizeof(struct sisfb_softc), 107 sisfb_match, sisfb_attach, NULL, NULL); 108 109 110int sisfb_alloc_screen(void *, const struct wsscreen_descr *, void **, int *, 111 int *, long *); 112void sisfb_free_screen(void *, void *); 113int sisfb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 114int sisfb_show_screen(void *, void *, int, void (*)(void *, int, int), 115 void *); 116paddr_t sisfb_mmap(void *, void *, off_t, int); 117void sisfb_init_screen(void *, struct vcons_screen *, int, long *); 118 119 120struct wsdisplay_accessops sisfb_accessops = { 121 sisfb_ioctl, 122 sisfb_mmap, 123 sisfb_alloc_screen, 124 sisfb_free_screen, 125 sisfb_show_screen, 126 NULL, /* load_font */ 127 NULL, /* poolc */ 128 NULL /* scroll */ 129}; 130 131int sisfb_getcmap(uint8_t *, struct wsdisplay_cmap *); 132void sisfb_loadcmap(struct sisfb *, int, int); 133int sisfb_putcmap(uint8_t *, struct wsdisplay_cmap *); 134int sisfb_setup(struct sisfb *); 135 136static struct sisfb sisfbcn; 137 138/* 139 * Control Register access 140 * 141 * These are 8 bit registers; the choice of larger width types is intentional. 142 */ 143 144#define SIS_VGA_PORT_OFFSET 0x380 145 146#define SEQ_ADDR (0x3c4 - SIS_VGA_PORT_OFFSET) 147#define SEQ_DATA (0x3c5 - SIS_VGA_PORT_OFFSET) 148#define DAC_ADDR (0x3c8 - SIS_VGA_PORT_OFFSET) 149#define DAC_DATA (0x3c9 - SIS_VGA_PORT_OFFSET) 150#undef CRTC_ADDR 151#define CRTC_ADDR (0x3d4 - SIS_VGA_PORT_OFFSET) 152#define CRTC_DATA (0x3d5 - SIS_VGA_PORT_OFFSET) 153 154#define CRTC_HDISPLE 0x01 /* horizontal display end */ 155#define CRTC_OVERFLL 0x07 /* overflow low */ 156#define CRTC_STARTADRH 0x0C /* linear start address mid */ 157#define CRTC_STARTADRL 0x0D /* linear start address low */ 158#define CRTC_VDE 0x12 /* vertical display end */ 159 160 161static inline uint sisfb_crtc_read(struct sisfb *, uint); 162static inline void sisfb_crtc_write(struct sisfb *, uint, uint); 163static inline uint sisfb_seq_read(struct sisfb *, uint); 164static inline void sisfb_seq_write(struct sisfb *, uint, uint); 165 166static inline uint 167sisfb_crtc_read(struct sisfb *fb, uint idx) 168{ 169 uint val; 170 bus_space_write_1(fb->iot, fb->ioh, CRTC_ADDR, idx); 171 val = bus_space_read_1(fb->iot, fb->ioh, CRTC_DATA); 172#ifdef SIS_DEBUG 173 printf("CRTC %04x -> %02x\n", idx, val); 174#endif 175 return val; 176} 177 178static inline void 179sisfb_crtc_write(struct sisfb *fb, uint idx, uint val) 180{ 181#ifdef SIS_DEBUG 182 printf("CRTC %04x <- %02x\n", idx, val); 183#endif 184 bus_space_write_1(fb->iot, fb->ioh, CRTC_ADDR, idx); 185 bus_space_write_1(fb->iot, fb->ioh, CRTC_DATA, val); 186} 187 188static inline uint 189sisfb_seq_read(struct sisfb *fb, uint idx) 190{ 191 uint val; 192 bus_space_write_1(fb->iot, fb->ioh, SEQ_ADDR, idx); 193 val = bus_space_read_1(fb->iot, fb->ioh, SEQ_DATA); 194#ifdef SIS_DEBUG 195 printf("SEQ %04x -> %02x\n", idx, val); 196#endif 197 return val; 198} 199 200static inline void 201sisfb_seq_write(struct sisfb *fb, uint idx, uint val) 202{ 203#ifdef SIS_DEBUG 204 printf("SEQ %04x <- %02x\n", idx, val); 205#endif 206 bus_space_write_1(fb->iot, fb->ioh, SEQ_ADDR, idx); 207 bus_space_write_1(fb->iot, fb->ioh, SEQ_DATA, val); 208} 209 210int 211sisfb_match(device_t parent, cfdata_t match, void *aux) 212{ 213 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 214 215 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 216 return 0; 217 218 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_SIS) 219 return 0; 220 221 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SIS_315PRO_VGA) 222 return 100; 223 return (0); 224} 225 226void 227sisfb_attach(device_t parent, device_t self, void *aux) 228{ 229 struct sisfb_softc *sc = device_private(self); 230 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 231 struct rasops_info *ri; 232 struct wsemuldisplaydev_attach_args waa; 233 struct sisfb *fb; 234 int console; 235 unsigned long defattr; 236 237 sc->sc_dev = self; 238 console = sisfbcn.vcs.scr_ri.ri_hw != NULL; 239 240 if (console) 241 fb = &sisfbcn; 242 else { 243 fb = &sc->sc_fb_store; 244 } 245 246 sc->sc_fb = fb; 247 fb->sc = sc; 248 249 pci_aprint_devinfo(pa, NULL); 250 251 sc->sc_pt = pa->pa_tag; 252 sc->sc_pc = pa->pa_pc; 253 254 if (!console) { 255 fb->fbt = pa->pa_memt; 256 fb->mmiot = pa->pa_memt; 257 fb->iot = pa->pa_iot; 258 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM, 259 BUS_SPACE_MAP_LINEAR, &fb->fbt, &fb->fbh, 260 &fb->fbbase, &fb->fbsize) != 0) { 261 aprint_error_dev(self, ": can't map frame buffer\n"); 262 return; 263 } 264 265 if (pci_mapreg_map(pa, PCI_MAPREG_START + 4, 266 PCI_MAPREG_TYPE_MEM, 0, 267 &fb->mmiot, &fb->mmioh, &fb->mmiobase, &fb->mmiosize) != 0) { 268 aprint_error_dev(self, ": can't map mmio area\n"); 269 goto fail1; 270 } 271 272 if (pci_mapreg_map(pa, PCI_MAPREG_START + 8, PCI_MAPREG_TYPE_IO, 273 0, &fb->iot, &fb->ioh, &fb->iobase, &fb->iosize) != 0) { 274 aprint_error_dev(self, ": can't map registers\n"); 275 goto fail2; 276 } 277 278 279 if (sisfb_setup(sc->sc_fb) != 0) { 280 aprint_error_dev(self, ": can't setup frame buffer\n"); 281 goto fail3; 282 } 283 } 284 285 aprint_normal_dev(self, ": %dx%dx%d frame buffer\n", 286 fb->vcs.scr_ri.ri_width, fb->vcs.scr_ri.ri_height, 287 fb->vcs.scr_ri.ri_depth); 288 289 aprint_debug_dev(self, ": fb 0x%" PRIxBUSSIZE "@0x%" PRIxBUSADDR 290 ", mmio 0x%" PRIxBUSSIZE "@0x%" PRIxBUSADDR 291 ", io 0x%" PRIxBUSSIZE "@0x%" PRIxBUSADDR "\n", 292 fb->fbsize, fb->fbbase, 293 fb->mmiosize, fb->mmiobase, 294 fb->iosize, fb->iobase); 295 296 fb->wsd = (struct wsscreen_descr){ 297 "default", 298 0, 0, 299 NULL, 300 8, 16, 301 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 302 NULL 303 }; 304 sc->sc_scrlist[0] = &fb->wsd; 305 sc->sc_wsl = (struct wsscreen_list){1, sc->sc_scrlist}; 306 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 307 308 309 vcons_init(&sc->vd, sc, &fb->wsd, &sisfb_accessops); 310 sc->vd.init_screen = sisfb_init_screen; 311 312 ri = &fb->vcs.scr_ri; 313 if (console) { 314 vcons_init_screen(&sc->vd, &fb->vcs, 1, &defattr); 315 fb->vcs.scr_flags |= VCONS_SCREEN_IS_STATIC; 316 fb->wsd.textops = &ri->ri_ops; 317 fb->wsd.capabilities = ri->ri_caps; 318 fb->wsd.nrows = ri->ri_rows; 319 fb->wsd.ncols = ri->ri_cols; 320 wsdisplay_cnattach(&fb->wsd, ri, 0, 0, defattr); 321 vcons_replay_msgbuf(&fb->vcs); 322 } else { 323 /* 324 * since we're not the console we can postpone the rest 325 * until someone actually allocates a screen for us 326 */ 327 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 328 } 329 330 waa.console = console; 331 waa.scrdata = &sc->sc_wsl; 332 waa.accessops = &sisfb_accessops; 333 waa.accesscookie = &sc->vd; 334 335 config_found(sc->sc_dev, &waa, wsemuldisplaydevprint, CFARGS_NONE); 336 return; 337 338fail3: 339 bus_space_unmap(fb->iot, fb->ioh, fb->iosize); 340fail2: 341 bus_space_unmap(fb->mmiot, fb->mmioh, fb->mmiosize); 342fail1: 343 bus_space_unmap(fb->fbt, fb->fbh, fb->fbsize); 344} 345 346/* 347 * wsdisplay accesops 348 */ 349 350int 351sisfb_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep, 352 int *curxp, int *curyp, long *attrp) 353{ 354 struct sisfb_softc *sc = (struct sisfb_softc *)v; 355 struct rasops_info *ri = &sc->sc_fb->vcs.scr_ri; 356 357 if (sc->sc_nscr > 0) 358 return ENOMEM; 359 360 *cookiep = ri; 361 *curxp = *curyp = 0; 362 ri->ri_ops.allocattr(ri, 0, 0, 0, attrp); 363 sc->sc_nscr++; 364 365 return 0; 366} 367 368void 369sisfb_free_screen(void *v, void *cookie) 370{ 371 struct sisfb_softc *sc = (struct sisfb_softc *)v; 372 373 sc->sc_nscr--; 374} 375 376int 377sisfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flags, 378 struct lwp *l) 379{ 380 struct vcons_data *vd = v; 381 struct sisfb_softc *sc = vd->cookie; 382 struct sisfb *fb = sc->sc_fb; 383 struct rasops_info *ri = &fb->vcs.scr_ri; 384 struct wsdisplay_cmap *cm; 385 struct wsdisplay_fbinfo *wdf; 386 int rc; 387 388 switch (cmd) { 389 case WSDISPLAYIO_GTYPE: 390 *(uint *)data = WSDISPLAY_TYPE_PCIMISC; 391 return 0; 392 case WSDISPLAYIO_GINFO: 393 if (vd->active != NULL) { 394 wdf = (struct wsdisplay_fbinfo *)data; 395 wdf->width = ri->ri_width; 396 wdf->height = ri->ri_height; 397 wdf->depth = ri->ri_depth; 398 wdf->cmsize = 256; 399 return 0; 400 } else 401 return ENODEV; 402 case WSDISPLAYIO_LINEBYTES: 403 *(uint *)data = ri->ri_stride; 404 return 0; 405 case WSDISPLAYIO_GETCMAP: 406 cm = (struct wsdisplay_cmap *)data; 407 rc = sisfb_getcmap(fb->cmap, cm); 408 return rc; 409 case WSDISPLAYIO_PUTCMAP: 410 cm = (struct wsdisplay_cmap *)data; 411 rc = sisfb_putcmap(fb->cmap, cm); 412 if (rc != 0) 413 return rc; 414 if (ri->ri_depth == 8) 415 sisfb_loadcmap(fb, cm->index, cm->count); 416 return 0; 417 case WSDISPLAYIO_SMODE: 418 sc->sc_mode = *(uint *)data; 419 aprint_debug_dev(sc->sc_dev, ": switching to "); 420 switch(sc->sc_mode) { 421 case WSDISPLAYIO_MODE_EMUL: 422 aprint_debug("WSDISPLAYIO_MODE_EMUL\n"); 423 break; 424 case WSDISPLAYIO_MODE_MAPPED: 425 aprint_debug("WSDISPLAYIO_MODE_MAPPED\n"); 426 break; 427 case WSDISPLAYIO_MODE_DUMBFB: 428 aprint_debug("WSDISPLAYIO_MODE_DUMBFB\n"); 429 break; 430 default: 431 aprint_debug("unknown mode %d\n", sc->sc_mode); 432 return EINVAL; 433 } 434 return 0; 435 case WSDISPLAYIO_GMODE: 436 *(uint *)data = sc->sc_mode; 437 return 0; 438 case PCI_IOC_CFGREAD: 439 case PCI_IOC_CFGWRITE: 440 return pci_devioctl(sc->sc_pc, sc->sc_pt, cmd, data, flags, l); 441 case WSDISPLAYIO_GET_BUSID: 442 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 443 sc->sc_pt, data); 444 } 445 return EPASSTHROUGH; 446} 447 448int 449sisfb_show_screen(void *v, void *cookie, int waitok, 450 void (*cb)(void *, int, int), void *cbarg) 451{ 452 return 0; 453} 454 455paddr_t 456sisfb_mmap(void *v, void *vs, off_t offset, int prot) 457{ 458 struct vcons_data *vd = v; 459 struct sisfb_softc *sc = vd->cookie; 460 struct rasops_info *ri = &sc->sc_fb->vcs.scr_ri; 461 struct sisfb *fb = sc->sc_fb; 462 const uintptr_t fb_offset = 463 (uintptr_t)bus_space_vaddr(fb->fbt, fb->fbh) - (uintptr_t)fb->fb_addr; 464 paddr_t pa; 465 466 if (sc->sc_mode != WSDISPLAYIO_MODE_MAPPED) { 467 if (offset >= 0 && offset < ri->ri_stride * ri->ri_height) { 468 pa = bus_space_mmap(fb->fbt, 469 fb->fbbase, fb_offset + offset, 470 prot, BUS_SPACE_MAP_LINEAR); 471 return pa; 472 } 473 return -1; 474 } 475 476 if (kauth_authorize_machdep(kauth_cred_get(), 477 KAUTH_MACHDEP_UNMANAGEDMEM, NULL, NULL, NULL, NULL) != 0) { 478 aprint_error_dev(sc->sc_dev, "mmap() rejected.\n"); 479 return -1; 480 } 481 482 if (offset >= (fb->fbbase & ~PAGE_MASK) && 483 offset <= ((fb->fbbase + fb->fbsize + PAGE_SIZE - 1) & ~PAGE_MASK)) { 484 pa = bus_space_mmap(fb->fbt, fb->fbbase, offset - fb->fbbase, 485 prot, BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_PREFETCHABLE); 486 return pa; 487 } 488 if (offset >= (fb->mmiobase & ~PAGE_MASK) && 489 offset <= ((fb->mmiobase + fb->mmiosize + PAGE_SIZE - 1) & ~PAGE_MASK)) { 490 pa = bus_space_mmap(fb->mmiot, fb->mmiobase, offset - fb->mmiobase, 491 prot, BUS_SPACE_MAP_LINEAR); 492 return pa; 493 } 494 if (offset >= (fb->iobase & ~PAGE_MASK) && 495 offset <= ((fb->iobase + fb->iosize + PAGE_SIZE - 1) & ~PAGE_MASK)) { 496 pa = bus_space_mmap(fb->iot, fb->iobase, offset - fb->iobase, 497 prot, BUS_SPACE_MAP_LINEAR); 498 return pa; 499 } 500 return -1; 501} 502 503void 504sisfb_init_screen(void *cookie, struct vcons_screen *scr, 505 int existing, long *defattr) 506{ 507 struct sisfb_softc *sc = cookie; 508 struct sisfb *fb = sc->sc_fb; 509 struct rasops_info *ri = &scr->scr_ri; 510 511 ri->ri_depth = fb->fb_depth; 512 ri->ri_width = fb->fb_width; 513 ri->ri_height = fb->fb_height; 514 ri->ri_stride = fb->fb_stride; 515 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 516 517 ri->ri_bits = fb->fb_addr; 518 519 if (existing) { 520 ri->ri_flg |= RI_CLEAR; 521 } 522 523 rasops_init(ri, fb->fb_height / 8, fb->fb_width / 8); 524 ri->ri_caps = WSSCREEN_WSCOLORS; 525 rasops_reconfig(ri, fb->fb_height / ri->ri_font->fontheight, 526 fb->fb_width / ri->ri_font->fontwidth); 527 528 ri->ri_hw = scr; 529} 530 531 532/* 533 * Frame buffer initialization. 534 */ 535 536int 537sisfb_setup(struct sisfb *fb) 538{ 539 struct rasops_info *ri = &fb->vcs.scr_ri; 540 uint width, height, bpp; 541 bus_size_t fbaddr; 542 uint tmp; 543 544 /* 545 * Unlock access to extended registers. 546 */ 547 548 sisfb_seq_write(fb, 0x05, 0x86); 549 550 /* 551 * Try and figure out display settings. 552 */ 553 554 height = sisfb_crtc_read(fb, CRTC_VDE); 555 tmp = sisfb_crtc_read(fb, CRTC_OVERFLL); 556 if (ISSET(tmp, 1 << 1)) 557 height |= 1 << 8; 558 if (ISSET(tmp, 1 << 6)) 559 height |= 1 << 9; 560 tmp = sisfb_seq_read(fb, 0x0a); 561 if (ISSET(tmp, 1 << 1)) 562 height |= 1 << 10; 563 height++; 564 565 width = sisfb_crtc_read(fb, CRTC_HDISPLE); 566 tmp = sisfb_seq_read(fb, 0x0b); 567 if (ISSET(tmp, 1 << 2)) 568 width |= 1 << 8; 569 if (ISSET(tmp, 1 << 3)) 570 width |= 1 << 9; 571 width++; 572 width <<= 3; 573 574#ifdef SIS_DEBUG 575 printf("height %d width %d\n", height, width); 576#endif 577 578 fbaddr = sisfb_crtc_read(fb, CRTC_STARTADRL) | 579 (sisfb_crtc_read(fb, CRTC_STARTADRH) << 8) | 580 (sisfb_seq_read(fb, 0x0d) << 16) | 581 ((sisfb_seq_read(fb, 0x37) & 0x03) << 24); 582 fbaddr <<= 2; 583#ifdef SIS_DEBUG 584 printf("FBADDR %lx\n", fbaddr); 585#endif 586 587 tmp = sisfb_seq_read(fb, 0x06); 588 switch (tmp & 0x1c) { 589 case 0x00: 590 bpp = 8; 591 break; 592 case 0x04: 593 bpp = 15; 594 break; 595 case 0x08: 596 bpp = 16; 597 break; 598 case 0x10: 599 bpp = 32; 600 break; 601 default: 602 aprint_error("unknown bpp for 0x%x\n", tmp); 603 return EINVAL; 604 } 605#ifdef SIS_DEBUG 606 printf("BPP %d\n", bpp); 607#endif 608 609 fb->fb_width = ri->ri_width = width; 610 fb->fb_height = ri->ri_height = height; 611 fb->fb_depth = ri->ri_depth = bpp; 612 fb->fb_stride = ri->ri_stride = (ri->ri_width * ri->ri_depth) / 8; 613 ri->ri_flg = /* RI_CENTER | RI_CLEAR | RI_FULLCLEAR */ RI_CENTER | RI_NO_AUTO; 614 fb->fb_addr = ri->ri_bits = 615 (void *)((char *)bus_space_vaddr(fb->fbt, fb->fbh) + fbaddr); 616 ri->ri_hw = fb; 617 618#ifdef SIS_DEBUG 619 printf("ri_bits %p\n", ri->ri_bits); 620#endif 621 622#ifdef __MIPSEL__ 623 /* swap B and R */ 624 switch (bpp) { 625 case 15: 626 ri->ri_rnum = 5; 627 ri->ri_rpos = 10; 628 ri->ri_gnum = 5; 629 ri->ri_gpos = 5; 630 ri->ri_bnum = 5; 631 ri->ri_bpos = 0; 632 break; 633 case 16: 634 ri->ri_rnum = 5; 635 ri->ri_rpos = 11; 636 ri->ri_gnum = 6; 637 ri->ri_gpos = 5; 638 ri->ri_bnum = 5; 639 ri->ri_bpos = 0; 640 break; 641 } 642#endif 643 644 bcopy(rasops_cmap, fb->cmap, sizeof(fb->cmap)); 645 if (bpp == 8) { 646 sisfb_loadcmap(fb, 0, 256); 647 } 648 649 rasops_init(ri, 25, 80); 650 rasops_reconfig(ri, ri->ri_height / ri->ri_font->fontheight, 651 ri->ri_width / ri->ri_font->fontwidth); 652 653 fb->wsd.name = "std"; 654 fb->wsd.ncols = ri->ri_cols; 655 fb->wsd.nrows = ri->ri_rows; 656 fb->wsd.textops = &ri->ri_ops; 657 fb->wsd.fontwidth = ri->ri_font->fontwidth; 658 fb->wsd.fontheight = ri->ri_font->fontheight; 659 fb->wsd.capabilities = ri->ri_caps; 660 661 return 0; 662} 663 664/* 665 * Colormap handling routines. 666 */ 667 668void 669sisfb_loadcmap(struct sisfb *fb, int baseidx, int count) 670{ 671 uint8_t *cmap = fb->cmap + baseidx * 3; 672 673 bus_space_write_1(fb->iot, fb->ioh, DAC_ADDR, baseidx); 674 while (count-- != 0) { 675 bus_space_write_1(fb->iot, fb->ioh, DAC_DATA, *cmap++ >> 2); 676 bus_space_write_1(fb->iot, fb->ioh, DAC_DATA, *cmap++ >> 2); 677 bus_space_write_1(fb->iot, fb->ioh, DAC_DATA, *cmap++ >> 2); 678 } 679} 680 681int 682sisfb_getcmap(uint8_t *cmap, struct wsdisplay_cmap *cm) 683{ 684 uint index = cm->index, count = cm->count, i; 685 uint8_t ramp[256], *dst, *src; 686 int rc; 687 688 if (index >= 256 || count > 256 - index) 689 return EINVAL; 690 691 index *= 3; 692 693 src = cmap + index; 694 dst = ramp; 695 for (i = 0; i < count; i++) 696 *dst++ = *src, src += 3; 697 for (; i < sizeof(ramp); i++) 698 *dst++ = 0; 699 rc = copyout(ramp, cm->red, count); 700 if (rc != 0) 701 return rc; 702 703 src = cmap + index + 1; 704 dst = ramp; 705 for (i = 0; i < count; i++) 706 *dst++ = *src, src += 3; 707 rc = copyout(ramp, cm->green, count); 708 if (rc != 0) 709 return rc; 710 711 src = cmap + index + 2; 712 dst = ramp; 713 for (i = 0; i < count; i++) 714 *dst++ = *src, src += 3; 715 rc = copyout(ramp, cm->blue, count); 716 if (rc != 0) 717 return rc; 718 719 return 0; 720} 721 722int 723sisfb_putcmap(uint8_t *cmap, struct wsdisplay_cmap *cm) 724{ 725 uint index = cm->index, count = cm->count, i; 726 uint8_t ramp[256], *dst, *src; 727 int rc; 728 729 if (index >= 256 || count > 256 - index) 730 return EINVAL; 731 732 index *= 3; 733 734 rc = copyin(cm->red, ramp, count); 735 if (rc != 0) 736 return rc; 737 dst = cmap + index; 738 src = ramp; 739 for (i = 0; i < count; i++) 740 *dst = *src++, dst += 3; 741 742 rc = copyin(cm->green, ramp, count); 743 if (rc != 0) 744 return rc; 745 dst = cmap + index + 1; 746 src = ramp; 747 for (i = 0; i < count; i++) 748 *dst = *src++, dst += 3; 749 750 rc = copyin(cm->blue, ramp, count); 751 if (rc != 0) 752 return rc; 753 dst = cmap + index + 2; 754 src = ramp; 755 for (i = 0; i < count; i++) 756 *dst = *src++, dst += 3; 757 758 return 0; 759} 760 761/* 762 * Early console code 763 */ 764 765int 766sisfb_cnattach(bus_space_tag_t memt, bus_space_tag_t iot, 767 pci_chipset_tag_t pc, pcitag_t tag, pcireg_t id) 768{ 769 long defattr; 770 struct rasops_info * const ri = &sisfbcn.vcs.scr_ri; 771 int flags; 772 int rc; 773 774 /* filter out unrecognized devices */ 775 switch (id) { 776 default: 777 return ENODEV; 778 case PCI_ID_CODE(PCI_VENDOR_SIS, PCI_PRODUCT_SIS_315PRO_VGA): 779 break; 780 } 781 782 if (pci_mapreg_info(pc, tag, PCI_MAPREG_START, 783 PCI_MAPREG_TYPE_MEM, 784 &sisfbcn.fbbase, &sisfbcn.fbsize, &flags)) { 785 printf("sisfb can't map frame buffer\n"); 786 return ENODEV; 787 } 788 789 sisfbcn.fbt = memt; 790 rc = bus_space_map(memt, sisfbcn.fbbase, sisfbcn.fbsize, 791 BUS_SPACE_MAP_LINEAR, &sisfbcn.fbh); 792#ifdef SIS_DEBUG 793 printf("sisfb_cnattach(memt, 0x%x rc %d\n", PCI_MAPREG_MEM_ADDR(bar), rc); 794#endif 795 if (rc != 0) 796 return rc; 797 798 if (pci_mapreg_info(pc, tag, PCI_MAPREG_START + 4, 799 PCI_MAPREG_TYPE_MEM, 800 &sisfbcn.mmiobase, &sisfbcn.mmiosize, &flags)) { 801 printf("sisfb can't map mem space\n"); 802 return ENODEV; 803 } 804 sisfbcn.mmiot = memt; 805 rc = bus_space_map(memt, sisfbcn.mmiobase, sisfbcn.mmiosize, 806 BUS_SPACE_MAP_LINEAR, &sisfbcn.mmioh); 807#ifdef SIS_DEBUG 808 printf("sisfb_cnattach(memt2, 0x%x rc %d\n", PCI_MAPREG_MEM_ADDR(bar), rc); 809#endif 810 if (rc != 0) 811 return rc; 812 813 if (pci_mapreg_info(pc, tag, PCI_MAPREG_START + 8, 814 PCI_MAPREG_TYPE_IO, 815 &sisfbcn.iobase, &sisfbcn.iosize, &flags)) { 816 printf("sisfb can't map mem space\n"); 817 return ENODEV; 818 } 819 sisfbcn.iot = iot; 820 rc = bus_space_map(iot, sisfbcn.iobase, sisfbcn.iosize, 821 0, &sisfbcn.ioh); 822#ifdef SIS_DEBUG 823 printf("sisfb_cnattach(iot, 0x%x rc %d\n", PCI_MAPREG_MEM_ADDR(bar), rc); 824#endif 825 if (rc != 0) 826 return rc; 827 828 rc = sisfb_setup(&sisfbcn); 829#ifdef SIS_DEBUG 830 printf("sisfb_setup %d %p\n", rc, sisfbcn.vcs.scr_ri.ri_hw); 831#endif 832 if (rc != 0) 833 return rc; 834 835 ri->ri_ops.allocattr(ri, 0, ri->ri_rows - 1, 0, &defattr); 836 wsdisplay_preattach(&sisfbcn.wsd, ri, 0, 0, defattr); 837 838 return 0; 839} 840