1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright(c) 2021-2022 Intel Corporation 4 * 5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com> 6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com> 7 */ 8 9#ifndef __SOUND_SOC_INTEL_AVS_MSGS_H 10#define __SOUND_SOC_INTEL_AVS_MSGS_H 11 12#include <linux/sizes.h> 13 14struct avs_dev; 15 16#define AVS_MAILBOX_SIZE SZ_4K 17 18enum avs_msg_target { 19 AVS_FW_GEN_MSG = 0, 20 AVS_MOD_MSG = 1 21}; 22 23enum avs_msg_direction { 24 AVS_MSG_REQUEST = 0, 25 AVS_MSG_REPLY = 1 26}; 27 28enum avs_global_msg_type { 29 AVS_GLB_ROM_CONTROL = 1, 30 AVS_GLB_LOAD_MULTIPLE_MODULES = 15, 31 AVS_GLB_UNLOAD_MULTIPLE_MODULES = 16, 32 AVS_GLB_CREATE_PIPELINE = 17, 33 AVS_GLB_DELETE_PIPELINE = 18, 34 AVS_GLB_SET_PIPELINE_STATE = 19, 35 AVS_GLB_GET_PIPELINE_STATE = 20, 36 AVS_GLB_LOAD_LIBRARY = 24, 37 AVS_GLB_NOTIFICATION = 27, 38}; 39 40union avs_global_msg { 41 u64 val; 42 struct { 43 union { 44 u32 primary; 45 struct { 46 u32 rsvd:24; 47 u32 global_msg_type:5; 48 u32 msg_direction:1; 49 u32 msg_target:1; 50 }; 51 /* set boot config */ 52 struct { 53 u32 rom_ctrl_msg_type:9; 54 u32 dma_id:5; 55 u32 purge_request:1; 56 } boot_cfg; 57 /* module loading */ 58 struct { 59 u32 mod_cnt:8; 60 } load_multi_mods; 61 /* pipeline management */ 62 struct { 63 u32 ppl_mem_size:11; 64 u32 ppl_priority:5; 65 u32 instance_id:8; 66 } create_ppl; 67 struct { 68 u32 rsvd:16; 69 u32 instance_id:8; 70 } ppl; /* generic ppl request */ 71 struct { 72 u32 state:16; 73 u32 ppl_id:8; 74 } set_ppl_state; 75 struct { 76 u32 ppl_id:8; 77 } get_ppl_state; 78 /* library loading */ 79 struct { 80 u32 dma_id:5; 81 u32 rsvd:11; 82 u32 lib_id:4; 83 } load_lib; 84 }; 85 union { 86 u32 val; 87 /* pipeline management */ 88 struct { 89 u32 lp:1; /* low power flag */ 90 u32 rsvd:3; 91 u32 attributes:16; /* additional scheduling flags */ 92 } create_ppl; 93 } ext; 94 }; 95} __packed; 96static_assert(sizeof(union avs_global_msg) == 8); 97 98struct avs_tlv { 99 u32 type; 100 u32 length; 101 u32 value[]; 102} __packed; 103static_assert(sizeof(struct avs_tlv) == 8); 104 105enum avs_module_msg_type { 106 AVS_MOD_INIT_INSTANCE = 0, 107 AVS_MOD_LARGE_CONFIG_GET = 3, 108 AVS_MOD_LARGE_CONFIG_SET = 4, 109 AVS_MOD_BIND = 5, 110 AVS_MOD_UNBIND = 6, 111 AVS_MOD_SET_DX = 7, 112 AVS_MOD_SET_D0IX = 8, 113 AVS_MOD_DELETE_INSTANCE = 11, 114}; 115 116union avs_module_msg { 117 u64 val; 118 struct { 119 union { 120 u32 primary; 121 struct { 122 u32 module_id:16; 123 u32 instance_id:8; 124 u32 module_msg_type:5; 125 u32 msg_direction:1; 126 u32 msg_target:1; 127 }; 128 }; 129 union { 130 u32 val; 131 struct { 132 u32 param_block_size:16; 133 u32 ppl_instance_id:8; 134 u32 core_id:4; 135 u32 proc_domain:1; 136 } init_instance; 137 struct { 138 u32 data_off_size:20; 139 u32 large_param_id:8; 140 u32 final_block:1; 141 u32 init_block:1; 142 } large_config; 143 struct { 144 u32 dst_module_id:16; 145 u32 dst_instance_id:8; 146 u32 dst_queue:3; 147 u32 src_queue:3; 148 } bind_unbind; 149 struct { 150 /* pre-IceLake */ 151 u32 wake:1; 152 u32 streaming:1; 153 /* IceLake and onwards */ 154 u32 prevent_pg:1; 155 u32 prevent_local_cg:1; 156 } set_d0ix; 157 } ext; 158 }; 159} __packed; 160static_assert(sizeof(union avs_module_msg) == 8); 161 162#define AVS_IPC_NOT_SUPPORTED 15 163 164union avs_reply_msg { 165 u64 val; 166 struct { 167 union { 168 u32 primary; 169 struct { 170 u32 status:24; 171 u32 global_msg_type:5; 172 u32 msg_direction:1; 173 u32 msg_target:1; 174 }; 175 }; 176 union { 177 u32 val; 178 /* module loading */ 179 struct { 180 u32 err_mod_id:16; 181 } load_multi_mods; 182 /* pipeline management */ 183 struct { 184 u32 state:5; 185 } get_ppl_state; 186 /* module management */ 187 struct { 188 u32 data_off_size:20; 189 u32 large_param_id:8; 190 u32 final_block:1; 191 u32 init_block:1; 192 } large_config; 193 } ext; 194 }; 195} __packed; 196static_assert(sizeof(union avs_reply_msg) == 8); 197 198enum avs_notify_msg_type { 199 AVS_NOTIFY_PHRASE_DETECTED = 4, 200 AVS_NOTIFY_RESOURCE_EVENT = 5, 201 AVS_NOTIFY_LOG_BUFFER_STATUS = 6, 202 AVS_NOTIFY_FW_READY = 8, 203 AVS_NOTIFY_EXCEPTION_CAUGHT = 10, 204 AVS_NOTIFY_MODULE_EVENT = 12, 205}; 206 207union avs_notify_msg { 208 u64 val; 209 struct { 210 union { 211 u32 primary; 212 struct { 213 u32 rsvd:16; 214 u32 notify_msg_type:8; 215 u32 global_msg_type:5; 216 u32 msg_direction:1; 217 u32 msg_target:1; 218 }; 219 struct { 220 u16 rsvd:12; 221 u16 core:4; 222 } log; 223 }; 224 union { 225 u32 val; 226 struct { 227 u32 core_id:2; 228 u32 stack_dump_size:16; 229 } coredump; 230 } ext; 231 }; 232} __packed; 233static_assert(sizeof(union avs_notify_msg) == 8); 234 235#define AVS_MSG(hdr) { .val = hdr } 236 237#define AVS_GLOBAL_REQUEST(msg_type) \ 238{ \ 239 .global_msg_type = AVS_GLB_##msg_type, \ 240 .msg_direction = AVS_MSG_REQUEST, \ 241 .msg_target = AVS_FW_GEN_MSG, \ 242} 243 244#define AVS_MODULE_REQUEST(msg_type) \ 245{ \ 246 .module_msg_type = AVS_MOD_##msg_type, \ 247 .msg_direction = AVS_MSG_REQUEST, \ 248 .msg_target = AVS_MOD_MSG, \ 249} 250 251#define AVS_NOTIFICATION(msg_type) \ 252{ \ 253 .notify_msg_type = AVS_NOTIFY_##msg_type,\ 254 .global_msg_type = AVS_GLB_NOTIFICATION,\ 255 .msg_direction = AVS_MSG_REPLY, \ 256 .msg_target = AVS_FW_GEN_MSG, \ 257} 258 259#define avs_msg_is_reply(hdr) \ 260({ \ 261 union avs_reply_msg __msg = AVS_MSG(hdr); \ 262 __msg.msg_direction == AVS_MSG_REPLY && \ 263 __msg.global_msg_type != AVS_GLB_NOTIFICATION; \ 264}) 265 266/* Notification types */ 267 268struct avs_notify_voice_data { 269 u16 kpd_score; 270 u16 reserved; 271} __packed; 272static_assert(sizeof(struct avs_notify_voice_data) == 4); 273 274struct avs_notify_res_data { 275 u32 resource_type; 276 u32 resource_id; 277 u32 event_type; 278 u32 reserved; 279 u32 data[6]; 280} __packed; 281static_assert(sizeof(struct avs_notify_res_data) == 40); 282 283struct avs_notify_mod_data { 284 u32 module_instance_id; 285 u32 event_id; 286 u32 data_size; 287 u32 data[]; 288} __packed; 289static_assert(sizeof(struct avs_notify_mod_data) == 12); 290 291/* ROM messages */ 292enum avs_rom_control_msg_type { 293 AVS_ROM_SET_BOOT_CONFIG = 0, 294}; 295 296int avs_ipc_set_boot_config(struct avs_dev *adev, u32 dma_id, u32 purge); 297 298/* Code loading messages */ 299int avs_ipc_load_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids); 300int avs_ipc_unload_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids); 301int avs_ipc_load_library(struct avs_dev *adev, u32 dma_id, u32 lib_id); 302 303/* Pipeline management messages */ 304enum avs_pipeline_state { 305 AVS_PPL_STATE_INVALID, 306 AVS_PPL_STATE_UNINITIALIZED, 307 AVS_PPL_STATE_RESET, 308 AVS_PPL_STATE_PAUSED, 309 AVS_PPL_STATE_RUNNING, 310}; 311 312int avs_ipc_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority, 313 u8 instance_id, bool lp, u16 attributes); 314int avs_ipc_delete_pipeline(struct avs_dev *adev, u8 instance_id); 315int avs_ipc_set_pipeline_state(struct avs_dev *adev, u8 instance_id, 316 enum avs_pipeline_state state); 317int avs_ipc_get_pipeline_state(struct avs_dev *adev, u8 instance_id, 318 enum avs_pipeline_state *state); 319 320/* Module management messages */ 321int avs_ipc_init_instance(struct avs_dev *adev, u16 module_id, u8 instance_id, 322 u8 ppl_id, u8 core_id, u8 domain, 323 void *param, u32 param_size); 324int avs_ipc_delete_instance(struct avs_dev *adev, u16 module_id, u8 instance_id); 325int avs_ipc_bind(struct avs_dev *adev, u16 module_id, u8 instance_id, 326 u16 dst_module_id, u8 dst_instance_id, 327 u8 dst_queue, u8 src_queue); 328int avs_ipc_unbind(struct avs_dev *adev, u16 module_id, u8 instance_id, 329 u16 dst_module_id, u8 dst_instance_id, 330 u8 dst_queue, u8 src_queue); 331int avs_ipc_set_large_config(struct avs_dev *adev, u16 module_id, 332 u8 instance_id, u8 param_id, 333 u8 *request, size_t request_size); 334int avs_ipc_get_large_config(struct avs_dev *adev, u16 module_id, u8 instance_id, 335 u8 param_id, u8 *request_data, size_t request_size, 336 u8 **reply_data, size_t *reply_size); 337 338/* DSP cores and domains power management messages */ 339struct avs_dxstate_info { 340 u32 core_mask; /* which cores are subject for power transition */ 341 u32 dx_mask; /* bit[n]=1 core n goes to D0, bit[n]=0 it goes to D3 */ 342} __packed; 343static_assert(sizeof(struct avs_dxstate_info) == 8); 344 345int avs_ipc_set_dx(struct avs_dev *adev, u32 core_mask, bool powerup); 346int avs_ipc_set_d0ix(struct avs_dev *adev, bool enable_pg, bool streaming); 347 348/* Base-firmware runtime parameters */ 349 350#define AVS_BASEFW_MOD_ID 0 351#define AVS_BASEFW_INST_ID 0 352 353enum avs_basefw_runtime_param { 354 AVS_BASEFW_ENABLE_LOGS = 6, 355 AVS_BASEFW_FIRMWARE_CONFIG = 7, 356 AVS_BASEFW_HARDWARE_CONFIG = 8, 357 AVS_BASEFW_MODULES_INFO = 9, 358 AVS_BASEFW_LIBRARIES_INFO = 16, 359 AVS_BASEFW_SYSTEM_TIME = 20, 360}; 361 362enum avs_log_enable { 363 AVS_LOG_DISABLE = 0, 364 AVS_LOG_ENABLE = 1 365}; 366 367enum avs_skl_log_priority { 368 AVS_SKL_LOG_CRITICAL = 1, 369 AVS_SKL_LOG_HIGH, 370 AVS_SKL_LOG_MEDIUM, 371 AVS_SKL_LOG_LOW, 372 AVS_SKL_LOG_VERBOSE, 373}; 374 375struct avs_skl_log_state { 376 u32 enable; 377 u32 min_priority; 378} __packed; 379static_assert(sizeof(struct avs_skl_log_state) == 8); 380 381struct avs_skl_log_state_info { 382 u32 core_mask; 383 struct avs_skl_log_state logs_core[]; 384} __packed; 385static_assert(sizeof(struct avs_skl_log_state_info) == 4); 386 387struct avs_apl_log_state_info { 388 u32 aging_timer_period; 389 u32 fifo_full_timer_period; 390 u32 core_mask; 391 struct avs_skl_log_state logs_core[]; 392} __packed; 393static_assert(sizeof(struct avs_apl_log_state_info) == 12); 394 395enum avs_icl_log_priority { 396 AVS_ICL_LOG_CRITICAL = 0, 397 AVS_ICL_LOG_HIGH, 398 AVS_ICL_LOG_MEDIUM, 399 AVS_ICL_LOG_LOW, 400 AVS_ICL_LOG_VERBOSE, 401}; 402 403enum avs_icl_log_source { 404 AVS_ICL_LOG_INFRA = 0, 405 AVS_ICL_LOG_HAL, 406 AVS_ICL_LOG_MODULE, 407 AVS_ICL_LOG_AUDIO, 408 AVS_ICL_LOG_SENSING, 409 AVS_ICL_LOG_ULP_INFRA, 410}; 411 412struct avs_icl_log_state_info { 413 u32 aging_timer_period; 414 u32 fifo_full_timer_period; 415 u32 enable; 416 u32 logs_priorities_mask[]; 417} __packed; 418static_assert(sizeof(struct avs_icl_log_state_info) == 12); 419 420int avs_ipc_set_enable_logs(struct avs_dev *adev, u8 *log_info, size_t size); 421 422struct avs_fw_version { 423 u16 major; 424 u16 minor; 425 u16 hotfix; 426 u16 build; 427}; 428 429enum avs_fw_cfg_params { 430 AVS_FW_CFG_FW_VERSION = 0, 431 AVS_FW_CFG_MEMORY_RECLAIMED, 432 AVS_FW_CFG_SLOW_CLOCK_FREQ_HZ, 433 AVS_FW_CFG_FAST_CLOCK_FREQ_HZ, 434 AVS_FW_CFG_DMA_BUFFER_CONFIG, 435 AVS_FW_CFG_ALH_SUPPORT_LEVEL, 436 AVS_FW_CFG_IPC_DL_MAILBOX_BYTES, 437 AVS_FW_CFG_IPC_UL_MAILBOX_BYTES, 438 AVS_FW_CFG_TRACE_LOG_BYTES, 439 AVS_FW_CFG_MAX_PPL_COUNT, 440 AVS_FW_CFG_MAX_ASTATE_COUNT, 441 AVS_FW_CFG_MAX_MODULE_PIN_COUNT, 442 AVS_FW_CFG_MODULES_COUNT, 443 AVS_FW_CFG_MAX_MOD_INST_COUNT, 444 AVS_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT, 445 AVS_FW_CFG_LL_PRI_COUNT, 446 AVS_FW_CFG_MAX_DP_TASKS_COUNT, 447 AVS_FW_CFG_MAX_LIBS_COUNT, 448 AVS_FW_CFG_SCHEDULER_CONFIG, 449 AVS_FW_CFG_XTAL_FREQ_HZ, 450 AVS_FW_CFG_CLOCKS_CONFIG, 451 AVS_FW_CFG_RESERVED, 452 AVS_FW_CFG_POWER_GATING_POLICY, 453 AVS_FW_CFG_ASSERT_MODE, 454}; 455 456struct avs_fw_cfg { 457 struct avs_fw_version fw_version; 458 u32 memory_reclaimed; 459 u32 slow_clock_freq_hz; 460 u32 fast_clock_freq_hz; 461 u32 alh_support; 462 u32 ipc_dl_mailbox_bytes; 463 u32 ipc_ul_mailbox_bytes; 464 u32 trace_log_bytes; 465 u32 max_ppl_count; 466 u32 max_astate_count; 467 u32 max_module_pin_count; 468 u32 modules_count; 469 u32 max_mod_inst_count; 470 u32 max_ll_tasks_per_pri_count; 471 u32 ll_pri_count; 472 u32 max_dp_tasks_count; 473 u32 max_libs_count; 474 u32 xtal_freq_hz; 475 u32 power_gating_policy; 476}; 477 478int avs_ipc_get_fw_config(struct avs_dev *adev, struct avs_fw_cfg *cfg); 479 480enum avs_hw_cfg_params { 481 AVS_HW_CFG_AVS_VER, 482 AVS_HW_CFG_DSP_CORES, 483 AVS_HW_CFG_MEM_PAGE_BYTES, 484 AVS_HW_CFG_TOTAL_PHYS_MEM_PAGES, 485 AVS_HW_CFG_I2S_CAPS, 486 AVS_HW_CFG_GPDMA_CAPS, 487 AVS_HW_CFG_GATEWAY_COUNT, 488 AVS_HW_CFG_HP_EBB_COUNT, 489 AVS_HW_CFG_LP_EBB_COUNT, 490 AVS_HW_CFG_EBB_SIZE_BYTES, 491}; 492 493enum avs_iface_version { 494 AVS_AVS_VER_1_5 = 0x10005, 495 AVS_AVS_VER_1_8 = 0x10008, 496}; 497 498enum avs_i2s_version { 499 AVS_I2S_VER_15_SKYLAKE = 0x00000, 500 AVS_I2S_VER_15_BROXTON = 0x10000, 501 AVS_I2S_VER_15_BROXTON_P = 0x20000, 502 AVS_I2S_VER_18_KBL_CNL = 0x30000, 503}; 504 505struct avs_i2s_caps { 506 u32 i2s_version; 507 u32 ctrl_count; 508 u32 *ctrl_base_addr; 509}; 510 511struct avs_hw_cfg { 512 u32 avs_version; 513 u32 dsp_cores; 514 u32 mem_page_bytes; 515 u32 total_phys_mem_pages; 516 struct avs_i2s_caps i2s_caps; 517 u32 gateway_count; 518 u32 hp_ebb_count; 519 u32 lp_ebb_count; 520 u32 ebb_size_bytes; 521}; 522 523int avs_ipc_get_hw_config(struct avs_dev *adev, struct avs_hw_cfg *cfg); 524 525#define AVS_MODULE_LOAD_TYPE_BUILTIN 0 526#define AVS_MODULE_LOAD_TYPE_LOADABLE 1 527#define AVS_MODULE_STATE_LOADED BIT(0) 528 529struct avs_module_type { 530 u32 load_type:4; 531 u32 auto_start:1; 532 u32 domain_ll:1; 533 u32 domain_dp:1; 534 u32 lib_code:1; 535 u32 rsvd:24; 536} __packed; 537static_assert(sizeof(struct avs_module_type) == 4); 538 539union avs_segment_flags { 540 u32 ul; 541 struct { 542 u32 contents:1; 543 u32 alloc:1; 544 u32 load:1; 545 u32 readonly:1; 546 u32 code:1; 547 u32 data:1; 548 u32 rsvd_1:2; 549 u32 type:4; 550 u32 rsvd_2:4; 551 u32 length:16; 552 }; 553} __packed; 554static_assert(sizeof(union avs_segment_flags) == 4); 555 556struct avs_segment_desc { 557 union avs_segment_flags flags; 558 u32 v_base_addr; 559 u32 file_offset; 560} __packed; 561static_assert(sizeof(struct avs_segment_desc) == 12); 562 563struct avs_module_entry { 564 u16 module_id; 565 u16 state_flags; 566 u8 name[8]; 567 guid_t uuid; 568 struct avs_module_type type; 569 u8 hash[32]; 570 u32 entry_point; 571 u16 cfg_offset; 572 u16 cfg_count; 573 u32 affinity_mask; 574 u16 instance_max_count; 575 u16 instance_bss_size; 576 struct avs_segment_desc segments[3]; 577} __packed; 578static_assert(sizeof(struct avs_module_entry) == 116); 579 580struct avs_mods_info { 581 u32 count; 582 struct avs_module_entry entries[]; 583} __packed; 584static_assert(sizeof(struct avs_mods_info) == 4); 585 586static inline bool avs_module_entry_is_loaded(struct avs_module_entry *mentry) 587{ 588 return mentry->type.load_type == AVS_MODULE_LOAD_TYPE_BUILTIN || 589 mentry->state_flags & AVS_MODULE_STATE_LOADED; 590} 591 592int avs_ipc_get_modules_info(struct avs_dev *adev, struct avs_mods_info **info); 593 594struct avs_sys_time { 595 u32 val_l; 596 u32 val_u; 597} __packed; 598static_assert(sizeof(struct avs_sys_time) == 8); 599 600int avs_ipc_set_system_time(struct avs_dev *adev); 601 602/* Module configuration */ 603 604#define AVS_MIXIN_MOD_UUID \ 605 GUID_INIT(0x39656EB2, 0x3B71, 0x4049, 0x8D, 0x3F, 0xF9, 0x2C, 0xD5, 0xC4, 0x3C, 0x09) 606 607#define AVS_MIXOUT_MOD_UUID \ 608 GUID_INIT(0x3C56505A, 0x24D7, 0x418F, 0xBD, 0xDC, 0xC1, 0xF5, 0xA3, 0xAC, 0x2A, 0xE0) 609 610#define AVS_COPIER_MOD_UUID \ 611 GUID_INIT(0x9BA00C83, 0xCA12, 0x4A83, 0x94, 0x3C, 0x1F, 0xA2, 0xE8, 0x2F, 0x9D, 0xDA) 612 613#define AVS_PEAKVOL_MOD_UUID \ 614 GUID_INIT(0x8A171323, 0x94A3, 0x4E1D, 0xAF, 0xE9, 0xFE, 0x5D, 0xBA, 0xa4, 0xC3, 0x93) 615 616#define AVS_GAIN_MOD_UUID \ 617 GUID_INIT(0x61BCA9A8, 0x18D0, 0x4A18, 0x8E, 0x7B, 0x26, 0x39, 0x21, 0x98, 0x04, 0xB7) 618 619#define AVS_KPBUFF_MOD_UUID \ 620 GUID_INIT(0xA8A0CB32, 0x4A77, 0x4DB1, 0x85, 0xC7, 0x53, 0xD7, 0xEE, 0x07, 0xBC, 0xE6) 621 622#define AVS_MICSEL_MOD_UUID \ 623 GUID_INIT(0x32FE92C1, 0x1E17, 0x4FC2, 0x97, 0x58, 0xC7, 0xF3, 0x54, 0x2E, 0x98, 0x0A) 624 625#define AVS_MUX_MOD_UUID \ 626 GUID_INIT(0x64CE6E35, 0x857A, 0x4878, 0xAC, 0xE8, 0xE2, 0xA2, 0xF4, 0x2e, 0x30, 0x69) 627 628#define AVS_UPDWMIX_MOD_UUID \ 629 GUID_INIT(0x42F8060C, 0x832F, 0x4DBF, 0xB2, 0x47, 0x51, 0xE9, 0x61, 0x99, 0x7b, 0x35) 630 631#define AVS_SRCINTC_MOD_UUID \ 632 GUID_INIT(0xE61BB28D, 0x149A, 0x4C1F, 0xB7, 0x09, 0x46, 0x82, 0x3E, 0xF5, 0xF5, 0xAE) 633 634#define AVS_PROBE_MOD_UUID \ 635 GUID_INIT(0x7CAD0808, 0xAB10, 0xCD23, 0xEF, 0x45, 0x12, 0xAB, 0x34, 0xCD, 0x56, 0xEF) 636 637#define AVS_AEC_MOD_UUID \ 638 GUID_INIT(0x46CB87FB, 0xD2C9, 0x4970, 0x96, 0xD2, 0x6D, 0x7E, 0x61, 0x4B, 0xB6, 0x05) 639 640#define AVS_ASRC_MOD_UUID \ 641 GUID_INIT(0x66B4402D, 0xB468, 0x42F2, 0x81, 0xA7, 0xB3, 0x71, 0x21, 0x86, 0x3D, 0xD4) 642 643#define AVS_INTELWOV_MOD_UUID \ 644 GUID_INIT(0xEC774FA9, 0x28D3, 0x424A, 0x90, 0xE4, 0x69, 0xF9, 0x84, 0xF1, 0xEE, 0xB7) 645 646/* channel map */ 647enum avs_channel_index { 648 AVS_CHANNEL_LEFT = 0, 649 AVS_CHANNEL_RIGHT = 1, 650 AVS_CHANNEL_CENTER = 2, 651 AVS_CHANNEL_LEFT_SURROUND = 3, 652 AVS_CHANNEL_CENTER_SURROUND = 3, 653 AVS_CHANNEL_RIGHT_SURROUND = 4, 654 AVS_CHANNEL_LFE = 7, 655 AVS_CHANNEL_INVALID = 0xF, 656}; 657 658enum avs_channel_config { 659 AVS_CHANNEL_CONFIG_MONO = 0, 660 AVS_CHANNEL_CONFIG_STEREO = 1, 661 AVS_CHANNEL_CONFIG_2_1 = 2, 662 AVS_CHANNEL_CONFIG_3_0 = 3, 663 AVS_CHANNEL_CONFIG_3_1 = 4, 664 AVS_CHANNEL_CONFIG_QUATRO = 5, 665 AVS_CHANNEL_CONFIG_4_0 = 6, 666 AVS_CHANNEL_CONFIG_5_0 = 7, 667 AVS_CHANNEL_CONFIG_5_1 = 8, 668 AVS_CHANNEL_CONFIG_DUAL_MONO = 9, 669 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_0 = 10, 670 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_1 = 11, 671 AVS_CHANNEL_CONFIG_7_1 = 12, 672 AVS_CHANNEL_CONFIG_INVALID 673}; 674 675enum avs_interleaving { 676 AVS_INTERLEAVING_PER_CHANNEL = 0, 677 AVS_INTERLEAVING_PER_SAMPLE = 1, 678}; 679 680enum avs_sample_type { 681 AVS_SAMPLE_TYPE_INT_MSB = 0, 682 AVS_SAMPLE_TYPE_INT_LSB = 1, 683 AVS_SAMPLE_TYPE_INT_SIGNED = 2, 684 AVS_SAMPLE_TYPE_INT_UNSIGNED = 3, 685 AVS_SAMPLE_TYPE_FLOAT = 4, 686}; 687 688#define AVS_CHANNELS_MAX 8 689#define AVS_ALL_CHANNELS_MASK UINT_MAX 690 691struct avs_audio_format { 692 u32 sampling_freq; 693 u32 bit_depth; 694 u32 channel_map; 695 u32 channel_config; 696 u32 interleaving; 697 u32 num_channels:8; 698 u32 valid_bit_depth:8; 699 u32 sample_type:8; 700 u32 reserved:8; 701} __packed; 702static_assert(sizeof(struct avs_audio_format) == 24); 703 704struct avs_modcfg_base { 705 u32 cpc; 706 u32 ibs; 707 u32 obs; 708 u32 is_pages; 709 struct avs_audio_format audio_fmt; 710} __packed; 711static_assert(sizeof(struct avs_modcfg_base) == 40); 712 713struct avs_pin_format { 714 u32 pin_index; 715 u32 iobs; 716 struct avs_audio_format audio_fmt; 717} __packed; 718static_assert(sizeof(struct avs_pin_format) == 32); 719 720struct avs_modcfg_ext { 721 struct avs_modcfg_base base; 722 u16 num_input_pins; 723 u16 num_output_pins; 724 u8 reserved[12]; 725 /* input pin formats followed by output ones */ 726 struct avs_pin_format pin_fmts[]; 727} __packed; 728static_assert(sizeof(struct avs_modcfg_ext) == 56); 729 730enum avs_dma_type { 731 AVS_DMA_HDA_HOST_OUTPUT = 0, 732 AVS_DMA_HDA_HOST_INPUT = 1, 733 AVS_DMA_HDA_LINK_OUTPUT = 8, 734 AVS_DMA_HDA_LINK_INPUT = 9, 735 AVS_DMA_DMIC_LINK_INPUT = 11, 736 AVS_DMA_I2S_LINK_OUTPUT = 12, 737 AVS_DMA_I2S_LINK_INPUT = 13, 738}; 739 740union avs_virtual_index { 741 u8 val; 742 struct { 743 u8 time_slot:4; 744 u8 instance:4; 745 } i2s; 746 struct { 747 u8 queue_id:3; 748 u8 time_slot:2; 749 u8 instance:3; 750 } dmic; 751} __packed; 752static_assert(sizeof(union avs_virtual_index) == 1); 753 754union avs_connector_node_id { 755 u32 val; 756 struct { 757 u32 vindex:8; 758 u32 dma_type:5; 759 u32 rsvd:19; 760 }; 761} __packed; 762static_assert(sizeof(union avs_connector_node_id) == 4); 763 764#define INVALID_PIPELINE_ID 0xFF 765#define INVALID_NODE_ID \ 766 ((union avs_connector_node_id) { UINT_MAX }) 767 768union avs_gtw_attributes { 769 u32 val; 770 struct { 771 u32 lp_buffer_alloc:1; 772 u32 rsvd:31; 773 }; 774} __packed; 775static_assert(sizeof(union avs_gtw_attributes) == 4); 776 777struct avs_copier_gtw_cfg { 778 union avs_connector_node_id node_id; 779 u32 dma_buffer_size; 780 u32 config_length; 781 union { 782 union avs_gtw_attributes attrs; 783 DECLARE_FLEX_ARRAY(u32, blob); 784 } config; 785} __packed; 786static_assert(sizeof(struct avs_copier_gtw_cfg) == 16); 787 788struct avs_copier_cfg { 789 struct avs_modcfg_base base; 790 struct avs_audio_format out_fmt; 791 u32 feature_mask; 792 struct avs_copier_gtw_cfg gtw_cfg; 793} __packed; 794static_assert(sizeof(struct avs_copier_cfg) == 84); 795 796struct avs_volume_cfg { 797 u32 channel_id; 798 u32 target_volume; 799 u32 curve_type; 800 u32 reserved; /* alignment */ 801 u64 curve_duration; 802} __packed; 803static_assert(sizeof(struct avs_volume_cfg) == 24); 804 805struct avs_peakvol_cfg { 806 struct avs_modcfg_base base; 807 struct avs_volume_cfg vols[]; 808} __packed; 809static_assert(sizeof(struct avs_peakvol_cfg) == 40); 810 811struct avs_micsel_cfg { 812 struct avs_modcfg_base base; 813 struct avs_audio_format out_fmt; 814} __packed; 815static_assert(sizeof(struct avs_micsel_cfg) == 64); 816 817struct avs_mux_cfg { 818 struct avs_modcfg_base base; 819 struct avs_audio_format ref_fmt; 820 struct avs_audio_format out_fmt; 821} __packed; 822static_assert(sizeof(struct avs_mux_cfg) == 88); 823 824struct avs_updown_mixer_cfg { 825 struct avs_modcfg_base base; 826 u32 out_channel_config; 827 u32 coefficients_select; 828 s32 coefficients[AVS_CHANNELS_MAX]; 829 u32 channel_map; 830} __packed; 831static_assert(sizeof(struct avs_updown_mixer_cfg) == 84); 832 833struct avs_src_cfg { 834 struct avs_modcfg_base base; 835 u32 out_freq; 836} __packed; 837static_assert(sizeof(struct avs_src_cfg) == 44); 838 839struct avs_probe_gtw_cfg { 840 union avs_connector_node_id node_id; 841 u32 dma_buffer_size; 842} __packed; 843static_assert(sizeof(struct avs_probe_gtw_cfg) == 8); 844 845struct avs_probe_cfg { 846 struct avs_modcfg_base base; 847 struct avs_probe_gtw_cfg gtw_cfg; 848} __packed; 849static_assert(sizeof(struct avs_probe_cfg) == 48); 850 851struct avs_aec_cfg { 852 struct avs_modcfg_base base; 853 struct avs_audio_format ref_fmt; 854 struct avs_audio_format out_fmt; 855 u32 cpc_lp_mode; 856} __packed; 857static_assert(sizeof(struct avs_aec_cfg) == 92); 858 859struct avs_asrc_cfg { 860 struct avs_modcfg_base base; 861 u32 out_freq; 862 u32 rsvd0:1; 863 u32 mode:1; 864 u32 rsvd2:2; 865 u32 disable_jitter_buffer:1; 866 u32 rsvd3:27; 867} __packed; 868static_assert(sizeof(struct avs_asrc_cfg) == 48); 869 870struct avs_wov_cfg { 871 struct avs_modcfg_base base; 872 u32 cpc_lp_mode; 873} __packed; 874static_assert(sizeof(struct avs_wov_cfg) == 44); 875 876/* Module runtime parameters */ 877 878enum avs_copier_runtime_param { 879 AVS_COPIER_SET_SINK_FORMAT = 2, 880}; 881 882struct avs_copier_sink_format { 883 u32 sink_id; 884 struct avs_audio_format src_fmt; 885 struct avs_audio_format sink_fmt; 886} __packed; 887static_assert(sizeof(struct avs_copier_sink_format) == 52); 888 889int avs_ipc_copier_set_sink_format(struct avs_dev *adev, u16 module_id, 890 u8 instance_id, u32 sink_id, 891 const struct avs_audio_format *src_fmt, 892 const struct avs_audio_format *sink_fmt); 893 894enum avs_peakvol_runtime_param { 895 AVS_PEAKVOL_VOLUME = 0, 896}; 897 898enum avs_audio_curve_type { 899 AVS_AUDIO_CURVE_NONE = 0, 900 AVS_AUDIO_CURVE_WINDOWS_FADE = 1, 901}; 902 903int avs_ipc_peakvol_set_volume(struct avs_dev *adev, u16 module_id, u8 instance_id, 904 struct avs_volume_cfg *vol); 905int avs_ipc_peakvol_get_volume(struct avs_dev *adev, u16 module_id, u8 instance_id, 906 struct avs_volume_cfg **vols, size_t *num_vols); 907 908#define AVS_PROBE_INST_ID 0 909 910enum avs_probe_runtime_param { 911 AVS_PROBE_INJECTION_DMA = 1, 912 AVS_PROBE_INJECTION_DMA_DETACH, 913 AVS_PROBE_POINTS, 914 AVS_PROBE_POINTS_DISCONNECT, 915}; 916 917struct avs_probe_dma { 918 union avs_connector_node_id node_id; 919 u32 dma_buffer_size; 920} __packed; 921static_assert(sizeof(struct avs_probe_dma) == 8); 922 923enum avs_probe_type { 924 AVS_PROBE_TYPE_INPUT = 0, 925 AVS_PROBE_TYPE_OUTPUT, 926 AVS_PROBE_TYPE_INTERNAL 927}; 928 929union avs_probe_point_id { 930 u32 value; 931 struct { 932 u32 module_id:16; 933 u32 instance_id:8; 934 u32 type:2; 935 u32 index:6; 936 } id; 937} __packed; 938static_assert(sizeof(union avs_probe_point_id) == 4); 939 940enum avs_connection_purpose { 941 AVS_CONNECTION_PURPOSE_EXTRACT = 0, 942 AVS_CONNECTION_PURPOSE_INJECT, 943 AVS_CONNECTION_PURPOSE_INJECT_REEXTRACT, 944}; 945 946struct avs_probe_point_desc { 947 union avs_probe_point_id id; 948 u32 purpose; 949 union avs_connector_node_id node_id; 950} __packed; 951static_assert(sizeof(struct avs_probe_point_desc) == 12); 952 953int avs_ipc_probe_get_dma(struct avs_dev *adev, struct avs_probe_dma **dmas, size_t *num_dmas); 954int avs_ipc_probe_attach_dma(struct avs_dev *adev, struct avs_probe_dma *dmas, size_t num_dmas); 955int avs_ipc_probe_detach_dma(struct avs_dev *adev, union avs_connector_node_id *node_ids, 956 size_t num_node_ids); 957int avs_ipc_probe_get_points(struct avs_dev *adev, struct avs_probe_point_desc **descs, 958 size_t *num_descs); 959int avs_ipc_probe_connect_points(struct avs_dev *adev, struct avs_probe_point_desc *descs, 960 size_t num_descs); 961int avs_ipc_probe_disconnect_points(struct avs_dev *adev, union avs_probe_point_id *ids, 962 size_t num_ids); 963 964#endif /* __SOUND_SOC_INTEL_AVS_MSGS_H */ 965