1246122Shselasky// SPDX-License-Identifier: GPL-2.0 2230424Shselasky/* 3287271Shselasky * Intel Jasper Lake PCH pinctrl/GPIO driver 4287271Shselasky * 5240279Shselasky * Copyright (C) 2020, Intel Corporation 6230424Shselasky * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 7230424Shselasky */ 8230424Shselasky 9230424Shselasky#include <linux/mod_devicetable.h> 10230424Shselasky#include <linux/module.h> 11230424Shselasky#include <linux/platform_device.h> 12230424Shselasky#include <linux/pm.h> 13230424Shselasky 14230424Shselasky#include <linux/pinctrl/pinctrl.h> 15230424Shselasky 16230424Shselasky#include "pinctrl-intel.h" 17230424Shselasky 18230424Shselasky#define JSL_PAD_OWN 0x020 19230424Shselasky#define JSL_PADCFGLOCK 0x080 20230424Shselasky#define JSL_HOSTSW_OWN 0x0c0 21230424Shselasky#define JSL_GPI_IS 0x100 22230424Shselasky#define JSL_GPI_IE 0x120 23230424Shselasky 24230424Shselasky#define JSL_GPP(r, s, e, g) \ 25230424Shselasky { \ 26230424Shselasky .reg_num = (r), \ 27230424Shselasky .base = (s), \ 28230424Shselasky .size = ((e) - (s) + 1), \ 29230424Shselasky .gpio_base = (g), \ 30230424Shselasky } 31240279Shselasky 32230424Shselasky#define JSL_COMMUNITY(b, s, e, g) \ 33230424Shselasky INTEL_COMMUNITY_GPPS(b, s, e, g, JSL) 34230424Shselasky 35230424Shselasky/* Jasper Lake */ 36230424Shselaskystatic const struct pinctrl_pin_desc jsl_pins[] = { 37230424Shselasky /* GPP_F */ 38230424Shselasky PINCTRL_PIN(0, "CNV_BRI_DT_UART0_RTSB"), 39230424Shselasky PINCTRL_PIN(1, "CNV_BRI_RSP_UART0_RXD"), 40230424Shselasky PINCTRL_PIN(2, "EMMC_HIP_MON"), 41230424Shselasky PINCTRL_PIN(3, "CNV_RGI_RSP_UART0_CTSB"), 42230424Shselasky PINCTRL_PIN(4, "CNV_RF_RESET_B"), 43230424Shselasky PINCTRL_PIN(5, "MODEM_CLKREQ"), 44230424Shselasky PINCTRL_PIN(6, "CNV_PA_BLANKING"), 45230424Shselasky PINCTRL_PIN(7, "EMMC_CMD"), 46246122Shselasky PINCTRL_PIN(8, "EMMC_DATA0"), 47246122Shselasky PINCTRL_PIN(9, "EMMC_DATA1"), 48246122Shselasky PINCTRL_PIN(10, "EMMC_DATA2"), 49230424Shselasky PINCTRL_PIN(11, "EMMC_DATA3"), 50230424Shselasky PINCTRL_PIN(12, "EMMC_DATA4"), 51230424Shselasky PINCTRL_PIN(13, "EMMC_DATA5"), 52230424Shselasky PINCTRL_PIN(14, "EMMC_DATA6"), 53230424Shselasky PINCTRL_PIN(15, "EMMC_DATA7"), 54230424Shselasky PINCTRL_PIN(16, "EMMC_RCLK"), 55230424Shselasky PINCTRL_PIN(17, "EMMC_CLK"), 56230424Shselasky PINCTRL_PIN(18, "EMMC_RESETB"), 57230424Shselasky PINCTRL_PIN(19, "A4WP_PRESENT"), 58230424Shselasky /* SPI */ 59230424Shselasky PINCTRL_PIN(20, "SPI0_IO_2"), 60230424Shselasky PINCTRL_PIN(21, "SPI0_IO_3"), 61230424Shselasky PINCTRL_PIN(22, "SPI0_MOSI_IO_0"), 62230424Shselasky PINCTRL_PIN(23, "SPI0_MISO_IO_1"), 63230424Shselasky PINCTRL_PIN(24, "SPI0_TPM_CSB"), 64230424Shselasky PINCTRL_PIN(25, "SPI0_FLASH_0_CSB"), 65230424Shselasky PINCTRL_PIN(26, "SPI0_FLASH_1_CSB"), 66230424Shselasky PINCTRL_PIN(27, "SPI0_CLK"), 67230424Shselasky PINCTRL_PIN(28, "SPI0_CLK_LOOPBK"), 68230424Shselasky /* GPP_B */ 69230424Shselasky PINCTRL_PIN(29, "CORE_VID_0"), 70230424Shselasky PINCTRL_PIN(30, "CORE_VID_1"), 71230424Shselasky PINCTRL_PIN(31, "VRALERTB"), 72230424Shselasky PINCTRL_PIN(32, "CPU_GP_2"), 73230424Shselasky PINCTRL_PIN(33, "CPU_GP_3"), 74230424Shselasky PINCTRL_PIN(34, "SRCCLKREQB_0"), 75230424Shselasky PINCTRL_PIN(35, "SRCCLKREQB_1"), 76230424Shselasky PINCTRL_PIN(36, "SRCCLKREQB_2"), 77230424Shselasky PINCTRL_PIN(37, "SRCCLKREQB_3"), 78230424Shselasky PINCTRL_PIN(38, "SRCCLKREQB_4"), 79230424Shselasky PINCTRL_PIN(39, "SRCCLKREQB_5"), 80230424Shselasky PINCTRL_PIN(40, "PMCALERTB"), 81230424Shselasky PINCTRL_PIN(41, "SLP_S0B"), 82230424Shselasky PINCTRL_PIN(42, "PLTRSTB"), 83230424Shselasky PINCTRL_PIN(43, "SPKR"), 84246122Shselasky PINCTRL_PIN(44, "GSPI0_CS0B"), 85230424Shselasky PINCTRL_PIN(45, "GSPI0_CLK"), 86230424Shselasky PINCTRL_PIN(46, "GSPI0_MISO"), 87239909Shselasky PINCTRL_PIN(47, "GSPI0_MOSI"), 88230424Shselasky PINCTRL_PIN(48, "GSPI1_CS0B"), 89230424Shselasky PINCTRL_PIN(49, "GSPI1_CLK"), 90230424Shselasky PINCTRL_PIN(50, "GSPI1_MISO"), 91230424Shselasky PINCTRL_PIN(51, "GSPI1_MOSI"), 92230424Shselasky PINCTRL_PIN(52, "DDSP_HPD_A"), 93266575Shselasky PINCTRL_PIN(53, "GSPI0_CLK_LOOPBK"), 94266575Shselasky PINCTRL_PIN(54, "GSPI1_CLK_LOOPBK"), 95230424Shselasky /* GPP_A */ 96230424Shselasky PINCTRL_PIN(55, "ESPI_IO_0"), 97266575Shselasky PINCTRL_PIN(56, "ESPI_IO_1"), 98266575Shselasky PINCTRL_PIN(57, "ESPI_IO_2"), 99266575Shselasky PINCTRL_PIN(58, "ESPI_IO_3"), 100266575Shselasky PINCTRL_PIN(59, "ESPI_CSB"), 101266575Shselasky PINCTRL_PIN(60, "ESPI_CLK"), 102267242Shselasky PINCTRL_PIN(61, "ESPI_RESETB"), 103267242Shselasky PINCTRL_PIN(62, "SMBCLK"), 104240279Shselasky PINCTRL_PIN(63, "SMBDATA"), 105266575Shselasky PINCTRL_PIN(64, "SMBALERTB"), 106230424Shselasky PINCTRL_PIN(65, "CPU_GP_0"), 107266575Shselasky PINCTRL_PIN(66, "CPU_GP_1"), 108266575Shselasky PINCTRL_PIN(67, "USB2_OCB_1"), 109266575Shselasky PINCTRL_PIN(68, "USB2_OCB_2"), 110266575Shselasky PINCTRL_PIN(69, "USB2_OCB_3"), 111266575Shselasky PINCTRL_PIN(70, "DDSP_HPD_A_TIME_SYNC_0"), 112279644Shselasky PINCTRL_PIN(71, "DDSP_HPD_B"), 113279644Shselasky PINCTRL_PIN(72, "DDSP_HPD_C"), 114279644Shselasky PINCTRL_PIN(73, "USB2_OCB_0"), 115230424Shselasky PINCTRL_PIN(74, "PCHHOTB"), 116279644Shselasky PINCTRL_PIN(75, "ESPI_CLK_LOOPBK"), 117279644Shselasky /* GPP_S */ 118279644Shselasky PINCTRL_PIN(76, "SNDW1_CLK"), 119279644Shselasky PINCTRL_PIN(77, "SNDW1_DATA"), 120279644Shselasky PINCTRL_PIN(78, "SNDW2_CLK"), 121279644Shselasky PINCTRL_PIN(79, "SNDW2_DATA"), 122240890Shselasky PINCTRL_PIN(80, "SNDW1_CLK"), 123279644Shselasky PINCTRL_PIN(81, "SNDW1_DATA"), 124279644Shselasky PINCTRL_PIN(82, "SNDW4_CLK_DMIC_CLK_0"), 125279644Shselasky PINCTRL_PIN(83, "SNDW4_DATA_DMIC_DATA_0"), 126240890Shselasky /* GPP_R */ 127230424Shselasky PINCTRL_PIN(84, "HDA_BCLK"), 128240857Shselasky PINCTRL_PIN(85, "HDA_SYNC"), 129230424Shselasky PINCTRL_PIN(86, "HDA_SDO"), 130230424Shselasky PINCTRL_PIN(87, "HDA_SDI_0"), 131230424Shselasky PINCTRL_PIN(88, "HDA_RSTB"), 132230424Shselasky PINCTRL_PIN(89, "HDA_SDI_1"), 133230424Shselasky PINCTRL_PIN(90, "I2S1_SFRM"), 134230424Shselasky PINCTRL_PIN(91, "I2S1_TXD"), 135230424Shselasky /* GPP_H */ 136230424Shselasky PINCTRL_PIN(92, "GPPC_H_0"), 137230424Shselasky PINCTRL_PIN(93, "SD_PWR_EN_B"), 138230424Shselasky PINCTRL_PIN(94, "MODEM_CLKREQ"), 139230424Shselasky PINCTRL_PIN(95, "SX_EXIT_HOLDOFFB"), 140240279Shselasky PINCTRL_PIN(96, "I2C2_SDA"), 141230424Shselasky PINCTRL_PIN(97, "I2C2_SCL"), 142230424Shselasky PINCTRL_PIN(98, "I2C3_SDA"), 143230424Shselasky PINCTRL_PIN(99, "I2C3_SCL"), 144230424Shselasky PINCTRL_PIN(100, "I2C4_SDA"), 145230424Shselasky PINCTRL_PIN(101, "I2C4_SCL"), 146240279Shselasky PINCTRL_PIN(102, "CPU_VCCIO_PWR_GATEB"), 147240279Shselasky PINCTRL_PIN(103, "I2S2_SCLK"), 148240279Shselasky PINCTRL_PIN(104, "I2S2_SFRM"), 149240279Shselasky PINCTRL_PIN(105, "I2S2_TXD"), 150240279Shselasky PINCTRL_PIN(106, "I2S2_RXD"), 151230424Shselasky PINCTRL_PIN(107, "I2S1_SCLK"), 152230424Shselasky PINCTRL_PIN(108, "GPPC_H_16"), 153230424Shselasky PINCTRL_PIN(109, "GPPC_H_17"), 154266575Shselasky PINCTRL_PIN(110, "GPPC_H_18"), 155267039Shselasky PINCTRL_PIN(111, "GPPC_H_19"), 156230424Shselasky PINCTRL_PIN(112, "GPPC_H_20"), 157230424Shselasky PINCTRL_PIN(113, "GPPC_H_21"), 158230424Shselasky PINCTRL_PIN(114, "GPPC_H_22"), 159230424Shselasky PINCTRL_PIN(115, "GPPC_H_23"), 160230424Shselasky /* GPP_D */ 161230424Shselasky PINCTRL_PIN(116, "SPI1_CSB"), 162230424Shselasky PINCTRL_PIN(117, "SPI1_CLK"), 163230424Shselasky PINCTRL_PIN(118, "SPI1_MISO_IO_1"), 164230424Shselasky PINCTRL_PIN(119, "SPI1_MOSI_IO_0"), 165230424Shselasky PINCTRL_PIN(120, "ISH_I2C0_SDA"), 166230424Shselasky PINCTRL_PIN(121, "ISH_I2C0_SCL"), 167230424Shselasky PINCTRL_PIN(122, "ISH_I2C1_SDA"), 168230424Shselasky PINCTRL_PIN(123, "ISH_I2C1_SCL"), 169230424Shselasky PINCTRL_PIN(124, "ISH_SPI_CSB"), 170230424Shselasky PINCTRL_PIN(125, "ISH_SPI_CLK"), 171230424Shselasky PINCTRL_PIN(126, "ISH_SPI_MISO"), 172230424Shselasky PINCTRL_PIN(127, "ISH_SPI_MOSI"), 173230424Shselasky PINCTRL_PIN(128, "ISH_UART0_RXD"), 174230424Shselasky PINCTRL_PIN(129, "ISH_UART0_TXD"), 175230424Shselasky PINCTRL_PIN(130, "ISH_UART0_RTSB"), 176230424Shselasky PINCTRL_PIN(131, "ISH_UART0_CTSB"), 177230424Shselasky PINCTRL_PIN(132, "SPI1_IO_2"), 178230424Shselasky PINCTRL_PIN(133, "SPI1_IO_3"), 179230424Shselasky PINCTRL_PIN(134, "I2S_MCLK"), 180230424Shselasky PINCTRL_PIN(135, "CNV_MFUART2_RXD"), 181230424Shselasky PINCTRL_PIN(136, "CNV_MFUART2_TXD"), 182230424Shselasky PINCTRL_PIN(137, "CNV_PA_BLANKING"), 183230424Shselasky PINCTRL_PIN(138, "I2C5_SDA"), 184284015Shselasky PINCTRL_PIN(139, "I2C5_SCL"), 185291064Shselasky PINCTRL_PIN(140, "GSPI2_CLK_LOOPBK"), 186291064Shselasky PINCTRL_PIN(141, "SPI1_CLK_LOOPBK"), 187291064Shselasky /* vGPIO */ 188291064Shselasky PINCTRL_PIN(142, "CNV_BTEN"), 189291064Shselasky PINCTRL_PIN(143, "CNV_WCEN"), 190291064Shselasky PINCTRL_PIN(144, "CNV_BT_HOST_WAKEB"), 191291064Shselasky PINCTRL_PIN(145, "CNV_BT_IF_SELECT"), 192291064Shselasky PINCTRL_PIN(146, "vCNV_BT_UART_TXD"), 193291064Shselasky PINCTRL_PIN(147, "vCNV_BT_UART_RXD"), 194291064Shselasky PINCTRL_PIN(148, "vCNV_BT_UART_CTS_B"), 195291064Shselasky PINCTRL_PIN(149, "vCNV_BT_UART_RTS_B"), 196291064Shselasky PINCTRL_PIN(150, "vCNV_MFUART1_TXD"), 197291064Shselasky PINCTRL_PIN(151, "vCNV_MFUART1_RXD"), 198291064Shselasky PINCTRL_PIN(152, "vCNV_MFUART1_CTS_B"), 199291064Shselasky PINCTRL_PIN(153, "vCNV_MFUART1_RTS_B"), 200291064Shselasky PINCTRL_PIN(154, "vUART0_TXD"), 201291064Shselasky PINCTRL_PIN(155, "vUART0_RXD"), 202291064Shselasky PINCTRL_PIN(156, "vUART0_CTS_B"), 203291064Shselasky PINCTRL_PIN(157, "vUART0_RTS_B"), 204291064Shselasky PINCTRL_PIN(158, "vISH_UART0_TXD"), 205291064Shselasky PINCTRL_PIN(159, "vISH_UART0_RXD"), 206291064Shselasky PINCTRL_PIN(160, "vISH_UART0_CTS_B"), 207291064Shselasky PINCTRL_PIN(161, "vISH_UART0_RTS_B"), 208291064Shselasky PINCTRL_PIN(162, "vCNV_BT_I2S_BCLK"), 209291064Shselasky PINCTRL_PIN(163, "vCNV_BT_I2S_WS_SYNC"), 210291064Shselasky PINCTRL_PIN(164, "vCNV_BT_I2S_SDO"), 211291064Shselasky PINCTRL_PIN(165, "vCNV_BT_I2S_SDI"), 212291064Shselasky PINCTRL_PIN(166, "vI2S2_SCLK"), 213291064Shselasky PINCTRL_PIN(167, "vI2S2_SFRM"), 214291064Shselasky PINCTRL_PIN(168, "vI2S2_TXD"), 215291064Shselasky PINCTRL_PIN(169, "vI2S2_RXD"), 216291064Shselasky PINCTRL_PIN(170, "vSD3_CD_B"), 217291064Shselasky /* GPP_C */ 218291064Shselasky PINCTRL_PIN(171, "GPPC_C_0"), 219291064Shselasky PINCTRL_PIN(172, "GPPC_C_1"), 220291064Shselasky PINCTRL_PIN(173, "GPPC_C_2"), 221291064Shselasky PINCTRL_PIN(174, "GPPC_C_3"), 222291064Shselasky PINCTRL_PIN(175, "GPPC_C_4"), 223291064Shselasky PINCTRL_PIN(176, "GPPC_C_5"), 224291064Shselasky PINCTRL_PIN(177, "SUSWARNB_SUSPWRDNACK"), 225291064Shselasky PINCTRL_PIN(178, "SUSACKB"), 226291064Shselasky PINCTRL_PIN(179, "UART0_RXD"), 227291064Shselasky PINCTRL_PIN(180, "UART0_TXD"), 228291064Shselasky PINCTRL_PIN(181, "UART0_RTSB"), 229291064Shselasky PINCTRL_PIN(182, "UART0_CTSB"), 230291064Shselasky PINCTRL_PIN(183, "UART1_RXD"), 231291064Shselasky PINCTRL_PIN(184, "UART1_TXD"), 232291064Shselasky PINCTRL_PIN(185, "UART1_RTSB"), 233291064Shselasky PINCTRL_PIN(186, "UART1_CTSB"), 234291064Shselasky PINCTRL_PIN(187, "I2C0_SDA"), 235291064Shselasky PINCTRL_PIN(188, "I2C0_SCL"), 236291064Shselasky PINCTRL_PIN(189, "I2C1_SDA"), 237291064Shselasky PINCTRL_PIN(190, "I2C1_SCL"), 238291064Shselasky PINCTRL_PIN(191, "UART2_RXD"), 239291064Shselasky PINCTRL_PIN(192, "UART2_TXD"), 240291064Shselasky PINCTRL_PIN(193, "UART2_RTSB"), 241291064Shselasky PINCTRL_PIN(194, "UART2_CTSB"), 242291064Shselasky /* HVCMOS */ 243291064Shselasky PINCTRL_PIN(195, "L_BKLTEN"), 244291064Shselasky PINCTRL_PIN(196, "L_BKLTCTL"), 245291064Shselasky PINCTRL_PIN(197, "L_VDDEN"), 246291064Shselasky PINCTRL_PIN(198, "SYS_PWROK"), 247291064Shselasky PINCTRL_PIN(199, "SYS_RESETB"), 248291064Shselasky PINCTRL_PIN(200, "MLK_RSTB"), 249291064Shselasky /* GPP_E */ 250291064Shselasky PINCTRL_PIN(201, "ISH_GP_0"), 251291064Shselasky PINCTRL_PIN(202, "ISH_GP_1"), 252291064Shselasky PINCTRL_PIN(203, "IMGCLKOUT_1"), 253291064Shselasky PINCTRL_PIN(204, "ISH_GP_2"), 254291064Shselasky PINCTRL_PIN(205, "IMGCLKOUT_2"), 255291064Shselasky PINCTRL_PIN(206, "SATA_LEDB"), 256291064Shselasky PINCTRL_PIN(207, "IMGCLKOUT_3"), 257291064Shselasky PINCTRL_PIN(208, "ISH_GP_3"), 258291064Shselasky PINCTRL_PIN(209, "ISH_GP_4"), 259291064Shselasky PINCTRL_PIN(210, "ISH_GP_5"), 260291064Shselasky PINCTRL_PIN(211, "ISH_GP_6"), 261291064Shselasky PINCTRL_PIN(212, "ISH_GP_7"), 262291064Shselasky PINCTRL_PIN(213, "IMGCLKOUT_4"), 263291064Shselasky PINCTRL_PIN(214, "DDPA_CTRLCLK"), 264291064Shselasky PINCTRL_PIN(215, "DDPA_CTRLDATA"), 265291064Shselasky PINCTRL_PIN(216, "DDPB_CTRLCLK"), 266291064Shselasky PINCTRL_PIN(217, "DDPB_CTRLDATA"), 267291064Shselasky PINCTRL_PIN(218, "DDPC_CTRLCLK"), 268291064Shselasky PINCTRL_PIN(219, "DDPC_CTRLDATA"), 269291064Shselasky PINCTRL_PIN(220, "IMGCLKOUT_5"), 270291064Shselasky PINCTRL_PIN(221, "CNV_BRI_DT"), 271291064Shselasky PINCTRL_PIN(222, "CNV_BRI_RSP"), 272291064Shselasky PINCTRL_PIN(223, "CNV_RGI_DT"), 273291064Shselasky PINCTRL_PIN(224, "CNV_RGI_RSP"), 274291064Shselasky /* GPP_G */ 275291064Shselasky PINCTRL_PIN(225, "SD3_CMD"), 276291064Shselasky PINCTRL_PIN(226, "SD3_D0"), 277291064Shselasky PINCTRL_PIN(227, "SD3_D1"), 278291064Shselasky PINCTRL_PIN(228, "SD3_D2"), 279291064Shselasky PINCTRL_PIN(229, "SD3_D3"), 280291064Shselasky PINCTRL_PIN(230, "SD3_CDB"), 281291064Shselasky PINCTRL_PIN(231, "SD3_CLK"), 282291064Shselasky PINCTRL_PIN(232, "SD3_WP"), 283291064Shselasky}; 284291064Shselasky 285291064Shselaskystatic const struct intel_padgroup jsl_community0_gpps[] = { 286291064Shselasky JSL_GPP(0, 0, 19, 320), /* GPP_F */ 287291064Shselasky JSL_GPP(1, 20, 28, INTEL_GPIO_BASE_NOMAP), /* SPI */ 288291064Shselasky JSL_GPP(2, 29, 54, 32), /* GPP_B */ 289284015Shselasky JSL_GPP(3, 55, 75, 64), /* GPP_A */ 290284015Shselasky JSL_GPP(4, 76, 83, 96), /* GPP_S */ 291284015Shselasky JSL_GPP(5, 84, 91, 128), /* GPP_R */ 292284015Shselasky}; 293284015Shselasky 294284015Shselaskystatic const struct intel_padgroup jsl_community1_gpps[] = { 295284015Shselasky JSL_GPP(0, 92, 115, 160), /* GPP_H */ 296284015Shselasky JSL_GPP(1, 116, 141, 192), /* GPP_D */ 297284015Shselasky JSL_GPP(2, 142, 170, 224), /* vGPIO */ 298284015Shselasky JSL_GPP(3, 171, 194, 256), /* GPP_C */ 299284015Shselasky}; 300284015Shselasky 301284015Shselaskystatic const struct intel_padgroup jsl_community4_gpps[] = { 302284015Shselasky JSL_GPP(0, 195, 200, INTEL_GPIO_BASE_NOMAP), /* HVCMOS */ 303284015Shselasky JSL_GPP(1, 201, 224, 288), /* GPP_E */ 304230424Shselasky}; 305240279Shselasky 306230424Shselaskystatic const struct intel_padgroup jsl_community5_gpps[] = { 307230424Shselasky JSL_GPP(0, 225, 232, INTEL_GPIO_BASE_ZERO), /* GPP_G */ 308230424Shselasky}; 309230424Shselasky 310230424Shselaskystatic const struct intel_community jsl_communities[] = { 311230424Shselasky JSL_COMMUNITY(0, 0, 91, jsl_community0_gpps), 312230424Shselasky JSL_COMMUNITY(1, 92, 194, jsl_community1_gpps), 313230424Shselasky JSL_COMMUNITY(2, 195, 224, jsl_community4_gpps), 314230424Shselasky JSL_COMMUNITY(3, 225, 232, jsl_community5_gpps), 315266575Shselasky}; 316266575Shselasky 317266575Shselaskystatic const struct intel_pinctrl_soc_data jsl_soc_data = { 318266575Shselasky .pins = jsl_pins, 319266575Shselasky .npins = ARRAY_SIZE(jsl_pins), 320230424Shselasky .communities = jsl_communities, 321266575Shselasky .ncommunities = ARRAY_SIZE(jsl_communities), 322266575Shselasky}; 323266575Shselasky 324266575Shselaskystatic const struct acpi_device_id jsl_pinctrl_acpi_match[] = { 325230424Shselasky { "INT34C8", (kernel_ulong_t)&jsl_soc_data }, 326266575Shselasky { } 327266575Shselasky}; 328266575ShselaskyMODULE_DEVICE_TABLE(acpi, jsl_pinctrl_acpi_match); 329230424Shselasky 330230424Shselaskystatic struct platform_driver jsl_pinctrl_driver = { 331230424Shselasky .probe = intel_pinctrl_probe_by_hid, 332287271Shselasky .driver = { 333266575Shselasky .name = "jasperlake-pinctrl", 334266575Shselasky .acpi_match_table = jsl_pinctrl_acpi_match, 335266575Shselasky .pm = pm_sleep_ptr(&intel_pinctrl_pm_ops), 336239909Shselasky }, 337230424Shselasky}; 338230424Shselaskymodule_platform_driver(jsl_pinctrl_driver); 339230424Shselasky 340266575ShselaskyMODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>"); 341230424ShselaskyMODULE_DESCRIPTION("Intel Jasper Lake PCH pinctrl/GPIO driver"); 342230424ShselaskyMODULE_LICENSE("GPL v2"); 343230424ShselaskyMODULE_IMPORT_NS(PINCTRL_INTEL); 344230424Shselasky