1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2018, Intel Corporation. */
3
4/* The driver transmit and receive code */
5
6#include <linux/mm.h>
7#include <linux/netdevice.h>
8#include <linux/prefetch.h>
9#include <linux/bpf_trace.h>
10#include <net/dsfield.h>
11#include <net/mpls.h>
12#include <net/xdp.h>
13#include "ice_txrx_lib.h"
14#include "ice_lib.h"
15#include "ice.h"
16#include "ice_trace.h"
17#include "ice_dcb_lib.h"
18#include "ice_xsk.h"
19#include "ice_eswitch.h"
20
21#define ICE_RX_HDR_SIZE		256
22
23#define FDIR_DESC_RXDID 0x40
24#define ICE_FDIR_CLEAN_DELAY 10
25
26/**
27 * ice_prgm_fdir_fltr - Program a Flow Director filter
28 * @vsi: VSI to send dummy packet
29 * @fdir_desc: flow director descriptor
30 * @raw_packet: allocated buffer for flow director
31 */
32int
33ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
34		   u8 *raw_packet)
35{
36	struct ice_tx_buf *tx_buf, *first;
37	struct ice_fltr_desc *f_desc;
38	struct ice_tx_desc *tx_desc;
39	struct ice_tx_ring *tx_ring;
40	struct device *dev;
41	dma_addr_t dma;
42	u32 td_cmd;
43	u16 i;
44
45	/* VSI and Tx ring */
46	if (!vsi)
47		return -ENOENT;
48	tx_ring = vsi->tx_rings[0];
49	if (!tx_ring || !tx_ring->desc)
50		return -ENOENT;
51	dev = tx_ring->dev;
52
53	/* we are using two descriptors to add/del a filter and we can wait */
54	for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
55		if (!i)
56			return -EAGAIN;
57		msleep_interruptible(1);
58	}
59
60	dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
61			     DMA_TO_DEVICE);
62
63	if (dma_mapping_error(dev, dma))
64		return -EINVAL;
65
66	/* grab the next descriptor */
67	i = tx_ring->next_to_use;
68	first = &tx_ring->tx_buf[i];
69	f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70	memcpy(f_desc, fdir_desc, sizeof(*f_desc));
71
72	i++;
73	i = (i < tx_ring->count) ? i : 0;
74	tx_desc = ICE_TX_DESC(tx_ring, i);
75	tx_buf = &tx_ring->tx_buf[i];
76
77	i++;
78	tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
79
80	memset(tx_buf, 0, sizeof(*tx_buf));
81	dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82	dma_unmap_addr_set(tx_buf, dma, dma);
83
84	tx_desc->buf_addr = cpu_to_le64(dma);
85	td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
86		 ICE_TX_DESC_CMD_RE;
87
88	tx_buf->type = ICE_TX_BUF_DUMMY;
89	tx_buf->raw_buf = raw_packet;
90
91	tx_desc->cmd_type_offset_bsz =
92		ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
93
94	/* Force memory write to complete before letting h/w know
95	 * there are new descriptors to fetch.
96	 */
97	wmb();
98
99	/* mark the data descriptor to be watched */
100	first->next_to_watch = tx_desc;
101
102	writel(tx_ring->next_to_use, tx_ring->tail);
103
104	return 0;
105}
106
107/**
108 * ice_unmap_and_free_tx_buf - Release a Tx buffer
109 * @ring: the ring that owns the buffer
110 * @tx_buf: the buffer to free
111 */
112static void
113ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
114{
115	if (dma_unmap_len(tx_buf, len))
116		dma_unmap_page(ring->dev,
117			       dma_unmap_addr(tx_buf, dma),
118			       dma_unmap_len(tx_buf, len),
119			       DMA_TO_DEVICE);
120
121	switch (tx_buf->type) {
122	case ICE_TX_BUF_DUMMY:
123		devm_kfree(ring->dev, tx_buf->raw_buf);
124		break;
125	case ICE_TX_BUF_SKB:
126		dev_kfree_skb_any(tx_buf->skb);
127		break;
128	case ICE_TX_BUF_XDP_TX:
129		page_frag_free(tx_buf->raw_buf);
130		break;
131	case ICE_TX_BUF_XDP_XMIT:
132		xdp_return_frame(tx_buf->xdpf);
133		break;
134	}
135
136	tx_buf->next_to_watch = NULL;
137	tx_buf->type = ICE_TX_BUF_EMPTY;
138	dma_unmap_len_set(tx_buf, len, 0);
139	/* tx_buf must be completely set up in the transmit path */
140}
141
142static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
143{
144	return netdev_get_tx_queue(ring->netdev, ring->q_index);
145}
146
147/**
148 * ice_clean_tx_ring - Free any empty Tx buffers
149 * @tx_ring: ring to be cleaned
150 */
151void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
152{
153	u32 size;
154	u16 i;
155
156	if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
157		ice_xsk_clean_xdp_ring(tx_ring);
158		goto tx_skip_free;
159	}
160
161	/* ring already cleared, nothing to do */
162	if (!tx_ring->tx_buf)
163		return;
164
165	/* Free all the Tx ring sk_buffs */
166	for (i = 0; i < tx_ring->count; i++)
167		ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
168
169tx_skip_free:
170	memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
171
172	size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
173		     PAGE_SIZE);
174	/* Zero out the descriptor ring */
175	memset(tx_ring->desc, 0, size);
176
177	tx_ring->next_to_use = 0;
178	tx_ring->next_to_clean = 0;
179
180	if (!tx_ring->netdev)
181		return;
182
183	/* cleanup Tx queue statistics */
184	netdev_tx_reset_queue(txring_txq(tx_ring));
185}
186
187/**
188 * ice_free_tx_ring - Free Tx resources per queue
189 * @tx_ring: Tx descriptor ring for a specific queue
190 *
191 * Free all transmit software resources
192 */
193void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
194{
195	u32 size;
196
197	ice_clean_tx_ring(tx_ring);
198	devm_kfree(tx_ring->dev, tx_ring->tx_buf);
199	tx_ring->tx_buf = NULL;
200
201	if (tx_ring->desc) {
202		size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
203			     PAGE_SIZE);
204		dmam_free_coherent(tx_ring->dev, size,
205				   tx_ring->desc, tx_ring->dma);
206		tx_ring->desc = NULL;
207	}
208}
209
210/**
211 * ice_clean_tx_irq - Reclaim resources after transmit completes
212 * @tx_ring: Tx ring to clean
213 * @napi_budget: Used to determine if we are in netpoll
214 *
215 * Returns true if there's any budget left (e.g. the clean is finished)
216 */
217static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
218{
219	unsigned int total_bytes = 0, total_pkts = 0;
220	unsigned int budget = ICE_DFLT_IRQ_WORK;
221	struct ice_vsi *vsi = tx_ring->vsi;
222	s16 i = tx_ring->next_to_clean;
223	struct ice_tx_desc *tx_desc;
224	struct ice_tx_buf *tx_buf;
225
226	/* get the bql data ready */
227	netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
228
229	tx_buf = &tx_ring->tx_buf[i];
230	tx_desc = ICE_TX_DESC(tx_ring, i);
231	i -= tx_ring->count;
232
233	prefetch(&vsi->state);
234
235	do {
236		struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
237
238		/* if next_to_watch is not set then there is no work pending */
239		if (!eop_desc)
240			break;
241
242		/* follow the guidelines of other drivers */
243		prefetchw(&tx_buf->skb->users);
244
245		smp_rmb();	/* prevent any other reads prior to eop_desc */
246
247		ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
248		/* if the descriptor isn't done, no work yet to do */
249		if (!(eop_desc->cmd_type_offset_bsz &
250		      cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
251			break;
252
253		/* clear next_to_watch to prevent false hangs */
254		tx_buf->next_to_watch = NULL;
255
256		/* update the statistics for this packet */
257		total_bytes += tx_buf->bytecount;
258		total_pkts += tx_buf->gso_segs;
259
260		/* free the skb */
261		napi_consume_skb(tx_buf->skb, napi_budget);
262
263		/* unmap skb header data */
264		dma_unmap_single(tx_ring->dev,
265				 dma_unmap_addr(tx_buf, dma),
266				 dma_unmap_len(tx_buf, len),
267				 DMA_TO_DEVICE);
268
269		/* clear tx_buf data */
270		tx_buf->type = ICE_TX_BUF_EMPTY;
271		dma_unmap_len_set(tx_buf, len, 0);
272
273		/* unmap remaining buffers */
274		while (tx_desc != eop_desc) {
275			ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
276			tx_buf++;
277			tx_desc++;
278			i++;
279			if (unlikely(!i)) {
280				i -= tx_ring->count;
281				tx_buf = tx_ring->tx_buf;
282				tx_desc = ICE_TX_DESC(tx_ring, 0);
283			}
284
285			/* unmap any remaining paged data */
286			if (dma_unmap_len(tx_buf, len)) {
287				dma_unmap_page(tx_ring->dev,
288					       dma_unmap_addr(tx_buf, dma),
289					       dma_unmap_len(tx_buf, len),
290					       DMA_TO_DEVICE);
291				dma_unmap_len_set(tx_buf, len, 0);
292			}
293		}
294		ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
295
296		/* move us one more past the eop_desc for start of next pkt */
297		tx_buf++;
298		tx_desc++;
299		i++;
300		if (unlikely(!i)) {
301			i -= tx_ring->count;
302			tx_buf = tx_ring->tx_buf;
303			tx_desc = ICE_TX_DESC(tx_ring, 0);
304		}
305
306		prefetch(tx_desc);
307
308		/* update budget accounting */
309		budget--;
310	} while (likely(budget));
311
312	i += tx_ring->count;
313	tx_ring->next_to_clean = i;
314
315	ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
316	netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
317
318#define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
319	if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
320		     (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
321		/* Make sure that anybody stopping the queue after this
322		 * sees the new next_to_clean.
323		 */
324		smp_mb();
325		if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
326		    !test_bit(ICE_VSI_DOWN, vsi->state)) {
327			netif_tx_wake_queue(txring_txq(tx_ring));
328			++tx_ring->ring_stats->tx_stats.restart_q;
329		}
330	}
331
332	return !!budget;
333}
334
335/**
336 * ice_setup_tx_ring - Allocate the Tx descriptors
337 * @tx_ring: the Tx ring to set up
338 *
339 * Return 0 on success, negative on error
340 */
341int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
342{
343	struct device *dev = tx_ring->dev;
344	u32 size;
345
346	if (!dev)
347		return -ENOMEM;
348
349	/* warn if we are about to overwrite the pointer */
350	WARN_ON(tx_ring->tx_buf);
351	tx_ring->tx_buf =
352		devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
353			     GFP_KERNEL);
354	if (!tx_ring->tx_buf)
355		return -ENOMEM;
356
357	/* round up to nearest page */
358	size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
359		     PAGE_SIZE);
360	tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
361					    GFP_KERNEL);
362	if (!tx_ring->desc) {
363		dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
364			size);
365		goto err;
366	}
367
368	tx_ring->next_to_use = 0;
369	tx_ring->next_to_clean = 0;
370	tx_ring->ring_stats->tx_stats.prev_pkt = -1;
371	return 0;
372
373err:
374	devm_kfree(dev, tx_ring->tx_buf);
375	tx_ring->tx_buf = NULL;
376	return -ENOMEM;
377}
378
379/**
380 * ice_clean_rx_ring - Free Rx buffers
381 * @rx_ring: ring to be cleaned
382 */
383void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
384{
385	struct xdp_buff *xdp = &rx_ring->xdp;
386	struct device *dev = rx_ring->dev;
387	u32 size;
388	u16 i;
389
390	/* ring already cleared, nothing to do */
391	if (!rx_ring->rx_buf)
392		return;
393
394	if (rx_ring->xsk_pool) {
395		ice_xsk_clean_rx_ring(rx_ring);
396		goto rx_skip_free;
397	}
398
399	if (xdp->data) {
400		xdp_return_buff(xdp);
401		xdp->data = NULL;
402	}
403
404	/* Free all the Rx ring sk_buffs */
405	for (i = 0; i < rx_ring->count; i++) {
406		struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
407
408		if (!rx_buf->page)
409			continue;
410
411		/* Invalidate cache lines that may have been written to by
412		 * device so that we avoid corrupting memory.
413		 */
414		dma_sync_single_range_for_cpu(dev, rx_buf->dma,
415					      rx_buf->page_offset,
416					      rx_ring->rx_buf_len,
417					      DMA_FROM_DEVICE);
418
419		/* free resources associated with mapping */
420		dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
421				     DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
422		__page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
423
424		rx_buf->page = NULL;
425		rx_buf->page_offset = 0;
426	}
427
428rx_skip_free:
429	if (rx_ring->xsk_pool)
430		memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
431	else
432		memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
433
434	/* Zero out the descriptor ring */
435	size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
436		     PAGE_SIZE);
437	memset(rx_ring->desc, 0, size);
438
439	rx_ring->next_to_alloc = 0;
440	rx_ring->next_to_clean = 0;
441	rx_ring->first_desc = 0;
442	rx_ring->next_to_use = 0;
443}
444
445/**
446 * ice_free_rx_ring - Free Rx resources
447 * @rx_ring: ring to clean the resources from
448 *
449 * Free all receive software resources
450 */
451void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
452{
453	u32 size;
454
455	ice_clean_rx_ring(rx_ring);
456	if (rx_ring->vsi->type == ICE_VSI_PF)
457		if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
458			xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
459	rx_ring->xdp_prog = NULL;
460	if (rx_ring->xsk_pool) {
461		kfree(rx_ring->xdp_buf);
462		rx_ring->xdp_buf = NULL;
463	} else {
464		kfree(rx_ring->rx_buf);
465		rx_ring->rx_buf = NULL;
466	}
467
468	if (rx_ring->desc) {
469		size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
470			     PAGE_SIZE);
471		dmam_free_coherent(rx_ring->dev, size,
472				   rx_ring->desc, rx_ring->dma);
473		rx_ring->desc = NULL;
474	}
475}
476
477/**
478 * ice_setup_rx_ring - Allocate the Rx descriptors
479 * @rx_ring: the Rx ring to set up
480 *
481 * Return 0 on success, negative on error
482 */
483int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
484{
485	struct device *dev = rx_ring->dev;
486	u32 size;
487
488	if (!dev)
489		return -ENOMEM;
490
491	/* warn if we are about to overwrite the pointer */
492	WARN_ON(rx_ring->rx_buf);
493	rx_ring->rx_buf =
494		kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
495	if (!rx_ring->rx_buf)
496		return -ENOMEM;
497
498	/* round up to nearest page */
499	size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
500		     PAGE_SIZE);
501	rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
502					    GFP_KERNEL);
503	if (!rx_ring->desc) {
504		dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
505			size);
506		goto err;
507	}
508
509	rx_ring->next_to_use = 0;
510	rx_ring->next_to_clean = 0;
511	rx_ring->first_desc = 0;
512
513	if (ice_is_xdp_ena_vsi(rx_ring->vsi))
514		WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
515
516	return 0;
517
518err:
519	kfree(rx_ring->rx_buf);
520	rx_ring->rx_buf = NULL;
521	return -ENOMEM;
522}
523
524/**
525 * ice_rx_frame_truesize
526 * @rx_ring: ptr to Rx ring
527 * @size: size
528 *
529 * calculate the truesize with taking into the account PAGE_SIZE of
530 * underlying arch
531 */
532static unsigned int
533ice_rx_frame_truesize(struct ice_rx_ring *rx_ring, const unsigned int size)
534{
535	unsigned int truesize;
536
537#if (PAGE_SIZE < 8192)
538	truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
539#else
540	truesize = rx_ring->rx_offset ?
541		SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
542		SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
543		SKB_DATA_ALIGN(size);
544#endif
545	return truesize;
546}
547
548/**
549 * ice_run_xdp - Executes an XDP program on initialized xdp_buff
550 * @rx_ring: Rx ring
551 * @xdp: xdp_buff used as input to the XDP program
552 * @xdp_prog: XDP program to run
553 * @xdp_ring: ring to be used for XDP_TX action
554 * @rx_buf: Rx buffer to store the XDP action
555 * @eop_desc: Last descriptor in packet to read metadata from
556 *
557 * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
558 */
559static void
560ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
561	    struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring,
562	    struct ice_rx_buf *rx_buf, union ice_32b_rx_flex_desc *eop_desc)
563{
564	unsigned int ret = ICE_XDP_PASS;
565	u32 act;
566
567	if (!xdp_prog)
568		goto exit;
569
570	ice_xdp_meta_set_desc(xdp, eop_desc);
571
572	act = bpf_prog_run_xdp(xdp_prog, xdp);
573	switch (act) {
574	case XDP_PASS:
575		break;
576	case XDP_TX:
577		if (static_branch_unlikely(&ice_xdp_locking_key))
578			spin_lock(&xdp_ring->tx_lock);
579		ret = __ice_xmit_xdp_ring(xdp, xdp_ring, false);
580		if (static_branch_unlikely(&ice_xdp_locking_key))
581			spin_unlock(&xdp_ring->tx_lock);
582		if (ret == ICE_XDP_CONSUMED)
583			goto out_failure;
584		break;
585	case XDP_REDIRECT:
586		if (xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))
587			goto out_failure;
588		ret = ICE_XDP_REDIR;
589		break;
590	default:
591		bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
592		fallthrough;
593	case XDP_ABORTED:
594out_failure:
595		trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
596		fallthrough;
597	case XDP_DROP:
598		ret = ICE_XDP_CONSUMED;
599	}
600exit:
601	ice_set_rx_bufs_act(xdp, rx_ring, ret);
602}
603
604/**
605 * ice_xmit_xdp_ring - submit frame to XDP ring for transmission
606 * @xdpf: XDP frame that will be converted to XDP buff
607 * @xdp_ring: XDP ring for transmission
608 */
609static int ice_xmit_xdp_ring(const struct xdp_frame *xdpf,
610			     struct ice_tx_ring *xdp_ring)
611{
612	struct xdp_buff xdp;
613
614	xdp.data_hard_start = (void *)xdpf;
615	xdp.data = xdpf->data;
616	xdp.data_end = xdp.data + xdpf->len;
617	xdp.frame_sz = xdpf->frame_sz;
618	xdp.flags = xdpf->flags;
619
620	return __ice_xmit_xdp_ring(&xdp, xdp_ring, true);
621}
622
623/**
624 * ice_xdp_xmit - submit packets to XDP ring for transmission
625 * @dev: netdev
626 * @n: number of XDP frames to be transmitted
627 * @frames: XDP frames to be transmitted
628 * @flags: transmit flags
629 *
630 * Returns number of frames successfully sent. Failed frames
631 * will be free'ed by XDP core.
632 * For error cases, a negative errno code is returned and no-frames
633 * are transmitted (caller must handle freeing frames).
634 */
635int
636ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
637	     u32 flags)
638{
639	struct ice_netdev_priv *np = netdev_priv(dev);
640	unsigned int queue_index = smp_processor_id();
641	struct ice_vsi *vsi = np->vsi;
642	struct ice_tx_ring *xdp_ring;
643	struct ice_tx_buf *tx_buf;
644	int nxmit = 0, i;
645
646	if (test_bit(ICE_VSI_DOWN, vsi->state))
647		return -ENETDOWN;
648
649	if (!ice_is_xdp_ena_vsi(vsi))
650		return -ENXIO;
651
652	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
653		return -EINVAL;
654
655	if (static_branch_unlikely(&ice_xdp_locking_key)) {
656		queue_index %= vsi->num_xdp_txq;
657		xdp_ring = vsi->xdp_rings[queue_index];
658		spin_lock(&xdp_ring->tx_lock);
659	} else {
660		/* Generally, should not happen */
661		if (unlikely(queue_index >= vsi->num_xdp_txq))
662			return -ENXIO;
663		xdp_ring = vsi->xdp_rings[queue_index];
664	}
665
666	tx_buf = &xdp_ring->tx_buf[xdp_ring->next_to_use];
667	for (i = 0; i < n; i++) {
668		const struct xdp_frame *xdpf = frames[i];
669		int err;
670
671		err = ice_xmit_xdp_ring(xdpf, xdp_ring);
672		if (err != ICE_XDP_TX)
673			break;
674		nxmit++;
675	}
676
677	tx_buf->rs_idx = ice_set_rs_bit(xdp_ring);
678	if (unlikely(flags & XDP_XMIT_FLUSH))
679		ice_xdp_ring_update_tail(xdp_ring);
680
681	if (static_branch_unlikely(&ice_xdp_locking_key))
682		spin_unlock(&xdp_ring->tx_lock);
683
684	return nxmit;
685}
686
687/**
688 * ice_alloc_mapped_page - recycle or make a new page
689 * @rx_ring: ring to use
690 * @bi: rx_buf struct to modify
691 *
692 * Returns true if the page was successfully allocated or
693 * reused.
694 */
695static bool
696ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
697{
698	struct page *page = bi->page;
699	dma_addr_t dma;
700
701	/* since we are recycling buffers we should seldom need to alloc */
702	if (likely(page))
703		return true;
704
705	/* alloc new page for storage */
706	page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
707	if (unlikely(!page)) {
708		rx_ring->ring_stats->rx_stats.alloc_page_failed++;
709		return false;
710	}
711
712	/* map page for use */
713	dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
714				 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
715
716	/* if mapping failed free memory back to system since
717	 * there isn't much point in holding memory we can't use
718	 */
719	if (dma_mapping_error(rx_ring->dev, dma)) {
720		__free_pages(page, ice_rx_pg_order(rx_ring));
721		rx_ring->ring_stats->rx_stats.alloc_page_failed++;
722		return false;
723	}
724
725	bi->dma = dma;
726	bi->page = page;
727	bi->page_offset = rx_ring->rx_offset;
728	page_ref_add(page, USHRT_MAX - 1);
729	bi->pagecnt_bias = USHRT_MAX;
730
731	return true;
732}
733
734/**
735 * ice_alloc_rx_bufs - Replace used receive buffers
736 * @rx_ring: ring to place buffers on
737 * @cleaned_count: number of buffers to replace
738 *
739 * Returns false if all allocations were successful, true if any fail. Returning
740 * true signals to the caller that we didn't replace cleaned_count buffers and
741 * there is more work to do.
742 *
743 * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
744 * buffers. Then bump tail at most one time. Grouping like this lets us avoid
745 * multiple tail writes per call.
746 */
747bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, unsigned int cleaned_count)
748{
749	union ice_32b_rx_flex_desc *rx_desc;
750	u16 ntu = rx_ring->next_to_use;
751	struct ice_rx_buf *bi;
752
753	/* do nothing if no valid netdev defined */
754	if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
755	    !cleaned_count)
756		return false;
757
758	/* get the Rx descriptor and buffer based on next_to_use */
759	rx_desc = ICE_RX_DESC(rx_ring, ntu);
760	bi = &rx_ring->rx_buf[ntu];
761
762	do {
763		/* if we fail here, we have work remaining */
764		if (!ice_alloc_mapped_page(rx_ring, bi))
765			break;
766
767		/* sync the buffer for use by the device */
768		dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
769						 bi->page_offset,
770						 rx_ring->rx_buf_len,
771						 DMA_FROM_DEVICE);
772
773		/* Refresh the desc even if buffer_addrs didn't change
774		 * because each write-back erases this info.
775		 */
776		rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
777
778		rx_desc++;
779		bi++;
780		ntu++;
781		if (unlikely(ntu == rx_ring->count)) {
782			rx_desc = ICE_RX_DESC(rx_ring, 0);
783			bi = rx_ring->rx_buf;
784			ntu = 0;
785		}
786
787		/* clear the status bits for the next_to_use descriptor */
788		rx_desc->wb.status_error0 = 0;
789
790		cleaned_count--;
791	} while (cleaned_count);
792
793	if (rx_ring->next_to_use != ntu)
794		ice_release_rx_desc(rx_ring, ntu);
795
796	return !!cleaned_count;
797}
798
799/**
800 * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
801 * @rx_buf: Rx buffer to adjust
802 * @size: Size of adjustment
803 *
804 * Update the offset within page so that Rx buf will be ready to be reused.
805 * For systems with PAGE_SIZE < 8192 this function will flip the page offset
806 * so the second half of page assigned to Rx buffer will be used, otherwise
807 * the offset is moved by "size" bytes
808 */
809static void
810ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
811{
812#if (PAGE_SIZE < 8192)
813	/* flip page offset to other buffer */
814	rx_buf->page_offset ^= size;
815#else
816	/* move offset up to the next cache line */
817	rx_buf->page_offset += size;
818#endif
819}
820
821/**
822 * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
823 * @rx_buf: buffer containing the page
824 *
825 * If page is reusable, we have a green light for calling ice_reuse_rx_page,
826 * which will assign the current buffer to the buffer that next_to_alloc is
827 * pointing to; otherwise, the DMA mapping needs to be destroyed and
828 * page freed
829 */
830static bool
831ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf)
832{
833	unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
834	struct page *page = rx_buf->page;
835
836	/* avoid re-using remote and pfmemalloc pages */
837	if (!dev_page_is_reusable(page))
838		return false;
839
840#if (PAGE_SIZE < 8192)
841	/* if we are only owner of page we can reuse it */
842	if (unlikely(rx_buf->pgcnt - pagecnt_bias > 1))
843		return false;
844#else
845#define ICE_LAST_OFFSET \
846	(SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
847	if (rx_buf->page_offset > ICE_LAST_OFFSET)
848		return false;
849#endif /* PAGE_SIZE < 8192) */
850
851	/* If we have drained the page fragment pool we need to update
852	 * the pagecnt_bias and page count so that we fully restock the
853	 * number of references the driver holds.
854	 */
855	if (unlikely(pagecnt_bias == 1)) {
856		page_ref_add(page, USHRT_MAX - 1);
857		rx_buf->pagecnt_bias = USHRT_MAX;
858	}
859
860	return true;
861}
862
863/**
864 * ice_add_xdp_frag - Add contents of Rx buffer to xdp buf as a frag
865 * @rx_ring: Rx descriptor ring to transact packets on
866 * @xdp: xdp buff to place the data into
867 * @rx_buf: buffer containing page to add
868 * @size: packet length from rx_desc
869 *
870 * This function will add the data contained in rx_buf->page to the xdp buf.
871 * It will just attach the page as a frag.
872 */
873static int
874ice_add_xdp_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
875		 struct ice_rx_buf *rx_buf, const unsigned int size)
876{
877	struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
878
879	if (!size)
880		return 0;
881
882	if (!xdp_buff_has_frags(xdp)) {
883		sinfo->nr_frags = 0;
884		sinfo->xdp_frags_size = 0;
885		xdp_buff_set_frags_flag(xdp);
886	}
887
888	if (unlikely(sinfo->nr_frags == MAX_SKB_FRAGS)) {
889		ice_set_rx_bufs_act(xdp, rx_ring, ICE_XDP_CONSUMED);
890		return -ENOMEM;
891	}
892
893	__skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++, rx_buf->page,
894				   rx_buf->page_offset, size);
895	sinfo->xdp_frags_size += size;
896	/* remember frag count before XDP prog execution; bpf_xdp_adjust_tail()
897	 * can pop off frags but driver has to handle it on its own
898	 */
899	rx_ring->nr_frags = sinfo->nr_frags;
900
901	if (page_is_pfmemalloc(rx_buf->page))
902		xdp_buff_set_frag_pfmemalloc(xdp);
903
904	return 0;
905}
906
907/**
908 * ice_reuse_rx_page - page flip buffer and store it back on the ring
909 * @rx_ring: Rx descriptor ring to store buffers on
910 * @old_buf: donor buffer to have page reused
911 *
912 * Synchronizes page for reuse by the adapter
913 */
914static void
915ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
916{
917	u16 nta = rx_ring->next_to_alloc;
918	struct ice_rx_buf *new_buf;
919
920	new_buf = &rx_ring->rx_buf[nta];
921
922	/* update, and store next to alloc */
923	nta++;
924	rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
925
926	/* Transfer page from old buffer to new buffer.
927	 * Move each member individually to avoid possible store
928	 * forwarding stalls and unnecessary copy of skb.
929	 */
930	new_buf->dma = old_buf->dma;
931	new_buf->page = old_buf->page;
932	new_buf->page_offset = old_buf->page_offset;
933	new_buf->pagecnt_bias = old_buf->pagecnt_bias;
934}
935
936/**
937 * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
938 * @rx_ring: Rx descriptor ring to transact packets on
939 * @size: size of buffer to add to skb
940 * @ntc: index of next to clean element
941 *
942 * This function will pull an Rx buffer from the ring and synchronize it
943 * for use by the CPU.
944 */
945static struct ice_rx_buf *
946ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
947	       const unsigned int ntc)
948{
949	struct ice_rx_buf *rx_buf;
950
951	rx_buf = &rx_ring->rx_buf[ntc];
952	rx_buf->pgcnt =
953#if (PAGE_SIZE < 8192)
954		page_count(rx_buf->page);
955#else
956		0;
957#endif
958	prefetchw(rx_buf->page);
959
960	if (!size)
961		return rx_buf;
962	/* we are reusing so sync this buffer for CPU use */
963	dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
964				      rx_buf->page_offset, size,
965				      DMA_FROM_DEVICE);
966
967	/* We have pulled a buffer for use, so decrement pagecnt_bias */
968	rx_buf->pagecnt_bias--;
969
970	return rx_buf;
971}
972
973/**
974 * ice_build_skb - Build skb around an existing buffer
975 * @rx_ring: Rx descriptor ring to transact packets on
976 * @xdp: xdp_buff pointing to the data
977 *
978 * This function builds an skb around an existing XDP buffer, taking care
979 * to set up the skb correctly and avoid any memcpy overhead. Driver has
980 * already combined frags (if any) to skb_shared_info.
981 */
982static struct sk_buff *
983ice_build_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
984{
985	u8 metasize = xdp->data - xdp->data_meta;
986	struct skb_shared_info *sinfo = NULL;
987	unsigned int nr_frags;
988	struct sk_buff *skb;
989
990	if (unlikely(xdp_buff_has_frags(xdp))) {
991		sinfo = xdp_get_shared_info_from_buff(xdp);
992		nr_frags = sinfo->nr_frags;
993	}
994
995	/* Prefetch first cache line of first page. If xdp->data_meta
996	 * is unused, this points exactly as xdp->data, otherwise we
997	 * likely have a consumer accessing first few bytes of meta
998	 * data, and then actual data.
999	 */
1000	net_prefetch(xdp->data_meta);
1001	/* build an skb around the page buffer */
1002	skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
1003	if (unlikely(!skb))
1004		return NULL;
1005
1006	/* must to record Rx queue, otherwise OS features such as
1007	 * symmetric queue won't work
1008	 */
1009	skb_record_rx_queue(skb, rx_ring->q_index);
1010
1011	/* update pointers within the skb to store the data */
1012	skb_reserve(skb, xdp->data - xdp->data_hard_start);
1013	__skb_put(skb, xdp->data_end - xdp->data);
1014	if (metasize)
1015		skb_metadata_set(skb, metasize);
1016
1017	if (unlikely(xdp_buff_has_frags(xdp)))
1018		xdp_update_skb_shared_info(skb, nr_frags,
1019					   sinfo->xdp_frags_size,
1020					   nr_frags * xdp->frame_sz,
1021					   xdp_buff_is_frag_pfmemalloc(xdp));
1022
1023	return skb;
1024}
1025
1026/**
1027 * ice_construct_skb - Allocate skb and populate it
1028 * @rx_ring: Rx descriptor ring to transact packets on
1029 * @xdp: xdp_buff pointing to the data
1030 *
1031 * This function allocates an skb. It then populates it with the page
1032 * data from the current receive descriptor, taking care to set up the
1033 * skb correctly.
1034 */
1035static struct sk_buff *
1036ice_construct_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
1037{
1038	unsigned int size = xdp->data_end - xdp->data;
1039	struct skb_shared_info *sinfo = NULL;
1040	struct ice_rx_buf *rx_buf;
1041	unsigned int nr_frags = 0;
1042	unsigned int headlen;
1043	struct sk_buff *skb;
1044
1045	/* prefetch first cache line of first page */
1046	net_prefetch(xdp->data);
1047
1048	if (unlikely(xdp_buff_has_frags(xdp))) {
1049		sinfo = xdp_get_shared_info_from_buff(xdp);
1050		nr_frags = sinfo->nr_frags;
1051	}
1052
1053	/* allocate a skb to store the frags */
1054	skb = napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE);
1055	if (unlikely(!skb))
1056		return NULL;
1057
1058	rx_buf = &rx_ring->rx_buf[rx_ring->first_desc];
1059	skb_record_rx_queue(skb, rx_ring->q_index);
1060	/* Determine available headroom for copy */
1061	headlen = size;
1062	if (headlen > ICE_RX_HDR_SIZE)
1063		headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1064
1065	/* align pull length to size of long to optimize memcpy performance */
1066	memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen,
1067							 sizeof(long)));
1068
1069	/* if we exhaust the linear part then add what is left as a frag */
1070	size -= headlen;
1071	if (size) {
1072		/* besides adding here a partial frag, we are going to add
1073		 * frags from xdp_buff, make sure there is enough space for
1074		 * them
1075		 */
1076		if (unlikely(nr_frags >= MAX_SKB_FRAGS - 1)) {
1077			dev_kfree_skb(skb);
1078			return NULL;
1079		}
1080		skb_add_rx_frag(skb, 0, rx_buf->page,
1081				rx_buf->page_offset + headlen, size,
1082				xdp->frame_sz);
1083	} else {
1084		/* buffer is unused, change the act that should be taken later
1085		 * on; data was copied onto skb's linear part so there's no
1086		 * need for adjusting page offset and we can reuse this buffer
1087		 * as-is
1088		 */
1089		rx_buf->act = ICE_SKB_CONSUMED;
1090	}
1091
1092	if (unlikely(xdp_buff_has_frags(xdp))) {
1093		struct skb_shared_info *skinfo = skb_shinfo(skb);
1094
1095		memcpy(&skinfo->frags[skinfo->nr_frags], &sinfo->frags[0],
1096		       sizeof(skb_frag_t) * nr_frags);
1097
1098		xdp_update_skb_shared_info(skb, skinfo->nr_frags + nr_frags,
1099					   sinfo->xdp_frags_size,
1100					   nr_frags * xdp->frame_sz,
1101					   xdp_buff_is_frag_pfmemalloc(xdp));
1102	}
1103
1104	return skb;
1105}
1106
1107/**
1108 * ice_put_rx_buf - Clean up used buffer and either recycle or free
1109 * @rx_ring: Rx descriptor ring to transact packets on
1110 * @rx_buf: Rx buffer to pull data from
1111 *
1112 * This function will clean up the contents of the rx_buf. It will either
1113 * recycle the buffer or unmap it and free the associated resources.
1114 */
1115static void
1116ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf)
1117{
1118	if (!rx_buf)
1119		return;
1120
1121	if (ice_can_reuse_rx_page(rx_buf)) {
1122		/* hand second half of page back to the ring */
1123		ice_reuse_rx_page(rx_ring, rx_buf);
1124	} else {
1125		/* we are not reusing the buffer so unmap it */
1126		dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1127				     ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1128				     ICE_RX_DMA_ATTR);
1129		__page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1130	}
1131
1132	/* clear contents of buffer_info */
1133	rx_buf->page = NULL;
1134}
1135
1136/**
1137 * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1138 * @rx_ring: Rx descriptor ring to transact packets on
1139 * @budget: Total limit on number of packets to process
1140 *
1141 * This function provides a "bounce buffer" approach to Rx interrupt
1142 * processing. The advantage to this is that on systems that have
1143 * expensive overhead for IOMMU access this provides a means of avoiding
1144 * it by maintaining the mapping of the page to the system.
1145 *
1146 * Returns amount of work completed
1147 */
1148int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1149{
1150	unsigned int total_rx_bytes = 0, total_rx_pkts = 0;
1151	unsigned int offset = rx_ring->rx_offset;
1152	struct xdp_buff *xdp = &rx_ring->xdp;
1153	u32 cached_ntc = rx_ring->first_desc;
1154	struct ice_tx_ring *xdp_ring = NULL;
1155	struct bpf_prog *xdp_prog = NULL;
1156	u32 ntc = rx_ring->next_to_clean;
1157	u32 cnt = rx_ring->count;
1158	u32 xdp_xmit = 0;
1159	u32 cached_ntu;
1160	bool failure;
1161	u32 first;
1162
1163	/* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1164#if (PAGE_SIZE < 8192)
1165	xdp->frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1166#endif
1167
1168	xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1169	if (xdp_prog) {
1170		xdp_ring = rx_ring->xdp_ring;
1171		cached_ntu = xdp_ring->next_to_use;
1172	}
1173
1174	/* start the loop to process Rx packets bounded by 'budget' */
1175	while (likely(total_rx_pkts < (unsigned int)budget)) {
1176		union ice_32b_rx_flex_desc *rx_desc;
1177		struct ice_rx_buf *rx_buf;
1178		struct sk_buff *skb;
1179		unsigned int size;
1180		u16 stat_err_bits;
1181		u16 vlan_tci;
1182
1183		/* get the Rx desc from Rx ring based on 'next_to_clean' */
1184		rx_desc = ICE_RX_DESC(rx_ring, ntc);
1185
1186		/* status_error_len will always be zero for unused descriptors
1187		 * because it's cleared in cleanup, and overlaps with hdr_addr
1188		 * which is always zero because packet split isn't used, if the
1189		 * hardware wrote DD then it will be non-zero
1190		 */
1191		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1192		if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1193			break;
1194
1195		/* This memory barrier is needed to keep us from reading
1196		 * any other fields out of the rx_desc until we know the
1197		 * DD bit is set.
1198		 */
1199		dma_rmb();
1200
1201		ice_trace(clean_rx_irq, rx_ring, rx_desc);
1202		if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1203			struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1204
1205			if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1206			    ctrl_vsi->vf)
1207				ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1208			if (++ntc == cnt)
1209				ntc = 0;
1210			rx_ring->first_desc = ntc;
1211			continue;
1212		}
1213
1214		size = le16_to_cpu(rx_desc->wb.pkt_len) &
1215			ICE_RX_FLX_DESC_PKT_LEN_M;
1216
1217		/* retrieve a buffer from the ring */
1218		rx_buf = ice_get_rx_buf(rx_ring, size, ntc);
1219
1220		if (!xdp->data) {
1221			void *hard_start;
1222
1223			hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1224				     offset;
1225			xdp_prepare_buff(xdp, hard_start, offset, size, !!offset);
1226#if (PAGE_SIZE > 4096)
1227			/* At larger PAGE_SIZE, frame_sz depend on len size */
1228			xdp->frame_sz = ice_rx_frame_truesize(rx_ring, size);
1229#endif
1230			xdp_buff_clear_frags_flag(xdp);
1231		} else if (ice_add_xdp_frag(rx_ring, xdp, rx_buf, size)) {
1232			break;
1233		}
1234		if (++ntc == cnt)
1235			ntc = 0;
1236
1237		/* skip if it is NOP desc */
1238		if (ice_is_non_eop(rx_ring, rx_desc))
1239			continue;
1240
1241		ice_run_xdp(rx_ring, xdp, xdp_prog, xdp_ring, rx_buf, rx_desc);
1242		if (rx_buf->act == ICE_XDP_PASS)
1243			goto construct_skb;
1244		total_rx_bytes += xdp_get_buff_len(xdp);
1245		total_rx_pkts++;
1246
1247		xdp->data = NULL;
1248		rx_ring->first_desc = ntc;
1249		rx_ring->nr_frags = 0;
1250		continue;
1251construct_skb:
1252		if (likely(ice_ring_uses_build_skb(rx_ring)))
1253			skb = ice_build_skb(rx_ring, xdp);
1254		else
1255			skb = ice_construct_skb(rx_ring, xdp);
1256		/* exit if we failed to retrieve a buffer */
1257		if (!skb) {
1258			rx_ring->ring_stats->rx_stats.alloc_page_failed++;
1259			rx_buf->act = ICE_XDP_CONSUMED;
1260			if (unlikely(xdp_buff_has_frags(xdp)))
1261				ice_set_rx_bufs_act(xdp, rx_ring,
1262						    ICE_XDP_CONSUMED);
1263			xdp->data = NULL;
1264			rx_ring->first_desc = ntc;
1265			rx_ring->nr_frags = 0;
1266			break;
1267		}
1268		xdp->data = NULL;
1269		rx_ring->first_desc = ntc;
1270		rx_ring->nr_frags = 0;
1271
1272		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1273		if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1274					      stat_err_bits))) {
1275			dev_kfree_skb_any(skb);
1276			continue;
1277		}
1278
1279		vlan_tci = ice_get_vlan_tci(rx_desc);
1280
1281		/* pad the skb if needed, to make a valid ethernet frame */
1282		if (eth_skb_pad(skb))
1283			continue;
1284
1285		/* probably a little skewed due to removing CRC */
1286		total_rx_bytes += skb->len;
1287
1288		/* populate checksum, VLAN, and protocol */
1289		ice_process_skb_fields(rx_ring, rx_desc, skb);
1290
1291		ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1292		/* send completed skb up the stack */
1293		ice_receive_skb(rx_ring, skb, vlan_tci);
1294
1295		/* update budget accounting */
1296		total_rx_pkts++;
1297	}
1298
1299	first = rx_ring->first_desc;
1300	while (cached_ntc != first) {
1301		struct ice_rx_buf *buf = &rx_ring->rx_buf[cached_ntc];
1302
1303		if (buf->act & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1304			ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1305			xdp_xmit |= buf->act;
1306		} else if (buf->act & ICE_XDP_CONSUMED) {
1307			buf->pagecnt_bias++;
1308		} else if (buf->act == ICE_XDP_PASS) {
1309			ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1310		}
1311
1312		ice_put_rx_buf(rx_ring, buf);
1313		if (++cached_ntc >= cnt)
1314			cached_ntc = 0;
1315	}
1316	rx_ring->next_to_clean = ntc;
1317	/* return up to cleaned_count buffers to hardware */
1318	failure = ice_alloc_rx_bufs(rx_ring, ICE_RX_DESC_UNUSED(rx_ring));
1319
1320	if (xdp_xmit)
1321		ice_finalize_xdp_rx(xdp_ring, xdp_xmit, cached_ntu);
1322
1323	if (rx_ring->ring_stats)
1324		ice_update_rx_ring_stats(rx_ring, total_rx_pkts,
1325					 total_rx_bytes);
1326
1327	/* guarantee a trip back through this routine if there was a failure */
1328	return failure ? budget : (int)total_rx_pkts;
1329}
1330
1331static void __ice_update_sample(struct ice_q_vector *q_vector,
1332				struct ice_ring_container *rc,
1333				struct dim_sample *sample,
1334				bool is_tx)
1335{
1336	u64 packets = 0, bytes = 0;
1337
1338	if (is_tx) {
1339		struct ice_tx_ring *tx_ring;
1340
1341		ice_for_each_tx_ring(tx_ring, *rc) {
1342			struct ice_ring_stats *ring_stats;
1343
1344			ring_stats = tx_ring->ring_stats;
1345			if (!ring_stats)
1346				continue;
1347			packets += ring_stats->stats.pkts;
1348			bytes += ring_stats->stats.bytes;
1349		}
1350	} else {
1351		struct ice_rx_ring *rx_ring;
1352
1353		ice_for_each_rx_ring(rx_ring, *rc) {
1354			struct ice_ring_stats *ring_stats;
1355
1356			ring_stats = rx_ring->ring_stats;
1357			if (!ring_stats)
1358				continue;
1359			packets += ring_stats->stats.pkts;
1360			bytes += ring_stats->stats.bytes;
1361		}
1362	}
1363
1364	dim_update_sample(q_vector->total_events, packets, bytes, sample);
1365	sample->comp_ctr = 0;
1366
1367	/* if dim settings get stale, like when not updated for 1
1368	 * second or longer, force it to start again. This addresses the
1369	 * frequent case of an idle queue being switched to by the
1370	 * scheduler. The 1,000 here means 1,000 milliseconds.
1371	 */
1372	if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1373		rc->dim.state = DIM_START_MEASURE;
1374}
1375
1376/**
1377 * ice_net_dim - Update net DIM algorithm
1378 * @q_vector: the vector associated with the interrupt
1379 *
1380 * Create a DIM sample and notify net_dim() so that it can possibly decide
1381 * a new ITR value based on incoming packets, bytes, and interrupts.
1382 *
1383 * This function is a no-op if the ring is not configured to dynamic ITR.
1384 */
1385static void ice_net_dim(struct ice_q_vector *q_vector)
1386{
1387	struct ice_ring_container *tx = &q_vector->tx;
1388	struct ice_ring_container *rx = &q_vector->rx;
1389
1390	if (ITR_IS_DYNAMIC(tx)) {
1391		struct dim_sample dim_sample;
1392
1393		__ice_update_sample(q_vector, tx, &dim_sample, true);
1394		net_dim(&tx->dim, dim_sample);
1395	}
1396
1397	if (ITR_IS_DYNAMIC(rx)) {
1398		struct dim_sample dim_sample;
1399
1400		__ice_update_sample(q_vector, rx, &dim_sample, false);
1401		net_dim(&rx->dim, dim_sample);
1402	}
1403}
1404
1405/**
1406 * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1407 * @itr_idx: interrupt throttling index
1408 * @itr: interrupt throttling value in usecs
1409 */
1410static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1411{
1412	/* The ITR value is reported in microseconds, and the register value is
1413	 * recorded in 2 microsecond units. For this reason we only need to
1414	 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1415	 * granularity as a shift instead of division. The mask makes sure the
1416	 * ITR value is never odd so we don't accidentally write into the field
1417	 * prior to the ITR field.
1418	 */
1419	itr &= ICE_ITR_MASK;
1420
1421	return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1422		(itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1423		(itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1424}
1425
1426/**
1427 * ice_enable_interrupt - re-enable MSI-X interrupt
1428 * @q_vector: the vector associated with the interrupt to enable
1429 *
1430 * If the VSI is down, the interrupt will not be re-enabled. Also,
1431 * when enabling the interrupt always reset the wb_on_itr to false
1432 * and trigger a software interrupt to clean out internal state.
1433 */
1434static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1435{
1436	struct ice_vsi *vsi = q_vector->vsi;
1437	bool wb_en = q_vector->wb_on_itr;
1438	u32 itr_val;
1439
1440	if (test_bit(ICE_DOWN, vsi->state))
1441		return;
1442
1443	/* trigger an ITR delayed software interrupt when exiting busy poll, to
1444	 * make sure to catch any pending cleanups that might have been missed
1445	 * due to interrupt state transition. If busy poll or poll isn't
1446	 * enabled, then don't update ITR, and just enable the interrupt.
1447	 */
1448	if (!wb_en) {
1449		itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1450	} else {
1451		q_vector->wb_on_itr = false;
1452
1453		/* do two things here with a single write. Set up the third ITR
1454		 * index to be used for software interrupt moderation, and then
1455		 * trigger a software interrupt with a rate limit of 20K on
1456		 * software interrupts, this will help avoid high interrupt
1457		 * loads due to frequently polling and exiting polling.
1458		 */
1459		itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1460		itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1461			   ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1462			   GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1463	}
1464	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1465}
1466
1467/**
1468 * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1469 * @q_vector: q_vector to set WB_ON_ITR on
1470 *
1471 * We need to tell hardware to write-back completed descriptors even when
1472 * interrupts are disabled. Descriptors will be written back on cache line
1473 * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1474 * descriptors may not be written back if they don't fill a cache line until
1475 * the next interrupt.
1476 *
1477 * This sets the write-back frequency to whatever was set previously for the
1478 * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1479 * aren't meddling with the INTENA_M bit.
1480 */
1481static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1482{
1483	struct ice_vsi *vsi = q_vector->vsi;
1484
1485	/* already in wb_on_itr mode no need to change it */
1486	if (q_vector->wb_on_itr)
1487		return;
1488
1489	/* use previously set ITR values for all of the ITR indices by
1490	 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1491	 * be static in non-adaptive mode (user configured)
1492	 */
1493	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1494	     FIELD_PREP(GLINT_DYN_CTL_ITR_INDX_M, ICE_ITR_NONE) |
1495	     FIELD_PREP(GLINT_DYN_CTL_INTENA_MSK_M, 1) |
1496	     FIELD_PREP(GLINT_DYN_CTL_WB_ON_ITR_M, 1));
1497
1498	q_vector->wb_on_itr = true;
1499}
1500
1501/**
1502 * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1503 * @napi: napi struct with our devices info in it
1504 * @budget: amount of work driver is allowed to do this pass, in packets
1505 *
1506 * This function will clean all queues associated with a q_vector.
1507 *
1508 * Returns the amount of work done
1509 */
1510int ice_napi_poll(struct napi_struct *napi, int budget)
1511{
1512	struct ice_q_vector *q_vector =
1513				container_of(napi, struct ice_q_vector, napi);
1514	struct ice_tx_ring *tx_ring;
1515	struct ice_rx_ring *rx_ring;
1516	bool clean_complete = true;
1517	int budget_per_ring;
1518	int work_done = 0;
1519
1520	/* Since the actual Tx work is minimal, we can give the Tx a larger
1521	 * budget and be more aggressive about cleaning up the Tx descriptors.
1522	 */
1523	ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1524		bool wd;
1525
1526		if (tx_ring->xsk_pool)
1527			wd = ice_xmit_zc(tx_ring);
1528		else if (ice_ring_is_xdp(tx_ring))
1529			wd = true;
1530		else
1531			wd = ice_clean_tx_irq(tx_ring, budget);
1532
1533		if (!wd)
1534			clean_complete = false;
1535	}
1536
1537	/* Handle case where we are called by netpoll with a budget of 0 */
1538	if (unlikely(budget <= 0))
1539		return budget;
1540
1541	/* normally we have 1 Rx ring per q_vector */
1542	if (unlikely(q_vector->num_ring_rx > 1))
1543		/* We attempt to distribute budget to each Rx queue fairly, but
1544		 * don't allow the budget to go below 1 because that would exit
1545		 * polling early.
1546		 */
1547		budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1548	else
1549		/* Max of 1 Rx ring in this q_vector so give it the budget */
1550		budget_per_ring = budget;
1551
1552	ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1553		int cleaned;
1554
1555		/* A dedicated path for zero-copy allows making a single
1556		 * comparison in the irq context instead of many inside the
1557		 * ice_clean_rx_irq function and makes the codebase cleaner.
1558		 */
1559		cleaned = rx_ring->xsk_pool ?
1560			  ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1561			  ice_clean_rx_irq(rx_ring, budget_per_ring);
1562		work_done += cleaned;
1563		/* if we clean as many as budgeted, we must not be done */
1564		if (cleaned >= budget_per_ring)
1565			clean_complete = false;
1566	}
1567
1568	/* If work not completed, return budget and polling will return */
1569	if (!clean_complete) {
1570		/* Set the writeback on ITR so partial completions of
1571		 * cache-lines will still continue even if we're polling.
1572		 */
1573		ice_set_wb_on_itr(q_vector);
1574		return budget;
1575	}
1576
1577	/* Exit the polling mode, but don't re-enable interrupts if stack might
1578	 * poll us due to busy-polling
1579	 */
1580	if (napi_complete_done(napi, work_done)) {
1581		ice_net_dim(q_vector);
1582		ice_enable_interrupt(q_vector);
1583	} else {
1584		ice_set_wb_on_itr(q_vector);
1585	}
1586
1587	return min_t(int, work_done, budget - 1);
1588}
1589
1590/**
1591 * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1592 * @tx_ring: the ring to be checked
1593 * @size: the size buffer we want to assure is available
1594 *
1595 * Returns -EBUSY if a stop is needed, else 0
1596 */
1597static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1598{
1599	netif_tx_stop_queue(txring_txq(tx_ring));
1600	/* Memory barrier before checking head and tail */
1601	smp_mb();
1602
1603	/* Check again in a case another CPU has just made room available. */
1604	if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1605		return -EBUSY;
1606
1607	/* A reprieve! - use start_queue because it doesn't call schedule */
1608	netif_tx_start_queue(txring_txq(tx_ring));
1609	++tx_ring->ring_stats->tx_stats.restart_q;
1610	return 0;
1611}
1612
1613/**
1614 * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1615 * @tx_ring: the ring to be checked
1616 * @size:    the size buffer we want to assure is available
1617 *
1618 * Returns 0 if stop is not needed
1619 */
1620static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1621{
1622	if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1623		return 0;
1624
1625	return __ice_maybe_stop_tx(tx_ring, size);
1626}
1627
1628/**
1629 * ice_tx_map - Build the Tx descriptor
1630 * @tx_ring: ring to send buffer on
1631 * @first: first buffer info buffer to use
1632 * @off: pointer to struct that holds offload parameters
1633 *
1634 * This function loops over the skb data pointed to by *first
1635 * and gets a physical address for each memory location and programs
1636 * it and the length into the transmit descriptor.
1637 */
1638static void
1639ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1640	   struct ice_tx_offload_params *off)
1641{
1642	u64 td_offset, td_tag, td_cmd;
1643	u16 i = tx_ring->next_to_use;
1644	unsigned int data_len, size;
1645	struct ice_tx_desc *tx_desc;
1646	struct ice_tx_buf *tx_buf;
1647	struct sk_buff *skb;
1648	skb_frag_t *frag;
1649	dma_addr_t dma;
1650	bool kick;
1651
1652	td_tag = off->td_l2tag1;
1653	td_cmd = off->td_cmd;
1654	td_offset = off->td_offset;
1655	skb = first->skb;
1656
1657	data_len = skb->data_len;
1658	size = skb_headlen(skb);
1659
1660	tx_desc = ICE_TX_DESC(tx_ring, i);
1661
1662	if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1663		td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1664		td_tag = first->vid;
1665	}
1666
1667	dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1668
1669	tx_buf = first;
1670
1671	for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1672		unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1673
1674		if (dma_mapping_error(tx_ring->dev, dma))
1675			goto dma_error;
1676
1677		/* record length, and DMA address */
1678		dma_unmap_len_set(tx_buf, len, size);
1679		dma_unmap_addr_set(tx_buf, dma, dma);
1680
1681		/* align size to end of page */
1682		max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1683		tx_desc->buf_addr = cpu_to_le64(dma);
1684
1685		/* account for data chunks larger than the hardware
1686		 * can handle
1687		 */
1688		while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1689			tx_desc->cmd_type_offset_bsz =
1690				ice_build_ctob(td_cmd, td_offset, max_data,
1691					       td_tag);
1692
1693			tx_desc++;
1694			i++;
1695
1696			if (i == tx_ring->count) {
1697				tx_desc = ICE_TX_DESC(tx_ring, 0);
1698				i = 0;
1699			}
1700
1701			dma += max_data;
1702			size -= max_data;
1703
1704			max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1705			tx_desc->buf_addr = cpu_to_le64(dma);
1706		}
1707
1708		if (likely(!data_len))
1709			break;
1710
1711		tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1712							      size, td_tag);
1713
1714		tx_desc++;
1715		i++;
1716
1717		if (i == tx_ring->count) {
1718			tx_desc = ICE_TX_DESC(tx_ring, 0);
1719			i = 0;
1720		}
1721
1722		size = skb_frag_size(frag);
1723		data_len -= size;
1724
1725		dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1726				       DMA_TO_DEVICE);
1727
1728		tx_buf = &tx_ring->tx_buf[i];
1729		tx_buf->type = ICE_TX_BUF_FRAG;
1730	}
1731
1732	/* record SW timestamp if HW timestamp is not available */
1733	skb_tx_timestamp(first->skb);
1734
1735	i++;
1736	if (i == tx_ring->count)
1737		i = 0;
1738
1739	/* write last descriptor with RS and EOP bits */
1740	td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1741	tx_desc->cmd_type_offset_bsz =
1742			ice_build_ctob(td_cmd, td_offset, size, td_tag);
1743
1744	/* Force memory writes to complete before letting h/w know there
1745	 * are new descriptors to fetch.
1746	 *
1747	 * We also use this memory barrier to make certain all of the
1748	 * status bits have been updated before next_to_watch is written.
1749	 */
1750	wmb();
1751
1752	/* set next_to_watch value indicating a packet is present */
1753	first->next_to_watch = tx_desc;
1754
1755	tx_ring->next_to_use = i;
1756
1757	ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1758
1759	/* notify HW of packet */
1760	kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1761				      netdev_xmit_more());
1762	if (kick)
1763		/* notify HW of packet */
1764		writel(i, tx_ring->tail);
1765
1766	return;
1767
1768dma_error:
1769	/* clear DMA mappings for failed tx_buf map */
1770	for (;;) {
1771		tx_buf = &tx_ring->tx_buf[i];
1772		ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1773		if (tx_buf == first)
1774			break;
1775		if (i == 0)
1776			i = tx_ring->count;
1777		i--;
1778	}
1779
1780	tx_ring->next_to_use = i;
1781}
1782
1783/**
1784 * ice_tx_csum - Enable Tx checksum offloads
1785 * @first: pointer to the first descriptor
1786 * @off: pointer to struct that holds offload parameters
1787 *
1788 * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1789 */
1790static
1791int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1792{
1793	u32 l4_len = 0, l3_len = 0, l2_len = 0;
1794	struct sk_buff *skb = first->skb;
1795	union {
1796		struct iphdr *v4;
1797		struct ipv6hdr *v6;
1798		unsigned char *hdr;
1799	} ip;
1800	union {
1801		struct tcphdr *tcp;
1802		unsigned char *hdr;
1803	} l4;
1804	__be16 frag_off, protocol;
1805	unsigned char *exthdr;
1806	u32 offset, cmd = 0;
1807	u8 l4_proto = 0;
1808
1809	if (skb->ip_summed != CHECKSUM_PARTIAL)
1810		return 0;
1811
1812	protocol = vlan_get_protocol(skb);
1813
1814	if (eth_p_mpls(protocol)) {
1815		ip.hdr = skb_inner_network_header(skb);
1816		l4.hdr = skb_checksum_start(skb);
1817	} else {
1818		ip.hdr = skb_network_header(skb);
1819		l4.hdr = skb_transport_header(skb);
1820	}
1821
1822	/* compute outer L2 header size */
1823	l2_len = ip.hdr - skb->data;
1824	offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1825
1826	/* set the tx_flags to indicate the IP protocol type. this is
1827	 * required so that checksum header computation below is accurate.
1828	 */
1829	if (ip.v4->version == 4)
1830		first->tx_flags |= ICE_TX_FLAGS_IPV4;
1831	else if (ip.v6->version == 6)
1832		first->tx_flags |= ICE_TX_FLAGS_IPV6;
1833
1834	if (skb->encapsulation) {
1835		bool gso_ena = false;
1836		u32 tunnel = 0;
1837
1838		/* define outer network header type */
1839		if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1840			tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1841				  ICE_TX_CTX_EIPT_IPV4 :
1842				  ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1843			l4_proto = ip.v4->protocol;
1844		} else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1845			int ret;
1846
1847			tunnel |= ICE_TX_CTX_EIPT_IPV6;
1848			exthdr = ip.hdr + sizeof(*ip.v6);
1849			l4_proto = ip.v6->nexthdr;
1850			ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1851					       &l4_proto, &frag_off);
1852			if (ret < 0)
1853				return -1;
1854		}
1855
1856		/* define outer transport */
1857		switch (l4_proto) {
1858		case IPPROTO_UDP:
1859			tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1860			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1861			break;
1862		case IPPROTO_GRE:
1863			tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1864			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1865			break;
1866		case IPPROTO_IPIP:
1867		case IPPROTO_IPV6:
1868			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1869			l4.hdr = skb_inner_network_header(skb);
1870			break;
1871		default:
1872			if (first->tx_flags & ICE_TX_FLAGS_TSO)
1873				return -1;
1874
1875			skb_checksum_help(skb);
1876			return 0;
1877		}
1878
1879		/* compute outer L3 header size */
1880		tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1881			  ICE_TXD_CTX_QW0_EIPLEN_S;
1882
1883		/* switch IP header pointer from outer to inner header */
1884		ip.hdr = skb_inner_network_header(skb);
1885
1886		/* compute tunnel header size */
1887		tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1888			   ICE_TXD_CTX_QW0_NATLEN_S;
1889
1890		gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1891		/* indicate if we need to offload outer UDP header */
1892		if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1893		    (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1894			tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1895
1896		/* record tunnel offload values */
1897		off->cd_tunnel_params |= tunnel;
1898
1899		/* set DTYP=1 to indicate that it's an Tx context descriptor
1900		 * in IPsec tunnel mode with Tx offloads in Quad word 1
1901		 */
1902		off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1903
1904		/* switch L4 header pointer from outer to inner */
1905		l4.hdr = skb_inner_transport_header(skb);
1906		l4_proto = 0;
1907
1908		/* reset type as we transition from outer to inner headers */
1909		first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1910		if (ip.v4->version == 4)
1911			first->tx_flags |= ICE_TX_FLAGS_IPV4;
1912		if (ip.v6->version == 6)
1913			first->tx_flags |= ICE_TX_FLAGS_IPV6;
1914	}
1915
1916	/* Enable IP checksum offloads */
1917	if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1918		l4_proto = ip.v4->protocol;
1919		/* the stack computes the IP header already, the only time we
1920		 * need the hardware to recompute it is in the case of TSO.
1921		 */
1922		if (first->tx_flags & ICE_TX_FLAGS_TSO)
1923			cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1924		else
1925			cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1926
1927	} else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1928		cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1929		exthdr = ip.hdr + sizeof(*ip.v6);
1930		l4_proto = ip.v6->nexthdr;
1931		if (l4.hdr != exthdr)
1932			ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1933					 &frag_off);
1934	} else {
1935		return -1;
1936	}
1937
1938	/* compute inner L3 header size */
1939	l3_len = l4.hdr - ip.hdr;
1940	offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1941
1942	/* Enable L4 checksum offloads */
1943	switch (l4_proto) {
1944	case IPPROTO_TCP:
1945		/* enable checksum offloads */
1946		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1947		l4_len = l4.tcp->doff;
1948		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1949		break;
1950	case IPPROTO_UDP:
1951		/* enable UDP checksum offload */
1952		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1953		l4_len = (sizeof(struct udphdr) >> 2);
1954		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1955		break;
1956	case IPPROTO_SCTP:
1957		/* enable SCTP checksum offload */
1958		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1959		l4_len = sizeof(struct sctphdr) >> 2;
1960		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1961		break;
1962
1963	default:
1964		if (first->tx_flags & ICE_TX_FLAGS_TSO)
1965			return -1;
1966		skb_checksum_help(skb);
1967		return 0;
1968	}
1969
1970	off->td_cmd |= cmd;
1971	off->td_offset |= offset;
1972	return 1;
1973}
1974
1975/**
1976 * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1977 * @tx_ring: ring to send buffer on
1978 * @first: pointer to struct ice_tx_buf
1979 *
1980 * Checks the skb and set up correspondingly several generic transmit flags
1981 * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1982 */
1983static void
1984ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
1985{
1986	struct sk_buff *skb = first->skb;
1987
1988	/* nothing left to do, software offloaded VLAN */
1989	if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1990		return;
1991
1992	/* the VLAN ethertype/tpid is determined by VSI configuration and netdev
1993	 * feature flags, which the driver only allows either 802.1Q or 802.1ad
1994	 * VLAN offloads exclusively so we only care about the VLAN ID here
1995	 */
1996	if (skb_vlan_tag_present(skb)) {
1997		first->vid = skb_vlan_tag_get(skb);
1998		if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
1999			first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
2000		else
2001			first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
2002	}
2003
2004	ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
2005}
2006
2007/**
2008 * ice_tso - computes mss and TSO length to prepare for TSO
2009 * @first: pointer to struct ice_tx_buf
2010 * @off: pointer to struct that holds offload parameters
2011 *
2012 * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
2013 */
2014static
2015int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2016{
2017	struct sk_buff *skb = first->skb;
2018	union {
2019		struct iphdr *v4;
2020		struct ipv6hdr *v6;
2021		unsigned char *hdr;
2022	} ip;
2023	union {
2024		struct tcphdr *tcp;
2025		struct udphdr *udp;
2026		unsigned char *hdr;
2027	} l4;
2028	u64 cd_mss, cd_tso_len;
2029	__be16 protocol;
2030	u32 paylen;
2031	u8 l4_start;
2032	int err;
2033
2034	if (skb->ip_summed != CHECKSUM_PARTIAL)
2035		return 0;
2036
2037	if (!skb_is_gso(skb))
2038		return 0;
2039
2040	err = skb_cow_head(skb, 0);
2041	if (err < 0)
2042		return err;
2043
2044	protocol = vlan_get_protocol(skb);
2045
2046	if (eth_p_mpls(protocol))
2047		ip.hdr = skb_inner_network_header(skb);
2048	else
2049		ip.hdr = skb_network_header(skb);
2050	l4.hdr = skb_checksum_start(skb);
2051
2052	/* initialize outer IP header fields */
2053	if (ip.v4->version == 4) {
2054		ip.v4->tot_len = 0;
2055		ip.v4->check = 0;
2056	} else {
2057		ip.v6->payload_len = 0;
2058	}
2059
2060	if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2061					 SKB_GSO_GRE_CSUM |
2062					 SKB_GSO_IPXIP4 |
2063					 SKB_GSO_IPXIP6 |
2064					 SKB_GSO_UDP_TUNNEL |
2065					 SKB_GSO_UDP_TUNNEL_CSUM)) {
2066		if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2067		    (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2068			l4.udp->len = 0;
2069
2070			/* determine offset of outer transport header */
2071			l4_start = (u8)(l4.hdr - skb->data);
2072
2073			/* remove payload length from outer checksum */
2074			paylen = skb->len - l4_start;
2075			csum_replace_by_diff(&l4.udp->check,
2076					     (__force __wsum)htonl(paylen));
2077		}
2078
2079		/* reset pointers to inner headers */
2080		ip.hdr = skb_inner_network_header(skb);
2081		l4.hdr = skb_inner_transport_header(skb);
2082
2083		/* initialize inner IP header fields */
2084		if (ip.v4->version == 4) {
2085			ip.v4->tot_len = 0;
2086			ip.v4->check = 0;
2087		} else {
2088			ip.v6->payload_len = 0;
2089		}
2090	}
2091
2092	/* determine offset of transport header */
2093	l4_start = (u8)(l4.hdr - skb->data);
2094
2095	/* remove payload length from checksum */
2096	paylen = skb->len - l4_start;
2097
2098	if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2099		csum_replace_by_diff(&l4.udp->check,
2100				     (__force __wsum)htonl(paylen));
2101		/* compute length of UDP segmentation header */
2102		off->header_len = (u8)sizeof(l4.udp) + l4_start;
2103	} else {
2104		csum_replace_by_diff(&l4.tcp->check,
2105				     (__force __wsum)htonl(paylen));
2106		/* compute length of TCP segmentation header */
2107		off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2108	}
2109
2110	/* update gso_segs and bytecount */
2111	first->gso_segs = skb_shinfo(skb)->gso_segs;
2112	first->bytecount += (first->gso_segs - 1) * off->header_len;
2113
2114	cd_tso_len = skb->len - off->header_len;
2115	cd_mss = skb_shinfo(skb)->gso_size;
2116
2117	/* record cdesc_qw1 with TSO parameters */
2118	off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2119			     (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2120			     (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2121			     (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2122	first->tx_flags |= ICE_TX_FLAGS_TSO;
2123	return 1;
2124}
2125
2126/**
2127 * ice_txd_use_count  - estimate the number of descriptors needed for Tx
2128 * @size: transmit request size in bytes
2129 *
2130 * Due to hardware alignment restrictions (4K alignment), we need to
2131 * assume that we can have no more than 12K of data per descriptor, even
2132 * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2133 * Thus, we need to divide by 12K. But division is slow! Instead,
2134 * we decompose the operation into shifts and one relatively cheap
2135 * multiply operation.
2136 *
2137 * To divide by 12K, we first divide by 4K, then divide by 3:
2138 *     To divide by 4K, shift right by 12 bits
2139 *     To divide by 3, multiply by 85, then divide by 256
2140 *     (Divide by 256 is done by shifting right by 8 bits)
2141 * Finally, we add one to round up. Because 256 isn't an exact multiple of
2142 * 3, we'll underestimate near each multiple of 12K. This is actually more
2143 * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2144 * segment. For our purposes this is accurate out to 1M which is orders of
2145 * magnitude greater than our largest possible GSO size.
2146 *
2147 * This would then be implemented as:
2148 *     return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2149 *
2150 * Since multiplication and division are commutative, we can reorder
2151 * operations into:
2152 *     return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2153 */
2154static unsigned int ice_txd_use_count(unsigned int size)
2155{
2156	return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2157}
2158
2159/**
2160 * ice_xmit_desc_count - calculate number of Tx descriptors needed
2161 * @skb: send buffer
2162 *
2163 * Returns number of data descriptors needed for this skb.
2164 */
2165static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2166{
2167	const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2168	unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2169	unsigned int count = 0, size = skb_headlen(skb);
2170
2171	for (;;) {
2172		count += ice_txd_use_count(size);
2173
2174		if (!nr_frags--)
2175			break;
2176
2177		size = skb_frag_size(frag++);
2178	}
2179
2180	return count;
2181}
2182
2183/**
2184 * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2185 * @skb: send buffer
2186 *
2187 * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2188 * and so we need to figure out the cases where we need to linearize the skb.
2189 *
2190 * For TSO we need to count the TSO header and segment payload separately.
2191 * As such we need to check cases where we have 7 fragments or more as we
2192 * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2193 * the segment payload in the first descriptor, and another 7 for the
2194 * fragments.
2195 */
2196static bool __ice_chk_linearize(struct sk_buff *skb)
2197{
2198	const skb_frag_t *frag, *stale;
2199	int nr_frags, sum;
2200
2201	/* no need to check if number of frags is less than 7 */
2202	nr_frags = skb_shinfo(skb)->nr_frags;
2203	if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2204		return false;
2205
2206	/* We need to walk through the list and validate that each group
2207	 * of 6 fragments totals at least gso_size.
2208	 */
2209	nr_frags -= ICE_MAX_BUF_TXD - 2;
2210	frag = &skb_shinfo(skb)->frags[0];
2211
2212	/* Initialize size to the negative value of gso_size minus 1. We
2213	 * use this as the worst case scenario in which the frag ahead
2214	 * of us only provides one byte which is why we are limited to 6
2215	 * descriptors for a single transmit as the header and previous
2216	 * fragment are already consuming 2 descriptors.
2217	 */
2218	sum = 1 - skb_shinfo(skb)->gso_size;
2219
2220	/* Add size of frags 0 through 4 to create our initial sum */
2221	sum += skb_frag_size(frag++);
2222	sum += skb_frag_size(frag++);
2223	sum += skb_frag_size(frag++);
2224	sum += skb_frag_size(frag++);
2225	sum += skb_frag_size(frag++);
2226
2227	/* Walk through fragments adding latest fragment, testing it, and
2228	 * then removing stale fragments from the sum.
2229	 */
2230	for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2231		int stale_size = skb_frag_size(stale);
2232
2233		sum += skb_frag_size(frag++);
2234
2235		/* The stale fragment may present us with a smaller
2236		 * descriptor than the actual fragment size. To account
2237		 * for that we need to remove all the data on the front and
2238		 * figure out what the remainder would be in the last
2239		 * descriptor associated with the fragment.
2240		 */
2241		if (stale_size > ICE_MAX_DATA_PER_TXD) {
2242			int align_pad = -(skb_frag_off(stale)) &
2243					(ICE_MAX_READ_REQ_SIZE - 1);
2244
2245			sum -= align_pad;
2246			stale_size -= align_pad;
2247
2248			do {
2249				sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2250				stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2251			} while (stale_size > ICE_MAX_DATA_PER_TXD);
2252		}
2253
2254		/* if sum is negative we failed to make sufficient progress */
2255		if (sum < 0)
2256			return true;
2257
2258		if (!nr_frags--)
2259			break;
2260
2261		sum -= stale_size;
2262	}
2263
2264	return false;
2265}
2266
2267/**
2268 * ice_chk_linearize - Check if there are more than 8 fragments per packet
2269 * @skb:      send buffer
2270 * @count:    number of buffers used
2271 *
2272 * Note: Our HW can't scatter-gather more than 8 fragments to build
2273 * a packet on the wire and so we need to figure out the cases where we
2274 * need to linearize the skb.
2275 */
2276static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2277{
2278	/* Both TSO and single send will work if count is less than 8 */
2279	if (likely(count < ICE_MAX_BUF_TXD))
2280		return false;
2281
2282	if (skb_is_gso(skb))
2283		return __ice_chk_linearize(skb);
2284
2285	/* we can support up to 8 data buffers for a single send */
2286	return count != ICE_MAX_BUF_TXD;
2287}
2288
2289/**
2290 * ice_tstamp - set up context descriptor for hardware timestamp
2291 * @tx_ring: pointer to the Tx ring to send buffer on
2292 * @skb: pointer to the SKB we're sending
2293 * @first: Tx buffer
2294 * @off: Tx offload parameters
2295 */
2296static void
2297ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2298	   struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2299{
2300	s8 idx;
2301
2302	/* only timestamp the outbound packet if the user has requested it */
2303	if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2304		return;
2305
2306	/* Tx timestamps cannot be sampled when doing TSO */
2307	if (first->tx_flags & ICE_TX_FLAGS_TSO)
2308		return;
2309
2310	/* Grab an open timestamp slot */
2311	idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2312	if (idx < 0) {
2313		tx_ring->vsi->back->ptp.tx_hwtstamp_skipped++;
2314		return;
2315	}
2316
2317	off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2318			     (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2319			     ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2320	first->tx_flags |= ICE_TX_FLAGS_TSYN;
2321}
2322
2323/**
2324 * ice_xmit_frame_ring - Sends buffer on Tx ring
2325 * @skb: send buffer
2326 * @tx_ring: ring to send buffer on
2327 *
2328 * Returns NETDEV_TX_OK if sent, else an error code
2329 */
2330static netdev_tx_t
2331ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2332{
2333	struct ice_tx_offload_params offload = { 0 };
2334	struct ice_vsi *vsi = tx_ring->vsi;
2335	struct ice_tx_buf *first;
2336	struct ethhdr *eth;
2337	unsigned int count;
2338	int tso, csum;
2339
2340	ice_trace(xmit_frame_ring, tx_ring, skb);
2341
2342	if (unlikely(ipv6_hopopt_jumbo_remove(skb)))
2343		goto out_drop;
2344
2345	count = ice_xmit_desc_count(skb);
2346	if (ice_chk_linearize(skb, count)) {
2347		if (__skb_linearize(skb))
2348			goto out_drop;
2349		count = ice_txd_use_count(skb->len);
2350		tx_ring->ring_stats->tx_stats.tx_linearize++;
2351	}
2352
2353	/* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2354	 *       + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2355	 *       + 4 desc gap to avoid the cache line where head is,
2356	 *       + 1 desc for context descriptor,
2357	 * otherwise try next time
2358	 */
2359	if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2360			      ICE_DESCS_FOR_CTX_DESC)) {
2361		tx_ring->ring_stats->tx_stats.tx_busy++;
2362		return NETDEV_TX_BUSY;
2363	}
2364
2365	/* prefetch for bql data which is infrequently used */
2366	netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2367
2368	offload.tx_ring = tx_ring;
2369
2370	/* record the location of the first descriptor for this packet */
2371	first = &tx_ring->tx_buf[tx_ring->next_to_use];
2372	first->skb = skb;
2373	first->type = ICE_TX_BUF_SKB;
2374	first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2375	first->gso_segs = 1;
2376	first->tx_flags = 0;
2377
2378	/* prepare the VLAN tagging flags for Tx */
2379	ice_tx_prepare_vlan_flags(tx_ring, first);
2380	if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2381		offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2382					(ICE_TX_CTX_DESC_IL2TAG2 <<
2383					ICE_TXD_CTX_QW1_CMD_S));
2384		offload.cd_l2tag2 = first->vid;
2385	}
2386
2387	/* set up TSO offload */
2388	tso = ice_tso(first, &offload);
2389	if (tso < 0)
2390		goto out_drop;
2391
2392	/* always set up Tx checksum offload */
2393	csum = ice_tx_csum(first, &offload);
2394	if (csum < 0)
2395		goto out_drop;
2396
2397	/* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2398	eth = (struct ethhdr *)skb_mac_header(skb);
2399	if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2400		      eth->h_proto == htons(ETH_P_LLDP)) &&
2401		     vsi->type == ICE_VSI_PF &&
2402		     vsi->port_info->qos_cfg.is_sw_lldp))
2403		offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2404					ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2405					ICE_TXD_CTX_QW1_CMD_S);
2406
2407	ice_tstamp(tx_ring, skb, first, &offload);
2408	if (ice_is_switchdev_running(vsi->back))
2409		ice_eswitch_set_target_vsi(skb, &offload);
2410
2411	if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2412		struct ice_tx_ctx_desc *cdesc;
2413		u16 i = tx_ring->next_to_use;
2414
2415		/* grab the next descriptor */
2416		cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2417		i++;
2418		tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2419
2420		/* setup context descriptor */
2421		cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2422		cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2423		cdesc->rsvd = cpu_to_le16(0);
2424		cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2425	}
2426
2427	ice_tx_map(tx_ring, first, &offload);
2428	return NETDEV_TX_OK;
2429
2430out_drop:
2431	ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2432	dev_kfree_skb_any(skb);
2433	return NETDEV_TX_OK;
2434}
2435
2436/**
2437 * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2438 * @skb: send buffer
2439 * @netdev: network interface device structure
2440 *
2441 * Returns NETDEV_TX_OK if sent, else an error code
2442 */
2443netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2444{
2445	struct ice_netdev_priv *np = netdev_priv(netdev);
2446	struct ice_vsi *vsi = np->vsi;
2447	struct ice_tx_ring *tx_ring;
2448
2449	tx_ring = vsi->tx_rings[skb->queue_mapping];
2450
2451	/* hardware can't handle really short frames, hardware padding works
2452	 * beyond this point
2453	 */
2454	if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2455		return NETDEV_TX_OK;
2456
2457	return ice_xmit_frame_ring(skb, tx_ring);
2458}
2459
2460/**
2461 * ice_get_dscp_up - return the UP/TC value for a SKB
2462 * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2463 * @skb: SKB to query for info to determine UP/TC
2464 *
2465 * This function is to only be called when the PF is in L3 DSCP PFC mode
2466 */
2467static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2468{
2469	u8 dscp = 0;
2470
2471	if (skb->protocol == htons(ETH_P_IP))
2472		dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2473	else if (skb->protocol == htons(ETH_P_IPV6))
2474		dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2475
2476	return dcbcfg->dscp_map[dscp];
2477}
2478
2479u16
2480ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2481		 struct net_device *sb_dev)
2482{
2483	struct ice_pf *pf = ice_netdev_to_pf(netdev);
2484	struct ice_dcbx_cfg *dcbcfg;
2485
2486	dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2487	if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2488		skb->priority = ice_get_dscp_up(dcbcfg, skb);
2489
2490	return netdev_pick_tx(netdev, skb, sb_dev);
2491}
2492
2493/**
2494 * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2495 * @tx_ring: tx_ring to clean
2496 */
2497void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2498{
2499	struct ice_vsi *vsi = tx_ring->vsi;
2500	s16 i = tx_ring->next_to_clean;
2501	int budget = ICE_DFLT_IRQ_WORK;
2502	struct ice_tx_desc *tx_desc;
2503	struct ice_tx_buf *tx_buf;
2504
2505	tx_buf = &tx_ring->tx_buf[i];
2506	tx_desc = ICE_TX_DESC(tx_ring, i);
2507	i -= tx_ring->count;
2508
2509	do {
2510		struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2511
2512		/* if next_to_watch is not set then there is no pending work */
2513		if (!eop_desc)
2514			break;
2515
2516		/* prevent any other reads prior to eop_desc */
2517		smp_rmb();
2518
2519		/* if the descriptor isn't done, no work to do */
2520		if (!(eop_desc->cmd_type_offset_bsz &
2521		      cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2522			break;
2523
2524		/* clear next_to_watch to prevent false hangs */
2525		tx_buf->next_to_watch = NULL;
2526		tx_desc->buf_addr = 0;
2527		tx_desc->cmd_type_offset_bsz = 0;
2528
2529		/* move past filter desc */
2530		tx_buf++;
2531		tx_desc++;
2532		i++;
2533		if (unlikely(!i)) {
2534			i -= tx_ring->count;
2535			tx_buf = tx_ring->tx_buf;
2536			tx_desc = ICE_TX_DESC(tx_ring, 0);
2537		}
2538
2539		/* unmap the data header */
2540		if (dma_unmap_len(tx_buf, len))
2541			dma_unmap_single(tx_ring->dev,
2542					 dma_unmap_addr(tx_buf, dma),
2543					 dma_unmap_len(tx_buf, len),
2544					 DMA_TO_DEVICE);
2545		if (tx_buf->type == ICE_TX_BUF_DUMMY)
2546			devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2547
2548		/* clear next_to_watch to prevent false hangs */
2549		tx_buf->type = ICE_TX_BUF_EMPTY;
2550		tx_buf->tx_flags = 0;
2551		tx_buf->next_to_watch = NULL;
2552		dma_unmap_len_set(tx_buf, len, 0);
2553		tx_desc->buf_addr = 0;
2554		tx_desc->cmd_type_offset_bsz = 0;
2555
2556		/* move past eop_desc for start of next FD desc */
2557		tx_buf++;
2558		tx_desc++;
2559		i++;
2560		if (unlikely(!i)) {
2561			i -= tx_ring->count;
2562			tx_buf = tx_ring->tx_buf;
2563			tx_desc = ICE_TX_DESC(tx_ring, 0);
2564		}
2565
2566		budget--;
2567	} while (likely(budget));
2568
2569	i += tx_ring->count;
2570	tx_ring->next_to_clean = i;
2571
2572	/* re-enable interrupt if needed */
2573	ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2574}
2575