1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8#include <linux/atomic.h> 9#include <linux/bug.h> 10#include <linux/device.h> 11#include <linux/err.h> 12#include <linux/export.h> 13#include <linux/kernel.h> 14#include <linux/list.h> 15#include <linux/of.h> 16#include <linux/pm_runtime.h> 17#include <linux/slab.h> 18#include <linux/spinlock.h> 19#include <linux/workqueue.h> 20 21#include "internals.h" 22 23static DEFINE_IDR(i3c_bus_idr); 24static DEFINE_MUTEX(i3c_core_lock); 25static int __i3c_first_dynamic_bus_num; 26static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier); 27 28/** 29 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 30 * @bus: I3C bus to take the lock on 31 * 32 * This function takes the bus lock so that no other operations can occur on 33 * the bus. This is needed for all kind of bus maintenance operation, like 34 * - enabling/disabling slave events 35 * - re-triggering DAA 36 * - changing the dynamic address of a device 37 * - relinquishing mastership 38 * - ... 39 * 40 * The reason for this kind of locking is that we don't want drivers and core 41 * logic to rely on I3C device information that could be changed behind their 42 * back. 43 */ 44static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 45{ 46 down_write(&bus->lock); 47} 48 49/** 50 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 51 * operation 52 * @bus: I3C bus to release the lock on 53 * 54 * Should be called when the bus maintenance operation is done. See 55 * i3c_bus_maintenance_lock() for more details on what these maintenance 56 * operations are. 57 */ 58static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 59{ 60 up_write(&bus->lock); 61} 62 63/** 64 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 65 * @bus: I3C bus to take the lock on 66 * 67 * This function takes the bus lock for any operation that is not a maintenance 68 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 69 * maintenance operations). Basically all communications with I3C devices are 70 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 71 * state or I3C dynamic address). 72 * 73 * Note that this lock is not guaranteeing serialization of normal operations. 74 * In other words, transfer requests passed to the I3C master can be submitted 75 * in parallel and I3C master drivers have to use their own locking to make 76 * sure two different communications are not inter-mixed, or access to the 77 * output/input queue is not done while the engine is busy. 78 */ 79void i3c_bus_normaluse_lock(struct i3c_bus *bus) 80{ 81 down_read(&bus->lock); 82} 83 84/** 85 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 86 * @bus: I3C bus to release the lock on 87 * 88 * Should be called when a normal operation is done. See 89 * i3c_bus_normaluse_lock() for more details on what these normal operations 90 * are. 91 */ 92void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 93{ 94 up_read(&bus->lock); 95} 96 97static struct i3c_master_controller * 98i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 99{ 100 return container_of(i3cbus, struct i3c_master_controller, bus); 101} 102 103static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 104{ 105 return container_of(dev, struct i3c_master_controller, dev); 106} 107 108static const struct device_type i3c_device_type; 109 110static struct i3c_bus *dev_to_i3cbus(struct device *dev) 111{ 112 struct i3c_master_controller *master; 113 114 if (dev->type == &i3c_device_type) 115 return dev_to_i3cdev(dev)->bus; 116 117 master = dev_to_i3cmaster(dev); 118 119 return &master->bus; 120} 121 122static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 123{ 124 struct i3c_master_controller *master; 125 126 if (dev->type == &i3c_device_type) 127 return dev_to_i3cdev(dev)->desc; 128 129 master = dev_to_i3cmaster(dev); 130 131 return master->this; 132} 133 134static ssize_t bcr_show(struct device *dev, 135 struct device_attribute *da, 136 char *buf) 137{ 138 struct i3c_bus *bus = dev_to_i3cbus(dev); 139 struct i3c_dev_desc *desc; 140 ssize_t ret; 141 142 i3c_bus_normaluse_lock(bus); 143 desc = dev_to_i3cdesc(dev); 144 ret = sprintf(buf, "%x\n", desc->info.bcr); 145 i3c_bus_normaluse_unlock(bus); 146 147 return ret; 148} 149static DEVICE_ATTR_RO(bcr); 150 151static ssize_t dcr_show(struct device *dev, 152 struct device_attribute *da, 153 char *buf) 154{ 155 struct i3c_bus *bus = dev_to_i3cbus(dev); 156 struct i3c_dev_desc *desc; 157 ssize_t ret; 158 159 i3c_bus_normaluse_lock(bus); 160 desc = dev_to_i3cdesc(dev); 161 ret = sprintf(buf, "%x\n", desc->info.dcr); 162 i3c_bus_normaluse_unlock(bus); 163 164 return ret; 165} 166static DEVICE_ATTR_RO(dcr); 167 168static ssize_t pid_show(struct device *dev, 169 struct device_attribute *da, 170 char *buf) 171{ 172 struct i3c_bus *bus = dev_to_i3cbus(dev); 173 struct i3c_dev_desc *desc; 174 ssize_t ret; 175 176 i3c_bus_normaluse_lock(bus); 177 desc = dev_to_i3cdesc(dev); 178 ret = sprintf(buf, "%llx\n", desc->info.pid); 179 i3c_bus_normaluse_unlock(bus); 180 181 return ret; 182} 183static DEVICE_ATTR_RO(pid); 184 185static ssize_t dynamic_address_show(struct device *dev, 186 struct device_attribute *da, 187 char *buf) 188{ 189 struct i3c_bus *bus = dev_to_i3cbus(dev); 190 struct i3c_dev_desc *desc; 191 ssize_t ret; 192 193 i3c_bus_normaluse_lock(bus); 194 desc = dev_to_i3cdesc(dev); 195 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 196 i3c_bus_normaluse_unlock(bus); 197 198 return ret; 199} 200static DEVICE_ATTR_RO(dynamic_address); 201 202static const char * const hdrcap_strings[] = { 203 "hdr-ddr", "hdr-tsp", "hdr-tsl", 204}; 205 206static ssize_t hdrcap_show(struct device *dev, 207 struct device_attribute *da, 208 char *buf) 209{ 210 struct i3c_bus *bus = dev_to_i3cbus(dev); 211 struct i3c_dev_desc *desc; 212 ssize_t offset = 0, ret; 213 unsigned long caps; 214 int mode; 215 216 i3c_bus_normaluse_lock(bus); 217 desc = dev_to_i3cdesc(dev); 218 caps = desc->info.hdr_cap; 219 for_each_set_bit(mode, &caps, 8) { 220 if (mode >= ARRAY_SIZE(hdrcap_strings)) 221 break; 222 223 if (!hdrcap_strings[mode]) 224 continue; 225 226 ret = sprintf(buf + offset, offset ? " %s" : "%s", 227 hdrcap_strings[mode]); 228 if (ret < 0) 229 goto out; 230 231 offset += ret; 232 } 233 234 ret = sprintf(buf + offset, "\n"); 235 if (ret < 0) 236 goto out; 237 238 ret = offset + ret; 239 240out: 241 i3c_bus_normaluse_unlock(bus); 242 243 return ret; 244} 245static DEVICE_ATTR_RO(hdrcap); 246 247static ssize_t modalias_show(struct device *dev, 248 struct device_attribute *da, char *buf) 249{ 250 struct i3c_device *i3c = dev_to_i3cdev(dev); 251 struct i3c_device_info devinfo; 252 u16 manuf, part, ext; 253 254 i3c_device_get_info(i3c, &devinfo); 255 manuf = I3C_PID_MANUF_ID(devinfo.pid); 256 part = I3C_PID_PART_ID(devinfo.pid); 257 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 258 259 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 260 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 261 manuf); 262 263 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 264 devinfo.dcr, manuf, part, ext); 265} 266static DEVICE_ATTR_RO(modalias); 267 268static struct attribute *i3c_device_attrs[] = { 269 &dev_attr_bcr.attr, 270 &dev_attr_dcr.attr, 271 &dev_attr_pid.attr, 272 &dev_attr_dynamic_address.attr, 273 &dev_attr_hdrcap.attr, 274 &dev_attr_modalias.attr, 275 NULL, 276}; 277ATTRIBUTE_GROUPS(i3c_device); 278 279static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env) 280{ 281 const struct i3c_device *i3cdev = dev_to_i3cdev(dev); 282 struct i3c_device_info devinfo; 283 u16 manuf, part, ext; 284 285 i3c_device_get_info(i3cdev, &devinfo); 286 manuf = I3C_PID_MANUF_ID(devinfo.pid); 287 part = I3C_PID_PART_ID(devinfo.pid); 288 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 289 290 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 291 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 292 devinfo.dcr, manuf); 293 294 return add_uevent_var(env, 295 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 296 devinfo.dcr, manuf, part, ext); 297} 298 299static const struct device_type i3c_device_type = { 300 .groups = i3c_device_groups, 301 .uevent = i3c_device_uevent, 302}; 303 304static int i3c_device_match(struct device *dev, struct device_driver *drv) 305{ 306 struct i3c_device *i3cdev; 307 struct i3c_driver *i3cdrv; 308 309 if (dev->type != &i3c_device_type) 310 return 0; 311 312 i3cdev = dev_to_i3cdev(dev); 313 i3cdrv = drv_to_i3cdrv(drv); 314 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 315 return 1; 316 317 return 0; 318} 319 320static int i3c_device_probe(struct device *dev) 321{ 322 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 323 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 324 325 return driver->probe(i3cdev); 326} 327 328static void i3c_device_remove(struct device *dev) 329{ 330 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 331 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 332 333 if (driver->remove) 334 driver->remove(i3cdev); 335 336 i3c_device_free_ibi(i3cdev); 337} 338 339const struct bus_type i3c_bus_type = { 340 .name = "i3c", 341 .match = i3c_device_match, 342 .probe = i3c_device_probe, 343 .remove = i3c_device_remove, 344}; 345 346static enum i3c_addr_slot_status 347i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 348{ 349 unsigned long status; 350 int bitpos = addr * 2; 351 352 if (addr > I2C_MAX_ADDR) 353 return I3C_ADDR_SLOT_RSVD; 354 355 status = bus->addrslots[bitpos / BITS_PER_LONG]; 356 status >>= bitpos % BITS_PER_LONG; 357 358 return status & I3C_ADDR_SLOT_STATUS_MASK; 359} 360 361static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 362 enum i3c_addr_slot_status status) 363{ 364 int bitpos = addr * 2; 365 unsigned long *ptr; 366 367 if (addr > I2C_MAX_ADDR) 368 return; 369 370 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 371 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK << 372 (bitpos % BITS_PER_LONG)); 373 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG); 374} 375 376static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 377{ 378 enum i3c_addr_slot_status status; 379 380 status = i3c_bus_get_addr_slot_status(bus, addr); 381 382 return status == I3C_ADDR_SLOT_FREE; 383} 384 385static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 386{ 387 enum i3c_addr_slot_status status; 388 u8 addr; 389 390 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 391 status = i3c_bus_get_addr_slot_status(bus, addr); 392 if (status == I3C_ADDR_SLOT_FREE) 393 return addr; 394 } 395 396 return -ENOMEM; 397} 398 399static void i3c_bus_init_addrslots(struct i3c_bus *bus) 400{ 401 int i; 402 403 /* Addresses 0 to 7 are reserved. */ 404 for (i = 0; i < 8; i++) 405 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 406 407 /* 408 * Reserve broadcast address and all addresses that might collide 409 * with the broadcast address when facing a single bit error. 410 */ 411 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 412 I3C_ADDR_SLOT_RSVD); 413 for (i = 0; i < 7; i++) 414 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 415 I3C_ADDR_SLOT_RSVD); 416} 417 418static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 419{ 420 mutex_lock(&i3c_core_lock); 421 idr_remove(&i3c_bus_idr, i3cbus->id); 422 mutex_unlock(&i3c_core_lock); 423} 424 425static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np) 426{ 427 int ret, start, end, id = -1; 428 429 init_rwsem(&i3cbus->lock); 430 INIT_LIST_HEAD(&i3cbus->devs.i2c); 431 INIT_LIST_HEAD(&i3cbus->devs.i3c); 432 i3c_bus_init_addrslots(i3cbus); 433 i3cbus->mode = I3C_BUS_MODE_PURE; 434 435 if (np) 436 id = of_alias_get_id(np, "i3c"); 437 438 mutex_lock(&i3c_core_lock); 439 if (id >= 0) { 440 start = id; 441 end = start + 1; 442 } else { 443 start = __i3c_first_dynamic_bus_num; 444 end = 0; 445 } 446 447 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL); 448 mutex_unlock(&i3c_core_lock); 449 450 if (ret < 0) 451 return ret; 452 453 i3cbus->id = ret; 454 455 return 0; 456} 457 458void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data), 459 void *data) 460{ 461 struct i3c_bus *bus; 462 int id; 463 464 mutex_lock(&i3c_core_lock); 465 idr_for_each_entry(&i3c_bus_idr, bus, id) 466 fn(bus, data); 467 mutex_unlock(&i3c_core_lock); 468} 469EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked); 470 471int i3c_register_notifier(struct notifier_block *nb) 472{ 473 return blocking_notifier_chain_register(&i3c_bus_notifier, nb); 474} 475EXPORT_SYMBOL_GPL(i3c_register_notifier); 476 477int i3c_unregister_notifier(struct notifier_block *nb) 478{ 479 return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb); 480} 481EXPORT_SYMBOL_GPL(i3c_unregister_notifier); 482 483static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action) 484{ 485 blocking_notifier_call_chain(&i3c_bus_notifier, action, bus); 486} 487 488static const char * const i3c_bus_mode_strings[] = { 489 [I3C_BUS_MODE_PURE] = "pure", 490 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 491 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 492 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 493}; 494 495static ssize_t mode_show(struct device *dev, 496 struct device_attribute *da, 497 char *buf) 498{ 499 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 500 ssize_t ret; 501 502 i3c_bus_normaluse_lock(i3cbus); 503 if (i3cbus->mode < 0 || 504 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 505 !i3c_bus_mode_strings[i3cbus->mode]) 506 ret = sprintf(buf, "unknown\n"); 507 else 508 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 509 i3c_bus_normaluse_unlock(i3cbus); 510 511 return ret; 512} 513static DEVICE_ATTR_RO(mode); 514 515static ssize_t current_master_show(struct device *dev, 516 struct device_attribute *da, 517 char *buf) 518{ 519 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 520 ssize_t ret; 521 522 i3c_bus_normaluse_lock(i3cbus); 523 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 524 i3cbus->cur_master->info.pid); 525 i3c_bus_normaluse_unlock(i3cbus); 526 527 return ret; 528} 529static DEVICE_ATTR_RO(current_master); 530 531static ssize_t i3c_scl_frequency_show(struct device *dev, 532 struct device_attribute *da, 533 char *buf) 534{ 535 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 536 ssize_t ret; 537 538 i3c_bus_normaluse_lock(i3cbus); 539 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 540 i3c_bus_normaluse_unlock(i3cbus); 541 542 return ret; 543} 544static DEVICE_ATTR_RO(i3c_scl_frequency); 545 546static ssize_t i2c_scl_frequency_show(struct device *dev, 547 struct device_attribute *da, 548 char *buf) 549{ 550 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 551 ssize_t ret; 552 553 i3c_bus_normaluse_lock(i3cbus); 554 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 555 i3c_bus_normaluse_unlock(i3cbus); 556 557 return ret; 558} 559static DEVICE_ATTR_RO(i2c_scl_frequency); 560 561static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable) 562{ 563 int ret; 564 565 if (!master || !master->ops) 566 return -EINVAL; 567 568 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin) 569 return -EINVAL; 570 571 i3c_bus_normaluse_lock(&master->bus); 572 573 if (enable) 574 ret = master->ops->enable_hotjoin(master); 575 else 576 ret = master->ops->disable_hotjoin(master); 577 578 master->hotjoin = enable; 579 580 i3c_bus_normaluse_unlock(&master->bus); 581 582 return ret; 583} 584 585static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr, 586 const char *buf, size_t count) 587{ 588 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 589 int ret; 590 bool res; 591 592 if (!i3cbus->cur_master) 593 return -EINVAL; 594 595 if (kstrtobool(buf, &res)) 596 return -EINVAL; 597 598 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res); 599 if (ret) 600 return ret; 601 602 return count; 603} 604 605/* 606 * i3c_master_enable_hotjoin - Enable hotjoin 607 * @master: I3C master object 608 * 609 * Return: a 0 in case of success, an negative error code otherwise. 610 */ 611int i3c_master_enable_hotjoin(struct i3c_master_controller *master) 612{ 613 return i3c_set_hotjoin(master, true); 614} 615EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin); 616 617/* 618 * i3c_master_disable_hotjoin - Disable hotjoin 619 * @master: I3C master object 620 * 621 * Return: a 0 in case of success, an negative error code otherwise. 622 */ 623int i3c_master_disable_hotjoin(struct i3c_master_controller *master) 624{ 625 return i3c_set_hotjoin(master, false); 626} 627EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin); 628 629static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf) 630{ 631 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 632 ssize_t ret; 633 634 i3c_bus_normaluse_lock(i3cbus); 635 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin); 636 i3c_bus_normaluse_unlock(i3cbus); 637 638 return ret; 639} 640 641static DEVICE_ATTR_RW(hotjoin); 642 643static struct attribute *i3c_masterdev_attrs[] = { 644 &dev_attr_mode.attr, 645 &dev_attr_current_master.attr, 646 &dev_attr_i3c_scl_frequency.attr, 647 &dev_attr_i2c_scl_frequency.attr, 648 &dev_attr_bcr.attr, 649 &dev_attr_dcr.attr, 650 &dev_attr_pid.attr, 651 &dev_attr_dynamic_address.attr, 652 &dev_attr_hdrcap.attr, 653 &dev_attr_hotjoin.attr, 654 NULL, 655}; 656ATTRIBUTE_GROUPS(i3c_masterdev); 657 658static void i3c_masterdev_release(struct device *dev) 659{ 660 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 661 struct i3c_bus *bus = dev_to_i3cbus(dev); 662 663 if (master->wq) 664 destroy_workqueue(master->wq); 665 666 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 667 i3c_bus_cleanup(bus); 668 669 of_node_put(dev->of_node); 670} 671 672static const struct device_type i3c_masterdev_type = { 673 .groups = i3c_masterdev_groups, 674}; 675 676static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 677 unsigned long max_i2c_scl_rate) 678{ 679 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 680 681 i3cbus->mode = mode; 682 683 switch (i3cbus->mode) { 684 case I3C_BUS_MODE_PURE: 685 if (!i3cbus->scl_rate.i3c) 686 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 687 break; 688 case I3C_BUS_MODE_MIXED_FAST: 689 case I3C_BUS_MODE_MIXED_LIMITED: 690 if (!i3cbus->scl_rate.i3c) 691 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 692 if (!i3cbus->scl_rate.i2c) 693 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 694 break; 695 case I3C_BUS_MODE_MIXED_SLOW: 696 if (!i3cbus->scl_rate.i2c) 697 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 698 if (!i3cbus->scl_rate.i3c || 699 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 700 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 701 break; 702 default: 703 return -EINVAL; 704 } 705 706 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 707 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 708 709 /* 710 * I3C/I2C frequency may have been overridden, check that user-provided 711 * values are not exceeding max possible frequency. 712 */ 713 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || 714 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) 715 return -EINVAL; 716 717 return 0; 718} 719 720static struct i3c_master_controller * 721i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 722{ 723 return container_of(adap, struct i3c_master_controller, i2c); 724} 725 726static struct i2c_adapter * 727i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 728{ 729 return &master->i2c; 730} 731 732static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 733{ 734 kfree(dev); 735} 736 737static struct i2c_dev_desc * 738i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 739 u16 addr, u8 lvr) 740{ 741 struct i2c_dev_desc *dev; 742 743 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 744 if (!dev) 745 return ERR_PTR(-ENOMEM); 746 747 dev->common.master = master; 748 dev->addr = addr; 749 dev->lvr = lvr; 750 751 return dev; 752} 753 754static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 755 u16 payloadlen) 756{ 757 dest->addr = addr; 758 dest->payload.len = payloadlen; 759 if (payloadlen) 760 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 761 else 762 dest->payload.data = NULL; 763 764 return dest->payload.data; 765} 766 767static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 768{ 769 kfree(dest->payload.data); 770} 771 772static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 773 struct i3c_ccc_cmd_dest *dests, 774 unsigned int ndests) 775{ 776 cmd->rnw = rnw ? 1 : 0; 777 cmd->id = id; 778 cmd->dests = dests; 779 cmd->ndests = ndests; 780 cmd->err = I3C_ERROR_UNKNOWN; 781} 782 783static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 784 struct i3c_ccc_cmd *cmd) 785{ 786 int ret; 787 788 if (!cmd || !master) 789 return -EINVAL; 790 791 if (WARN_ON(master->init_done && 792 !rwsem_is_locked(&master->bus.lock))) 793 return -EINVAL; 794 795 if (!master->ops->send_ccc_cmd) 796 return -ENOTSUPP; 797 798 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 799 return -EINVAL; 800 801 if (master->ops->supports_ccc_cmd && 802 !master->ops->supports_ccc_cmd(master, cmd)) 803 return -ENOTSUPP; 804 805 ret = master->ops->send_ccc_cmd(master, cmd); 806 if (ret) { 807 if (cmd->err != I3C_ERROR_UNKNOWN) 808 return cmd->err; 809 810 return ret; 811 } 812 813 return 0; 814} 815 816static struct i2c_dev_desc * 817i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 818 u16 addr) 819{ 820 struct i2c_dev_desc *dev; 821 822 i3c_bus_for_each_i2cdev(&master->bus, dev) { 823 if (dev->addr == addr) 824 return dev; 825 } 826 827 return NULL; 828} 829 830/** 831 * i3c_master_get_free_addr() - get a free address on the bus 832 * @master: I3C master object 833 * @start_addr: where to start searching 834 * 835 * This function must be called with the bus lock held in write mode. 836 * 837 * Return: the first free address starting at @start_addr (included) or -ENOMEM 838 * if there's no more address available. 839 */ 840int i3c_master_get_free_addr(struct i3c_master_controller *master, 841 u8 start_addr) 842{ 843 return i3c_bus_get_free_addr(&master->bus, start_addr); 844} 845EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 846 847static void i3c_device_release(struct device *dev) 848{ 849 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 850 851 WARN_ON(i3cdev->desc); 852 853 of_node_put(i3cdev->dev.of_node); 854 kfree(i3cdev); 855} 856 857static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 858{ 859 kfree(dev); 860} 861 862static struct i3c_dev_desc * 863i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 864 const struct i3c_device_info *info) 865{ 866 struct i3c_dev_desc *dev; 867 868 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 869 if (!dev) 870 return ERR_PTR(-ENOMEM); 871 872 dev->common.master = master; 873 dev->info = *info; 874 mutex_init(&dev->ibi_lock); 875 876 return dev; 877} 878 879static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 880 u8 addr) 881{ 882 enum i3c_addr_slot_status addrstat; 883 struct i3c_ccc_cmd_dest dest; 884 struct i3c_ccc_cmd cmd; 885 int ret; 886 887 if (!master) 888 return -EINVAL; 889 890 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 891 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 892 return -EINVAL; 893 894 i3c_ccc_cmd_dest_init(&dest, addr, 0); 895 i3c_ccc_cmd_init(&cmd, false, 896 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 897 &dest, 1); 898 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 899 i3c_ccc_cmd_dest_cleanup(&dest); 900 901 return ret; 902} 903 904/** 905 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 906 * procedure 907 * @master: master used to send frames on the bus 908 * 909 * Send a ENTDAA CCC command to start a DAA procedure. 910 * 911 * Note that this function only sends the ENTDAA CCC command, all the logic 912 * behind dynamic address assignment has to be handled in the I3C master 913 * driver. 914 * 915 * This function must be called with the bus lock held in write mode. 916 * 917 * Return: 0 in case of success, a positive I3C error code if the error is 918 * one of the official Mx error codes, and a negative error code otherwise. 919 */ 920int i3c_master_entdaa_locked(struct i3c_master_controller *master) 921{ 922 struct i3c_ccc_cmd_dest dest; 923 struct i3c_ccc_cmd cmd; 924 int ret; 925 926 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 927 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 928 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 929 i3c_ccc_cmd_dest_cleanup(&dest); 930 931 return ret; 932} 933EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 934 935static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 936 u8 addr, bool enable, u8 evts) 937{ 938 struct i3c_ccc_events *events; 939 struct i3c_ccc_cmd_dest dest; 940 struct i3c_ccc_cmd cmd; 941 int ret; 942 943 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 944 if (!events) 945 return -ENOMEM; 946 947 events->events = evts; 948 i3c_ccc_cmd_init(&cmd, false, 949 enable ? 950 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 951 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 952 &dest, 1); 953 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 954 i3c_ccc_cmd_dest_cleanup(&dest); 955 956 return ret; 957} 958 959/** 960 * i3c_master_disec_locked() - send a DISEC CCC command 961 * @master: master used to send frames on the bus 962 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 963 * @evts: events to disable 964 * 965 * Send a DISEC CCC command to disable some or all events coming from a 966 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 967 * 968 * This function must be called with the bus lock held in write mode. 969 * 970 * Return: 0 in case of success, a positive I3C error code if the error is 971 * one of the official Mx error codes, and a negative error code otherwise. 972 */ 973int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 974 u8 evts) 975{ 976 return i3c_master_enec_disec_locked(master, addr, false, evts); 977} 978EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 979 980/** 981 * i3c_master_enec_locked() - send an ENEC CCC command 982 * @master: master used to send frames on the bus 983 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 984 * @evts: events to disable 985 * 986 * Sends an ENEC CCC command to enable some or all events coming from a 987 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 988 * 989 * This function must be called with the bus lock held in write mode. 990 * 991 * Return: 0 in case of success, a positive I3C error code if the error is 992 * one of the official Mx error codes, and a negative error code otherwise. 993 */ 994int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 995 u8 evts) 996{ 997 return i3c_master_enec_disec_locked(master, addr, true, evts); 998} 999EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 1000 1001/** 1002 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 1003 * @master: master used to send frames on the bus 1004 * 1005 * Send a DEFSLVS CCC command containing all the devices known to the @master. 1006 * This is useful when you have secondary masters on the bus to propagate 1007 * device information. 1008 * 1009 * This should be called after all I3C devices have been discovered (in other 1010 * words, after the DAA procedure has finished) and instantiated in 1011 * &i3c_master_controller_ops->bus_init(). 1012 * It should also be called if a master ACKed an Hot-Join request and assigned 1013 * a dynamic address to the device joining the bus. 1014 * 1015 * This function must be called with the bus lock held in write mode. 1016 * 1017 * Return: 0 in case of success, a positive I3C error code if the error is 1018 * one of the official Mx error codes, and a negative error code otherwise. 1019 */ 1020int i3c_master_defslvs_locked(struct i3c_master_controller *master) 1021{ 1022 struct i3c_ccc_defslvs *defslvs; 1023 struct i3c_ccc_dev_desc *desc; 1024 struct i3c_ccc_cmd_dest dest; 1025 struct i3c_dev_desc *i3cdev; 1026 struct i2c_dev_desc *i2cdev; 1027 struct i3c_ccc_cmd cmd; 1028 struct i3c_bus *bus; 1029 bool send = false; 1030 int ndevs = 0, ret; 1031 1032 if (!master) 1033 return -EINVAL; 1034 1035 bus = i3c_master_get_bus(master); 1036 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1037 ndevs++; 1038 1039 if (i3cdev == master->this) 1040 continue; 1041 1042 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 1043 I3C_BCR_I3C_MASTER) 1044 send = true; 1045 } 1046 1047 /* No other master on the bus, skip DEFSLVS. */ 1048 if (!send) 1049 return 0; 1050 1051 i3c_bus_for_each_i2cdev(bus, i2cdev) 1052 ndevs++; 1053 1054 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 1055 struct_size(defslvs, slaves, 1056 ndevs - 1)); 1057 if (!defslvs) 1058 return -ENOMEM; 1059 1060 defslvs->count = ndevs; 1061 defslvs->master.bcr = master->this->info.bcr; 1062 defslvs->master.dcr = master->this->info.dcr; 1063 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 1064 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 1065 1066 desc = defslvs->slaves; 1067 i3c_bus_for_each_i2cdev(bus, i2cdev) { 1068 desc->lvr = i2cdev->lvr; 1069 desc->static_addr = i2cdev->addr << 1; 1070 desc++; 1071 } 1072 1073 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1074 /* Skip the I3C dev representing this master. */ 1075 if (i3cdev == master->this) 1076 continue; 1077 1078 desc->bcr = i3cdev->info.bcr; 1079 desc->dcr = i3cdev->info.dcr; 1080 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 1081 desc->static_addr = i3cdev->info.static_addr << 1; 1082 desc++; 1083 } 1084 1085 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 1086 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1087 i3c_ccc_cmd_dest_cleanup(&dest); 1088 1089 return ret; 1090} 1091EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 1092 1093static int i3c_master_setda_locked(struct i3c_master_controller *master, 1094 u8 oldaddr, u8 newaddr, bool setdasa) 1095{ 1096 struct i3c_ccc_cmd_dest dest; 1097 struct i3c_ccc_setda *setda; 1098 struct i3c_ccc_cmd cmd; 1099 int ret; 1100 1101 if (!oldaddr || !newaddr) 1102 return -EINVAL; 1103 1104 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 1105 if (!setda) 1106 return -ENOMEM; 1107 1108 setda->addr = newaddr << 1; 1109 i3c_ccc_cmd_init(&cmd, false, 1110 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 1111 &dest, 1); 1112 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1113 i3c_ccc_cmd_dest_cleanup(&dest); 1114 1115 return ret; 1116} 1117 1118static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 1119 u8 static_addr, u8 dyn_addr) 1120{ 1121 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 1122} 1123 1124static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 1125 u8 oldaddr, u8 newaddr) 1126{ 1127 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1128} 1129 1130static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1131 struct i3c_device_info *info) 1132{ 1133 struct i3c_ccc_cmd_dest dest; 1134 struct i3c_ccc_mrl *mrl; 1135 struct i3c_ccc_cmd cmd; 1136 int ret; 1137 1138 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1139 if (!mrl) 1140 return -ENOMEM; 1141 1142 /* 1143 * When the device does not have IBI payload GETMRL only returns 2 1144 * bytes of data. 1145 */ 1146 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1147 dest.payload.len -= 1; 1148 1149 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1150 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1151 if (ret) 1152 goto out; 1153 1154 switch (dest.payload.len) { 1155 case 3: 1156 info->max_ibi_len = mrl->ibi_len; 1157 fallthrough; 1158 case 2: 1159 info->max_read_len = be16_to_cpu(mrl->read_len); 1160 break; 1161 default: 1162 ret = -EIO; 1163 goto out; 1164 } 1165 1166out: 1167 i3c_ccc_cmd_dest_cleanup(&dest); 1168 1169 return ret; 1170} 1171 1172static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1173 struct i3c_device_info *info) 1174{ 1175 struct i3c_ccc_cmd_dest dest; 1176 struct i3c_ccc_mwl *mwl; 1177 struct i3c_ccc_cmd cmd; 1178 int ret; 1179 1180 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1181 if (!mwl) 1182 return -ENOMEM; 1183 1184 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1185 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1186 if (ret) 1187 goto out; 1188 1189 if (dest.payload.len != sizeof(*mwl)) { 1190 ret = -EIO; 1191 goto out; 1192 } 1193 1194 info->max_write_len = be16_to_cpu(mwl->len); 1195 1196out: 1197 i3c_ccc_cmd_dest_cleanup(&dest); 1198 1199 return ret; 1200} 1201 1202static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1203 struct i3c_device_info *info) 1204{ 1205 struct i3c_ccc_getmxds *getmaxds; 1206 struct i3c_ccc_cmd_dest dest; 1207 struct i3c_ccc_cmd cmd; 1208 int ret; 1209 1210 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1211 sizeof(*getmaxds)); 1212 if (!getmaxds) 1213 return -ENOMEM; 1214 1215 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1216 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1217 if (ret) { 1218 /* 1219 * Retry when the device does not support max read turnaround 1220 * while expecting shorter length from this CCC command. 1221 */ 1222 dest.payload.len -= 3; 1223 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1224 if (ret) 1225 goto out; 1226 } 1227 1228 if (dest.payload.len != 2 && dest.payload.len != 5) { 1229 ret = -EIO; 1230 goto out; 1231 } 1232 1233 info->max_read_ds = getmaxds->maxrd; 1234 info->max_write_ds = getmaxds->maxwr; 1235 if (dest.payload.len == 5) 1236 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1237 ((u32)getmaxds->maxrdturn[1] << 8) | 1238 ((u32)getmaxds->maxrdturn[2] << 16); 1239 1240out: 1241 i3c_ccc_cmd_dest_cleanup(&dest); 1242 1243 return ret; 1244} 1245 1246static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1247 struct i3c_device_info *info) 1248{ 1249 struct i3c_ccc_gethdrcap *gethdrcap; 1250 struct i3c_ccc_cmd_dest dest; 1251 struct i3c_ccc_cmd cmd; 1252 int ret; 1253 1254 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1255 sizeof(*gethdrcap)); 1256 if (!gethdrcap) 1257 return -ENOMEM; 1258 1259 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1260 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1261 if (ret) 1262 goto out; 1263 1264 if (dest.payload.len != 1) { 1265 ret = -EIO; 1266 goto out; 1267 } 1268 1269 info->hdr_cap = gethdrcap->modes; 1270 1271out: 1272 i3c_ccc_cmd_dest_cleanup(&dest); 1273 1274 return ret; 1275} 1276 1277static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1278 struct i3c_device_info *info) 1279{ 1280 struct i3c_ccc_getpid *getpid; 1281 struct i3c_ccc_cmd_dest dest; 1282 struct i3c_ccc_cmd cmd; 1283 int ret, i; 1284 1285 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1286 if (!getpid) 1287 return -ENOMEM; 1288 1289 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1290 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1291 if (ret) 1292 goto out; 1293 1294 info->pid = 0; 1295 for (i = 0; i < sizeof(getpid->pid); i++) { 1296 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1297 1298 info->pid |= (u64)getpid->pid[i] << sft; 1299 } 1300 1301out: 1302 i3c_ccc_cmd_dest_cleanup(&dest); 1303 1304 return ret; 1305} 1306 1307static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1308 struct i3c_device_info *info) 1309{ 1310 struct i3c_ccc_getbcr *getbcr; 1311 struct i3c_ccc_cmd_dest dest; 1312 struct i3c_ccc_cmd cmd; 1313 int ret; 1314 1315 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1316 if (!getbcr) 1317 return -ENOMEM; 1318 1319 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1320 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1321 if (ret) 1322 goto out; 1323 1324 info->bcr = getbcr->bcr; 1325 1326out: 1327 i3c_ccc_cmd_dest_cleanup(&dest); 1328 1329 return ret; 1330} 1331 1332static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1333 struct i3c_device_info *info) 1334{ 1335 struct i3c_ccc_getdcr *getdcr; 1336 struct i3c_ccc_cmd_dest dest; 1337 struct i3c_ccc_cmd cmd; 1338 int ret; 1339 1340 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1341 if (!getdcr) 1342 return -ENOMEM; 1343 1344 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1345 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1346 if (ret) 1347 goto out; 1348 1349 info->dcr = getdcr->dcr; 1350 1351out: 1352 i3c_ccc_cmd_dest_cleanup(&dest); 1353 1354 return ret; 1355} 1356 1357static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1358{ 1359 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1360 enum i3c_addr_slot_status slot_status; 1361 int ret; 1362 1363 if (!dev->info.dyn_addr) 1364 return -EINVAL; 1365 1366 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1367 dev->info.dyn_addr); 1368 if (slot_status == I3C_ADDR_SLOT_RSVD || 1369 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1370 return -EINVAL; 1371 1372 ret = i3c_master_getpid_locked(master, &dev->info); 1373 if (ret) 1374 return ret; 1375 1376 ret = i3c_master_getbcr_locked(master, &dev->info); 1377 if (ret) 1378 return ret; 1379 1380 ret = i3c_master_getdcr_locked(master, &dev->info); 1381 if (ret) 1382 return ret; 1383 1384 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1385 ret = i3c_master_getmxds_locked(master, &dev->info); 1386 if (ret) 1387 return ret; 1388 } 1389 1390 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1391 dev->info.max_ibi_len = 1; 1392 1393 i3c_master_getmrl_locked(master, &dev->info); 1394 i3c_master_getmwl_locked(master, &dev->info); 1395 1396 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1397 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1398 if (ret) 1399 return ret; 1400 } 1401 1402 return 0; 1403} 1404 1405static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1406{ 1407 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1408 1409 if (dev->info.static_addr) 1410 i3c_bus_set_addr_slot_status(&master->bus, 1411 dev->info.static_addr, 1412 I3C_ADDR_SLOT_FREE); 1413 1414 if (dev->info.dyn_addr) 1415 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1416 I3C_ADDR_SLOT_FREE); 1417 1418 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1419 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1420 I3C_ADDR_SLOT_FREE); 1421} 1422 1423static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1424{ 1425 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1426 enum i3c_addr_slot_status status; 1427 1428 if (!dev->info.static_addr && !dev->info.dyn_addr) 1429 return 0; 1430 1431 if (dev->info.static_addr) { 1432 status = i3c_bus_get_addr_slot_status(&master->bus, 1433 dev->info.static_addr); 1434 /* Since static address and assigned dynamic address can be 1435 * equal, allow this case to pass. 1436 */ 1437 if (status != I3C_ADDR_SLOT_FREE && 1438 dev->info.static_addr != dev->boardinfo->init_dyn_addr) 1439 return -EBUSY; 1440 1441 i3c_bus_set_addr_slot_status(&master->bus, 1442 dev->info.static_addr, 1443 I3C_ADDR_SLOT_I3C_DEV); 1444 } 1445 1446 /* 1447 * ->init_dyn_addr should have been reserved before that, so, if we're 1448 * trying to apply a pre-reserved dynamic address, we should not try 1449 * to reserve the address slot a second time. 1450 */ 1451 if (dev->info.dyn_addr && 1452 (!dev->boardinfo || 1453 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1454 status = i3c_bus_get_addr_slot_status(&master->bus, 1455 dev->info.dyn_addr); 1456 if (status != I3C_ADDR_SLOT_FREE) 1457 goto err_release_static_addr; 1458 1459 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1460 I3C_ADDR_SLOT_I3C_DEV); 1461 } 1462 1463 return 0; 1464 1465err_release_static_addr: 1466 if (dev->info.static_addr) 1467 i3c_bus_set_addr_slot_status(&master->bus, 1468 dev->info.static_addr, 1469 I3C_ADDR_SLOT_FREE); 1470 1471 return -EBUSY; 1472} 1473 1474static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1475 struct i3c_dev_desc *dev) 1476{ 1477 int ret; 1478 1479 /* 1480 * We don't attach devices to the controller until they are 1481 * addressable on the bus. 1482 */ 1483 if (!dev->info.static_addr && !dev->info.dyn_addr) 1484 return 0; 1485 1486 ret = i3c_master_get_i3c_addrs(dev); 1487 if (ret) 1488 return ret; 1489 1490 /* Do not attach the master device itself. */ 1491 if (master->this != dev && master->ops->attach_i3c_dev) { 1492 ret = master->ops->attach_i3c_dev(dev); 1493 if (ret) { 1494 i3c_master_put_i3c_addrs(dev); 1495 return ret; 1496 } 1497 } 1498 1499 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1500 1501 return 0; 1502} 1503 1504static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1505 u8 old_dyn_addr) 1506{ 1507 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1508 enum i3c_addr_slot_status status; 1509 int ret; 1510 1511 if (dev->info.dyn_addr != old_dyn_addr && 1512 (!dev->boardinfo || 1513 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) { 1514 status = i3c_bus_get_addr_slot_status(&master->bus, 1515 dev->info.dyn_addr); 1516 if (status != I3C_ADDR_SLOT_FREE) 1517 return -EBUSY; 1518 i3c_bus_set_addr_slot_status(&master->bus, 1519 dev->info.dyn_addr, 1520 I3C_ADDR_SLOT_I3C_DEV); 1521 if (old_dyn_addr) 1522 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr, 1523 I3C_ADDR_SLOT_FREE); 1524 } 1525 1526 if (master->ops->reattach_i3c_dev) { 1527 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1528 if (ret) { 1529 i3c_master_put_i3c_addrs(dev); 1530 return ret; 1531 } 1532 } 1533 1534 return 0; 1535} 1536 1537static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1538{ 1539 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1540 1541 /* Do not detach the master device itself. */ 1542 if (master->this != dev && master->ops->detach_i3c_dev) 1543 master->ops->detach_i3c_dev(dev); 1544 1545 i3c_master_put_i3c_addrs(dev); 1546 list_del(&dev->common.node); 1547} 1548 1549static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1550 struct i2c_dev_desc *dev) 1551{ 1552 int ret; 1553 1554 if (master->ops->attach_i2c_dev) { 1555 ret = master->ops->attach_i2c_dev(dev); 1556 if (ret) 1557 return ret; 1558 } 1559 1560 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1561 1562 return 0; 1563} 1564 1565static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1566{ 1567 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1568 1569 list_del(&dev->common.node); 1570 1571 if (master->ops->detach_i2c_dev) 1572 master->ops->detach_i2c_dev(dev); 1573} 1574 1575static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1576 struct i3c_dev_boardinfo *boardinfo) 1577{ 1578 struct i3c_device_info info = { 1579 .static_addr = boardinfo->static_addr, 1580 .pid = boardinfo->pid, 1581 }; 1582 struct i3c_dev_desc *i3cdev; 1583 int ret; 1584 1585 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1586 if (IS_ERR(i3cdev)) 1587 return -ENOMEM; 1588 1589 i3cdev->boardinfo = boardinfo; 1590 1591 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1592 if (ret) 1593 goto err_free_dev; 1594 1595 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1596 i3cdev->boardinfo->init_dyn_addr); 1597 if (ret) 1598 goto err_detach_dev; 1599 1600 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1601 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1602 if (ret) 1603 goto err_rstdaa; 1604 1605 ret = i3c_master_retrieve_dev_info(i3cdev); 1606 if (ret) 1607 goto err_rstdaa; 1608 1609 return 0; 1610 1611err_rstdaa: 1612 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1613err_detach_dev: 1614 i3c_master_detach_i3c_dev(i3cdev); 1615err_free_dev: 1616 i3c_master_free_i3c_dev(i3cdev); 1617 1618 return ret; 1619} 1620 1621static void 1622i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1623{ 1624 struct i3c_dev_desc *desc; 1625 int ret; 1626 1627 if (!master->init_done) 1628 return; 1629 1630 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1631 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1632 continue; 1633 1634 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1635 if (!desc->dev) 1636 continue; 1637 1638 desc->dev->bus = &master->bus; 1639 desc->dev->desc = desc; 1640 desc->dev->dev.parent = &master->dev; 1641 desc->dev->dev.type = &i3c_device_type; 1642 desc->dev->dev.bus = &i3c_bus_type; 1643 desc->dev->dev.release = i3c_device_release; 1644 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1645 desc->info.pid); 1646 1647 if (desc->boardinfo) 1648 desc->dev->dev.of_node = desc->boardinfo->of_node; 1649 1650 ret = device_register(&desc->dev->dev); 1651 if (ret) { 1652 dev_err(&master->dev, 1653 "Failed to add I3C device (err = %d)\n", ret); 1654 put_device(&desc->dev->dev); 1655 } 1656 } 1657} 1658 1659/** 1660 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1661 * @master: master doing the DAA 1662 * 1663 * This function is instantiating an I3C device object and adding it to the 1664 * I3C device list. All device information are automatically retrieved using 1665 * standard CCC commands. 1666 * 1667 * The I3C device object is returned in case the master wants to attach 1668 * private data to it using i3c_dev_set_master_data(). 1669 * 1670 * This function must be called with the bus lock held in write mode. 1671 * 1672 * Return: a 0 in case of success, an negative error code otherwise. 1673 */ 1674int i3c_master_do_daa(struct i3c_master_controller *master) 1675{ 1676 int ret; 1677 1678 i3c_bus_maintenance_lock(&master->bus); 1679 ret = master->ops->do_daa(master); 1680 i3c_bus_maintenance_unlock(&master->bus); 1681 1682 if (ret) 1683 return ret; 1684 1685 i3c_bus_normaluse_lock(&master->bus); 1686 i3c_master_register_new_i3c_devs(master); 1687 i3c_bus_normaluse_unlock(&master->bus); 1688 1689 return 0; 1690} 1691EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1692 1693/** 1694 * i3c_master_set_info() - set master device information 1695 * @master: master used to send frames on the bus 1696 * @info: I3C device information 1697 * 1698 * Set master device info. This should be called from 1699 * &i3c_master_controller_ops->bus_init(). 1700 * 1701 * Not all &i3c_device_info fields are meaningful for a master device. 1702 * Here is a list of fields that should be properly filled: 1703 * 1704 * - &i3c_device_info->dyn_addr 1705 * - &i3c_device_info->bcr 1706 * - &i3c_device_info->dcr 1707 * - &i3c_device_info->pid 1708 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1709 * &i3c_device_info->bcr 1710 * 1711 * This function must be called with the bus lock held in maintenance mode. 1712 * 1713 * Return: 0 if @info contains valid information (not every piece of 1714 * information can be checked, but we can at least make sure @info->dyn_addr 1715 * and @info->bcr are correct), -EINVAL otherwise. 1716 */ 1717int i3c_master_set_info(struct i3c_master_controller *master, 1718 const struct i3c_device_info *info) 1719{ 1720 struct i3c_dev_desc *i3cdev; 1721 int ret; 1722 1723 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1724 return -EINVAL; 1725 1726 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1727 master->secondary) 1728 return -EINVAL; 1729 1730 if (master->this) 1731 return -EINVAL; 1732 1733 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1734 if (IS_ERR(i3cdev)) 1735 return PTR_ERR(i3cdev); 1736 1737 master->this = i3cdev; 1738 master->bus.cur_master = master->this; 1739 1740 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1741 if (ret) 1742 goto err_free_dev; 1743 1744 return 0; 1745 1746err_free_dev: 1747 i3c_master_free_i3c_dev(i3cdev); 1748 1749 return ret; 1750} 1751EXPORT_SYMBOL_GPL(i3c_master_set_info); 1752 1753static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1754{ 1755 struct i3c_dev_desc *i3cdev, *i3ctmp; 1756 struct i2c_dev_desc *i2cdev, *i2ctmp; 1757 1758 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1759 common.node) { 1760 i3c_master_detach_i3c_dev(i3cdev); 1761 1762 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1763 i3c_bus_set_addr_slot_status(&master->bus, 1764 i3cdev->boardinfo->init_dyn_addr, 1765 I3C_ADDR_SLOT_FREE); 1766 1767 i3c_master_free_i3c_dev(i3cdev); 1768 } 1769 1770 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1771 common.node) { 1772 i3c_master_detach_i2c_dev(i2cdev); 1773 i3c_bus_set_addr_slot_status(&master->bus, 1774 i2cdev->addr, 1775 I3C_ADDR_SLOT_FREE); 1776 i3c_master_free_i2c_dev(i2cdev); 1777 } 1778} 1779 1780/** 1781 * i3c_master_bus_init() - initialize an I3C bus 1782 * @master: main master initializing the bus 1783 * 1784 * This function is following all initialisation steps described in the I3C 1785 * specification: 1786 * 1787 * 1. Attach I2C devs to the master so that the master can fill its internal 1788 * device table appropriately 1789 * 1790 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1791 * the master controller. That's usually where the bus mode is selected 1792 * (pure bus or mixed fast/slow bus) 1793 * 1794 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1795 * particularly important when the bus was previously configured by someone 1796 * else (for example the bootloader) 1797 * 1798 * 4. Disable all slave events. 1799 * 1800 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1801 * also have static_addr, try to pre-assign dynamic addresses requested by 1802 * the FW with SETDASA and attach corresponding statically defined I3C 1803 * devices to the master. 1804 * 1805 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1806 * remaining I3C devices 1807 * 1808 * Once this is done, all I3C and I2C devices should be usable. 1809 * 1810 * Return: a 0 in case of success, an negative error code otherwise. 1811 */ 1812static int i3c_master_bus_init(struct i3c_master_controller *master) 1813{ 1814 enum i3c_addr_slot_status status; 1815 struct i2c_dev_boardinfo *i2cboardinfo; 1816 struct i3c_dev_boardinfo *i3cboardinfo; 1817 struct i2c_dev_desc *i2cdev; 1818 int ret; 1819 1820 /* 1821 * First attach all devices with static definitions provided by the 1822 * FW. 1823 */ 1824 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1825 status = i3c_bus_get_addr_slot_status(&master->bus, 1826 i2cboardinfo->base.addr); 1827 if (status != I3C_ADDR_SLOT_FREE) { 1828 ret = -EBUSY; 1829 goto err_detach_devs; 1830 } 1831 1832 i3c_bus_set_addr_slot_status(&master->bus, 1833 i2cboardinfo->base.addr, 1834 I3C_ADDR_SLOT_I2C_DEV); 1835 1836 i2cdev = i3c_master_alloc_i2c_dev(master, 1837 i2cboardinfo->base.addr, 1838 i2cboardinfo->lvr); 1839 if (IS_ERR(i2cdev)) { 1840 ret = PTR_ERR(i2cdev); 1841 goto err_detach_devs; 1842 } 1843 1844 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1845 if (ret) { 1846 i3c_master_free_i2c_dev(i2cdev); 1847 goto err_detach_devs; 1848 } 1849 } 1850 1851 /* 1852 * Now execute the controller specific ->bus_init() routine, which 1853 * might configure its internal logic to match the bus limitations. 1854 */ 1855 ret = master->ops->bus_init(master); 1856 if (ret) 1857 goto err_detach_devs; 1858 1859 /* 1860 * The master device should have been instantiated in ->bus_init(), 1861 * complain if this was not the case. 1862 */ 1863 if (!master->this) { 1864 dev_err(&master->dev, 1865 "master_set_info() was not called in ->bus_init()\n"); 1866 ret = -EINVAL; 1867 goto err_bus_cleanup; 1868 } 1869 1870 /* 1871 * Reset all dynamic address that may have been assigned before 1872 * (assigned by the bootloader for example). 1873 */ 1874 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1875 if (ret && ret != I3C_ERROR_M2) 1876 goto err_bus_cleanup; 1877 1878 /* Disable all slave events before starting DAA. */ 1879 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 1880 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 1881 I3C_CCC_EVENT_HJ); 1882 if (ret && ret != I3C_ERROR_M2) 1883 goto err_bus_cleanup; 1884 1885 /* 1886 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 1887 * address and retrieve device information if needed. 1888 * In case pre-assign dynamic address fails, setting dynamic address to 1889 * the requested init_dyn_addr is retried after DAA is done in 1890 * i3c_master_add_i3c_dev_locked(). 1891 */ 1892 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1893 1894 /* 1895 * We don't reserve a dynamic address for devices that 1896 * don't explicitly request one. 1897 */ 1898 if (!i3cboardinfo->init_dyn_addr) 1899 continue; 1900 1901 ret = i3c_bus_get_addr_slot_status(&master->bus, 1902 i3cboardinfo->init_dyn_addr); 1903 if (ret != I3C_ADDR_SLOT_FREE) { 1904 ret = -EBUSY; 1905 goto err_rstdaa; 1906 } 1907 1908 i3c_bus_set_addr_slot_status(&master->bus, 1909 i3cboardinfo->init_dyn_addr, 1910 I3C_ADDR_SLOT_I3C_DEV); 1911 1912 /* 1913 * Only try to create/attach devices that have a static 1914 * address. Other devices will be created/attached when 1915 * DAA happens, and the requested dynamic address will 1916 * be set using SETNEWDA once those devices become 1917 * addressable. 1918 */ 1919 1920 if (i3cboardinfo->static_addr) 1921 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 1922 } 1923 1924 ret = i3c_master_do_daa(master); 1925 if (ret) 1926 goto err_rstdaa; 1927 1928 return 0; 1929 1930err_rstdaa: 1931 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1932 1933err_bus_cleanup: 1934 if (master->ops->bus_cleanup) 1935 master->ops->bus_cleanup(master); 1936 1937err_detach_devs: 1938 i3c_master_detach_free_devs(master); 1939 1940 return ret; 1941} 1942 1943static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 1944{ 1945 if (master->ops->bus_cleanup) 1946 master->ops->bus_cleanup(master); 1947 1948 i3c_master_detach_free_devs(master); 1949} 1950 1951static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 1952{ 1953 struct i3c_master_controller *master = i3cdev->common.master; 1954 struct i3c_dev_boardinfo *i3cboardinfo; 1955 1956 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1957 if (i3cdev->info.pid != i3cboardinfo->pid) 1958 continue; 1959 1960 i3cdev->boardinfo = i3cboardinfo; 1961 i3cdev->info.static_addr = i3cboardinfo->static_addr; 1962 return; 1963 } 1964} 1965 1966static struct i3c_dev_desc * 1967i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 1968{ 1969 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 1970 struct i3c_dev_desc *i3cdev; 1971 1972 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 1973 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 1974 return i3cdev; 1975 } 1976 1977 return NULL; 1978} 1979 1980/** 1981 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 1982 * @master: master used to send frames on the bus 1983 * @addr: I3C slave dynamic address assigned to the device 1984 * 1985 * This function is instantiating an I3C device object and adding it to the 1986 * I3C device list. All device information are automatically retrieved using 1987 * standard CCC commands. 1988 * 1989 * The I3C device object is returned in case the master wants to attach 1990 * private data to it using i3c_dev_set_master_data(). 1991 * 1992 * This function must be called with the bus lock held in write mode. 1993 * 1994 * Return: a 0 in case of success, an negative error code otherwise. 1995 */ 1996int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 1997 u8 addr) 1998{ 1999 struct i3c_device_info info = { .dyn_addr = addr }; 2000 struct i3c_dev_desc *newdev, *olddev; 2001 u8 old_dyn_addr = addr, expected_dyn_addr; 2002 struct i3c_ibi_setup ibireq = { }; 2003 bool enable_ibi = false; 2004 int ret; 2005 2006 if (!master) 2007 return -EINVAL; 2008 2009 newdev = i3c_master_alloc_i3c_dev(master, &info); 2010 if (IS_ERR(newdev)) 2011 return PTR_ERR(newdev); 2012 2013 ret = i3c_master_attach_i3c_dev(master, newdev); 2014 if (ret) 2015 goto err_free_dev; 2016 2017 ret = i3c_master_retrieve_dev_info(newdev); 2018 if (ret) 2019 goto err_detach_dev; 2020 2021 i3c_master_attach_boardinfo(newdev); 2022 2023 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 2024 if (olddev) { 2025 newdev->dev = olddev->dev; 2026 if (newdev->dev) 2027 newdev->dev->desc = newdev; 2028 2029 /* 2030 * We need to restore the IBI state too, so let's save the 2031 * IBI information and try to restore them after olddev has 2032 * been detached+released and its IBI has been stopped and 2033 * the associated resources have been freed. 2034 */ 2035 mutex_lock(&olddev->ibi_lock); 2036 if (olddev->ibi) { 2037 ibireq.handler = olddev->ibi->handler; 2038 ibireq.max_payload_len = olddev->ibi->max_payload_len; 2039 ibireq.num_slots = olddev->ibi->num_slots; 2040 2041 if (olddev->ibi->enabled) { 2042 enable_ibi = true; 2043 i3c_dev_disable_ibi_locked(olddev); 2044 } 2045 2046 i3c_dev_free_ibi_locked(olddev); 2047 } 2048 mutex_unlock(&olddev->ibi_lock); 2049 2050 old_dyn_addr = olddev->info.dyn_addr; 2051 2052 i3c_master_detach_i3c_dev(olddev); 2053 i3c_master_free_i3c_dev(olddev); 2054 } 2055 2056 /* 2057 * Depending on our previous state, the expected dynamic address might 2058 * differ: 2059 * - if the device already had a dynamic address assigned, let's try to 2060 * re-apply this one 2061 * - if the device did not have a dynamic address and the firmware 2062 * requested a specific address, pick this one 2063 * - in any other case, keep the address automatically assigned by the 2064 * master 2065 */ 2066 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 2067 expected_dyn_addr = old_dyn_addr; 2068 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 2069 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 2070 else 2071 expected_dyn_addr = newdev->info.dyn_addr; 2072 2073 if (newdev->info.dyn_addr != expected_dyn_addr) { 2074 /* 2075 * Try to apply the expected dynamic address. If it fails, keep 2076 * the address assigned by the master. 2077 */ 2078 ret = i3c_master_setnewda_locked(master, 2079 newdev->info.dyn_addr, 2080 expected_dyn_addr); 2081 if (!ret) { 2082 old_dyn_addr = newdev->info.dyn_addr; 2083 newdev->info.dyn_addr = expected_dyn_addr; 2084 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 2085 } else { 2086 dev_err(&master->dev, 2087 "Failed to assign reserved/old address to device %d%llx", 2088 master->bus.id, newdev->info.pid); 2089 } 2090 } 2091 2092 /* 2093 * Now is time to try to restore the IBI setup. If we're lucky, 2094 * everything works as before, otherwise, all we can do is complain. 2095 * FIXME: maybe we should add callback to inform the driver that it 2096 * should request the IBI again instead of trying to hide that from 2097 * him. 2098 */ 2099 if (ibireq.handler) { 2100 mutex_lock(&newdev->ibi_lock); 2101 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 2102 if (ret) { 2103 dev_err(&master->dev, 2104 "Failed to request IBI on device %d-%llx", 2105 master->bus.id, newdev->info.pid); 2106 } else if (enable_ibi) { 2107 ret = i3c_dev_enable_ibi_locked(newdev); 2108 if (ret) 2109 dev_err(&master->dev, 2110 "Failed to re-enable IBI on device %d-%llx", 2111 master->bus.id, newdev->info.pid); 2112 } 2113 mutex_unlock(&newdev->ibi_lock); 2114 } 2115 2116 return 0; 2117 2118err_detach_dev: 2119 if (newdev->dev && newdev->dev->desc) 2120 newdev->dev->desc = NULL; 2121 2122 i3c_master_detach_i3c_dev(newdev); 2123 2124err_free_dev: 2125 i3c_master_free_i3c_dev(newdev); 2126 2127 return ret; 2128} 2129EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 2130 2131#define OF_I3C_REG1_IS_I2C_DEV BIT(31) 2132 2133static int 2134of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 2135 struct device_node *node, u32 *reg) 2136{ 2137 struct i2c_dev_boardinfo *boardinfo; 2138 struct device *dev = &master->dev; 2139 int ret; 2140 2141 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2142 if (!boardinfo) 2143 return -ENOMEM; 2144 2145 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2146 if (ret) 2147 return ret; 2148 2149 /* 2150 * The I3C Specification does not clearly say I2C devices with 10-bit 2151 * address are supported. These devices can't be passed properly through 2152 * DEFSLVS command. 2153 */ 2154 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2155 dev_err(dev, "I2C device with 10 bit address not supported."); 2156 return -ENOTSUPP; 2157 } 2158 2159 /* LVR is encoded in reg[2]. */ 2160 boardinfo->lvr = reg[2]; 2161 2162 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2163 of_node_get(node); 2164 2165 return 0; 2166} 2167 2168static int 2169of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2170 struct device_node *node, u32 *reg) 2171{ 2172 struct i3c_dev_boardinfo *boardinfo; 2173 struct device *dev = &master->dev; 2174 enum i3c_addr_slot_status addrstatus; 2175 u32 init_dyn_addr = 0; 2176 2177 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2178 if (!boardinfo) 2179 return -ENOMEM; 2180 2181 if (reg[0]) { 2182 if (reg[0] > I3C_MAX_ADDR) 2183 return -EINVAL; 2184 2185 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2186 reg[0]); 2187 if (addrstatus != I3C_ADDR_SLOT_FREE) 2188 return -EINVAL; 2189 } 2190 2191 boardinfo->static_addr = reg[0]; 2192 2193 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2194 if (init_dyn_addr > I3C_MAX_ADDR) 2195 return -EINVAL; 2196 2197 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2198 init_dyn_addr); 2199 if (addrstatus != I3C_ADDR_SLOT_FREE) 2200 return -EINVAL; 2201 } 2202 2203 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2204 2205 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2206 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2207 return -EINVAL; 2208 2209 boardinfo->init_dyn_addr = init_dyn_addr; 2210 boardinfo->of_node = of_node_get(node); 2211 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2212 2213 return 0; 2214} 2215 2216static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2217 struct device_node *node) 2218{ 2219 u32 reg[3]; 2220 int ret; 2221 2222 if (!master || !node) 2223 return -EINVAL; 2224 2225 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2226 if (ret) 2227 return ret; 2228 2229 /* 2230 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2231 * dealing with an I2C device. 2232 */ 2233 if (!reg[1]) 2234 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2235 else 2236 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2237 2238 return ret; 2239} 2240 2241static int of_populate_i3c_bus(struct i3c_master_controller *master) 2242{ 2243 struct device *dev = &master->dev; 2244 struct device_node *i3cbus_np = dev->of_node; 2245 struct device_node *node; 2246 int ret; 2247 u32 val; 2248 2249 if (!i3cbus_np) 2250 return 0; 2251 2252 for_each_available_child_of_node(i3cbus_np, node) { 2253 ret = of_i3c_master_add_dev(master, node); 2254 if (ret) { 2255 of_node_put(node); 2256 return ret; 2257 } 2258 } 2259 2260 /* 2261 * The user might want to limit I2C and I3C speed in case some devices 2262 * on the bus are not supporting typical rates, or if the bus topology 2263 * prevents it from using max possible rate. 2264 */ 2265 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2266 master->bus.scl_rate.i2c = val; 2267 2268 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2269 master->bus.scl_rate.i3c = val; 2270 2271 return 0; 2272} 2273 2274static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2275 struct i2c_msg *xfers, int nxfers) 2276{ 2277 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2278 struct i2c_dev_desc *dev; 2279 int i, ret; 2280 u16 addr; 2281 2282 if (!xfers || !master || nxfers <= 0) 2283 return -EINVAL; 2284 2285 if (!master->ops->i2c_xfers) 2286 return -ENOTSUPP; 2287 2288 /* Doing transfers to different devices is not supported. */ 2289 addr = xfers[0].addr; 2290 for (i = 1; i < nxfers; i++) { 2291 if (addr != xfers[i].addr) 2292 return -ENOTSUPP; 2293 } 2294 2295 i3c_bus_normaluse_lock(&master->bus); 2296 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2297 if (!dev) 2298 ret = -ENOENT; 2299 else 2300 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2301 i3c_bus_normaluse_unlock(&master->bus); 2302 2303 return ret ? ret : nxfers; 2304} 2305 2306static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2307{ 2308 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2309} 2310 2311static u8 i3c_master_i2c_get_lvr(struct i2c_client *client) 2312{ 2313 /* Fall back to no spike filters and FM bus mode. */ 2314 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; 2315 2316 if (client->dev.of_node) { 2317 u32 reg[3]; 2318 2319 if (!of_property_read_u32_array(client->dev.of_node, "reg", 2320 reg, ARRAY_SIZE(reg))) 2321 lvr = reg[2]; 2322 } 2323 2324 return lvr; 2325} 2326 2327static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client) 2328{ 2329 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2330 enum i3c_addr_slot_status status; 2331 struct i2c_dev_desc *i2cdev; 2332 int ret; 2333 2334 /* Already added by board info? */ 2335 if (i3c_master_find_i2c_dev_by_addr(master, client->addr)) 2336 return 0; 2337 2338 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr); 2339 if (status != I3C_ADDR_SLOT_FREE) 2340 return -EBUSY; 2341 2342 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2343 I3C_ADDR_SLOT_I2C_DEV); 2344 2345 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr, 2346 i3c_master_i2c_get_lvr(client)); 2347 if (IS_ERR(i2cdev)) { 2348 ret = PTR_ERR(i2cdev); 2349 goto out_clear_status; 2350 } 2351 2352 ret = i3c_master_attach_i2c_dev(master, i2cdev); 2353 if (ret) 2354 goto out_free_dev; 2355 2356 return 0; 2357 2358out_free_dev: 2359 i3c_master_free_i2c_dev(i2cdev); 2360out_clear_status: 2361 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2362 I3C_ADDR_SLOT_FREE); 2363 2364 return ret; 2365} 2366 2367static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client) 2368{ 2369 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2370 struct i2c_dev_desc *dev; 2371 2372 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr); 2373 if (!dev) 2374 return -ENODEV; 2375 2376 i3c_master_detach_i2c_dev(dev); 2377 i3c_bus_set_addr_slot_status(&master->bus, dev->addr, 2378 I3C_ADDR_SLOT_FREE); 2379 i3c_master_free_i2c_dev(dev); 2380 2381 return 0; 2382} 2383 2384static const struct i2c_algorithm i3c_master_i2c_algo = { 2385 .master_xfer = i3c_master_i2c_adapter_xfer, 2386 .functionality = i3c_master_i2c_funcs, 2387}; 2388 2389static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action, 2390 void *data) 2391{ 2392 struct i2c_adapter *adap; 2393 struct i2c_client *client; 2394 struct device *dev = data; 2395 struct i3c_master_controller *master; 2396 int ret; 2397 2398 if (dev->type != &i2c_client_type) 2399 return 0; 2400 2401 client = to_i2c_client(dev); 2402 adap = client->adapter; 2403 2404 if (adap->algo != &i3c_master_i2c_algo) 2405 return 0; 2406 2407 master = i2c_adapter_to_i3c_master(adap); 2408 2409 i3c_bus_maintenance_lock(&master->bus); 2410 switch (action) { 2411 case BUS_NOTIFY_ADD_DEVICE: 2412 ret = i3c_master_i2c_attach(adap, client); 2413 break; 2414 case BUS_NOTIFY_DEL_DEVICE: 2415 ret = i3c_master_i2c_detach(adap, client); 2416 break; 2417 } 2418 i3c_bus_maintenance_unlock(&master->bus); 2419 2420 return ret; 2421} 2422 2423static struct notifier_block i2cdev_notifier = { 2424 .notifier_call = i3c_i2c_notifier_call, 2425}; 2426 2427static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2428{ 2429 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2430 struct i2c_dev_desc *i2cdev; 2431 struct i2c_dev_boardinfo *i2cboardinfo; 2432 int ret; 2433 2434 adap->dev.parent = master->dev.parent; 2435 adap->owner = master->dev.parent->driver->owner; 2436 adap->algo = &i3c_master_i2c_algo; 2437 strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2438 2439 /* FIXME: Should we allow i3c masters to override these values? */ 2440 adap->timeout = 1000; 2441 adap->retries = 3; 2442 2443 ret = i2c_add_adapter(adap); 2444 if (ret) 2445 return ret; 2446 2447 /* 2448 * We silently ignore failures here. The bus should keep working 2449 * correctly even if one or more i2c devices are not registered. 2450 */ 2451 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 2452 i2cdev = i3c_master_find_i2c_dev_by_addr(master, 2453 i2cboardinfo->base.addr); 2454 if (WARN_ON(!i2cdev)) 2455 continue; 2456 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base); 2457 } 2458 2459 return 0; 2460} 2461 2462static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2463{ 2464 struct i2c_dev_desc *i2cdev; 2465 2466 i2c_del_adapter(&master->i2c); 2467 2468 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2469 i2cdev->dev = NULL; 2470} 2471 2472static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2473{ 2474 struct i3c_dev_desc *i3cdev; 2475 2476 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2477 if (!i3cdev->dev) 2478 continue; 2479 2480 i3cdev->dev->desc = NULL; 2481 if (device_is_registered(&i3cdev->dev->dev)) 2482 device_unregister(&i3cdev->dev->dev); 2483 else 2484 put_device(&i3cdev->dev->dev); 2485 i3cdev->dev = NULL; 2486 } 2487} 2488 2489/** 2490 * i3c_master_queue_ibi() - Queue an IBI 2491 * @dev: the device this IBI is coming from 2492 * @slot: the IBI slot used to store the payload 2493 * 2494 * Queue an IBI to the controller workqueue. The IBI handler attached to 2495 * the dev will be called from a workqueue context. 2496 */ 2497void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2498{ 2499 atomic_inc(&dev->ibi->pending_ibis); 2500 queue_work(dev->ibi->wq, &slot->work); 2501} 2502EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2503 2504static void i3c_master_handle_ibi(struct work_struct *work) 2505{ 2506 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2507 work); 2508 struct i3c_dev_desc *dev = slot->dev; 2509 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2510 struct i3c_ibi_payload payload; 2511 2512 payload.data = slot->data; 2513 payload.len = slot->len; 2514 2515 if (dev->dev) 2516 dev->ibi->handler(dev->dev, &payload); 2517 2518 master->ops->recycle_ibi_slot(dev, slot); 2519 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2520 complete(&dev->ibi->all_ibis_handled); 2521} 2522 2523static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2524 struct i3c_ibi_slot *slot) 2525{ 2526 slot->dev = dev; 2527 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2528} 2529 2530struct i3c_generic_ibi_slot { 2531 struct list_head node; 2532 struct i3c_ibi_slot base; 2533}; 2534 2535struct i3c_generic_ibi_pool { 2536 spinlock_t lock; 2537 unsigned int num_slots; 2538 struct i3c_generic_ibi_slot *slots; 2539 void *payload_buf; 2540 struct list_head free_slots; 2541 struct list_head pending; 2542}; 2543 2544/** 2545 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2546 * @pool: the IBI pool to free 2547 * 2548 * Free all IBI slots allated by a generic IBI pool. 2549 */ 2550void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2551{ 2552 struct i3c_generic_ibi_slot *slot; 2553 unsigned int nslots = 0; 2554 2555 while (!list_empty(&pool->free_slots)) { 2556 slot = list_first_entry(&pool->free_slots, 2557 struct i3c_generic_ibi_slot, node); 2558 list_del(&slot->node); 2559 nslots++; 2560 } 2561 2562 /* 2563 * If the number of freed slots is not equal to the number of allocated 2564 * slots we have a leak somewhere. 2565 */ 2566 WARN_ON(nslots != pool->num_slots); 2567 2568 kfree(pool->payload_buf); 2569 kfree(pool->slots); 2570 kfree(pool); 2571} 2572EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2573 2574/** 2575 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2576 * @dev: the device this pool will be used for 2577 * @req: IBI setup request describing what the device driver expects 2578 * 2579 * Create a generic IBI pool based on the information provided in @req. 2580 * 2581 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2582 */ 2583struct i3c_generic_ibi_pool * 2584i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2585 const struct i3c_ibi_setup *req) 2586{ 2587 struct i3c_generic_ibi_pool *pool; 2588 struct i3c_generic_ibi_slot *slot; 2589 unsigned int i; 2590 int ret; 2591 2592 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2593 if (!pool) 2594 return ERR_PTR(-ENOMEM); 2595 2596 spin_lock_init(&pool->lock); 2597 INIT_LIST_HEAD(&pool->free_slots); 2598 INIT_LIST_HEAD(&pool->pending); 2599 2600 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2601 if (!pool->slots) { 2602 ret = -ENOMEM; 2603 goto err_free_pool; 2604 } 2605 2606 if (req->max_payload_len) { 2607 pool->payload_buf = kcalloc(req->num_slots, 2608 req->max_payload_len, GFP_KERNEL); 2609 if (!pool->payload_buf) { 2610 ret = -ENOMEM; 2611 goto err_free_pool; 2612 } 2613 } 2614 2615 for (i = 0; i < req->num_slots; i++) { 2616 slot = &pool->slots[i]; 2617 i3c_master_init_ibi_slot(dev, &slot->base); 2618 2619 if (req->max_payload_len) 2620 slot->base.data = pool->payload_buf + 2621 (i * req->max_payload_len); 2622 2623 list_add_tail(&slot->node, &pool->free_slots); 2624 pool->num_slots++; 2625 } 2626 2627 return pool; 2628 2629err_free_pool: 2630 i3c_generic_ibi_free_pool(pool); 2631 return ERR_PTR(ret); 2632} 2633EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2634 2635/** 2636 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2637 * @pool: the pool to query an IBI slot on 2638 * 2639 * Search for a free slot in a generic IBI pool. 2640 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2641 * when it's no longer needed. 2642 * 2643 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2644 */ 2645struct i3c_ibi_slot * 2646i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2647{ 2648 struct i3c_generic_ibi_slot *slot; 2649 unsigned long flags; 2650 2651 spin_lock_irqsave(&pool->lock, flags); 2652 slot = list_first_entry_or_null(&pool->free_slots, 2653 struct i3c_generic_ibi_slot, node); 2654 if (slot) 2655 list_del(&slot->node); 2656 spin_unlock_irqrestore(&pool->lock, flags); 2657 2658 return slot ? &slot->base : NULL; 2659} 2660EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2661 2662/** 2663 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2664 * @pool: the pool to return the IBI slot to 2665 * @s: IBI slot to recycle 2666 * 2667 * Add an IBI slot back to its generic IBI pool. Should be called from the 2668 * master driver struct_master_controller_ops->recycle_ibi() method. 2669 */ 2670void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2671 struct i3c_ibi_slot *s) 2672{ 2673 struct i3c_generic_ibi_slot *slot; 2674 unsigned long flags; 2675 2676 if (!s) 2677 return; 2678 2679 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2680 spin_lock_irqsave(&pool->lock, flags); 2681 list_add_tail(&slot->node, &pool->free_slots); 2682 spin_unlock_irqrestore(&pool->lock, flags); 2683} 2684EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2685 2686static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2687{ 2688 if (!ops || !ops->bus_init || !ops->priv_xfers || 2689 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2690 return -EINVAL; 2691 2692 if (ops->request_ibi && 2693 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2694 !ops->recycle_ibi_slot)) 2695 return -EINVAL; 2696 2697 return 0; 2698} 2699 2700/** 2701 * i3c_master_register() - register an I3C master 2702 * @master: master used to send frames on the bus 2703 * @parent: the parent device (the one that provides this I3C master 2704 * controller) 2705 * @ops: the master controller operations 2706 * @secondary: true if you are registering a secondary master. Will return 2707 * -ENOTSUPP if set to true since secondary masters are not yet 2708 * supported 2709 * 2710 * This function takes care of everything for you: 2711 * 2712 * - creates and initializes the I3C bus 2713 * - populates the bus with static I2C devs if @parent->of_node is not 2714 * NULL 2715 * - registers all I3C devices added by the controller during bus 2716 * initialization 2717 * - registers the I2C adapter and all I2C devices 2718 * 2719 * Return: 0 in case of success, a negative error code otherwise. 2720 */ 2721int i3c_master_register(struct i3c_master_controller *master, 2722 struct device *parent, 2723 const struct i3c_master_controller_ops *ops, 2724 bool secondary) 2725{ 2726 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE; 2727 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2728 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2729 struct i2c_dev_boardinfo *i2cbi; 2730 int ret; 2731 2732 /* We do not support secondary masters yet. */ 2733 if (secondary) 2734 return -ENOTSUPP; 2735 2736 ret = i3c_master_check_ops(ops); 2737 if (ret) 2738 return ret; 2739 2740 master->dev.parent = parent; 2741 master->dev.of_node = of_node_get(parent->of_node); 2742 master->dev.bus = &i3c_bus_type; 2743 master->dev.type = &i3c_masterdev_type; 2744 master->dev.release = i3c_masterdev_release; 2745 master->ops = ops; 2746 master->secondary = secondary; 2747 INIT_LIST_HEAD(&master->boardinfo.i2c); 2748 INIT_LIST_HEAD(&master->boardinfo.i3c); 2749 2750 ret = i3c_bus_init(i3cbus, master->dev.of_node); 2751 if (ret) 2752 return ret; 2753 2754 device_initialize(&master->dev); 2755 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2756 2757 master->dev.dma_mask = parent->dma_mask; 2758 master->dev.coherent_dma_mask = parent->coherent_dma_mask; 2759 master->dev.dma_parms = parent->dma_parms; 2760 2761 ret = of_populate_i3c_bus(master); 2762 if (ret) 2763 goto err_put_dev; 2764 2765 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2766 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2767 case I3C_LVR_I2C_INDEX(0): 2768 if (mode < I3C_BUS_MODE_MIXED_FAST) 2769 mode = I3C_BUS_MODE_MIXED_FAST; 2770 break; 2771 case I3C_LVR_I2C_INDEX(1): 2772 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2773 mode = I3C_BUS_MODE_MIXED_LIMITED; 2774 break; 2775 case I3C_LVR_I2C_INDEX(2): 2776 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2777 mode = I3C_BUS_MODE_MIXED_SLOW; 2778 break; 2779 default: 2780 ret = -EINVAL; 2781 goto err_put_dev; 2782 } 2783 2784 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2785 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE; 2786 } 2787 2788 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2789 if (ret) 2790 goto err_put_dev; 2791 2792 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); 2793 if (!master->wq) { 2794 ret = -ENOMEM; 2795 goto err_put_dev; 2796 } 2797 2798 ret = i3c_master_bus_init(master); 2799 if (ret) 2800 goto err_put_dev; 2801 2802 ret = device_add(&master->dev); 2803 if (ret) 2804 goto err_cleanup_bus; 2805 2806 /* 2807 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2808 * through the I2C subsystem. 2809 */ 2810 ret = i3c_master_i2c_adapter_init(master); 2811 if (ret) 2812 goto err_del_dev; 2813 2814 i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD); 2815 2816 pm_runtime_no_callbacks(&master->dev); 2817 pm_suspend_ignore_children(&master->dev, true); 2818 pm_runtime_enable(&master->dev); 2819 2820 /* 2821 * We're done initializing the bus and the controller, we can now 2822 * register I3C devices discovered during the initial DAA. 2823 */ 2824 master->init_done = true; 2825 i3c_bus_normaluse_lock(&master->bus); 2826 i3c_master_register_new_i3c_devs(master); 2827 i3c_bus_normaluse_unlock(&master->bus); 2828 2829 return 0; 2830 2831err_del_dev: 2832 device_del(&master->dev); 2833 2834err_cleanup_bus: 2835 i3c_master_bus_cleanup(master); 2836 2837err_put_dev: 2838 put_device(&master->dev); 2839 2840 return ret; 2841} 2842EXPORT_SYMBOL_GPL(i3c_master_register); 2843 2844/** 2845 * i3c_master_unregister() - unregister an I3C master 2846 * @master: master used to send frames on the bus 2847 * 2848 * Basically undo everything done in i3c_master_register(). 2849 */ 2850void i3c_master_unregister(struct i3c_master_controller *master) 2851{ 2852 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE); 2853 2854 i3c_master_i2c_adapter_cleanup(master); 2855 i3c_master_unregister_i3c_devs(master); 2856 i3c_master_bus_cleanup(master); 2857 pm_runtime_disable(&master->dev); 2858 device_unregister(&master->dev); 2859} 2860EXPORT_SYMBOL_GPL(i3c_master_unregister); 2861 2862int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev) 2863{ 2864 struct i3c_master_controller *master; 2865 2866 if (!dev) 2867 return -ENOENT; 2868 2869 master = i3c_dev_get_master(dev); 2870 if (!master) 2871 return -EINVAL; 2872 2873 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr || 2874 !dev->boardinfo->static_addr) 2875 return -EINVAL; 2876 2877 return i3c_master_setdasa_locked(master, dev->info.static_addr, 2878 dev->boardinfo->init_dyn_addr); 2879} 2880 2881int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, 2882 struct i3c_priv_xfer *xfers, 2883 int nxfers) 2884{ 2885 struct i3c_master_controller *master; 2886 2887 if (!dev) 2888 return -ENOENT; 2889 2890 master = i3c_dev_get_master(dev); 2891 if (!master || !xfers) 2892 return -EINVAL; 2893 2894 if (!master->ops->priv_xfers) 2895 return -ENOTSUPP; 2896 2897 return master->ops->priv_xfers(dev, xfers, nxfers); 2898} 2899 2900int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 2901{ 2902 struct i3c_master_controller *master; 2903 int ret; 2904 2905 if (!dev->ibi) 2906 return -EINVAL; 2907 2908 master = i3c_dev_get_master(dev); 2909 ret = master->ops->disable_ibi(dev); 2910 if (ret) 2911 return ret; 2912 2913 reinit_completion(&dev->ibi->all_ibis_handled); 2914 if (atomic_read(&dev->ibi->pending_ibis)) 2915 wait_for_completion(&dev->ibi->all_ibis_handled); 2916 2917 dev->ibi->enabled = false; 2918 2919 return 0; 2920} 2921 2922int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 2923{ 2924 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2925 int ret; 2926 2927 if (!dev->ibi) 2928 return -EINVAL; 2929 2930 ret = master->ops->enable_ibi(dev); 2931 if (!ret) 2932 dev->ibi->enabled = true; 2933 2934 return ret; 2935} 2936 2937int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 2938 const struct i3c_ibi_setup *req) 2939{ 2940 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2941 struct i3c_device_ibi_info *ibi; 2942 int ret; 2943 2944 if (!master->ops->request_ibi) 2945 return -ENOTSUPP; 2946 2947 if (dev->ibi) 2948 return -EBUSY; 2949 2950 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 2951 if (!ibi) 2952 return -ENOMEM; 2953 2954 ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM); 2955 if (!ibi->wq) { 2956 kfree(ibi); 2957 return -ENOMEM; 2958 } 2959 2960 atomic_set(&ibi->pending_ibis, 0); 2961 init_completion(&ibi->all_ibis_handled); 2962 ibi->handler = req->handler; 2963 ibi->max_payload_len = req->max_payload_len; 2964 ibi->num_slots = req->num_slots; 2965 2966 dev->ibi = ibi; 2967 ret = master->ops->request_ibi(dev, req); 2968 if (ret) { 2969 kfree(ibi); 2970 dev->ibi = NULL; 2971 } 2972 2973 return ret; 2974} 2975 2976void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 2977{ 2978 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2979 2980 if (!dev->ibi) 2981 return; 2982 2983 if (WARN_ON(dev->ibi->enabled)) 2984 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 2985 2986 master->ops->free_ibi(dev); 2987 2988 if (dev->ibi->wq) { 2989 destroy_workqueue(dev->ibi->wq); 2990 dev->ibi->wq = NULL; 2991 } 2992 2993 kfree(dev->ibi); 2994 dev->ibi = NULL; 2995} 2996 2997static int __init i3c_init(void) 2998{ 2999 int res; 3000 3001 res = of_alias_get_highest_id("i3c"); 3002 if (res >= 0) { 3003 mutex_lock(&i3c_core_lock); 3004 __i3c_first_dynamic_bus_num = res + 1; 3005 mutex_unlock(&i3c_core_lock); 3006 } 3007 3008 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier); 3009 if (res) 3010 return res; 3011 3012 res = bus_register(&i3c_bus_type); 3013 if (res) 3014 goto out_unreg_notifier; 3015 3016 return 0; 3017 3018out_unreg_notifier: 3019 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3020 3021 return res; 3022} 3023subsys_initcall(i3c_init); 3024 3025static void __exit i3c_exit(void) 3026{ 3027 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3028 idr_destroy(&i3c_bus_idr); 3029 bus_unregister(&i3c_bus_type); 3030} 3031module_exit(i3c_exit); 3032 3033MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 3034MODULE_DESCRIPTION("I3C core"); 3035MODULE_LICENSE("GPL v2"); 3036