1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * ni_at_ao.c 4 * Driver for NI AT-AO-6/10 boards 5 * 6 * COMEDI - Linux Control and Measurement Device Interface 7 * Copyright (C) 2000,2002 David A. Schleef <ds@schleef.org> 8 */ 9 10/* 11 * Driver: ni_at_ao 12 * Description: National Instruments AT-AO-6/10 13 * Devices: [National Instruments] AT-AO-6 (at-ao-6), AT-AO-10 (at-ao-10) 14 * Status: should work 15 * Author: David A. Schleef <ds@schleef.org> 16 * Updated: Sun Dec 26 12:26:28 EST 2004 17 * 18 * Configuration options: 19 * [0] - I/O port base address 20 * [1] - IRQ (unused) 21 * [2] - DMA (unused) 22 * [3] - analog output range, set by jumpers on hardware 23 * 0 for -10 to 10V bipolar 24 * 1 for 0V to 10V unipolar 25 */ 26 27#include <linux/module.h> 28#include <linux/comedi/comedidev.h> 29#include <linux/comedi/comedi_8254.h> 30 31/* 32 * Register map 33 * 34 * Register-level programming information can be found in NI 35 * document 320379.pdf. 36 */ 37#define ATAO_DIO_REG 0x00 38#define ATAO_CFG2_REG 0x02 39#define ATAO_CFG2_CALLD_NOP (0 << 14) 40#define ATAO_CFG2_CALLD(x) ((((x) >> 3) + 1) << 14) 41#define ATAO_CFG2_FFRTEN BIT(13) 42#define ATAO_CFG2_DACS(x) (1 << (((x) / 2) + 8)) 43#define ATAO_CFG2_LDAC(x) (1 << (((x) / 2) + 3)) 44#define ATAO_CFG2_PROMEN BIT(2) 45#define ATAO_CFG2_SCLK BIT(1) 46#define ATAO_CFG2_SDATA BIT(0) 47#define ATAO_CFG3_REG 0x04 48#define ATAO_CFG3_DMAMODE BIT(6) 49#define ATAO_CFG3_CLKOUT BIT(5) 50#define ATAO_CFG3_RCLKEN BIT(4) 51#define ATAO_CFG3_DOUTEN2 BIT(3) 52#define ATAO_CFG3_DOUTEN1 BIT(2) 53#define ATAO_CFG3_EN2_5V BIT(1) 54#define ATAO_CFG3_SCANEN BIT(0) 55#define ATAO_82C53_BASE 0x06 56#define ATAO_CFG1_REG 0x0a 57#define ATAO_CFG1_EXTINT2EN BIT(15) 58#define ATAO_CFG1_EXTINT1EN BIT(14) 59#define ATAO_CFG1_CNTINT2EN BIT(13) 60#define ATAO_CFG1_CNTINT1EN BIT(12) 61#define ATAO_CFG1_TCINTEN BIT(11) 62#define ATAO_CFG1_CNT1SRC BIT(10) 63#define ATAO_CFG1_CNT2SRC BIT(9) 64#define ATAO_CFG1_FIFOEN BIT(8) 65#define ATAO_CFG1_GRP2WR BIT(7) 66#define ATAO_CFG1_EXTUPDEN BIT(6) 67#define ATAO_CFG1_DMARQ BIT(5) 68#define ATAO_CFG1_DMAEN BIT(4) 69#define ATAO_CFG1_CH(x) (((x) & 0xf) << 0) 70#define ATAO_STATUS_REG 0x0a 71#define ATAO_STATUS_FH BIT(6) 72#define ATAO_STATUS_FE BIT(5) 73#define ATAO_STATUS_FF BIT(4) 74#define ATAO_STATUS_INT2 BIT(3) 75#define ATAO_STATUS_INT1 BIT(2) 76#define ATAO_STATUS_TCINT BIT(1) 77#define ATAO_STATUS_PROMOUT BIT(0) 78#define ATAO_FIFO_WRITE_REG 0x0c 79#define ATAO_FIFO_CLEAR_REG 0x0c 80#define ATAO_AO_REG(x) (0x0c + ((x) * 2)) 81 82/* registers with _2_ are accessed when GRP2WR is set in CFG1 */ 83#define ATAO_2_DMATCCLR_REG 0x00 84#define ATAO_2_INT1CLR_REG 0x02 85#define ATAO_2_INT2CLR_REG 0x04 86#define ATAO_2_RTSISHFT_REG 0x06 87#define ATAO_2_RTSISHFT_RSI BIT(0) 88#define ATAO_2_RTSISTRB_REG 0x07 89 90struct atao_board { 91 const char *name; 92 int n_ao_chans; 93}; 94 95static const struct atao_board atao_boards[] = { 96 { 97 .name = "at-ao-6", 98 .n_ao_chans = 6, 99 }, { 100 .name = "at-ao-10", 101 .n_ao_chans = 10, 102 }, 103}; 104 105struct atao_private { 106 unsigned short cfg1; 107 unsigned short cfg3; 108 109 /* Used for caldac readback */ 110 unsigned char caldac[21]; 111}; 112 113static void atao_select_reg_group(struct comedi_device *dev, int group) 114{ 115 struct atao_private *devpriv = dev->private; 116 117 if (group) 118 devpriv->cfg1 |= ATAO_CFG1_GRP2WR; 119 else 120 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR; 121 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); 122} 123 124static int atao_ao_insn_write(struct comedi_device *dev, 125 struct comedi_subdevice *s, 126 struct comedi_insn *insn, 127 unsigned int *data) 128{ 129 unsigned int chan = CR_CHAN(insn->chanspec); 130 unsigned int val = s->readback[chan]; 131 int i; 132 133 if (chan == 0) 134 atao_select_reg_group(dev, 1); 135 136 for (i = 0; i < insn->n; i++) { 137 val = data[i]; 138 139 /* the hardware expects two's complement values */ 140 outw(comedi_offset_munge(s, val), 141 dev->iobase + ATAO_AO_REG(chan)); 142 } 143 s->readback[chan] = val; 144 145 if (chan == 0) 146 atao_select_reg_group(dev, 0); 147 148 return insn->n; 149} 150 151static int atao_dio_insn_bits(struct comedi_device *dev, 152 struct comedi_subdevice *s, 153 struct comedi_insn *insn, 154 unsigned int *data) 155{ 156 if (comedi_dio_update_state(s, data)) 157 outw(s->state, dev->iobase + ATAO_DIO_REG); 158 159 data[1] = inw(dev->iobase + ATAO_DIO_REG); 160 161 return insn->n; 162} 163 164static int atao_dio_insn_config(struct comedi_device *dev, 165 struct comedi_subdevice *s, 166 struct comedi_insn *insn, 167 unsigned int *data) 168{ 169 struct atao_private *devpriv = dev->private; 170 unsigned int chan = CR_CHAN(insn->chanspec); 171 unsigned int mask; 172 int ret; 173 174 if (chan < 4) 175 mask = 0x0f; 176 else 177 mask = 0xf0; 178 179 ret = comedi_dio_insn_config(dev, s, insn, data, mask); 180 if (ret) 181 return ret; 182 183 if (s->io_bits & 0x0f) 184 devpriv->cfg3 |= ATAO_CFG3_DOUTEN1; 185 else 186 devpriv->cfg3 &= ~ATAO_CFG3_DOUTEN1; 187 if (s->io_bits & 0xf0) 188 devpriv->cfg3 |= ATAO_CFG3_DOUTEN2; 189 else 190 devpriv->cfg3 &= ~ATAO_CFG3_DOUTEN2; 191 192 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3_REG); 193 194 return insn->n; 195} 196 197/* 198 * There are three DAC8800 TrimDACs on the board. These are 8-channel, 199 * 8-bit DACs that are used to calibrate the Analog Output channels. 200 * The factory default calibration values are stored in the EEPROM. 201 * The TrimDACs, and EEPROM addresses, are mapped as: 202 * 203 * Channel EEPROM Description 204 * ----------------- ------ ----------------------------------- 205 * 0 - DAC0 Chan 0 0x30 AO Channel 0 Offset 206 * 1 - DAC0 Chan 1 0x31 AO Channel 0 Gain 207 * 2 - DAC0 Chan 2 0x32 AO Channel 1 Offset 208 * 3 - DAC0 Chan 3 0x33 AO Channel 1 Gain 209 * 4 - DAC0 Chan 4 0x34 AO Channel 2 Offset 210 * 5 - DAC0 Chan 5 0x35 AO Channel 2 Gain 211 * 6 - DAC0 Chan 6 0x36 AO Channel 3 Offset 212 * 7 - DAC0 Chan 7 0x37 AO Channel 3 Gain 213 * 8 - DAC1 Chan 0 0x38 AO Channel 4 Offset 214 * 9 - DAC1 Chan 1 0x39 AO Channel 4 Gain 215 * 10 - DAC1 Chan 2 0x3a AO Channel 5 Offset 216 * 11 - DAC1 Chan 3 0x3b AO Channel 5 Gain 217 * 12 - DAC1 Chan 4 0x3c 2.5V Offset 218 * 13 - DAC1 Chan 5 0x3d AO Channel 6 Offset (at-ao-10 only) 219 * 14 - DAC1 Chan 6 0x3e AO Channel 6 Gain (at-ao-10 only) 220 * 15 - DAC1 Chan 7 0x3f AO Channel 7 Offset (at-ao-10 only) 221 * 16 - DAC2 Chan 0 0x40 AO Channel 7 Gain (at-ao-10 only) 222 * 17 - DAC2 Chan 1 0x41 AO Channel 8 Offset (at-ao-10 only) 223 * 18 - DAC2 Chan 2 0x42 AO Channel 8 Gain (at-ao-10 only) 224 * 19 - DAC2 Chan 3 0x43 AO Channel 9 Offset (at-ao-10 only) 225 * 20 - DAC2 Chan 4 0x44 AO Channel 9 Gain (at-ao-10 only) 226 * DAC2 Chan 5 0x45 Reserved 227 * DAC2 Chan 6 0x46 Reserved 228 * DAC2 Chan 7 0x47 Reserved 229 */ 230static int atao_calib_insn_write(struct comedi_device *dev, 231 struct comedi_subdevice *s, 232 struct comedi_insn *insn, 233 unsigned int *data) 234{ 235 unsigned int chan = CR_CHAN(insn->chanspec); 236 237 if (insn->n) { 238 unsigned int val = data[insn->n - 1]; 239 unsigned int bitstring = ((chan & 0x7) << 8) | val; 240 unsigned int bits; 241 int bit; 242 243 /* write the channel and last data value to the caldac */ 244 /* clock the bitstring to the caldac; MSB -> LSB */ 245 for (bit = BIT(10); bit; bit >>= 1) { 246 bits = (bit & bitstring) ? ATAO_CFG2_SDATA : 0; 247 248 outw(bits, dev->iobase + ATAO_CFG2_REG); 249 outw(bits | ATAO_CFG2_SCLK, 250 dev->iobase + ATAO_CFG2_REG); 251 } 252 253 /* strobe the caldac to load the value */ 254 outw(ATAO_CFG2_CALLD(chan), dev->iobase + ATAO_CFG2_REG); 255 outw(ATAO_CFG2_CALLD_NOP, dev->iobase + ATAO_CFG2_REG); 256 257 s->readback[chan] = val; 258 } 259 260 return insn->n; 261} 262 263static void atao_reset(struct comedi_device *dev) 264{ 265 struct atao_private *devpriv = dev->private; 266 267 /* This is the reset sequence described in the manual */ 268 269 devpriv->cfg1 = 0; 270 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); 271 272 /* Put outputs of counter 1 and counter 2 in a high state */ 273 comedi_8254_set_mode(dev->pacer, 0, I8254_MODE4 | I8254_BINARY); 274 comedi_8254_set_mode(dev->pacer, 1, I8254_MODE4 | I8254_BINARY); 275 comedi_8254_write(dev->pacer, 0, 0x0003); 276 277 outw(ATAO_CFG2_CALLD_NOP, dev->iobase + ATAO_CFG2_REG); 278 279 devpriv->cfg3 = 0; 280 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3_REG); 281 282 inw(dev->iobase + ATAO_FIFO_CLEAR_REG); 283 284 atao_select_reg_group(dev, 1); 285 outw(0, dev->iobase + ATAO_2_INT1CLR_REG); 286 outw(0, dev->iobase + ATAO_2_INT2CLR_REG); 287 outw(0, dev->iobase + ATAO_2_DMATCCLR_REG); 288 atao_select_reg_group(dev, 0); 289} 290 291static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it) 292{ 293 const struct atao_board *board = dev->board_ptr; 294 struct atao_private *devpriv; 295 struct comedi_subdevice *s; 296 int ret; 297 298 ret = comedi_request_region(dev, it->options[0], 0x20); 299 if (ret) 300 return ret; 301 302 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv)); 303 if (!devpriv) 304 return -ENOMEM; 305 306 dev->pacer = comedi_8254_io_alloc(dev->iobase + ATAO_82C53_BASE, 307 0, I8254_IO8, 0); 308 if (IS_ERR(dev->pacer)) 309 return PTR_ERR(dev->pacer); 310 311 ret = comedi_alloc_subdevices(dev, 4); 312 if (ret) 313 return ret; 314 315 /* Analog Output subdevice */ 316 s = &dev->subdevices[0]; 317 s->type = COMEDI_SUBD_AO; 318 s->subdev_flags = SDF_WRITABLE; 319 s->n_chan = board->n_ao_chans; 320 s->maxdata = 0x0fff; 321 s->range_table = it->options[3] ? &range_unipolar10 : &range_bipolar10; 322 s->insn_write = atao_ao_insn_write; 323 324 ret = comedi_alloc_subdev_readback(s); 325 if (ret) 326 return ret; 327 328 /* Digital I/O subdevice */ 329 s = &dev->subdevices[1]; 330 s->type = COMEDI_SUBD_DIO; 331 s->subdev_flags = SDF_READABLE | SDF_WRITABLE; 332 s->n_chan = 8; 333 s->maxdata = 1; 334 s->range_table = &range_digital; 335 s->insn_bits = atao_dio_insn_bits; 336 s->insn_config = atao_dio_insn_config; 337 338 /* caldac subdevice */ 339 s = &dev->subdevices[2]; 340 s->type = COMEDI_SUBD_CALIB; 341 s->subdev_flags = SDF_WRITABLE | SDF_INTERNAL; 342 s->n_chan = (board->n_ao_chans * 2) + 1; 343 s->maxdata = 0xff; 344 s->insn_write = atao_calib_insn_write; 345 346 ret = comedi_alloc_subdev_readback(s); 347 if (ret) 348 return ret; 349 350 /* EEPROM subdevice */ 351 s = &dev->subdevices[3]; 352 s->type = COMEDI_SUBD_UNUSED; 353 354 atao_reset(dev); 355 356 return 0; 357} 358 359static struct comedi_driver ni_at_ao_driver = { 360 .driver_name = "ni_at_ao", 361 .module = THIS_MODULE, 362 .attach = atao_attach, 363 .detach = comedi_legacy_detach, 364 .board_name = &atao_boards[0].name, 365 .offset = sizeof(struct atao_board), 366 .num_names = ARRAY_SIZE(atao_boards), 367}; 368module_comedi_driver(ni_at_ao_driver); 369 370MODULE_AUTHOR("Comedi https://www.comedi.org"); 371MODULE_DESCRIPTION("Comedi driver for NI AT-AO-6/10 boards"); 372MODULE_LICENSE("GPL"); 373