1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_PLATFORM_H
3#define _ASM_X86_PLATFORM_H
4
5struct ghcb;
6struct mpc_bus;
7struct mpc_cpu;
8struct pt_regs;
9struct mpc_table;
10struct cpuinfo_x86;
11struct irq_domain;
12
13/**
14 * struct x86_init_mpparse - platform specific mpparse ops
15 * @setup_ioapic_ids:		platform specific ioapic id override
16 * @find_mptable:		Find MPTABLE early to reserve the memory region
17 * @early_parse_smp_cfg:	Parse the SMP configuration data early before initmem_init()
18 * @parse_smp_cfg:		Parse the SMP configuration data
19 */
20struct x86_init_mpparse {
21	void (*setup_ioapic_ids)(void);
22	void (*find_mptable)(void);
23	void (*early_parse_smp_cfg)(void);
24	void (*parse_smp_cfg)(void);
25};
26
27/**
28 * struct x86_init_resources - platform specific resource related ops
29 * @probe_roms:			probe BIOS roms
30 * @reserve_resources:		reserve the standard resources for the
31 *				platform
32 * @memory_setup:		platform specific memory setup
33 * @dmi_setup:			platform specific DMI setup
34 */
35struct x86_init_resources {
36	void (*probe_roms)(void);
37	void (*reserve_resources)(void);
38	char *(*memory_setup)(void);
39	void (*dmi_setup)(void);
40};
41
42/**
43 * struct x86_init_irqs - platform specific interrupt setup
44 * @pre_vector_init:		init code to run before interrupt vectors
45 *				are set up.
46 * @intr_init:			interrupt init code
47 * @intr_mode_select:		interrupt delivery mode selection
48 * @intr_mode_init:		interrupt delivery mode setup
49 * @create_pci_msi_domain:	Create the PCI/MSI interrupt domain
50 */
51struct x86_init_irqs {
52	void (*pre_vector_init)(void);
53	void (*intr_init)(void);
54	void (*intr_mode_select)(void);
55	void (*intr_mode_init)(void);
56	struct irq_domain *(*create_pci_msi_domain)(void);
57};
58
59/**
60 * struct x86_init_oem - oem platform specific customizing functions
61 * @arch_setup:			platform specific architecture setup
62 * @banner:			print a platform specific banner
63 */
64struct x86_init_oem {
65	void (*arch_setup)(void);
66	void (*banner)(void);
67};
68
69/**
70 * struct x86_init_paging - platform specific paging functions
71 * @pagetable_init:	platform specific paging initialization call to setup
72 *			the kernel pagetables and prepare accessors functions.
73 *			Callback must call paging_init(). Called once after the
74 *			direct mapping for phys memory is available.
75 */
76struct x86_init_paging {
77	void (*pagetable_init)(void);
78};
79
80/**
81 * struct x86_init_timers - platform specific timer setup
82 * @setup_perpcu_clockev:	set up the per cpu clock event device for the
83 *				boot cpu
84 * @timer_init:			initialize the platform timer (default PIT/HPET)
85 * @wallclock_init:		init the wallclock device
86 */
87struct x86_init_timers {
88	void (*setup_percpu_clockev)(void);
89	void (*timer_init)(void);
90	void (*wallclock_init)(void);
91};
92
93/**
94 * struct x86_init_iommu - platform specific iommu setup
95 * @iommu_init:			platform specific iommu setup
96 */
97struct x86_init_iommu {
98	int (*iommu_init)(void);
99};
100
101/**
102 * struct x86_init_pci - platform specific pci init functions
103 * @arch_init:			platform specific pci arch init call
104 * @init:			platform specific pci subsystem init
105 * @init_irq:			platform specific pci irq init
106 * @fixup_irqs:			platform specific pci irq fixup
107 */
108struct x86_init_pci {
109	int (*arch_init)(void);
110	int (*init)(void);
111	void (*init_irq)(void);
112	void (*fixup_irqs)(void);
113};
114
115/**
116 * struct x86_hyper_init - x86 hypervisor init functions
117 * @init_platform:		platform setup
118 * @guest_late_init:		guest late init
119 * @x2apic_available:		X2APIC detection
120 * @msi_ext_dest_id:		MSI supports 15-bit APIC IDs
121 * @init_mem_mapping:		setup early mappings during init_mem_mapping()
122 * @init_after_bootmem:		guest init after boot allocator is finished
123 */
124struct x86_hyper_init {
125	void (*init_platform)(void);
126	void (*guest_late_init)(void);
127	bool (*x2apic_available)(void);
128	bool (*msi_ext_dest_id)(void);
129	void (*init_mem_mapping)(void);
130	void (*init_after_bootmem)(void);
131};
132
133/**
134 * struct x86_init_acpi - x86 ACPI init functions
135 * @set_root_poitner:		set RSDP address
136 * @get_root_pointer:		get RSDP address
137 * @reduced_hw_early_init:	hardware reduced platform early init
138 */
139struct x86_init_acpi {
140	void (*set_root_pointer)(u64 addr);
141	u64 (*get_root_pointer)(void);
142	void (*reduced_hw_early_init)(void);
143};
144
145/**
146 * struct x86_guest - Functions used by misc guest incarnations like SEV, TDX, etc.
147 *
148 * @enc_status_change_prepare	Notify HV before the encryption status of a range is changed
149 * @enc_status_change_finish	Notify HV after the encryption status of a range is changed
150 * @enc_tlb_flush_required	Returns true if a TLB flush is needed before changing page encryption status
151 * @enc_cache_flush_required	Returns true if a cache flush is needed before changing page encryption status
152 */
153struct x86_guest {
154	bool (*enc_status_change_prepare)(unsigned long vaddr, int npages, bool enc);
155	bool (*enc_status_change_finish)(unsigned long vaddr, int npages, bool enc);
156	bool (*enc_tlb_flush_required)(bool enc);
157	bool (*enc_cache_flush_required)(void);
158};
159
160/**
161 * struct x86_init_ops - functions for platform specific setup
162 *
163 */
164struct x86_init_ops {
165	struct x86_init_resources	resources;
166	struct x86_init_mpparse		mpparse;
167	struct x86_init_irqs		irqs;
168	struct x86_init_oem		oem;
169	struct x86_init_paging		paging;
170	struct x86_init_timers		timers;
171	struct x86_init_iommu		iommu;
172	struct x86_init_pci		pci;
173	struct x86_hyper_init		hyper;
174	struct x86_init_acpi		acpi;
175};
176
177/**
178 * struct x86_cpuinit_ops - platform specific cpu hotplug setups
179 * @setup_percpu_clockev:	set up the per cpu clock event device
180 * @early_percpu_clock_init:	early init of the per cpu clock event device
181 * @fixup_cpu_id:		fixup function for cpuinfo_x86::topo.pkg_id
182 * @parallel_bringup:		Parallel bringup control
183 */
184struct x86_cpuinit_ops {
185	void (*setup_percpu_clockev)(void);
186	void (*early_percpu_clock_init)(void);
187	void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
188	bool parallel_bringup;
189};
190
191struct timespec64;
192
193/**
194 * struct x86_legacy_devices - legacy x86 devices
195 *
196 * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform
197 * 	is known to never have a PNPBIOS.
198 *
199 * These are devices known to require LPC or ISA bus. The definition of legacy
200 * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag
201 * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on
202 * the LPC or ISA bus. User visible devices are devices that have end-user
203 * accessible connectors (for example, LPT parallel port). Legacy devices on
204 * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard
205 * / mouse, and the floppy disk controller. A system that lacks all known
206 * legacy devices can assume all devices can be detected exclusively via
207 * standard device enumeration mechanisms including the ACPI namespace.
208 *
209 * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not
210 * have any of the legacy devices enumerated below present.
211 */
212struct x86_legacy_devices {
213	int pnpbios;
214};
215
216/**
217 * enum x86_legacy_i8042_state - i8042 keyboard controller state
218 * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on
219 *	given platform/subarch.
220 * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller
221 *	is absent.
222 * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be
223 *	present, the i8042 driver should probe for controller existence.
224 */
225enum x86_legacy_i8042_state {
226	X86_LEGACY_I8042_PLATFORM_ABSENT,
227	X86_LEGACY_I8042_FIRMWARE_ABSENT,
228	X86_LEGACY_I8042_EXPECTED_PRESENT,
229};
230
231/**
232 * struct x86_legacy_features - legacy x86 features
233 *
234 * @i8042: indicated if we expect the device to have i8042 controller
235 *	present.
236 * @rtc: this device has a CMOS real-time clock present
237 * @reserve_bios_regions: boot code will search for the EBDA address and the
238 * 	start of the 640k - 1M BIOS region.  If false, the platform must
239 * 	ensure that its memory map correctly reserves sub-1MB regions as needed.
240 * @devices: legacy x86 devices, refer to struct x86_legacy_devices
241 * 	documentation for further details.
242 */
243struct x86_legacy_features {
244	enum x86_legacy_i8042_state i8042;
245	int rtc;
246	int warm_reset;
247	int no_vga;
248	int reserve_bios_regions;
249	struct x86_legacy_devices devices;
250};
251
252/**
253 * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks
254 *
255 * @pin_vcpu:			pin current vcpu to specified physical
256 *				cpu (run rarely)
257 * @sev_es_hcall_prepare:	Load additional hypervisor-specific
258 *				state into the GHCB when doing a VMMCALL under
259 *				SEV-ES. Called from the #VC exception handler.
260 * @sev_es_hcall_finish:	Copies state from the GHCB back into the
261 *				processor (or pt_regs). Also runs checks on the
262 *				state returned from the hypervisor after a
263 *				VMMCALL under SEV-ES.  Needs to return 'false'
264 *				if the checks fail.  Called from the #VC
265 *				exception handler.
266 * @is_private_mmio:		For CoCo VMs, must map MMIO address as private.
267 *				Used when device is emulated by a paravisor
268 *				layer in the VM context.
269 */
270struct x86_hyper_runtime {
271	void (*pin_vcpu)(int cpu);
272	void (*sev_es_hcall_prepare)(struct ghcb *ghcb, struct pt_regs *regs);
273	bool (*sev_es_hcall_finish)(struct ghcb *ghcb, struct pt_regs *regs);
274	bool (*is_private_mmio)(u64 addr);
275};
276
277/**
278 * struct x86_platform_ops - platform specific runtime functions
279 * @calibrate_cpu:		calibrate CPU
280 * @calibrate_tsc:		calibrate TSC, if different from CPU
281 * @get_wallclock:		get time from HW clock like RTC etc.
282 * @set_wallclock:		set time back to HW clock
283 * @is_untracked_pat_range	exclude from PAT logic
284 * @nmi_init			enable NMI on cpus
285 * @save_sched_clock_state:	save state for sched_clock() on suspend
286 * @restore_sched_clock_state:	restore state for sched_clock() on resume
287 * @apic_post_init:		adjust apic if needed
288 * @legacy:			legacy features
289 * @set_legacy_features:	override legacy features. Use of this callback
290 * 				is highly discouraged. You should only need
291 * 				this if your hardware platform requires further
292 * 				custom fine tuning far beyond what may be
293 * 				possible in x86_early_init_platform_quirks() by
294 * 				only using the current x86_hardware_subarch
295 * 				semantics.
296 * @realmode_reserve:		reserve memory for realmode trampoline
297 * @realmode_init:		initialize realmode trampoline
298 * @hyper:			x86 hypervisor specific runtime callbacks
299 */
300struct x86_platform_ops {
301	unsigned long (*calibrate_cpu)(void);
302	unsigned long (*calibrate_tsc)(void);
303	void (*get_wallclock)(struct timespec64 *ts);
304	int (*set_wallclock)(const struct timespec64 *ts);
305	void (*iommu_shutdown)(void);
306	bool (*is_untracked_pat_range)(u64 start, u64 end);
307	void (*nmi_init)(void);
308	unsigned char (*get_nmi_reason)(void);
309	void (*save_sched_clock_state)(void);
310	void (*restore_sched_clock_state)(void);
311	void (*apic_post_init)(void);
312	struct x86_legacy_features legacy;
313	void (*set_legacy_features)(void);
314	void (*realmode_reserve)(void);
315	void (*realmode_init)(void);
316	struct x86_hyper_runtime hyper;
317	struct x86_guest guest;
318};
319
320struct x86_apic_ops {
321	unsigned int	(*io_apic_read)   (unsigned int apic, unsigned int reg);
322	void		(*restore)(void);
323};
324
325extern struct x86_init_ops x86_init;
326extern struct x86_cpuinit_ops x86_cpuinit;
327extern struct x86_platform_ops x86_platform;
328extern struct x86_msi_ops x86_msi;
329extern struct x86_apic_ops x86_apic_ops;
330
331extern void x86_early_init_platform_quirks(void);
332extern void x86_init_noop(void);
333extern void x86_init_uint_noop(unsigned int unused);
334extern bool bool_x86_init_noop(void);
335extern void x86_op_int_noop(int cpu);
336extern bool x86_pnpbios_disabled(void);
337extern int set_rtc_noop(const struct timespec64 *now);
338extern void get_rtc_noop(struct timespec64 *now);
339
340#endif
341