1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2015, 2016 ARM Ltd. 4 */ 5 6#include <linux/uaccess.h> 7#include <linux/interrupt.h> 8#include <linux/cpu.h> 9#include <linux/kvm_host.h> 10#include <kvm/arm_vgic.h> 11#include <asm/kvm_emulate.h> 12#include <asm/kvm_mmu.h> 13#include "vgic.h" 14 15/* 16 * Initialization rules: there are multiple stages to the vgic 17 * initialization, both for the distributor and the CPU interfaces. The basic 18 * idea is that even though the VGIC is not functional or not requested from 19 * user space, the critical path of the run loop can still call VGIC functions 20 * that just won't do anything, without them having to check additional 21 * initialization flags to ensure they don't look at uninitialized data 22 * structures. 23 * 24 * Distributor: 25 * 26 * - kvm_vgic_early_init(): initialization of static data that doesn't 27 * depend on any sizing information or emulation type. No allocation 28 * is allowed there. 29 * 30 * - vgic_init(): allocation and initialization of the generic data 31 * structures that depend on sizing information (number of CPUs, 32 * number of interrupts). Also initializes the vcpu specific data 33 * structures. Can be executed lazily for GICv2. 34 * 35 * CPU Interface: 36 * 37 * - kvm_vgic_vcpu_init(): initialization of static data that 38 * doesn't depend on any sizing information or emulation type. No 39 * allocation is allowed there. 40 */ 41 42/* EARLY INIT */ 43 44/** 45 * kvm_vgic_early_init() - Initialize static VGIC VCPU data structures 46 * @kvm: The VM whose VGIC districutor should be initialized 47 * 48 * Only do initialization of static structures that don't require any 49 * allocation or sizing information from userspace. vgic_init() called 50 * kvm_vgic_dist_init() which takes care of the rest. 51 */ 52void kvm_vgic_early_init(struct kvm *kvm) 53{ 54 struct vgic_dist *dist = &kvm->arch.vgic; 55 56 xa_init_flags(&dist->lpi_xa, XA_FLAGS_LOCK_IRQ); 57} 58 59/* CREATION */ 60 61/** 62 * kvm_vgic_create: triggered by the instantiation of the VGIC device by 63 * user space, either through the legacy KVM_CREATE_IRQCHIP ioctl (v2 only) 64 * or through the generic KVM_CREATE_DEVICE API ioctl. 65 * irqchip_in_kernel() tells you if this function succeeded or not. 66 * @kvm: kvm struct pointer 67 * @type: KVM_DEV_TYPE_ARM_VGIC_V[23] 68 */ 69int kvm_vgic_create(struct kvm *kvm, u32 type) 70{ 71 struct kvm_vcpu *vcpu; 72 unsigned long i; 73 int ret; 74 75 /* 76 * This function is also called by the KVM_CREATE_IRQCHIP handler, 77 * which had no chance yet to check the availability of the GICv2 78 * emulation. So check this here again. KVM_CREATE_DEVICE does 79 * the proper checks already. 80 */ 81 if (type == KVM_DEV_TYPE_ARM_VGIC_V2 && 82 !kvm_vgic_global_state.can_emulate_gicv2) 83 return -ENODEV; 84 85 /* Must be held to avoid race with vCPU creation */ 86 lockdep_assert_held(&kvm->lock); 87 88 ret = -EBUSY; 89 if (!lock_all_vcpus(kvm)) 90 return ret; 91 92 mutex_lock(&kvm->arch.config_lock); 93 94 if (irqchip_in_kernel(kvm)) { 95 ret = -EEXIST; 96 goto out_unlock; 97 } 98 99 kvm_for_each_vcpu(i, vcpu, kvm) { 100 if (vcpu_has_run_once(vcpu)) 101 goto out_unlock; 102 } 103 ret = 0; 104 105 if (type == KVM_DEV_TYPE_ARM_VGIC_V2) 106 kvm->max_vcpus = VGIC_V2_MAX_CPUS; 107 else 108 kvm->max_vcpus = VGIC_V3_MAX_CPUS; 109 110 if (atomic_read(&kvm->online_vcpus) > kvm->max_vcpus) { 111 ret = -E2BIG; 112 goto out_unlock; 113 } 114 115 kvm->arch.vgic.in_kernel = true; 116 kvm->arch.vgic.vgic_model = type; 117 118 kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF; 119 120 if (type == KVM_DEV_TYPE_ARM_VGIC_V2) 121 kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF; 122 else 123 INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions); 124 125out_unlock: 126 mutex_unlock(&kvm->arch.config_lock); 127 unlock_all_vcpus(kvm); 128 return ret; 129} 130 131/* INIT/DESTROY */ 132 133/** 134 * kvm_vgic_dist_init: initialize the dist data structures 135 * @kvm: kvm struct pointer 136 * @nr_spis: number of spis, frozen by caller 137 */ 138static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis) 139{ 140 struct vgic_dist *dist = &kvm->arch.vgic; 141 struct kvm_vcpu *vcpu0 = kvm_get_vcpu(kvm, 0); 142 int i; 143 144 dist->spis = kcalloc(nr_spis, sizeof(struct vgic_irq), GFP_KERNEL_ACCOUNT); 145 if (!dist->spis) 146 return -ENOMEM; 147 148 /* 149 * In the following code we do not take the irq struct lock since 150 * no other action on irq structs can happen while the VGIC is 151 * not initialized yet: 152 * If someone wants to inject an interrupt or does a MMIO access, we 153 * require prior initialization in case of a virtual GICv3 or trigger 154 * initialization when using a virtual GICv2. 155 */ 156 for (i = 0; i < nr_spis; i++) { 157 struct vgic_irq *irq = &dist->spis[i]; 158 159 irq->intid = i + VGIC_NR_PRIVATE_IRQS; 160 INIT_LIST_HEAD(&irq->ap_list); 161 raw_spin_lock_init(&irq->irq_lock); 162 irq->vcpu = NULL; 163 irq->target_vcpu = vcpu0; 164 kref_init(&irq->refcount); 165 switch (dist->vgic_model) { 166 case KVM_DEV_TYPE_ARM_VGIC_V2: 167 irq->targets = 0; 168 irq->group = 0; 169 break; 170 case KVM_DEV_TYPE_ARM_VGIC_V3: 171 irq->mpidr = 0; 172 irq->group = 1; 173 break; 174 default: 175 kfree(dist->spis); 176 dist->spis = NULL; 177 return -EINVAL; 178 } 179 } 180 return 0; 181} 182 183static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu) 184{ 185 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; 186 int i; 187 188 lockdep_assert_held(&vcpu->kvm->arch.config_lock); 189 190 if (vgic_cpu->private_irqs) 191 return 0; 192 193 vgic_cpu->private_irqs = kcalloc(VGIC_NR_PRIVATE_IRQS, 194 sizeof(struct vgic_irq), 195 GFP_KERNEL_ACCOUNT); 196 197 if (!vgic_cpu->private_irqs) 198 return -ENOMEM; 199 200 /* 201 * Enable and configure all SGIs to be edge-triggered and 202 * configure all PPIs as level-triggered. 203 */ 204 for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) { 205 struct vgic_irq *irq = &vgic_cpu->private_irqs[i]; 206 207 INIT_LIST_HEAD(&irq->ap_list); 208 raw_spin_lock_init(&irq->irq_lock); 209 irq->intid = i; 210 irq->vcpu = NULL; 211 irq->target_vcpu = vcpu; 212 kref_init(&irq->refcount); 213 if (vgic_irq_is_sgi(i)) { 214 /* SGIs */ 215 irq->enabled = 1; 216 irq->config = VGIC_CONFIG_EDGE; 217 } else { 218 /* PPIs */ 219 irq->config = VGIC_CONFIG_LEVEL; 220 } 221 } 222 223 return 0; 224} 225 226static int vgic_allocate_private_irqs(struct kvm_vcpu *vcpu) 227{ 228 int ret; 229 230 mutex_lock(&vcpu->kvm->arch.config_lock); 231 ret = vgic_allocate_private_irqs_locked(vcpu); 232 mutex_unlock(&vcpu->kvm->arch.config_lock); 233 234 return ret; 235} 236 237/** 238 * kvm_vgic_vcpu_init() - Initialize static VGIC VCPU data 239 * structures and register VCPU-specific KVM iodevs 240 * 241 * @vcpu: pointer to the VCPU being created and initialized 242 * 243 * Only do initialization, but do not actually enable the 244 * VGIC CPU interface 245 */ 246int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu) 247{ 248 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; 249 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; 250 int ret = 0; 251 252 vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF; 253 254 INIT_LIST_HEAD(&vgic_cpu->ap_list_head); 255 raw_spin_lock_init(&vgic_cpu->ap_list_lock); 256 atomic_set(&vgic_cpu->vgic_v3.its_vpe.vlpi_count, 0); 257 258 if (!irqchip_in_kernel(vcpu->kvm)) 259 return 0; 260 261 ret = vgic_allocate_private_irqs(vcpu); 262 if (ret) 263 return ret; 264 265 /* 266 * If we are creating a VCPU with a GICv3 we must also register the 267 * KVM io device for the redistributor that belongs to this VCPU. 268 */ 269 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) { 270 mutex_lock(&vcpu->kvm->slots_lock); 271 ret = vgic_register_redist_iodev(vcpu); 272 mutex_unlock(&vcpu->kvm->slots_lock); 273 } 274 return ret; 275} 276 277static void kvm_vgic_vcpu_enable(struct kvm_vcpu *vcpu) 278{ 279 if (kvm_vgic_global_state.type == VGIC_V2) 280 vgic_v2_enable(vcpu); 281 else 282 vgic_v3_enable(vcpu); 283} 284 285/* 286 * vgic_init: allocates and initializes dist and vcpu data structures 287 * depending on two dimensioning parameters: 288 * - the number of spis 289 * - the number of vcpus 290 * The function is generally called when nr_spis has been explicitly set 291 * by the guest through the KVM DEVICE API. If not nr_spis is set to 256. 292 * vgic_initialized() returns true when this function has succeeded. 293 */ 294int vgic_init(struct kvm *kvm) 295{ 296 struct vgic_dist *dist = &kvm->arch.vgic; 297 struct kvm_vcpu *vcpu; 298 int ret = 0, i; 299 unsigned long idx; 300 301 lockdep_assert_held(&kvm->arch.config_lock); 302 303 if (vgic_initialized(kvm)) 304 return 0; 305 306 /* Are we also in the middle of creating a VCPU? */ 307 if (kvm->created_vcpus != atomic_read(&kvm->online_vcpus)) 308 return -EBUSY; 309 310 /* freeze the number of spis */ 311 if (!dist->nr_spis) 312 dist->nr_spis = VGIC_NR_IRQS_LEGACY - VGIC_NR_PRIVATE_IRQS; 313 314 ret = kvm_vgic_dist_init(kvm, dist->nr_spis); 315 if (ret) 316 goto out; 317 318 /* Initialize groups on CPUs created before the VGIC type was known */ 319 kvm_for_each_vcpu(idx, vcpu, kvm) { 320 ret = vgic_allocate_private_irqs_locked(vcpu); 321 if (ret) 322 goto out; 323 324 for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) { 325 struct vgic_irq *irq = vgic_get_irq(kvm, vcpu, i); 326 327 switch (dist->vgic_model) { 328 case KVM_DEV_TYPE_ARM_VGIC_V3: 329 irq->group = 1; 330 irq->mpidr = kvm_vcpu_get_mpidr_aff(vcpu); 331 break; 332 case KVM_DEV_TYPE_ARM_VGIC_V2: 333 irq->group = 0; 334 irq->targets = 1U << idx; 335 break; 336 default: 337 ret = -EINVAL; 338 } 339 340 vgic_put_irq(kvm, irq); 341 342 if (ret) 343 goto out; 344 } 345 } 346 347 /* 348 * If we have GICv4.1 enabled, unconditionally request enable the 349 * v4 support so that we get HW-accelerated vSGIs. Otherwise, only 350 * enable it if we present a virtual ITS to the guest. 351 */ 352 if (vgic_supports_direct_msis(kvm)) { 353 ret = vgic_v4_init(kvm); 354 if (ret) 355 goto out; 356 } 357 358 kvm_for_each_vcpu(idx, vcpu, kvm) 359 kvm_vgic_vcpu_enable(vcpu); 360 361 ret = kvm_vgic_setup_default_irq_routing(kvm); 362 if (ret) 363 goto out; 364 365 vgic_debug_init(kvm); 366 367 /* 368 * If userspace didn't set the GIC implementation revision, 369 * default to the latest and greatest. You know want it. 370 */ 371 if (!dist->implementation_rev) 372 dist->implementation_rev = KVM_VGIC_IMP_REV_LATEST; 373 dist->initialized = true; 374 375out: 376 return ret; 377} 378 379static void kvm_vgic_dist_destroy(struct kvm *kvm) 380{ 381 struct vgic_dist *dist = &kvm->arch.vgic; 382 struct vgic_redist_region *rdreg, *next; 383 384 dist->ready = false; 385 dist->initialized = false; 386 387 kfree(dist->spis); 388 dist->spis = NULL; 389 dist->nr_spis = 0; 390 dist->vgic_dist_base = VGIC_ADDR_UNDEF; 391 392 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) { 393 list_for_each_entry_safe(rdreg, next, &dist->rd_regions, list) 394 vgic_v3_free_redist_region(rdreg); 395 INIT_LIST_HEAD(&dist->rd_regions); 396 } else { 397 dist->vgic_cpu_base = VGIC_ADDR_UNDEF; 398 } 399 400 if (vgic_supports_direct_msis(kvm)) 401 vgic_v4_teardown(kvm); 402 403 xa_destroy(&dist->lpi_xa); 404} 405 406static void __kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu) 407{ 408 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; 409 410 /* 411 * Retire all pending LPIs on this vcpu anyway as we're 412 * going to destroy it. 413 */ 414 vgic_flush_pending_lpis(vcpu); 415 416 INIT_LIST_HEAD(&vgic_cpu->ap_list_head); 417 kfree(vgic_cpu->private_irqs); 418 vgic_cpu->private_irqs = NULL; 419 420 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) { 421 vgic_unregister_redist_iodev(vcpu); 422 vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF; 423 } 424} 425 426void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu) 427{ 428 struct kvm *kvm = vcpu->kvm; 429 430 mutex_lock(&kvm->slots_lock); 431 __kvm_vgic_vcpu_destroy(vcpu); 432 mutex_unlock(&kvm->slots_lock); 433} 434 435void kvm_vgic_destroy(struct kvm *kvm) 436{ 437 struct kvm_vcpu *vcpu; 438 unsigned long i; 439 440 mutex_lock(&kvm->slots_lock); 441 442 vgic_debug_destroy(kvm); 443 444 kvm_for_each_vcpu(i, vcpu, kvm) 445 __kvm_vgic_vcpu_destroy(vcpu); 446 447 mutex_lock(&kvm->arch.config_lock); 448 449 kvm_vgic_dist_destroy(kvm); 450 451 mutex_unlock(&kvm->arch.config_lock); 452 mutex_unlock(&kvm->slots_lock); 453} 454 455/** 456 * vgic_lazy_init: Lazy init is only allowed if the GIC exposed to the guest 457 * is a GICv2. A GICv3 must be explicitly initialized by userspace using the 458 * KVM_DEV_ARM_VGIC_GRP_CTRL KVM_DEVICE group. 459 * @kvm: kvm struct pointer 460 */ 461int vgic_lazy_init(struct kvm *kvm) 462{ 463 int ret = 0; 464 465 if (unlikely(!vgic_initialized(kvm))) { 466 /* 467 * We only provide the automatic initialization of the VGIC 468 * for the legacy case of a GICv2. Any other type must 469 * be explicitly initialized once setup with the respective 470 * KVM device call. 471 */ 472 if (kvm->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V2) 473 return -EBUSY; 474 475 mutex_lock(&kvm->arch.config_lock); 476 ret = vgic_init(kvm); 477 mutex_unlock(&kvm->arch.config_lock); 478 } 479 480 return ret; 481} 482 483/* RESOURCE MAPPING */ 484 485/** 486 * kvm_vgic_map_resources - map the MMIO regions 487 * @kvm: kvm struct pointer 488 * 489 * Map the MMIO regions depending on the VGIC model exposed to the guest 490 * called on the first VCPU run. 491 * Also map the virtual CPU interface into the VM. 492 * v2 calls vgic_init() if not already done. 493 * v3 and derivatives return an error if the VGIC is not initialized. 494 * vgic_ready() returns true if this function has succeeded. 495 */ 496int kvm_vgic_map_resources(struct kvm *kvm) 497{ 498 struct vgic_dist *dist = &kvm->arch.vgic; 499 enum vgic_type type; 500 gpa_t dist_base; 501 int ret = 0; 502 503 if (likely(vgic_ready(kvm))) 504 return 0; 505 506 mutex_lock(&kvm->slots_lock); 507 mutex_lock(&kvm->arch.config_lock); 508 if (vgic_ready(kvm)) 509 goto out; 510 511 if (!irqchip_in_kernel(kvm)) 512 goto out; 513 514 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) { 515 ret = vgic_v2_map_resources(kvm); 516 type = VGIC_V2; 517 } else { 518 ret = vgic_v3_map_resources(kvm); 519 type = VGIC_V3; 520 } 521 522 if (ret) 523 goto out; 524 525 dist->ready = true; 526 dist_base = dist->vgic_dist_base; 527 mutex_unlock(&kvm->arch.config_lock); 528 529 ret = vgic_register_dist_iodev(kvm, dist_base, type); 530 if (ret) 531 kvm_err("Unable to register VGIC dist MMIO regions\n"); 532 533 goto out_slots; 534out: 535 mutex_unlock(&kvm->arch.config_lock); 536out_slots: 537 mutex_unlock(&kvm->slots_lock); 538 539 if (ret) 540 kvm_vgic_destroy(kvm); 541 542 return ret; 543} 544 545/* GENERIC PROBE */ 546 547void kvm_vgic_cpu_up(void) 548{ 549 enable_percpu_irq(kvm_vgic_global_state.maint_irq, 0); 550} 551 552 553void kvm_vgic_cpu_down(void) 554{ 555 disable_percpu_irq(kvm_vgic_global_state.maint_irq); 556} 557 558static irqreturn_t vgic_maintenance_handler(int irq, void *data) 559{ 560 /* 561 * We cannot rely on the vgic maintenance interrupt to be 562 * delivered synchronously. This means we can only use it to 563 * exit the VM, and we perform the handling of EOIed 564 * interrupts on the exit path (see vgic_fold_lr_state). 565 */ 566 return IRQ_HANDLED; 567} 568 569static struct gic_kvm_info *gic_kvm_info; 570 571void __init vgic_set_kvm_info(const struct gic_kvm_info *info) 572{ 573 BUG_ON(gic_kvm_info != NULL); 574 gic_kvm_info = kmalloc(sizeof(*info), GFP_KERNEL); 575 if (gic_kvm_info) 576 *gic_kvm_info = *info; 577} 578 579/** 580 * kvm_vgic_init_cpu_hardware - initialize the GIC VE hardware 581 * 582 * For a specific CPU, initialize the GIC VE hardware. 583 */ 584void kvm_vgic_init_cpu_hardware(void) 585{ 586 BUG_ON(preemptible()); 587 588 /* 589 * We want to make sure the list registers start out clear so that we 590 * only have the program the used registers. 591 */ 592 if (kvm_vgic_global_state.type == VGIC_V2) 593 vgic_v2_init_lrs(); 594 else 595 kvm_call_hyp(__vgic_v3_init_lrs); 596} 597 598/** 599 * kvm_vgic_hyp_init: populates the kvm_vgic_global_state variable 600 * according to the host GIC model. Accordingly calls either 601 * vgic_v2/v3_probe which registers the KVM_DEVICE that can be 602 * instantiated by a guest later on . 603 */ 604int kvm_vgic_hyp_init(void) 605{ 606 bool has_mask; 607 int ret; 608 609 if (!gic_kvm_info) 610 return -ENODEV; 611 612 has_mask = !gic_kvm_info->no_maint_irq_mask; 613 614 if (has_mask && !gic_kvm_info->maint_irq) { 615 kvm_err("No vgic maintenance irq\n"); 616 return -ENXIO; 617 } 618 619 /* 620 * If we get one of these oddball non-GICs, taint the kernel, 621 * as we have no idea of how they *really* behave. 622 */ 623 if (gic_kvm_info->no_hw_deactivation) { 624 kvm_info("Non-architectural vgic, tainting kernel\n"); 625 add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); 626 kvm_vgic_global_state.no_hw_deactivation = true; 627 } 628 629 switch (gic_kvm_info->type) { 630 case GIC_V2: 631 ret = vgic_v2_probe(gic_kvm_info); 632 break; 633 case GIC_V3: 634 ret = vgic_v3_probe(gic_kvm_info); 635 if (!ret) { 636 static_branch_enable(&kvm_vgic_global_state.gicv3_cpuif); 637 kvm_info("GIC system register CPU interface enabled\n"); 638 } 639 break; 640 default: 641 ret = -ENODEV; 642 } 643 644 kvm_vgic_global_state.maint_irq = gic_kvm_info->maint_irq; 645 646 kfree(gic_kvm_info); 647 gic_kvm_info = NULL; 648 649 if (ret) 650 return ret; 651 652 if (!has_mask && !kvm_vgic_global_state.maint_irq) 653 return 0; 654 655 ret = request_percpu_irq(kvm_vgic_global_state.maint_irq, 656 vgic_maintenance_handler, 657 "vgic", kvm_get_running_vcpus()); 658 if (ret) { 659 kvm_err("Cannot register interrupt %d\n", 660 kvm_vgic_global_state.maint_irq); 661 return ret; 662 } 663 664 kvm_info("vgic interrupt IRQ%d\n", kvm_vgic_global_state.maint_irq); 665 return 0; 666} 667