1/*-
2 * SPDX-License-Identifier: ISC
3 *
4 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2008 Atheros Communications, Inc.
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 * $FreeBSD: releng/12.0/sys/dev/ath/ath_hal/ar9002/ar9280.c 326695 2017-12-08 15:57:29Z pfg $
20 */
21#include "opt_ah.h"
22
23/*
24 * NB: Merlin and later have a simpler RF backend.
25 */
26#include "ah.h"
27#include "ah_internal.h"
28
29#include "ah_eeprom_v14.h"
30
31#include "ar9002/ar9280.h"
32#include "ar5416/ar5416reg.h"
33#include "ar5416/ar5416phy.h"
34
35#define N(a)    (sizeof(a)/sizeof(a[0]))
36
37struct ar9280State {
38	RF_HAL_FUNCS	base;		/* public state, must be first */
39	uint16_t	pcdacTable[1];	/* XXX */
40};
41#define	AR9280(ah)	((struct ar9280State *) AH5212(ah)->ah_rfHal)
42
43static HAL_BOOL ar9280GetChannelMaxMinPower(struct ath_hal *,
44	const struct ieee80211_channel *, int16_t *maxPow,int16_t *minPow);
45int16_t ar9280GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c);
46
47static void
48ar9280WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
49	int writes)
50{
51	(void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain,
52		freqIndex, writes);
53}
54
55/*
56 * Take the MHz channel value and set the Channel value
57 *
58 * ASSUMES: Writes enabled to analog bus
59 *
60 * Actual Expression,
61 *
62 * For 2GHz channel,
63 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
64 * (freq_ref = 40MHz)
65 *
66 * For 5GHz channel,
67 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
68 * (freq_ref = 40MHz/(24>>amodeRefSel))
69 *
70 * For 5GHz channels which are 5MHz spaced,
71 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
72 * (freq_ref = 40MHz)
73 */
74static HAL_BOOL
75ar9280SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
76{
77	uint16_t bMode, fracMode, aModeRefSel = 0;
78	uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
79	CHAN_CENTERS centers;
80	uint32_t refDivA = 24;
81	uint8_t frac_n_5g;
82
83	OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq);
84
85	ar5416GetChannelCenters(ah, chan, &centers);
86	freq = centers.synth_center;
87
88	reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL);
89	reg32 &= 0xc0000000;
90
91	if (ath_hal_eepromGet(ah, AR_EEP_FRAC_N_5G, &frac_n_5g) != HAL_OK)
92		frac_n_5g = 0;
93
94	if (freq < 4800) {     /* 2 GHz, fractional mode */
95		uint32_t txctl;
96
97		bMode = 1;
98		fracMode = 1;
99		aModeRefSel = 0;
100		channelSel = (freq * 0x10000)/15;
101
102		txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
103		if (freq == 2484) {
104			/* Enable channel spreading for channel 14 */
105			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
106			    txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
107		} else {
108			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
109			    txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
110		}
111	} else {
112		bMode = 0;
113		fracMode = 0;
114
115		switch (frac_n_5g) {
116		case 0:
117			/*
118			 * Enable fractional mode for half/quarter rate
119			 * channels.
120			 *
121			 * This is from the Linux ath9k code, rather than
122			 * the Atheros HAL code.
123			 */
124			if (IEEE80211_IS_CHAN_QUARTER(chan) ||
125			    IEEE80211_IS_CHAN_HALF(chan))
126				aModeRefSel = 0;
127			else if ((freq % 20) == 0) {
128				aModeRefSel = 3;
129			} else if ((freq % 10) == 0) {
130				aModeRefSel = 2;
131			}
132			if (aModeRefSel) break;
133		case 1:
134		default:
135			aModeRefSel = 0;
136			/* Enable 2G (fractional) mode for channels which are 5MHz spaced */
137
138			/*
139			 * Workaround for talking on PSB non-5MHz channels;
140			 * the pre-Merlin chips only had a 2.5MHz channel
141			 * spacing so some channels aren't reachable.
142
143			 *
144			 * This interoperates on the quarter rate channels
145			 * with the AR5112 and later RF synths.  Please note
146			 * that the synthesiser isn't able to completely
147			 * accurately represent these frequencies (as the
148			 * resolution in this reference is 2.5MHz) and thus
149			 * it will be slightly "off centre."  This matches
150			 * the same slightly incorrect centre frequency
151			 * behaviour that the AR5112 and later channel
152			 * selection code has.
153			 *
154			 * This also interoperates with the AR5416
155			 * synthesiser modification for programming
156			 * fractional frequencies in 5GHz mode.  However
157			 * that modification is also disabled by default.
158			 *
159			 * This is disabled because it hasn't been tested for
160			 * regulatory compliance and neither have the NICs
161			 * which would use it.  So if you enable this code,
162			 * you must first ensure that you've re-certified the
163			 * NICs in question beforehand or you will be
164			 * violating your local regulatory rules and breaking
165			 * the law.
166			 */
167#if 0
168			if (freq % 5 == 0) {
169#endif
170				/* Normal */
171				fracMode = 1;
172				refDivA = 1;
173				channelSel = (freq * 0x8000)/15;
174#if 0
175			} else {
176				/* Offset by 500KHz */
177				uint32_t f, ch, ch2;
178
179				fracMode = 1;
180				refDivA = 1;
181
182				/* Calculate the "adjusted" frequency */
183				f = freq - 2;
184				ch = (((f - 4800) * 10) / 25) + 1;
185
186				ch2 = ((ch * 25) / 5) + 9600;
187				channelSel = (ch2 * 0x4000) / 15;
188				//ath_hal_printf(ah,
189				//    "%s: freq=%d, ch=%d, ch2=%d, "
190				//    "channelSel=%d\n",
191				//    __func__, freq, ch, ch2, channelSel);
192			}
193#endif
194
195			/* RefDivA setting */
196			OS_A_REG_RMW_FIELD(ah, AR_AN_SYNTH9,
197			    AR_AN_SYNTH9_REFDIVA, refDivA);
198		}
199
200		if (!fracMode) {
201			ndiv = (freq * (refDivA >> aModeRefSel))/60;
202			channelSel =  ndiv & 0x1ff;
203			channelFrac = (ndiv & 0xfffffe00) * 2;
204			channelSel = (channelSel << 17) | channelFrac;
205		}
206	}
207
208	reg32 = reg32 | (bMode << 29) | (fracMode << 28) |
209	    (aModeRefSel << 26) | (channelSel);
210
211	OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);
212
213	AH_PRIVATE(ah)->ah_curchan = chan;
214
215	return AH_TRUE;
216}
217
218/*
219 * Return a reference to the requested RF Bank.
220 */
221static uint32_t *
222ar9280GetRfBank(struct ath_hal *ah, int bank)
223{
224	HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
225	    __func__, bank);
226	return AH_NULL;
227}
228
229/*
230 * Reads EEPROM header info from device structure and programs
231 * all rf registers
232 */
233static HAL_BOOL
234ar9280SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
235                uint16_t modesIndex, uint16_t *rfXpdGain)
236{
237	return AH_TRUE;		/* nothing to do */
238}
239
240/*
241 * Read the transmit power levels from the structures taken from EEPROM
242 * Interpolate read transmit power values for this channel
243 * Organize the transmit power values into a table for writing into the hardware
244 */
245
246static HAL_BOOL
247ar9280SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax,
248	const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
249{
250	return AH_TRUE;
251}
252
253#if 0
254static int16_t
255ar9280GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data)
256{
257    int i, minIndex;
258    int16_t minGain,minPwr,minPcdac,retVal;
259
260    /* Assume NUM_POINTS_XPD0 > 0 */
261    minGain = data->pDataPerXPD[0].xpd_gain;
262    for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) {
263        if (data->pDataPerXPD[i].xpd_gain < minGain) {
264            minIndex = i;
265            minGain = data->pDataPerXPD[i].xpd_gain;
266        }
267    }
268    minPwr = data->pDataPerXPD[minIndex].pwr_t4[0];
269    minPcdac = data->pDataPerXPD[minIndex].pcdac[0];
270    for (i=1; i<NUM_POINTS_XPD0; i++) {
271        if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) {
272            minPwr = data->pDataPerXPD[minIndex].pwr_t4[i];
273            minPcdac = data->pDataPerXPD[minIndex].pcdac[i];
274        }
275    }
276    retVal = minPwr - (minPcdac*2);
277    return(retVal);
278}
279#endif
280
281static HAL_BOOL
282ar9280GetChannelMaxMinPower(struct ath_hal *ah,
283	const struct ieee80211_channel *chan,
284	int16_t *maxPow, int16_t *minPow)
285{
286#if 0
287    struct ath_hal_5212 *ahp = AH5212(ah);
288    int numChannels=0,i,last;
289    int totalD, totalF,totalMin;
290    EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL;
291    EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL;
292
293    *maxPow = 0;
294    if (IS_CHAN_A(chan)) {
295        powerArray = ahp->ah_modePowerArray5112;
296        data = powerArray[headerInfo11A].pDataPerChannel;
297        numChannels = powerArray[headerInfo11A].numChannels;
298    } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) {
299        /* XXX - is this correct? Should we also use the same power for turbo G? */
300        powerArray = ahp->ah_modePowerArray5112;
301        data = powerArray[headerInfo11G].pDataPerChannel;
302        numChannels = powerArray[headerInfo11G].numChannels;
303    } else if (IS_CHAN_B(chan)) {
304        powerArray = ahp->ah_modePowerArray5112;
305        data = powerArray[headerInfo11B].pDataPerChannel;
306        numChannels = powerArray[headerInfo11B].numChannels;
307    } else {
308        return (AH_TRUE);
309    }
310    /* Make sure the channel is in the range of the TP values
311     *  (freq piers)
312     */
313    if ((numChannels < 1) ||
314        (chan->channel < data[0].channelValue) ||
315        (chan->channel > data[numChannels-1].channelValue))
316        return(AH_FALSE);
317
318    /* Linearly interpolate the power value now */
319    for (last=0,i=0;
320         (i<numChannels) && (chan->channel > data[i].channelValue);
321         last=i++);
322    totalD = data[i].channelValue - data[last].channelValue;
323    if (totalD > 0) {
324        totalF = data[i].maxPower_t4 - data[last].maxPower_t4;
325        *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD);
326
327        totalMin = ar9280GetMinPower(ah,&data[i]) - ar9280GetMinPower(ah, &data[last]);
328        *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar9280GetMinPower(ah, &data[last])*totalD)/totalD);
329        return (AH_TRUE);
330    } else {
331        if (chan->channel == data[i].channelValue) {
332            *maxPow = data[i].maxPower_t4;
333            *minPow = ar9280GetMinPower(ah, &data[i]);
334            return(AH_TRUE);
335        } else
336            return(AH_FALSE);
337    }
338#else
339	*maxPow = *minPow = 0;
340	return AH_FALSE;
341#endif
342}
343
344/*
345 * The ordering of nfarray is thus:
346 *
347 * nfarray[0]: Chain 0 ctl
348 * nfarray[1]: Chain 1 ctl
349 * nfarray[2]: Chain 2 ctl
350 * nfarray[3]: Chain 0 ext
351 * nfarray[4]: Chain 1 ext
352 * nfarray[5]: Chain 2 ext
353 */
354static void
355ar9280GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
356{
357	int16_t nf;
358
359	nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR);
360	if (nf & 0x100)
361		nf = 0 - ((nf ^ 0x1ff) + 1);
362	HALDEBUG(ah, HAL_DEBUG_NFCAL,
363	    "NF calibrated [ctl] [chain 0] is %d\n", nf);
364	nfarray[0] = nf;
365
366	nf = MS(OS_REG_READ(ah, AR_PHY_CH1_CCA), AR9280_PHY_CH1_MINCCA_PWR);
367	if (nf & 0x100)
368		nf = 0 - ((nf ^ 0x1ff) + 1);
369	HALDEBUG(ah, HAL_DEBUG_NFCAL,
370	    "NF calibrated [ctl] [chain 1] is %d\n", nf);
371	nfarray[1] = nf;
372
373	nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR);
374	if (nf & 0x100)
375		nf = 0 - ((nf ^ 0x1ff) + 1);
376	HALDEBUG(ah, HAL_DEBUG_NFCAL,
377	    "NF calibrated [ext] [chain 0] is %d\n", nf);
378	nfarray[3] = nf;
379
380	nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR9280_PHY_CH1_EXT_MINCCA_PWR);
381	if (nf & 0x100)
382		nf = 0 - ((nf ^ 0x1ff) + 1);
383	HALDEBUG(ah, HAL_DEBUG_NFCAL,
384	    "NF calibrated [ext] [chain 1] is %d\n", nf);
385	nfarray[4] = nf;
386
387        /* Chain 2 - invalid */
388        nfarray[2] = 0;
389        nfarray[5] = 0;
390
391}
392
393/*
394 * Adjust NF based on statistical values for 5GHz frequencies.
395 * Stubbed:Not used by Fowl
396 */
397int16_t
398ar9280GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c)
399{
400	return 0;
401}
402
403/*
404 * Free memory for analog bank scratch buffers
405 */
406static void
407ar9280RfDetach(struct ath_hal *ah)
408{
409	struct ath_hal_5212 *ahp = AH5212(ah);
410
411	HALASSERT(ahp->ah_rfHal != AH_NULL);
412	ath_hal_free(ahp->ah_rfHal);
413	ahp->ah_rfHal = AH_NULL;
414}
415
416HAL_BOOL
417ar9280RfAttach(struct ath_hal *ah, HAL_STATUS *status)
418{
419	struct ath_hal_5212 *ahp = AH5212(ah);
420	struct ar9280State *priv;
421
422	HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR9280 radio\n", __func__);
423
424	HALASSERT(ahp->ah_rfHal == AH_NULL);
425	priv = ath_hal_malloc(sizeof(struct ar9280State));
426	if (priv == AH_NULL) {
427		HALDEBUG(ah, HAL_DEBUG_ANY,
428		    "%s: cannot allocate private state\n", __func__);
429		*status = HAL_ENOMEM;		/* XXX */
430		return AH_FALSE;
431	}
432	priv->base.rfDetach		= ar9280RfDetach;
433	priv->base.writeRegs		= ar9280WriteRegs;
434	priv->base.getRfBank		= ar9280GetRfBank;
435	priv->base.setChannel		= ar9280SetChannel;
436	priv->base.setRfRegs		= ar9280SetRfRegs;
437	priv->base.setPowerTable	= ar9280SetPowerTable;
438	priv->base.getChannelMaxMinPower = ar9280GetChannelMaxMinPower;
439	priv->base.getNfAdjust		= ar9280GetNfAdjust;
440
441	ahp->ah_pcdacTable = priv->pcdacTable;
442	ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
443	ahp->ah_rfHal = &priv->base;
444	/*
445	 * Set noise floor adjust method; we arrange a
446	 * direct call instead of thunking.
447	 */
448	AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
449	AH_PRIVATE(ah)->ah_getNoiseFloor = ar9280GetNoiseFloor;
450
451	return AH_TRUE;
452}
453
454static HAL_BOOL
455ar9280RfProbe(struct ath_hal *ah)
456{
457	return (AR_SREV_MERLIN(ah));
458}
459
460AH_RF(RF9280, ar9280RfProbe, ar9280RfAttach);
461