1This is /home/zooey/Sources/haiku/buildtools.pm/legacy/binutils/gas/doc/as.info, produced by makeinfo version 4.13 from /home/zooey/Sources/haiku/buildtools.pm/legacy/binutils/gas/doc/as.texinfo. 2 3START-INFO-DIR-ENTRY 4* As: (as). The GNU assembler. 5* Gas: (as). The GNU assembler. 6END-INFO-DIR-ENTRY 7 8 This file documents the GNU Assembler "as". 9 10 Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002 11Free Software Foundation, Inc. 12 13 Permission is granted to copy, distribute and/or modify this document 14under the terms of the GNU Free Documentation License, Version 1.1 or 15any later version published by the Free Software Foundation; with no 16Invariant Sections, with no Front-Cover Texts, and with no Back-Cover 17Texts. A copy of the license is included in the section entitled "GNU 18Free Documentation License". 19 20 21File: as.info, Node: Top, Next: Overview, Up: (dir) 22 23Using as 24******** 25 26This file is a user guide to the GNU assembler `as' version 2.17. 27 28 This document is distributed under the terms of the GNU Free 29Documentation License. A copy of the license is included in the 30section entitled "GNU Free Documentation License". 31 32* Menu: 33 34* Overview:: Overview 35* Invoking:: Command-Line Options 36* Syntax:: Syntax 37* Sections:: Sections and Relocation 38* Symbols:: Symbols 39* Expressions:: Expressions 40* Pseudo Ops:: Assembler Directives 41* Machine Dependencies:: Machine Dependent Features 42* Reporting Bugs:: Reporting Bugs 43* Acknowledgements:: Who Did What 44* GNU Free Documentation License:: GNU Free Documentation License 45* Index:: Index 46 47 48File: as.info, Node: Overview, Next: Invoking, Prev: Top, Up: Top 49 501 Overview 51********** 52 53Here is a brief summary of how to invoke `as'. For details, *note 54Command-Line Options: Invoking. 55 56 as [-a[cdhlns][=FILE]] [-alternate] [-D] 57 [-defsym SYM=VAL] [-f] [-g] [-gstabs] 58 [-gstabs+] [-gdwarf-2] [-help] [-I DIR] [-J] 59 [-K] [-L] [-listing-lhs-width=NUM] 60 [-listing-lhs-width2=NUM] [-listing-rhs-width=NUM] 61 [-listing-cont-lines=NUM] [-keep-locals] [-o 62 OBJFILE] [-R] [-reduce-memory-overheads] [-statistics] 63 [-v] [-version] [-version] [-W] [-warn] 64 [-fatal-warnings] [-w] [-x] [-Z] [@FILE] 65 [-target-help] [TARGET-OPTIONS] 66 [-|FILES ...] 67 68 _Target Alpha options:_ 69 [-mCPU] 70 [-mdebug | -no-mdebug] 71 [-relax] [-g] [-GSIZE] 72 [-F] [-32addr] 73 74 _Target ARC options:_ 75 [-marc[5|6|7|8]] 76 [-EB|-EL] 77 78 _Target ARM options:_ 79 [-mcpu=PROCESSOR[+EXTENSION...]] 80 [-march=ARCHITECTURE[+EXTENSION...]] 81 [-mfpu=FLOATING-POINT-FORMAT] 82 [-mfloat-abi=ABI] 83 [-meabi=VER] 84 [-mthumb] 85 [-EB|-EL] 86 [-mapcs-32|-mapcs-26|-mapcs-float| 87 -mapcs-reentrant] 88 [-mthumb-interwork] [-k] 89 90 _Target CRIS options:_ 91 [-underscore | -no-underscore] 92 [-pic] [-N] 93 [-emulation=criself | -emulation=crisaout] 94 [-march=v0_v10 | -march=v10 | -march=v32 | -march=common_v10_v32] 95 96 _Target D10V options:_ 97 [-O] 98 99 _Target D30V options:_ 100 [-O|-n|-N] 101 102 _Target i386 options:_ 103 [-32|-64] [-n] 104 105 _Target i960 options:_ 106 [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB| 107 -AKC|-AMC] 108 [-b] [-no-relax] 109 110 _Target IA-64 options:_ 111 [-mconstant-gp|-mauto-pic] 112 [-milp32|-milp64|-mlp64|-mp64] 113 [-mle|mbe] 114 [-mtune=itanium1|-mtune=itanium2] 115 [-munwind-check=warning|-munwind-check=error] 116 [-mhint.b=ok|-mhint.b=warning|-mhint.b=error] 117 [-x|-xexplicit] [-xauto] [-xdebug] 118 119 _Target IP2K options:_ 120 [-mip2022|-mip2022ext] 121 122 _Target M32C options:_ 123 [-m32c|-m16c] 124 125 _Target M32R options:_ 126 [-m32rx|-[no-]warn-explicit-parallel-conflicts| 127 -W[n]p] 128 129 _Target M680X0 options:_ 130 [-l] [-m68000|-m68010|-m68020|...] 131 132 _Target M68HC11 options:_ 133 [-m68hc11|-m68hc12|-m68hcs12] 134 [-mshort|-mlong] 135 [-mshort-double|-mlong-double] 136 [-force-long-branchs] [-short-branchs] 137 [-strict-direct-mode] [-print-insn-syntax] 138 [-print-opcodes] [-generate-example] 139 140 _Target MCORE options:_ 141 [-jsri2bsr] [-sifilter] [-relax] 142 [-mcpu=[210|340]] 143 144 _Target MIPS options:_ 145 [-nocpp] [-EL] [-EB] [-O[OPTIMIZATION LEVEL]] 146 [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared] 147 [-non_shared] [-xgot] 148 [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32] 149 [-march=CPU] [-mtune=CPU] [-mips1] [-mips2] 150 [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2] 151 [-mips64] [-mips64r2] 152 [-construct-floats] [-no-construct-floats] 153 [-trap] [-no-break] [-break] [-no-trap] 154 [-mfix7000] [-mno-fix7000] 155 [-mips16] [-no-mips16] 156 [-mips3d] [-no-mips3d] 157 [-mdmx] [-no-mdmx] 158 [-mdsp] [-mno-dsp] 159 [-mmt] [-mno-mt] 160 [-mdebug] [-no-mdebug] 161 [-mpdr] [-mno-pdr] 162 163 _Target MMIX options:_ 164 [-fixed-special-register-names] [-globalize-symbols] 165 [-gnu-syntax] [-relax] [-no-predefined-symbols] 166 [-no-expand] [-no-merge-gregs] [-x] 167 [-linker-allocated-gregs] 168 169 _Target PDP11 options:_ 170 [-mpic|-mno-pic] [-mall] [-mno-extensions] 171 [-mEXTENSION|-mno-EXTENSION] 172 [-mCPU] [-mMACHINE] 173 174 _Target picoJava options:_ 175 [-mb|-me] 176 177 _Target PowerPC options:_ 178 [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604| 179 -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke| 180 -mbooke32|-mbooke64] 181 [-mcom|-many|-maltivec] [-memb] 182 [-mregnames|-mno-regnames] 183 [-mrelocatable|-mrelocatable-lib] 184 [-mlittle|-mlittle-endian|-mbig|-mbig-endian] 185 [-msolaris|-mno-solaris] 186 187 _Target SPARC options:_ 188 [-Av6|-Av7|-Av8|-Asparclet|-Asparclite 189 -Av8plus|-Av8plusa|-Av9|-Av9a] 190 [-xarch=v8plus|-xarch=v8plusa] [-bump] 191 [-32|-64] 192 193 _Target TIC54X options:_ 194 [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf] 195 [-merrors-to-file <FILENAME>|-me <FILENAME>] 196 197 198 _Target Z80 options:_ 199 [-z80] [-r800] 200 [ -ignore-undocumented-instructions] [-Wnud] 201 [ -ignore-unportable-instructions] [-Wnup] 202 [ -warn-undocumented-instructions] [-Wud] 203 [ -warn-unportable-instructions] [-Wup] 204 [ -forbid-undocumented-instructions] [-Fud] 205 [ -forbid-unportable-instructions] [-Fup] 206 207 208 _Target Xtensa options:_ 209 [-[no-]text-section-literals] [-[no-]absolute-literals] 210 [-[no-]target-align] [-[no-]longcalls] 211 [-[no-]transform] 212 [-rename-section OLDNAME=NEWNAME] 213 214`@FILE' 215 Read command-line options from FILE. The options read are 216 inserted in place of the original @FILE option. If FILE does not 217 exist, or cannot be read, then the option will be treated 218 literally, and not removed. 219 220 Options in FILE are separated by whitespace. A whitespace 221 character may be included in an option by surrounding the entire 222 option in either single or double quotes. Any character 223 (including a backslash) may be included by prefixing the character 224 to be included with a backslash. The FILE may itself contain 225 additional @FILE options; any such options will be processed 226 recursively. 227 228`-a[cdhlmns]' 229 Turn on listings, in any of a variety of ways: 230 231 `-ac' 232 omit false conditionals 233 234 `-ad' 235 omit debugging directives 236 237 `-ah' 238 include high-level source 239 240 `-al' 241 include assembly 242 243 `-am' 244 include macro expansions 245 246 `-an' 247 omit forms processing 248 249 `-as' 250 include symbols 251 252 `=file' 253 set the name of the listing file 254 255 You may combine these options; for example, use `-aln' for assembly 256 listing without forms processing. The `=file' option, if used, 257 must be the last one. By itself, `-a' defaults to `-ahls'. 258 259`--alternate' 260 Begin in alternate macro mode, see *note `.altmacro': Altmacro. 261 262`-D' 263 Ignored. This option is accepted for script compatibility with 264 calls to other assemblers. 265 266`--defsym SYM=VALUE' 267 Define the symbol SYM to be VALUE before assembling the input file. 268 VALUE must be an integer constant. As in C, a leading `0x' 269 indicates a hexadecimal value, and a leading `0' indicates an 270 octal value. 271 272`-f' 273 "fast"--skip whitespace and comment preprocessing (assume source is 274 compiler output). 275 276`-g' 277`--gen-debug' 278 Generate debugging information for each assembler source line 279 using whichever debug format is preferred by the target. This 280 currently means either STABS, ECOFF or DWARF2. 281 282`--gstabs' 283 Generate stabs debugging information for each assembler line. This 284 may help debugging assembler code, if the debugger can handle it. 285 286`--gstabs+' 287 Generate stabs debugging information for each assembler line, with 288 GNU extensions that probably only gdb can handle, and that could 289 make other debuggers crash or refuse to read your program. This 290 may help debugging assembler code. Currently the only GNU 291 extension is the location of the current working directory at 292 assembling time. 293 294`--gdwarf-2' 295 Generate DWARF2 debugging information for each assembler line. 296 This may help debugging assembler code, if the debugger can handle 297 it. Note--this option is only supported by some targets, not all 298 of them. 299 300`--help' 301 Print a summary of the command line options and exit. 302 303`--target-help' 304 Print a summary of all target specific options and exit. 305 306`-I DIR' 307 Add directory DIR to the search list for `.include' directives. 308 309`-J' 310 Don't warn about signed overflow. 311 312`-K' 313 Issue warnings when difference tables altered for long 314 displacements. 315 316`-L' 317`--keep-locals' 318 Keep (in the symbol table) local symbols. On traditional a.out 319 systems these start with `L', but different systems have different 320 local label prefixes. 321 322`--listing-lhs-width=NUMBER' 323 Set the maximum width, in words, of the output data column for an 324 assembler listing to NUMBER. 325 326`--listing-lhs-width2=NUMBER' 327 Set the maximum width, in words, of the output data column for 328 continuation lines in an assembler listing to NUMBER. 329 330`--listing-rhs-width=NUMBER' 331 Set the maximum width of an input source line, as displayed in a 332 listing, to NUMBER bytes. 333 334`--listing-cont-lines=NUMBER' 335 Set the maximum number of lines printed in a listing for a single 336 line of input to NUMBER + 1. 337 338`-o OBJFILE' 339 Name the object-file output from `as' OBJFILE. 340 341`-R' 342 Fold the data section into the text section. 343 344 Set the default size of GAS's hash tables to a prime number close 345 to NUMBER. Increasing this value can reduce the length of time it 346 takes the assembler to perform its tasks, at the expense of 347 increasing the assembler's memory requirements. Similarly 348 reducing this value can reduce the memory requirements at the 349 expense of speed. 350 351`--reduce-memory-overheads' 352 This option reduces GAS's memory requirements, at the expense of 353 making the assembly processes slower. Currently this switch is a 354 synonym for `--hash-size=4051', but in the future it may have 355 other effects as well. 356 357`--statistics' 358 Print the maximum space (in bytes) and total time (in seconds) 359 used by assembly. 360 361`--strip-local-absolute' 362 Remove local absolute symbols from the outgoing symbol table. 363 364`-v' 365`-version' 366 Print the `as' version. 367 368`--version' 369 Print the `as' version and exit. 370 371`-W' 372`--no-warn' 373 Suppress warning messages. 374 375`--fatal-warnings' 376 Treat warnings as errors. 377 378`--warn' 379 Don't suppress warning messages or treat them as errors. 380 381`-w' 382 Ignored. 383 384`-x' 385 Ignored. 386 387`-Z' 388 Generate an object file even after errors. 389 390`-- | FILES ...' 391 Standard input, or source files to assemble. 392 393 394 The following options are available when as is configured for an ARC 395processor. 396 397`-marc[5|6|7|8]' 398 This option selects the core processor variant. 399 400`-EB | -EL' 401 Select either big-endian (-EB) or little-endian (-EL) output. 402 403 The following options are available when as is configured for the ARM 404processor family. 405 406`-mcpu=PROCESSOR[+EXTENSION...]' 407 Specify which ARM processor variant is the target. 408 409`-march=ARCHITECTURE[+EXTENSION...]' 410 Specify which ARM architecture variant is used by the target. 411 412`-mfpu=FLOATING-POINT-FORMAT' 413 Select which Floating Point architecture is the target. 414 415`-mfloat-abi=ABI' 416 Select which floating point ABI is in use. 417 418`-mthumb' 419 Enable Thumb only instruction decoding. 420 421`-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant' 422 Select which procedure calling convention is in use. 423 424`-EB | -EL' 425 Select either big-endian (-EB) or little-endian (-EL) output. 426 427`-mthumb-interwork' 428 Specify that the code has been generated with interworking between 429 Thumb and ARM code in mind. 430 431`-k' 432 Specify that PIC code has been generated. 433 434 See the info pages for documentation of the CRIS-specific options. 435 436 The following options are available when as is configured for a D10V 437processor. 438`-O' 439 Optimize output by parallelizing instructions. 440 441 The following options are available when as is configured for a D30V 442processor. 443`-O' 444 Optimize output by parallelizing instructions. 445 446`-n' 447 Warn when nops are generated. 448 449`-N' 450 Warn when a nop after a 32-bit multiply instruction is generated. 451 452 The following options are available when as is configured for the 453Intel 80960 processor. 454 455`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC' 456 Specify which variant of the 960 architecture is the target. 457 458`-b' 459 Add code to collect statistics about branches taken. 460 461`-no-relax' 462 Do not alter compare-and-branch instructions for long 463 displacements; error if necessary. 464 465 466 The following options are available when as is configured for the 467Ubicom IP2K series. 468 469`-mip2022ext' 470 Specifies that the extended IP2022 instructions are allowed. 471 472`-mip2022' 473 Restores the default behaviour, which restricts the permitted 474 instructions to just the basic IP2022 ones. 475 476 477 The following options are available when as is configured for the 478Renesas M32C and M16C processors. 479 480`-m32c' 481 Assemble M32C instructions. 482 483`-m16c' 484 Assemble M16C instructions (the default). 485 486 487 The following options are available when as is configured for the 488Renesas M32R (formerly Mitsubishi M32R) series. 489 490`--m32rx' 491 Specify which processor in the M32R family is the target. The 492 default is normally the M32R, but this option changes it to the 493 M32RX. 494 495`--warn-explicit-parallel-conflicts or --Wp' 496 Produce warning messages when questionable parallel constructs are 497 encountered. 498 499`--no-warn-explicit-parallel-conflicts or --Wnp' 500 Do not produce warning messages when questionable parallel 501 constructs are encountered. 502 503 504 The following options are available when as is configured for the 505Motorola 68000 series. 506 507`-l' 508 Shorten references to undefined symbols, to one word instead of 509 two. 510 511`-m68000 | -m68008 | -m68010 | -m68020 | -m68030' 512`| -m68040 | -m68060 | -m68302 | -m68331 | -m68332' 513`| -m68333 | -m68340 | -mcpu32 | -m5200' 514 Specify what processor in the 68000 family is the target. The 515 default is normally the 68020, but this can be changed at 516 configuration time. 517 518`-m68881 | -m68882 | -mno-68881 | -mno-68882' 519 The target machine does (or does not) have a floating-point 520 coprocessor. The default is to assume a coprocessor for 68020, 521 68030, and cpu32. Although the basic 68000 is not compatible with 522 the 68881, a combination of the two can be specified, since it's 523 possible to do emulation of the coprocessor instructions with the 524 main processor. 525 526`-m68851 | -mno-68851' 527 The target machine does (or does not) have a memory-management 528 unit coprocessor. The default is to assume an MMU for 68020 and 529 up. 530 531 532 For details about the PDP-11 machine dependent features options, see 533*note PDP-11-Options::. 534 535`-mpic | -mno-pic' 536 Generate position-independent (or position-dependent) code. The 537 default is `-mpic'. 538 539`-mall' 540`-mall-extensions' 541 Enable all instruction set extensions. This is the default. 542 543`-mno-extensions' 544 Disable all instruction set extensions. 545 546`-mEXTENSION | -mno-EXTENSION' 547 Enable (or disable) a particular instruction set extension. 548 549`-mCPU' 550 Enable the instruction set extensions supported by a particular 551 CPU, and disable all other extensions. 552 553`-mMACHINE' 554 Enable the instruction set extensions supported by a particular 555 machine model, and disable all other extensions. 556 557 The following options are available when as is configured for a 558picoJava processor. 559 560`-mb' 561 Generate "big endian" format output. 562 563`-ml' 564 Generate "little endian" format output. 565 566 567 The following options are available when as is configured for the 568Motorola 68HC11 or 68HC12 series. 569 570`-m68hc11 | -m68hc12 | -m68hcs12' 571 Specify what processor is the target. The default is defined by 572 the configuration option when building the assembler. 573 574`-mshort' 575 Specify to use the 16-bit integer ABI. 576 577`-mlong' 578 Specify to use the 32-bit integer ABI. 579 580`-mshort-double' 581 Specify to use the 32-bit double ABI. 582 583`-mlong-double' 584 Specify to use the 64-bit double ABI. 585 586`--force-long-branchs' 587 Relative branches are turned into absolute ones. This concerns 588 conditional branches, unconditional branches and branches to a sub 589 routine. 590 591`-S | --short-branchs' 592 Do not turn relative branchs into absolute ones when the offset is 593 out of range. 594 595`--strict-direct-mode' 596 Do not turn the direct addressing mode into extended addressing 597 mode when the instruction does not support direct addressing mode. 598 599`--print-insn-syntax' 600 Print the syntax of instruction in case of error. 601 602`--print-opcodes' 603 print the list of instructions with syntax and then exit. 604 605`--generate-example' 606 print an example of instruction for each possible instruction and 607 then exit. This option is only useful for testing `as'. 608 609 610 The following options are available when `as' is configured for the 611SPARC architecture: 612 613`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite' 614`-Av8plus | -Av8plusa | -Av9 | -Av9a' 615 Explicitly select a variant of the SPARC architecture. 616 617 `-Av8plus' and `-Av8plusa' select a 32 bit environment. `-Av9' 618 and `-Av9a' select a 64 bit environment. 619 620 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with 621 UltraSPARC extensions. 622 623`-xarch=v8plus | -xarch=v8plusa' 624 For compatibility with the Solaris v9 assembler. These options are 625 equivalent to -Av8plus and -Av8plusa, respectively. 626 627`-bump' 628 Warn when the assembler switches to another architecture. 629 630 The following options are available when as is configured for the 631'c54x architecture. 632 633`-mfar-mode' 634 Enable extended addressing mode. All addresses and relocations 635 will assume extended addressing (usually 23 bits). 636 637`-mcpu=CPU_VERSION' 638 Sets the CPU version being compiled for. 639 640`-merrors-to-file FILENAME' 641 Redirect error output to a file, for broken systems which don't 642 support such behaviour in the shell. 643 644 The following options are available when as is configured for a MIPS 645processor. 646 647`-G NUM' 648 This option sets the largest size of an object that can be 649 referenced implicitly with the `gp' register. It is only accepted 650 for targets that use ECOFF format, such as a DECstation running 651 Ultrix. The default value is 8. 652 653`-EB' 654 Generate "big endian" format output. 655 656`-EL' 657 Generate "little endian" format output. 658 659`-mips1' 660`-mips2' 661`-mips3' 662`-mips4' 663`-mips5' 664`-mips32' 665`-mips32r2' 666`-mips64' 667`-mips64r2' 668 Generate code for a particular MIPS Instruction Set Architecture 669 level. `-mips1' is an alias for `-march=r3000', `-mips2' is an 670 alias for `-march=r6000', `-mips3' is an alias for `-march=r4000' 671 and `-mips4' is an alias for `-march=r8000'. `-mips5', `-mips32', 672 `-mips32r2', `-mips64', and `-mips64r2' correspond to generic 673 `MIPS V', `MIPS32', `MIPS32 Release 2', `MIPS64', and `MIPS64 674 Release 2' ISA processors, respectively. 675 676`-march=CPU' 677 Generate code for a particular MIPS cpu. 678 679`-mtune=CPU' 680 Schedule and tune for a particular MIPS cpu. 681 682`-mfix7000' 683`-mno-fix7000' 684 Cause nops to be inserted if the read of the destination register 685 of an mfhi or mflo instruction occurs in the following two 686 instructions. 687 688`-mdebug' 689`-no-mdebug' 690 Cause stabs-style debugging output to go into an ECOFF-style 691 .mdebug section instead of the standard ELF .stabs sections. 692 693`-mpdr' 694`-mno-pdr' 695 Control generation of `.pdr' sections. 696 697`-mgp32' 698`-mfp32' 699 The register sizes are normally inferred from the ISA and ABI, but 700 these flags force a certain group of registers to be treated as 32 701 bits wide at all times. `-mgp32' controls the size of 702 general-purpose registers and `-mfp32' controls the size of 703 floating-point registers. 704 705`-mips16' 706`-no-mips16' 707 Generate code for the MIPS 16 processor. This is equivalent to 708 putting `.set mips16' at the start of the assembly file. 709 `-no-mips16' turns off this option. 710 711`-mips3d' 712`-no-mips3d' 713 Generate code for the MIPS-3D Application Specific Extension. 714 This tells the assembler to accept MIPS-3D instructions. 715 `-no-mips3d' turns off this option. 716 717`-mdmx' 718`-no-mdmx' 719 Generate code for the MDMX Application Specific Extension. This 720 tells the assembler to accept MDMX instructions. `-no-mdmx' turns 721 off this option. 722 723`-mdsp' 724`-mno-dsp' 725 Generate code for the DSP Application Specific Extension. This 726 tells the assembler to accept DSP instructions. `-mno-dsp' turns 727 off this option. 728 729`-mmt' 730`-mno-mt' 731 Generate code for the MT Application Specific Extension. This 732 tells the assembler to accept MT instructions. `-mno-mt' turns 733 off this option. 734 735`--construct-floats' 736`--no-construct-floats' 737 The `--no-construct-floats' option disables the construction of 738 double width floating point constants by loading the two halves of 739 the value into the two single width floating point registers that 740 make up the double width register. By default 741 `--construct-floats' is selected, allowing construction of these 742 floating point constants. 743 744`--emulation=NAME' 745 This option causes `as' to emulate `as' configured for some other 746 target, in all respects, including output format (choosing between 747 ELF and ECOFF only), handling of pseudo-opcodes which may generate 748 debugging information or store symbol table information, and 749 default endianness. The available configuration names are: 750 `mipsecoff', `mipself', `mipslecoff', `mipsbecoff', `mipslelf', 751 `mipsbelf'. The first two do not alter the default endianness 752 from that of the primary target for which the assembler was 753 configured; the others change the default to little- or big-endian 754 as indicated by the `b' or `l' in the name. Using `-EB' or `-EL' 755 will override the endianness selection in any case. 756 757 This option is currently supported only when the primary target 758 `as' is configured for is a MIPS ELF or ECOFF target. 759 Furthermore, the primary target or others specified with 760 `--enable-targets=...' at configuration time must include support 761 for the other format, if both are to be available. For example, 762 the Irix 5 configuration includes support for both. 763 764 Eventually, this option will support more configurations, with more 765 fine-grained control over the assembler's behavior, and will be 766 supported for more processors. 767 768`-nocpp' 769 `as' ignores this option. It is accepted for compatibility with 770 the native tools. 771 772`--trap' 773`--no-trap' 774`--break' 775`--no-break' 776 Control how to deal with multiplication overflow and division by 777 zero. `--trap' or `--no-break' (which are synonyms) take a trap 778 exception (and only work for Instruction Set Architecture level 2 779 and higher); `--break' or `--no-trap' (also synonyms, and the 780 default) take a break exception. 781 782`-n' 783 When this option is used, `as' will issue a warning every time it 784 generates a nop instruction from a macro. 785 786 The following options are available when as is configured for an 787MCore processor. 788 789`-jsri2bsr' 790`-nojsri2bsr' 791 Enable or disable the JSRI to BSR transformation. By default this 792 is enabled. The command line option `-nojsri2bsr' can be used to 793 disable it. 794 795`-sifilter' 796`-nosifilter' 797 Enable or disable the silicon filter behaviour. By default this 798 is disabled. The default can be overridden by the `-sifilter' 799 command line option. 800 801`-relax' 802 Alter jump instructions for long displacements. 803 804`-mcpu=[210|340]' 805 Select the cpu type on the target hardware. This controls which 806 instructions can be assembled. 807 808`-EB' 809 Assemble for a big endian target. 810 811`-EL' 812 Assemble for a little endian target. 813 814 815 See the info pages for documentation of the MMIX-specific options. 816 817 The following options are available when as is configured for an 818Xtensa processor. 819 820`--text-section-literals | --no-text-section-literals' 821 With `--text-section-literals', literal pools are interspersed in 822 the text section. The default is `--no-text-section-literals', 823 which places literals in a separate section in the output file. 824 These options only affect literals referenced via PC-relative 825 `L32R' instructions; literals for absolute mode `L32R' 826 instructions are handled separately. 827 828`--absolute-literals | --no-absolute-literals' 829 Indicate to the assembler whether `L32R' instructions use absolute 830 or PC-relative addressing. The default is to assume absolute 831 addressing if the Xtensa processor includes the absolute `L32R' 832 addressing option. Otherwise, only the PC-relative `L32R' mode 833 can be used. 834 835`--target-align | --no-target-align' 836 Enable or disable automatic alignment to reduce branch penalties 837 at the expense of some code density. The default is 838 `--target-align'. 839 840`--longcalls | --no-longcalls' 841 Enable or disable transformation of call instructions to allow 842 calls across a greater range of addresses. The default is 843 `--no-longcalls'. 844 845`--transform | --no-transform' 846 Enable or disable all assembler transformations of Xtensa 847 instructions. The default is `--transform'; `--no-transform' 848 should be used only in the rare cases when the instructions must 849 be exactly as specified in the assembly source. 850 851 The following options are available when as is configured for a Z80 852family processor. 853`-z80' 854 Assemble for Z80 processor. 855 856`-r800' 857 Assemble for R800 processor. 858 859`-ignore-undocumented-instructions' 860`-Wnud' 861 Assemble undocumented Z80 instructions that also work on R800 862 without warning. 863 864`-ignore-unportable-instructions' 865`-Wnup' 866 Assemble all undocumented Z80 instructions without warning. 867 868`-warn-undocumented-instructions' 869`-Wud' 870 Issue a warning for undocumented Z80 instructions that also work 871 on R800. 872 873`-warn-unportable-instructions' 874`-Wup' 875 Issue a warning for undocumented Z80 instructions that do notwork 876 on R800. 877 878`-forbid-undocumented-instructions' 879`-Fud' 880 Treat all undocumented instructions as errors. 881 882`-forbid-unportable-instructions' 883`-Fup' 884 Treat undocumented Z80 intructions that do notwork on R800 as 885 errors. 886 887* Menu: 888 889* Manual:: Structure of this Manual 890* GNU Assembler:: The GNU Assembler 891* Object Formats:: Object File Formats 892* Command Line:: Command Line 893* Input Files:: Input Files 894* Object:: Output (Object) File 895* Errors:: Error and Warning Messages 896 897 898File: as.info, Node: Manual, Next: GNU Assembler, Up: Overview 899 9001.1 Structure of this Manual 901============================ 902 903This manual is intended to describe what you need to know to use GNU 904`as'. We cover the syntax expected in source files, including notation 905for symbols, constants, and expressions; the directives that `as' 906understands; and of course how to invoke `as'. 907 908 This manual also describes some of the machine-dependent features of 909various flavors of the assembler. 910 911 On the other hand, this manual is _not_ intended as an introduction 912to programming in assembly language--let alone programming in general! 913In a similar vein, we make no attempt to introduce the machine 914architecture; we do _not_ describe the instruction set, standard 915mnemonics, registers or addressing modes that are standard to a 916particular architecture. You may want to consult the manufacturer's 917machine architecture manual for this information. 918 919 920File: as.info, Node: GNU Assembler, Next: Object Formats, Prev: Manual, Up: Overview 921 9221.2 The GNU Assembler 923===================== 924 925GNU `as' is really a family of assemblers. If you use (or have used) 926the GNU assembler on one architecture, you should find a fairly similar 927environment when you use it on another architecture. Each version has 928much in common with the others, including object file formats, most 929assembler directives (often called "pseudo-ops") and assembler syntax. 930 931 `as' is primarily intended to assemble the output of the GNU C 932compiler `gcc' for use by the linker `ld'. Nevertheless, we've tried 933to make `as' assemble correctly everything that other assemblers for 934the same machine would assemble. Any exceptions are documented 935explicitly (*note Machine Dependencies::). This doesn't mean `as' 936always uses the same syntax as another assembler for the same 937architecture; for example, we know of several incompatible versions of 938680x0 assembly language syntax. 939 940 Unlike older assemblers, `as' is designed to assemble a source 941program in one pass of the source file. This has a subtle impact on the 942`.org' directive (*note `.org': Org.). 943 944 945File: as.info, Node: Object Formats, Next: Command Line, Prev: GNU Assembler, Up: Overview 946 9471.3 Object File Formats 948======================= 949 950The GNU assembler can be configured to produce several alternative 951object file formats. For the most part, this does not affect how you 952write assembly language programs; but directives for debugging symbols 953are typically different in different file formats. *Note Symbol 954Attributes: Symbol Attributes. 955 956 957File: as.info, Node: Command Line, Next: Input Files, Prev: Object Formats, Up: Overview 958 9591.4 Command Line 960================ 961 962After the program name `as', the command line may contain options and 963file names. Options may appear in any order, and may be before, after, 964or between file names. The order of file names is significant. 965 966 `--' (two hyphens) by itself names the standard input file 967explicitly, as one of the files for `as' to assemble. 968 969 Except for `--' any command line argument that begins with a hyphen 970(`-') is an option. Each option changes the behavior of `as'. No 971option changes the way another option works. An option is a `-' 972followed by one or more letters; the case of the letter is important. 973All options are optional. 974 975 Some options expect exactly one file name to follow them. The file 976name may either immediately follow the option's letter (compatible with 977older assemblers) or it may be the next command argument (GNU 978standard). These two command lines are equivalent: 979 980 as -o my-object-file.o mumble.s 981 as -omy-object-file.o mumble.s 982 983 984File: as.info, Node: Input Files, Next: Object, Prev: Command Line, Up: Overview 985 9861.5 Input Files 987=============== 988 989We use the phrase "source program", abbreviated "source", to describe 990the program input to one run of `as'. The program may be in one or 991more files; how the source is partitioned into files doesn't change the 992meaning of the source. 993 994 The source program is a concatenation of the text in all the files, 995in the order specified. 996 997 Each time you run `as' it assembles exactly one source program. The 998source program is made up of one or more files. (The standard input is 999also a file.) 1000 1001 You give `as' a command line that has zero or more input file names. 1002The input files are read (from left file name to right). A command 1003line argument (in any position) that has no special meaning is taken to 1004be an input file name. 1005 1006 If you give `as' no file names it attempts to read one input file 1007from the `as' standard input, which is normally your terminal. You may 1008have to type <ctl-D> to tell `as' there is no more program to assemble. 1009 1010 Use `--' if you need to explicitly name the standard input file in 1011your command line. 1012 1013 If the source is empty, `as' produces a small, empty object file. 1014 1015Filenames and Line-numbers 1016-------------------------- 1017 1018There are two ways of locating a line in the input file (or files) and 1019either may be used in reporting error messages. One way refers to a 1020line number in a physical file; the other refers to a line number in a 1021"logical" file. *Note Error and Warning Messages: Errors. 1022 1023 "Physical files" are those files named in the command line given to 1024`as'. 1025 1026 "Logical files" are simply names declared explicitly by assembler 1027directives; they bear no relation to physical files. Logical file 1028names help error messages reflect the original source file, when `as' 1029source is itself synthesized from other files. `as' understands the 1030`#' directives emitted by the `gcc' preprocessor. See also *note 1031`.file': File. 1032 1033 1034File: as.info, Node: Object, Next: Errors, Prev: Input Files, Up: Overview 1035 10361.6 Output (Object) File 1037======================== 1038 1039Every time you run `as' it produces an output file, which is your 1040assembly language program translated into numbers. This file is the 1041object file. Its default name is `a.out'. You can give it another 1042name by using the `-o' option. Conventionally, object file names end 1043with `.o'. The default name is used for historical reasons: older 1044assemblers were capable of assembling self-contained programs directly 1045into a runnable program. (For some formats, this isn't currently 1046possible, but it can be done for the `a.out' format.) 1047 1048 The object file is meant for input to the linker `ld'. It contains 1049assembled program code, information to help `ld' integrate the 1050assembled program into a runnable file, and (optionally) symbolic 1051information for the debugger. 1052 1053 1054File: as.info, Node: Errors, Prev: Object, Up: Overview 1055 10561.7 Error and Warning Messages 1057============================== 1058 1059`as' may write warnings and error messages to the standard error file 1060(usually your terminal). This should not happen when a compiler runs 1061`as' automatically. Warnings report an assumption made so that `as' 1062could keep assembling a flawed program; errors report a grave problem 1063that stops the assembly. 1064 1065 Warning messages have the format 1066 1067 file_name:NNN:Warning Message Text 1068 1069(where NNN is a line number). If a logical file name has been given 1070(*note `.file': File.) it is used for the filename, otherwise the name 1071of the current input file is used. If a logical line number was given 1072(*note `.line': Line.) then it is used to calculate the number printed, 1073otherwise the actual line in the current source file is printed. The 1074message text is intended to be self explanatory (in the grand Unix 1075tradition). 1076 1077 Error messages have the format 1078 file_name:NNN:FATAL:Error Message Text 1079 The file name and line number are derived as for warning messages. 1080The actual message text may be rather less explanatory because many of 1081them aren't supposed to happen. 1082 1083 1084File: as.info, Node: Invoking, Next: Syntax, Prev: Overview, Up: Top 1085 10862 Command-Line Options 1087********************** 1088 1089This chapter describes command-line options available in _all_ versions 1090of the GNU assembler; *note Machine Dependencies::, for options specific 1091to particular machine architectures. 1092 1093 If you are invoking `as' via the GNU C compiler, you can use the 1094`-Wa' option to pass arguments through to the assembler. The assembler 1095arguments must be separated from each other (and the `-Wa') by commas. 1096For example: 1097 1098 gcc -c -g -O -Wa,-alh,-L file.c 1099 1100This passes two options to the assembler: `-alh' (emit a listing to 1101standard output with high-level and assembly source) and `-L' (retain 1102local symbols in the symbol table). 1103 1104 Usually you do not need to use this `-Wa' mechanism, since many 1105compiler command-line options are automatically passed to the assembler 1106by the compiler. (You can call the GNU compiler driver with the `-v' 1107option to see precisely what options it passes to each compilation 1108pass, including the assembler.) 1109 1110* Menu: 1111 1112* a:: -a[cdhlns] enable listings 1113* alternate:: --alternate enable alternate macro syntax 1114* D:: -D for compatibility 1115* f:: -f to work faster 1116* I:: -I for .include search path 1117 1118* K:: -K for difference tables 1119 1120* L:: -L to retain local labels 1121* listing:: --listing-XXX to configure listing output 1122* M:: -M or --mri to assemble in MRI compatibility mode 1123* MD:: --MD for dependency tracking 1124* o:: -o to name the object file 1125* R:: -R to join data and text sections 1126* statistics:: --statistics to see statistics about assembly 1127* traditional-format:: --traditional-format for compatible output 1128* v:: -v to announce version 1129* W:: -W, --no-warn, --warn, --fatal-warnings to control warnings 1130* Z:: -Z to make object file even after errors 1131 1132 1133File: as.info, Node: a, Next: alternate, Up: Invoking 1134 11352.1 Enable Listings: `-a[cdhlns]' 1136================================= 1137 1138These options enable listing output from the assembler. By itself, 1139`-a' requests high-level, assembly, and symbols listing. You can use 1140other letters to select specific options for the list: `-ah' requests a 1141high-level language listing, `-al' requests an output-program assembly 1142listing, and `-as' requests a symbol table listing. High-level 1143listings require that a compiler debugging option like `-g' be used, 1144and that assembly listings (`-al') be requested also. 1145 1146 Use the `-ac' option to omit false conditionals from a listing. Any 1147lines which are not assembled because of a false `.if' (or `.ifdef', or 1148any other conditional), or a true `.if' followed by an `.else', will be 1149omitted from the listing. 1150 1151 Use the `-ad' option to omit debugging directives from the listing. 1152 1153 Once you have specified one of these options, you can further control 1154listing output and its appearance using the directives `.list', 1155`.nolist', `.psize', `.eject', `.title', and `.sbttl'. The `-an' 1156option turns off all forms processing. If you do not request listing 1157output with one of the `-a' options, the listing-control directives 1158have no effect. 1159 1160 The letters after `-a' may be combined into one option, _e.g._, 1161`-aln'. 1162 1163 Note if the assembler source is coming from the standard input (eg 1164because it is being created by `gcc' and the `-pipe' command line switch 1165is being used) then the listing will not contain any comments or 1166preprocessor directives. This is because the listing code buffers 1167input source lines from stdin only after they have been preprocessed by 1168the assembler. This reduces memory usage and makes the code more 1169efficient. 1170 1171 1172File: as.info, Node: alternate, Next: D, Prev: a, Up: Invoking 1173 11742.2 `--alternate' 1175================= 1176 1177Begin in alternate macro mode, see *note `.altmacro': Altmacro. 1178 1179 1180File: as.info, Node: D, Next: f, Prev: alternate, Up: Invoking 1181 11822.3 `-D' 1183======== 1184 1185This option has no effect whatsoever, but it is accepted to make it more 1186likely that scripts written for other assemblers also work with `as'. 1187 1188 1189File: as.info, Node: f, Next: I, Prev: D, Up: Invoking 1190 11912.4 Work Faster: `-f' 1192===================== 1193 1194`-f' should only be used when assembling programs written by a 1195(trusted) compiler. `-f' stops the assembler from doing whitespace and 1196comment preprocessing on the input file(s) before assembling them. 1197*Note Preprocessing: Preprocessing. 1198 1199 _Warning:_ if you use `-f' when the files actually need to be 1200 preprocessed (if they contain comments, for example), `as' does 1201 not work correctly. 1202 1203 1204File: as.info, Node: I, Next: K, Prev: f, Up: Invoking 1205 12062.5 `.include' Search Path: `-I' PATH 1207===================================== 1208 1209Use this option to add a PATH to the list of directories `as' searches 1210for files specified in `.include' directives (*note `.include': 1211Include.). You may use `-I' as many times as necessary to include a 1212variety of paths. The current working directory is always searched 1213first; after that, `as' searches any `-I' directories in the same order 1214as they were specified (left to right) on the command line. 1215 1216 1217File: as.info, Node: K, Next: L, Prev: I, Up: Invoking 1218 12192.6 Difference Tables: `-K' 1220=========================== 1221 1222`as' sometimes alters the code emitted for directives of the form 1223`.word SYM1-SYM2'; *note `.word': Word. You can use the `-K' option if 1224you want a warning issued when this is done. 1225 1226 1227File: as.info, Node: L, Next: listing, Prev: K, Up: Invoking 1228 12292.7 Include Local Labels: `-L' 1230============================== 1231 1232Labels beginning with `L' (upper case only) are called "local labels". 1233*Note Symbol Names::. Normally you do not see such labels when 1234debugging, because they are intended for the use of programs (like 1235compilers) that compose assembler programs, not for your notice. 1236Normally both `as' and `ld' discard such labels, so you do not normally 1237debug with them. 1238 1239 This option tells `as' to retain those `L...' symbols in the object 1240file. Usually if you do this you also tell the linker `ld' to preserve 1241symbols whose names begin with `L'. 1242 1243 By default, a local label is any label beginning with `L', but each 1244target is allowed to redefine the local label prefix. On the HPPA 1245local labels begin with `L$'. 1246 1247 1248File: as.info, Node: listing, Next: M, Prev: L, Up: Invoking 1249 12502.8 Configuring listing output: `--listing' 1251=========================================== 1252 1253The listing feature of the assembler can be enabled via the command 1254line switch `-a' (*note a::). This feature combines the input source 1255file(s) with a hex dump of the corresponding locations in the output 1256object file, and displays them as a listing file. The format of this 1257listing can be controlled by pseudo ops inside the assembler source 1258(*note List:: *note Title:: *note Sbttl:: *note Psize:: *note Eject::) 1259and also by the following switches: 1260 1261`--listing-lhs-width=`number'' 1262 Sets the maximum width, in words, of the first line of the hex 1263 byte dump. This dump appears on the left hand side of the listing 1264 output. 1265 1266`--listing-lhs-width2=`number'' 1267 Sets the maximum width, in words, of any further lines of the hex 1268 byte dump for a given input source line. If this value is not 1269 specified, it defaults to being the same as the value specified 1270 for `--listing-lhs-width'. If neither switch is used the default 1271 is to one. 1272 1273`--listing-rhs-width=`number'' 1274 Sets the maximum width, in characters, of the source line that is 1275 displayed alongside the hex dump. The default value for this 1276 parameter is 100. The source line is displayed on the right hand 1277 side of the listing output. 1278 1279`--listing-cont-lines=`number'' 1280 Sets the maximum number of continuation lines of hex dump that 1281 will be displayed for a given single line of source input. The 1282 default value is 4. 1283 1284 1285File: as.info, Node: M, Next: MD, Prev: listing, Up: Invoking 1286 12872.9 Assemble in MRI Compatibility Mode: `-M' 1288============================================ 1289 1290The `-M' or `--mri' option selects MRI compatibility mode. This 1291changes the syntax and pseudo-op handling of `as' to make it compatible 1292with the `ASM68K' or the `ASM960' (depending upon the configured 1293target) assembler from Microtec Research. The exact nature of the MRI 1294syntax will not be documented here; see the MRI manuals for more 1295information. Note in particular that the handling of macros and macro 1296arguments is somewhat different. The purpose of this option is to 1297permit assembling existing MRI assembler code using `as'. 1298 1299 The MRI compatibility is not complete. Certain operations of the 1300MRI assembler depend upon its object file format, and can not be 1301supported using other object file formats. Supporting these would 1302require enhancing each object file format individually. These are: 1303 1304 * global symbols in common section 1305 1306 The m68k MRI assembler supports common sections which are merged 1307 by the linker. Other object file formats do not support this. 1308 `as' handles common sections by treating them as a single common 1309 symbol. It permits local symbols to be defined within a common 1310 section, but it can not support global symbols, since it has no 1311 way to describe them. 1312 1313 * complex relocations 1314 1315 The MRI assemblers support relocations against a negated section 1316 address, and relocations which combine the start addresses of two 1317 or more sections. These are not support by other object file 1318 formats. 1319 1320 * `END' pseudo-op specifying start address 1321 1322 The MRI `END' pseudo-op permits the specification of a start 1323 address. This is not supported by other object file formats. The 1324 start address may instead be specified using the `-e' option to 1325 the linker, or in a linker script. 1326 1327 * `IDNT', `.ident' and `NAME' pseudo-ops 1328 1329 The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module 1330 name to the output file. This is not supported by other object 1331 file formats. 1332 1333 * `ORG' pseudo-op 1334 1335 The m68k MRI `ORG' pseudo-op begins an absolute section at a given 1336 address. This differs from the usual `as' `.org' pseudo-op, which 1337 changes the location within the current section. Absolute 1338 sections are not supported by other object file formats. The 1339 address of a section may be assigned within a linker script. 1340 1341 There are some other features of the MRI assembler which are not 1342supported by `as', typically either because they are difficult or 1343because they seem of little consequence. Some of these may be 1344supported in future releases. 1345 1346 * EBCDIC strings 1347 1348 EBCDIC strings are not supported. 1349 1350 * packed binary coded decimal 1351 1352 Packed binary coded decimal is not supported. This means that the 1353 `DC.P' and `DCB.P' pseudo-ops are not supported. 1354 1355 * `FEQU' pseudo-op 1356 1357 The m68k `FEQU' pseudo-op is not supported. 1358 1359 * `NOOBJ' pseudo-op 1360 1361 The m68k `NOOBJ' pseudo-op is not supported. 1362 1363 * `OPT' branch control options 1364 1365 The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL', 1366 and `BRW'--are ignored. `as' automatically relaxes all branches, 1367 whether forward or backward, to an appropriate size, so these 1368 options serve no purpose. 1369 1370 * `OPT' list control options 1371 1372 The following m68k `OPT' list control options are ignored: `C', 1373 `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'. 1374 1375 * other `OPT' options 1376 1377 The following m68k `OPT' options are ignored: `NEST', `O', `OLD', 1378 `OP', `P', `PCO', `PCR', `PCS', `R'. 1379 1380 * `OPT' `D' option is default 1381 1382 The m68k `OPT' `D' option is the default, unlike the MRI assembler. 1383 `OPT NOD' may be used to turn it off. 1384 1385 * `XREF' pseudo-op. 1386 1387 The m68k `XREF' pseudo-op is ignored. 1388 1389 * `.debug' pseudo-op 1390 1391 The i960 `.debug' pseudo-op is not supported. 1392 1393 * `.extended' pseudo-op 1394 1395 The i960 `.extended' pseudo-op is not supported. 1396 1397 * `.list' pseudo-op. 1398 1399 The various options of the i960 `.list' pseudo-op are not 1400 supported. 1401 1402 * `.optimize' pseudo-op 1403 1404 The i960 `.optimize' pseudo-op is not supported. 1405 1406 * `.output' pseudo-op 1407 1408 The i960 `.output' pseudo-op is not supported. 1409 1410 * `.setreal' pseudo-op 1411 1412 The i960 `.setreal' pseudo-op is not supported. 1413 1414 1415 1416File: as.info, Node: MD, Next: o, Prev: M, Up: Invoking 1417 14182.10 Dependency Tracking: `--MD' 1419================================ 1420 1421`as' can generate a dependency file for the file it creates. This file 1422consists of a single rule suitable for `make' describing the 1423dependencies of the main source file. 1424 1425 The rule is written to the file named in its argument. 1426 1427 This feature is used in the automatic updating of makefiles. 1428 1429 1430File: as.info, Node: o, Next: R, Prev: MD, Up: Invoking 1431 14322.11 Name the Object File: `-o' 1433=============================== 1434 1435There is always one object file output when you run `as'. By default 1436it has the name `a.out' (or `b.out', for Intel 960 targets only). You 1437use this option (which takes exactly one filename) to give the object 1438file a different name. 1439 1440 Whatever the object file is called, `as' overwrites any existing 1441file of the same name. 1442 1443 1444File: as.info, Node: R, Next: statistics, Prev: o, Up: Invoking 1445 14462.12 Join Data and Text Sections: `-R' 1447====================================== 1448 1449`-R' tells `as' to write the object file as if all data-section data 1450lives in the text section. This is only done at the very last moment: 1451your binary data are the same, but data section parts are relocated 1452differently. The data section part of your object file is zero bytes 1453long because all its bytes are appended to the text section. (*Note 1454Sections and Relocation: Sections.) 1455 1456 When you specify `-R' it would be possible to generate shorter 1457address displacements (because we do not have to cross between text and 1458data section). We refrain from doing this simply for compatibility with 1459older versions of `as'. In future, `-R' may work this way. 1460 1461 When `as' is configured for COFF or ELF output, this option is only 1462useful if you use sections named `.text' and `.data'. 1463 1464 `-R' is not supported for any of the HPPA targets. Using `-R' 1465generates a warning from `as'. 1466 1467 1468File: as.info, Node: statistics, Next: traditional-format, Prev: R, Up: Invoking 1469 14702.13 Display Assembly Statistics: `--statistics' 1471================================================ 1472 1473Use `--statistics' to display two statistics about the resources used by 1474`as': the maximum amount of space allocated during the assembly (in 1475bytes), and the total execution time taken for the assembly (in CPU 1476seconds). 1477 1478 1479File: as.info, Node: traditional-format, Next: v, Prev: statistics, Up: Invoking 1480 14812.14 Compatible Output: `--traditional-format' 1482============================================== 1483 1484For some targets, the output of `as' is different in some ways from the 1485output of some existing assembler. This switch requests `as' to use 1486the traditional format instead. 1487 1488 For example, it disables the exception frame optimizations which 1489`as' normally does by default on `gcc' output. 1490 1491 1492File: as.info, Node: v, Next: W, Prev: traditional-format, Up: Invoking 1493 14942.15 Announce Version: `-v' 1495=========================== 1496 1497You can find out what version of as is running by including the option 1498`-v' (which you can also spell as `-version') on the command line. 1499 1500 1501File: as.info, Node: W, Next: Z, Prev: v, Up: Invoking 1502 15032.16 Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings' 1504====================================================================== 1505 1506`as' should never give a warning or error message when assembling 1507compiler output. But programs written by people often cause `as' to 1508give a warning that a particular assumption was made. All such 1509warnings are directed to the standard error file. 1510 1511 If you use the `-W' and `--no-warn' options, no warnings are issued. 1512This only affects the warning messages: it does not change any 1513particular of how `as' assembles your file. Errors, which stop the 1514assembly, are still reported. 1515 1516 If you use the `--fatal-warnings' option, `as' considers files that 1517generate warnings to be in error. 1518 1519 You can switch these options off again by specifying `--warn', which 1520causes warnings to be output as usual. 1521 1522 1523File: as.info, Node: Z, Prev: W, Up: Invoking 1524 15252.17 Generate Object File in Spite of Errors: `-Z' 1526================================================== 1527 1528After an error message, `as' normally produces no output. If for some 1529reason you are interested in object file output even after `as' gives 1530an error message on your program, use the `-Z' option. If there are 1531any errors, `as' continues anyways, and writes an object file after a 1532final warning message of the form `N errors, M warnings, generating bad 1533object file.' 1534 1535 1536File: as.info, Node: Syntax, Next: Sections, Prev: Invoking, Up: Top 1537 15383 Syntax 1539******** 1540 1541This chapter describes the machine-independent syntax allowed in a 1542source file. `as' syntax is similar to what many other assemblers use; 1543it is inspired by the BSD 4.2 assembler, except that `as' does not 1544assemble Vax bit-fields. 1545 1546* Menu: 1547 1548* Preprocessing:: Preprocessing 1549* Whitespace:: Whitespace 1550* Comments:: Comments 1551* Symbol Intro:: Symbols 1552* Statements:: Statements 1553* Constants:: Constants 1554 1555 1556File: as.info, Node: Preprocessing, Next: Whitespace, Up: Syntax 1557 15583.1 Preprocessing 1559================= 1560 1561The `as' internal preprocessor: 1562 * adjusts and removes extra whitespace. It leaves one space or tab 1563 before the keywords on a line, and turns any other whitespace on 1564 the line into a single space. 1565 1566 * removes all comments, replacing them with a single space, or an 1567 appropriate number of newlines. 1568 1569 * converts character constants into the appropriate numeric values. 1570 1571 It does not do macro processing, include file handling, or anything 1572else you may get from your C compiler's preprocessor. You can do 1573include file processing with the `.include' directive (*note 1574`.include': Include.). You can use the GNU C compiler driver to get 1575other "CPP" style preprocessing by giving the input file a `.S' suffix. 1576*Note Options Controlling the Kind of Output: (gcc.info)Overall Options. 1577 1578 Excess whitespace, comments, and character constants cannot be used 1579in the portions of the input text that are not preprocessed. 1580 1581 If the first line of an input file is `#NO_APP' or if you use the 1582`-f' option, whitespace and comments are not removed from the input 1583file. Within an input file, you can ask for whitespace and comment 1584removal in specific portions of the by putting a line that says `#APP' 1585before the text that may contain whitespace or comments, and putting a 1586line that says `#NO_APP' after this text. This feature is mainly 1587intend to support `asm' statements in compilers whose output is 1588otherwise free of comments and whitespace. 1589 1590 1591File: as.info, Node: Whitespace, Next: Comments, Prev: Preprocessing, Up: Syntax 1592 15933.2 Whitespace 1594============== 1595 1596"Whitespace" is one or more blanks or tabs, in any order. Whitespace 1597is used to separate symbols, and to make programs neater for people to 1598read. Unless within character constants (*note Character Constants: 1599Characters.), any whitespace means the same as exactly one space. 1600 1601 1602File: as.info, Node: Comments, Next: Symbol Intro, Prev: Whitespace, Up: Syntax 1603 16043.3 Comments 1605============ 1606 1607There are two ways of rendering comments to `as'. In both cases the 1608comment is equivalent to one space. 1609 1610 Anything from `/*' through the next `*/' is a comment. This means 1611you may not nest these comments. 1612 1613 /* 1614 The only way to include a newline ('\n') in a comment 1615 is to use this sort of comment. 1616 */ 1617 1618 /* This sort of comment does not nest. */ 1619 1620 Anything from the "line comment" character to the next newline is 1621considered a comment and is ignored. The line comment character is `;' 1622on the ARC; `@' on the ARM; `;' for the H8/300 family; `;' for the HPPA; 1623`#' on the i386 and x86-64; `#' on the i960; `;' for the PDP-11; `;' 1624for picoJava; `#' for Motorola PowerPC; `!' for the Renesas / SuperH SH; 1625`!' on the SPARC; `#' on the ip2k; `#' on the m32c; `#' on the m32r; 1626`|' on the 680x0; `#' on the 68HC11 and 68HC12; `#' on the Vax; `;' for 1627the Z80; `!' for the Z8000; `#' on the V850; `#' for Xtensa systems; 1628see *note Machine Dependencies::. 1629 1630 On some machines there are two different line comment characters. 1631One character only begins a comment if it is the first non-whitespace 1632character on a line, while the other always begins a comment. 1633 1634 The V850 assembler also supports a double dash as starting a comment 1635that extends to the end of the line. 1636 1637 `--'; 1638 1639 To be compatible with past assemblers, lines that begin with `#' 1640have a special interpretation. Following the `#' should be an absolute 1641expression (*note Expressions::): the logical line number of the _next_ 1642line. Then a string (*note Strings: Strings.) is allowed: if present 1643it is a new logical file name. The rest of the line, if any, should be 1644whitespace. 1645 1646 If the first non-whitespace characters on the line are not numeric, 1647the line is ignored. (Just like a comment.) 1648 1649 # This is an ordinary comment. 1650 # 42-6 "new_file_name" # New logical file name 1651 # This is logical line # 36. 1652 This feature is deprecated, and may disappear from future versions 1653of `as'. 1654 1655 1656File: as.info, Node: Symbol Intro, Next: Statements, Prev: Comments, Up: Syntax 1657 16583.4 Symbols 1659=========== 1660 1661A "symbol" is one or more characters chosen from the set of all letters 1662(both upper and lower case), digits and the three characters `_.$'. On 1663most machines, you can also use `$' in symbol names; exceptions are 1664noted in *note Machine Dependencies::. No symbol may begin with a 1665digit. Case is significant. There is no length limit: all characters 1666are significant. Symbols are delimited by characters not in that set, 1667or by the beginning of a file (since the source program must end with a 1668newline, the end of a file is not a possible symbol delimiter). *Note 1669Symbols::. 1670 1671 1672File: as.info, Node: Statements, Next: Constants, Prev: Symbol Intro, Up: Syntax 1673 16743.5 Statements 1675============== 1676 1677A "statement" ends at a newline character (`\n') or line separator 1678character. (The line separator is usually `;', unless this conflicts 1679with the comment character; *note Machine Dependencies::.) The newline 1680or separator character is considered part of the preceding statement. 1681Newlines and separators within character constants are an exception: 1682they do not end statements. 1683 1684It is an error to end any statement with end-of-file: the last 1685character of any input file should be a newline. 1686 1687 An empty statement is allowed, and may include whitespace. It is 1688ignored. 1689 1690 A statement begins with zero or more labels, optionally followed by a 1691key symbol which determines what kind of statement it is. The key 1692symbol determines the syntax of the rest of the statement. If the 1693symbol begins with a dot `.' then the statement is an assembler 1694directive: typically valid for any computer. If the symbol begins with 1695a letter the statement is an assembly language "instruction": it 1696assembles into a machine language instruction. Different versions of 1697`as' for different computers recognize different instructions. In 1698fact, the same symbol may represent a different instruction in a 1699different computer's assembly language. 1700 1701 A label is a symbol immediately followed by a colon (`:'). 1702Whitespace before a label or after a colon is permitted, but you may not 1703have whitespace between a label's symbol and its colon. *Note Labels::. 1704 1705 For HPPA targets, labels need not be immediately followed by a 1706colon, but the definition of a label must begin in column zero. This 1707also implies that only one label may be defined on each line. 1708 1709 label: .directive followed by something 1710 another_label: # This is an empty statement. 1711 instruction operand_1, operand_2, ... 1712 1713 1714File: as.info, Node: Constants, Prev: Statements, Up: Syntax 1715 17163.6 Constants 1717============= 1718 1719A constant is a number, written so that its value is known by 1720inspection, without knowing any context. Like this: 1721 .byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value. 1722 .ascii "Ring the bell\7" # A string constant. 1723 .octa 0x123456789abcdef0123456789ABCDEF0 # A bignum. 1724 .float 0f-314159265358979323846264338327\ 1725 95028841971.693993751E-40 # - pi, a flonum. 1726 1727* Menu: 1728 1729* Characters:: Character Constants 1730* Numbers:: Number Constants 1731 1732 1733File: as.info, Node: Characters, Next: Numbers, Up: Constants 1734 17353.6.1 Character Constants 1736------------------------- 1737 1738There are two kinds of character constants. A "character" stands for 1739one character in one byte and its value may be used in numeric 1740expressions. String constants (properly called string _literals_) are 1741potentially many bytes and their values may not be used in arithmetic 1742expressions. 1743 1744* Menu: 1745 1746* Strings:: Strings 1747* Chars:: Characters 1748 1749 1750File: as.info, Node: Strings, Next: Chars, Up: Characters 1751 17523.6.1.1 Strings 1753............... 1754 1755A "string" is written between double-quotes. It may contain 1756double-quotes or null characters. The way to get special characters 1757into a string is to "escape" these characters: precede them with a 1758backslash `\' character. For example `\\' represents one backslash: 1759the first `\' is an escape which tells `as' to interpret the second 1760character literally as a backslash (which prevents `as' from 1761recognizing the second `\' as an escape character). The complete list 1762of escapes follows. 1763 1764`\b' 1765 Mnemonic for backspace; for ASCII this is octal code 010. 1766 1767`\f' 1768 Mnemonic for FormFeed; for ASCII this is octal code 014. 1769 1770`\n' 1771 Mnemonic for newline; for ASCII this is octal code 012. 1772 1773`\r' 1774 Mnemonic for carriage-Return; for ASCII this is octal code 015. 1775 1776`\t' 1777 Mnemonic for horizontal Tab; for ASCII this is octal code 011. 1778 1779`\ DIGIT DIGIT DIGIT' 1780 An octal character code. The numeric code is 3 octal digits. For 1781 compatibility with other Unix systems, 8 and 9 are accepted as 1782 digits: for example, `\008' has the value 010, and `\009' the 1783 value 011. 1784 1785`\`x' HEX-DIGITS...' 1786 A hex character code. All trailing hex digits are combined. 1787 Either upper or lower case `x' works. 1788 1789`\\' 1790 Represents one `\' character. 1791 1792`\"' 1793 Represents one `"' character. Needed in strings to represent this 1794 character, because an unescaped `"' would end the string. 1795 1796`\ ANYTHING-ELSE' 1797 Any other character when escaped by `\' gives a warning, but 1798 assembles as if the `\' was not present. The idea is that if you 1799 used an escape sequence you clearly didn't want the literal 1800 interpretation of the following character. However `as' has no 1801 other interpretation, so `as' knows it is giving you the wrong 1802 code and warns you of the fact. 1803 1804 Which characters are escapable, and what those escapes represent, 1805varies widely among assemblers. The current set is what we think the 1806BSD 4.2 assembler recognizes, and is a subset of what most C compilers 1807recognize. If you are in doubt, do not use an escape sequence. 1808 1809 1810File: as.info, Node: Chars, Prev: Strings, Up: Characters 1811 18123.6.1.2 Characters 1813.................. 1814 1815A single character may be written as a single quote immediately 1816followed by that character. The same escapes apply to characters as to 1817strings. So if you want to write the character backslash, you must 1818write `'\\' where the first `\' escapes the second `\'. As you can 1819see, the quote is an acute accent, not a grave accent. A newline 1820immediately following an acute accent is taken as a literal character 1821and does not count as the end of a statement. The value of a character 1822constant in a numeric expression is the machine's byte-wide code for 1823that character. `as' assumes your character code is ASCII: `'A' means 182465, `'B' means 66, and so on. 1825 1826 1827File: as.info, Node: Numbers, Prev: Characters, Up: Constants 1828 18293.6.2 Number Constants 1830---------------------- 1831 1832`as' distinguishes three kinds of numbers according to how they are 1833stored in the target machine. _Integers_ are numbers that would fit 1834into an `int' in the C language. _Bignums_ are integers, but they are 1835stored in more than 32 bits. _Flonums_ are floating point numbers, 1836described below. 1837 1838* Menu: 1839 1840* Integers:: Integers 1841* Bignums:: Bignums 1842* Flonums:: Flonums 1843 1844 1845File: as.info, Node: Integers, Next: Bignums, Up: Numbers 1846 18473.6.2.1 Integers 1848................ 1849 1850A binary integer is `0b' or `0B' followed by zero or more of the binary 1851digits `01'. 1852 1853 An octal integer is `0' followed by zero or more of the octal digits 1854(`01234567'). 1855 1856 A decimal integer starts with a non-zero digit followed by zero or 1857more digits (`0123456789'). 1858 1859 A hexadecimal integer is `0x' or `0X' followed by one or more 1860hexadecimal digits chosen from `0123456789abcdefABCDEF'. 1861 1862 Integers have the usual values. To denote a negative integer, use 1863the prefix operator `-' discussed under expressions (*note Prefix 1864Operators: Prefix Ops.). 1865 1866 1867File: as.info, Node: Bignums, Next: Flonums, Prev: Integers, Up: Numbers 1868 18693.6.2.2 Bignums 1870............... 1871 1872A "bignum" has the same syntax and semantics as an integer except that 1873the number (or its negative) takes more than 32 bits to represent in 1874binary. The distinction is made because in some places integers are 1875permitted while bignums are not. 1876 1877 1878File: as.info, Node: Flonums, Prev: Bignums, Up: Numbers 1879 18803.6.2.3 Flonums 1881............... 1882 1883A "flonum" represents a floating point number. The translation is 1884indirect: a decimal floating point number from the text is converted by 1885`as' to a generic binary floating point number of more than sufficient 1886precision. This generic floating point number is converted to a 1887particular computer's floating point format (or formats) by a portion 1888of `as' specialized to that computer. 1889 1890 A flonum is written by writing (in order) 1891 * The digit `0'. (`0' is optional on the HPPA.) 1892 1893 * A letter, to tell `as' the rest of the number is a flonum. `e' is 1894 recommended. Case is not important. 1895 1896 On the H8/300, Renesas / SuperH SH, and AMD 29K architectures, the 1897 letter must be one of the letters `DFPRSX' (in upper or lower 1898 case). 1899 1900 On the ARC, the letter must be one of the letters `DFRS' (in upper 1901 or lower case). 1902 1903 On the Intel 960 architecture, the letter must be one of the 1904 letters `DFT' (in upper or lower case). 1905 1906 On the HPPA architecture, the letter must be `E' (upper case only). 1907 1908 * An optional sign: either `+' or `-'. 1909 1910 * An optional "integer part": zero or more decimal digits. 1911 1912 * An optional "fractional part": `.' followed by zero or more 1913 decimal digits. 1914 1915 * An optional exponent, consisting of: 1916 1917 * An `E' or `e'. 1918 1919 * Optional sign: either `+' or `-'. 1920 1921 * One or more decimal digits. 1922 1923 1924 At least one of the integer part or the fractional part must be 1925present. The floating point number has the usual base-10 value. 1926 1927 `as' does all processing using integers. Flonums are computed 1928independently of any floating point hardware in the computer running 1929`as'. 1930 1931 1932File: as.info, Node: Sections, Next: Symbols, Prev: Syntax, Up: Top 1933 19344 Sections and Relocation 1935************************* 1936 1937* Menu: 1938 1939* Secs Background:: Background 1940* Ld Sections:: Linker Sections 1941* As Sections:: Assembler Internal Sections 1942* Sub-Sections:: Sub-Sections 1943* bss:: bss Section 1944 1945 1946File: as.info, Node: Secs Background, Next: Ld Sections, Up: Sections 1947 19484.1 Background 1949============== 1950 1951Roughly, a section is a range of addresses, with no gaps; all data "in" 1952those addresses is treated the same for some particular purpose. For 1953example there may be a "read only" section. 1954 1955 The linker `ld' reads many object files (partial programs) and 1956combines their contents to form a runnable program. When `as' emits an 1957object file, the partial program is assumed to start at address 0. 1958`ld' assigns the final addresses for the partial program, so that 1959different partial programs do not overlap. This is actually an 1960oversimplification, but it suffices to explain how `as' uses sections. 1961 1962 `ld' moves blocks of bytes of your program to their run-time 1963addresses. These blocks slide to their run-time addresses as rigid 1964units; their length does not change and neither does the order of bytes 1965within them. Such a rigid unit is called a _section_. Assigning 1966run-time addresses to sections is called "relocation". It includes the 1967task of adjusting mentions of object-file addresses so they refer to 1968the proper run-time addresses. For the H8/300, and for the Renesas / 1969SuperH SH, `as' pads sections if needed to ensure they end on a word 1970(sixteen bit) boundary. 1971 1972 An object file written by `as' has at least three sections, any of 1973which may be empty. These are named "text", "data" and "bss" sections. 1974 1975 When it generates COFF or ELF output, `as' can also generate 1976whatever other named sections you specify using the `.section' 1977directive (*note `.section': Section.). If you do not use any 1978directives that place output in the `.text' or `.data' sections, these 1979sections still exist, but are empty. 1980 1981 When `as' generates SOM or ELF output for the HPPA, `as' can also 1982generate whatever other named sections you specify using the `.space' 1983and `.subspace' directives. See `HP9000 Series 800 Assembly Language 1984Reference Manual' (HP 92432-90001) for details on the `.space' and 1985`.subspace' assembler directives. 1986 1987 Additionally, `as' uses different names for the standard text, data, 1988and bss sections when generating SOM output. Program text is placed 1989into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'. 1990 1991 Within the object file, the text section starts at address `0', the 1992data section follows, and the bss section follows the data section. 1993 1994 When generating either SOM or ELF output files on the HPPA, the text 1995section starts at address `0', the data section at address `0x4000000', 1996and the bss section follows the data section. 1997 1998 To let `ld' know which data changes when the sections are relocated, 1999and how to change that data, `as' also writes to the object file 2000details of the relocation needed. To perform relocation `ld' must 2001know, each time an address in the object file is mentioned: 2002 * Where in the object file is the beginning of this reference to an 2003 address? 2004 2005 * How long (in bytes) is this reference? 2006 2007 * Which section does the address refer to? What is the numeric 2008 value of 2009 (ADDRESS) - (START-ADDRESS OF SECTION)? 2010 2011 * Is the reference to an address "Program-Counter relative"? 2012 2013 In fact, every address `as' ever uses is expressed as 2014 (SECTION) + (OFFSET INTO SECTION) 2015 Further, most expressions `as' computes have this section-relative 2016nature. (For some object formats, such as SOM for the HPPA, some 2017expressions are symbol-relative instead.) 2018 2019 In this manual we use the notation {SECNAME N} to mean "offset N 2020into section SECNAME." 2021 2022 Apart from text, data and bss sections you need to know about the 2023"absolute" section. When `ld' mixes partial programs, addresses in the 2024absolute section remain unchanged. For example, address `{absolute 0}' 2025is "relocated" to run-time address 0 by `ld'. Although the linker 2026never arranges two partial programs' data sections with overlapping 2027addresses after linking, _by definition_ their absolute sections must 2028overlap. Address `{absolute 239}' in one part of a program is always 2029the same address when the program is running as address `{absolute 2030239}' in any other part of the program. 2031 2032 The idea of sections is extended to the "undefined" section. Any 2033address whose section is unknown at assembly time is by definition 2034rendered {undefined U}--where U is filled in later. Since numbers are 2035always defined, the only way to generate an undefined address is to 2036mention an undefined symbol. A reference to a named common block would 2037be such a symbol: its value is unknown at assembly time so it has 2038section _undefined_. 2039 2040 By analogy the word _section_ is used to describe groups of sections 2041in the linked program. `ld' puts all partial programs' text sections 2042in contiguous addresses in the linked program. It is customary to 2043refer to the _text section_ of a program, meaning all the addresses of 2044all partial programs' text sections. Likewise for data and bss 2045sections. 2046 2047 Some sections are manipulated by `ld'; others are invented for use 2048of `as' and have no meaning except during assembly. 2049 2050 2051File: as.info, Node: Ld Sections, Next: As Sections, Prev: Secs Background, Up: Sections 2052 20534.2 Linker Sections 2054=================== 2055 2056`ld' deals with just four kinds of sections, summarized below. 2057 2058*named sections* 2059*text section* 2060*data section* 2061 These sections hold your program. `as' and `ld' treat them as 2062 separate but equal sections. Anything you can say of one section 2063 is true of another. When the program is running, however, it is 2064 customary for the text section to be unalterable. The text 2065 section is often shared among processes: it contains instructions, 2066 constants and the like. The data section of a running program is 2067 usually alterable: for example, C variables would be stored in the 2068 data section. 2069 2070*bss section* 2071 This section contains zeroed bytes when your program begins 2072 running. It is used to hold uninitialized variables or common 2073 storage. The length of each partial program's bss section is 2074 important, but because it starts out containing zeroed bytes there 2075 is no need to store explicit zero bytes in the object file. The 2076 bss section was invented to eliminate those explicit zeros from 2077 object files. 2078 2079*absolute section* 2080 Address 0 of this section is always "relocated" to runtime address 2081 0. This is useful if you want to refer to an address that `ld' 2082 must not change when relocating. In this sense we speak of 2083 absolute addresses being "unrelocatable": they do not change 2084 during relocation. 2085 2086*undefined section* 2087 This "section" is a catch-all for address references to objects 2088 not in the preceding sections. 2089 2090 An idealized example of three relocatable sections follows. The 2091example uses the traditional section names `.text' and `.data'. Memory 2092addresses are on the horizontal axis. 2093 2094 +-----+----+--+ 2095 partial program # 1: |ttttt|dddd|00| 2096 +-----+----+--+ 2097 2098 text data bss 2099 seg. seg. seg. 2100 2101 +---+---+---+ 2102 partial program # 2: |TTT|DDD|000| 2103 +---+---+---+ 2104 2105 +--+---+-----+--+----+---+-----+~~ 2106 linked program: | |TTT|ttttt| |dddd|DDD|00000| 2107 +--+---+-----+--+----+---+-----+~~ 2108 2109 addresses: 0 ... 2110 2111 2112File: as.info, Node: As Sections, Next: Sub-Sections, Prev: Ld Sections, Up: Sections 2113 21144.3 Assembler Internal Sections 2115=============================== 2116 2117These sections are meant only for the internal use of `as'. They have 2118no meaning at run-time. You do not really need to know about these 2119sections for most purposes; but they can be mentioned in `as' warning 2120messages, so it might be helpful to have an idea of their meanings to 2121`as'. These sections are used to permit the value of every expression 2122in your assembly language program to be a section-relative address. 2123 2124ASSEMBLER-INTERNAL-LOGIC-ERROR! 2125 An internal assembler logic error has been found. This means 2126 there is a bug in the assembler. 2127 2128expr section 2129 The assembler stores complex expression internally as combinations 2130 of symbols. When it needs to represent an expression as a symbol, 2131 it puts it in the expr section. 2132 2133 2134File: as.info, Node: Sub-Sections, Next: bss, Prev: As Sections, Up: Sections 2135 21364.4 Sub-Sections 2137================ 2138 2139Assembled bytes conventionally fall into two sections: text and data. 2140You may have separate groups of data in named sections that you want to 2141end up near to each other in the object file, even though they are not 2142contiguous in the assembler source. `as' allows you to use 2143"subsections" for this purpose. Within each section, there can be 2144numbered subsections with values from 0 to 8192. Objects assembled 2145into the same subsection go into the object file together with other 2146objects in the same subsection. For example, a compiler might want to 2147store constants in the text section, but might not want to have them 2148interspersed with the program being assembled. In this case, the 2149compiler could issue a `.text 0' before each section of code being 2150output, and a `.text 1' before each group of constants being output. 2151 2152Subsections are optional. If you do not use subsections, everything 2153goes in subsection number zero. 2154 2155 Each subsection is zero-padded up to a multiple of four bytes. 2156(Subsections may be padded a different amount on different flavors of 2157`as'.) 2158 2159 Subsections appear in your object file in numeric order, lowest 2160numbered to highest. (All this to be compatible with other people's 2161assemblers.) The object file contains no representation of 2162subsections; `ld' and other programs that manipulate object files see 2163no trace of them. They just see all your text subsections as a text 2164section, and all your data subsections as a data section. 2165 2166 To specify which subsection you want subsequent statements assembled 2167into, use a numeric argument to specify it, in a `.text EXPRESSION' or 2168a `.data EXPRESSION' statement. When generating COFF output, you can 2169also use an extra subsection argument with arbitrary named sections: 2170`.section NAME, EXPRESSION'. When generating ELF output, you can also 2171use the `.subsection' directive (*note SubSection::) to specify a 2172subsection: `.subsection EXPRESSION'. EXPRESSION should be an absolute 2173expression. (*Note Expressions::.) If you just say `.text' then 2174`.text 0' is assumed. Likewise `.data' means `.data 0'. Assembly 2175begins in `text 0'. For instance: 2176 .text 0 # The default subsection is text 0 anyway. 2177 .ascii "This lives in the first text subsection. *" 2178 .text 1 2179 .ascii "But this lives in the second text subsection." 2180 .data 0 2181 .ascii "This lives in the data section," 2182 .ascii "in the first data subsection." 2183 .text 0 2184 .ascii "This lives in the first text section," 2185 .ascii "immediately following the asterisk (*)." 2186 2187 Each section has a "location counter" incremented by one for every 2188byte assembled into that section. Because subsections are merely a 2189convenience restricted to `as' there is no concept of a subsection 2190location counter. There is no way to directly manipulate a location 2191counter--but the `.align' directive changes it, and any label 2192definition captures its current value. The location counter of the 2193section where statements are being assembled is said to be the "active" 2194location counter. 2195 2196 2197File: as.info, Node: bss, Prev: Sub-Sections, Up: Sections 2198 21994.5 bss Section 2200=============== 2201 2202The bss section is used for local common variable storage. You may 2203allocate address space in the bss section, but you may not dictate data 2204to load into it before your program executes. When your program starts 2205running, all the contents of the bss section are zeroed bytes. 2206 2207 The `.lcomm' pseudo-op defines a symbol in the bss section; see 2208*note `.lcomm': Lcomm. 2209 2210 The `.comm' pseudo-op may be used to declare a common symbol, which 2211is another form of uninitialized symbol; see *Note `.comm': Comm. 2212 2213 When assembling for a target which supports multiple sections, such 2214as ELF or COFF, you may switch into the `.bss' section and define 2215symbols as usual; see *note `.section': Section. You may only assemble 2216zero values into the section. Typically the section will only contain 2217symbol definitions and `.skip' directives (*note `.skip': Skip.). 2218 2219 2220File: as.info, Node: Symbols, Next: Expressions, Prev: Sections, Up: Top 2221 22225 Symbols 2223********* 2224 2225Symbols are a central concept: the programmer uses symbols to name 2226things, the linker uses symbols to link, and the debugger uses symbols 2227to debug. 2228 2229 _Warning:_ `as' does not place symbols in the object file in the 2230 same order they were declared. This may break some debuggers. 2231 2232* Menu: 2233 2234* Labels:: Labels 2235* Setting Symbols:: Giving Symbols Other Values 2236* Symbol Names:: Symbol Names 2237* Dot:: The Special Dot Symbol 2238* Symbol Attributes:: Symbol Attributes 2239 2240 2241File: as.info, Node: Labels, Next: Setting Symbols, Up: Symbols 2242 22435.1 Labels 2244========== 2245 2246A "label" is written as a symbol immediately followed by a colon `:'. 2247The symbol then represents the current value of the active location 2248counter, and is, for example, a suitable instruction operand. You are 2249warned if you use the same symbol to represent two different locations: 2250the first definition overrides any other definitions. 2251 2252 On the HPPA, the usual form for a label need not be immediately 2253followed by a colon, but instead must start in column zero. Only one 2254label may be defined on a single line. To work around this, the HPPA 2255version of `as' also provides a special directive `.label' for defining 2256labels more flexibly. 2257 2258 2259File: as.info, Node: Setting Symbols, Next: Symbol Names, Prev: Labels, Up: Symbols 2260 22615.2 Giving Symbols Other Values 2262=============================== 2263 2264A symbol can be given an arbitrary value by writing a symbol, followed 2265by an equals sign `=', followed by an expression (*note Expressions::). 2266This is equivalent to using the `.set' directive. *Note `.set': Set. 2267In the same way, using a double equals sign `='`=' here represents an 2268equivalent of the `.eqv' directive. *Note `.eqv': Eqv. 2269 2270 2271File: as.info, Node: Symbol Names, Next: Dot, Prev: Setting Symbols, Up: Symbols 2272 22735.3 Symbol Names 2274================ 2275 2276Symbol names begin with a letter or with one of `._'. On most 2277machines, you can also use `$' in symbol names; exceptions are noted in 2278*note Machine Dependencies::. That character may be followed by any 2279string of digits, letters, dollar signs (unless otherwise noted in 2280*note Machine Dependencies::), and underscores. 2281 2282Case of letters is significant: `foo' is a different symbol name than 2283`Foo'. 2284 2285 Each symbol has exactly one name. Each name in an assembly language 2286program refers to exactly one symbol. You may use that symbol name any 2287number of times in a program. 2288 2289Local Symbol Names 2290------------------ 2291 2292Local symbols help compilers and programmers use names temporarily. 2293They create symbols which are guaranteed to be unique over the entire 2294scope of the input source code and which can be referred to by a simple 2295notation. To define a local symbol, write a label of the form `N:' 2296(where N represents any positive integer). To refer to the most recent 2297previous definition of that symbol write `Nb', using the same number as 2298when you defined the label. To refer to the next definition of a local 2299label, write `Nf'-- The `b' stands for"backwards" and the `f' stands 2300for "forwards". 2301 2302 There is no restriction on how you can use these labels, and you can 2303reuse them too. So that it is possible to repeatedly define the same 2304local label (using the same number `N'), although you can only refer to 2305the most recently defined local label of that number (for a backwards 2306reference) or the next definition of a specific local label for a 2307forward reference. It is also worth noting that the first 10 local 2308labels (`0:'...`9:') are implemented in a slightly more efficient 2309manner than the others. 2310 2311 Here is an example: 2312 2313 1: branch 1f 2314 2: branch 1b 2315 1: branch 2f 2316 2: branch 1b 2317 2318 Which is the equivalent of: 2319 2320 label_1: branch label_3 2321 label_2: branch label_1 2322 label_3: branch label_4 2323 label_4: branch label_3 2324 2325 Local symbol names are only a notational device. They are 2326immediately transformed into more conventional symbol names before the 2327assembler uses them. The symbol names stored in the symbol table, 2328appearing in error messages and optionally emitted to the object file. 2329The names are constructed using these parts: 2330 2331`L' 2332 All local labels begin with `L'. Normally both `as' and `ld' 2333 forget symbols that start with `L'. These labels are used for 2334 symbols you are never intended to see. If you use the `-L' option 2335 then `as' retains these symbols in the object file. If you also 2336 instruct `ld' to retain these symbols, you may use them in 2337 debugging. 2338 2339`NUMBER' 2340 This is the number that was used in the local label definition. 2341 So if the label is written `55:' then the number is `55'. 2342 2343`C-B' 2344 This unusual character is included so you do not accidentally 2345 invent a symbol of the same name. The character has ASCII value 2346 of `\002' (control-B). 2347 2348`_ordinal number_' 2349 This is a serial number to keep the labels distinct. The first 2350 definition of `0:' gets the number `1'. The 15th definition of 2351 `0:' gets the number `15', and so on. Likewise the first 2352 definition of `1:' gets the number `1' and its 15th defintion gets 2353 `15' as well. 2354 2355 So for example, the first `1:' is named `L1C-B1', the 44th `3:' is 2356named `L3C-B44'. 2357 2358Dollar Local Labels 2359------------------- 2360 2361`as' also supports an even more local form of local labels called 2362dollar labels. These labels go out of scope (ie they become undefined) 2363as soon as a non-local label is defined. Thus they remain valid for 2364only a small region of the input source code. Normal local labels, by 2365contrast, remain in scope for the entire file, or until they are 2366redefined by another occurrence of the same local label. 2367 2368 Dollar labels are defined in exactly the same way as ordinary local 2369labels, except that instead of being terminated by a colon, they are 2370terminated by a dollar sign. eg `55$'. 2371 2372 They can also be distinguished from ordinary local labels by their 2373transformed name which uses ASCII character `\001' (control-A) as the 2374magic character to distinguish them from ordinary labels. Thus the 5th 2375defintion of `6$' is named `L6C-A5'. 2376 2377 2378File: as.info, Node: Dot, Next: Symbol Attributes, Prev: Symbol Names, Up: Symbols 2379 23805.4 The Special Dot Symbol 2381========================== 2382 2383The special symbol `.' refers to the current address that `as' is 2384assembling into. Thus, the expression `melvin: .long .' defines 2385`melvin' to contain its own address. Assigning a value to `.' is 2386treated the same as a `.org' directive. Thus, the expression `.=.+4' 2387is the same as saying `.space 4'. 2388 2389 2390File: as.info, Node: Symbol Attributes, Prev: Dot, Up: Symbols 2391 23925.5 Symbol Attributes 2393===================== 2394 2395Every symbol has, as well as its name, the attributes "Value" and 2396"Type". Depending on output format, symbols can also have auxiliary 2397attributes. 2398 2399 If you use a symbol without defining it, `as' assumes zero for all 2400these attributes, and probably won't warn you. This makes the symbol 2401an externally defined symbol, which is generally what you would want. 2402 2403* Menu: 2404 2405* Symbol Value:: Value 2406* Symbol Type:: Type 2407 2408 2409* a.out Symbols:: Symbol Attributes: `a.out' 2410 2411* COFF Symbols:: Symbol Attributes for COFF 2412 2413* SOM Symbols:: Symbol Attributes for SOM 2414 2415 2416File: as.info, Node: Symbol Value, Next: Symbol Type, Up: Symbol Attributes 2417 24185.5.1 Value 2419----------- 2420 2421The value of a symbol is (usually) 32 bits. For a symbol which labels a 2422location in the text, data, bss or absolute sections the value is the 2423number of addresses from the start of that section to the label. 2424Naturally for text, data and bss sections the value of a symbol changes 2425as `ld' changes section base addresses during linking. Absolute 2426symbols' values do not change during linking: that is why they are 2427called absolute. 2428 2429 The value of an undefined symbol is treated in a special way. If it 2430is 0 then the symbol is not defined in this assembler source file, and 2431`ld' tries to determine its value from other files linked into the same 2432program. You make this kind of symbol simply by mentioning a symbol 2433name without defining it. A non-zero value represents a `.comm' common 2434declaration. The value is how much common storage to reserve, in bytes 2435(addresses). The symbol refers to the first address of the allocated 2436storage. 2437 2438 2439File: as.info, Node: Symbol Type, Next: a.out Symbols, Prev: Symbol Value, Up: Symbol Attributes 2440 24415.5.2 Type 2442---------- 2443 2444The type attribute of a symbol contains relocation (section) 2445information, any flag settings indicating that a symbol is external, and 2446(optionally), other information for linkers and debuggers. The exact 2447format depends on the object-code output format in use. 2448 2449 2450File: as.info, Node: a.out Symbols, Next: COFF Symbols, Prev: Symbol Type, Up: Symbol Attributes 2451 24525.5.3 Symbol Attributes: `a.out' 2453-------------------------------- 2454 2455* Menu: 2456 2457* Symbol Desc:: Descriptor 2458* Symbol Other:: Other 2459 2460 2461File: as.info, Node: Symbol Desc, Next: Symbol Other, Up: a.out Symbols 2462 24635.5.3.1 Descriptor 2464.................. 2465 2466This is an arbitrary 16-bit value. You may establish a symbol's 2467descriptor value by using a `.desc' statement (*note `.desc': Desc.). 2468A descriptor value means nothing to `as'. 2469 2470 2471File: as.info, Node: Symbol Other, Prev: Symbol Desc, Up: a.out Symbols 2472 24735.5.3.2 Other 2474............. 2475 2476This is an arbitrary 8-bit value. It means nothing to `as'. 2477 2478 2479File: as.info, Node: COFF Symbols, Next: SOM Symbols, Prev: a.out Symbols, Up: Symbol Attributes 2480 24815.5.4 Symbol Attributes for COFF 2482-------------------------------- 2483 2484The COFF format supports a multitude of auxiliary symbol attributes; 2485like the primary symbol attributes, they are set between `.def' and 2486`.endef' directives. 2487 24885.5.4.1 Primary Attributes 2489.......................... 2490 2491The symbol name is set with `.def'; the value and type, respectively, 2492with `.val' and `.type'. 2493 24945.5.4.2 Auxiliary Attributes 2495............................ 2496 2497The `as' directives `.dim', `.line', `.scl', `.size', `.tag', and 2498`.weak' can generate auxiliary symbol table information for COFF. 2499 2500 2501File: as.info, Node: SOM Symbols, Prev: COFF Symbols, Up: Symbol Attributes 2502 25035.5.5 Symbol Attributes for SOM 2504------------------------------- 2505 2506The SOM format for the HPPA supports a multitude of symbol attributes 2507set with the `.EXPORT' and `.IMPORT' directives. 2508 2509 The attributes are described in `HP9000 Series 800 Assembly Language 2510Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT' 2511assembler directive documentation. 2512 2513 2514File: as.info, Node: Expressions, Next: Pseudo Ops, Prev: Symbols, Up: Top 2515 25166 Expressions 2517************* 2518 2519An "expression" specifies an address or numeric value. Whitespace may 2520precede and/or follow an expression. 2521 2522 The result of an expression must be an absolute number, or else an 2523offset into a particular section. If an expression is not absolute, 2524and there is not enough information when `as' sees the expression to 2525know its section, a second pass over the source program might be 2526necessary to interpret the expression--but the second pass is currently 2527not implemented. `as' aborts with an error message in this situation. 2528 2529* Menu: 2530 2531* Empty Exprs:: Empty Expressions 2532* Integer Exprs:: Integer Expressions 2533 2534 2535File: as.info, Node: Empty Exprs, Next: Integer Exprs, Up: Expressions 2536 25376.1 Empty Expressions 2538===================== 2539 2540An empty expression has no value: it is just whitespace or null. 2541Wherever an absolute expression is required, you may omit the 2542expression, and `as' assumes a value of (absolute) 0. This is 2543compatible with other assemblers. 2544 2545 2546File: as.info, Node: Integer Exprs, Prev: Empty Exprs, Up: Expressions 2547 25486.2 Integer Expressions 2549======================= 2550 2551An "integer expression" is one or more _arguments_ delimited by 2552_operators_. 2553 2554* Menu: 2555 2556* Arguments:: Arguments 2557* Operators:: Operators 2558* Prefix Ops:: Prefix Operators 2559* Infix Ops:: Infix Operators 2560 2561 2562File: as.info, Node: Arguments, Next: Operators, Up: Integer Exprs 2563 25646.2.1 Arguments 2565--------------- 2566 2567"Arguments" are symbols, numbers or subexpressions. In other contexts 2568arguments are sometimes called "arithmetic operands". In this manual, 2569to avoid confusing them with the "instruction operands" of the machine 2570language, we use the term "argument" to refer to parts of expressions 2571only, reserving the word "operand" to refer only to machine instruction 2572operands. 2573 2574 Symbols are evaluated to yield {SECTION NNN} where SECTION is one of 2575text, data, bss, absolute, or undefined. NNN is a signed, 2's 2576complement 32 bit integer. 2577 2578 Numbers are usually integers. 2579 2580 A number can be a flonum or bignum. In this case, you are warned 2581that only the low order 32 bits are used, and `as' pretends these 32 2582bits are an integer. You may write integer-manipulating instructions 2583that act on exotic constants, compatible with other assemblers. 2584 2585 Subexpressions are a left parenthesis `(' followed by an integer 2586expression, followed by a right parenthesis `)'; or a prefix operator 2587followed by an argument. 2588 2589 2590File: as.info, Node: Operators, Next: Prefix Ops, Prev: Arguments, Up: Integer Exprs 2591 25926.2.2 Operators 2593--------------- 2594 2595"Operators" are arithmetic functions, like `+' or `%'. Prefix 2596operators are followed by an argument. Infix operators appear between 2597their arguments. Operators may be preceded and/or followed by 2598whitespace. 2599 2600 2601File: as.info, Node: Prefix Ops, Next: Infix Ops, Prev: Operators, Up: Integer Exprs 2602 26036.2.3 Prefix Operator 2604--------------------- 2605 2606`as' has the following "prefix operators". They each take one 2607argument, which must be absolute. 2608 2609`-' 2610 "Negation". Two's complement negation. 2611 2612`~' 2613 "Complementation". Bitwise not. 2614 2615 2616File: as.info, Node: Infix Ops, Prev: Prefix Ops, Up: Integer Exprs 2617 26186.2.4 Infix Operators 2619--------------------- 2620 2621"Infix operators" take two arguments, one on either side. Operators 2622have precedence, but operations with equal precedence are performed left 2623to right. Apart from `+' or `-', both arguments must be absolute, and 2624the result is absolute. 2625 2626 1. Highest Precedence 2627 2628 `*' 2629 "Multiplication". 2630 2631 `/' 2632 "Division". Truncation is the same as the C operator `/' 2633 2634 `%' 2635 "Remainder". 2636 2637 `<<' 2638 "Shift Left". Same as the C operator `<<'. 2639 2640 `>>' 2641 "Shift Right". Same as the C operator `>>'. 2642 2643 2. Intermediate precedence 2644 2645 `|' 2646 "Bitwise Inclusive Or". 2647 2648 `&' 2649 "Bitwise And". 2650 2651 `^' 2652 "Bitwise Exclusive Or". 2653 2654 `!' 2655 "Bitwise Or Not". 2656 2657 3. Low Precedence 2658 2659 `+' 2660 "Addition". If either argument is absolute, the result has 2661 the section of the other argument. You may not add together 2662 arguments from different sections. 2663 2664 `-' 2665 "Subtraction". If the right argument is absolute, the result 2666 has the section of the left argument. If both arguments are 2667 in the same section, the result is absolute. You may not 2668 subtract arguments from different sections. 2669 2670 `==' 2671 "Is Equal To" 2672 2673 `<>' 2674 `!=' 2675 "Is Not Equal To" 2676 2677 `<' 2678 "Is Less Than" 2679 2680 `>' 2681 "Is Greater Than" 2682 2683 `>=' 2684 "Is Greater Than Or Equal To" 2685 2686 `<=' 2687 "Is Less Than Or Equal To" 2688 2689 The comparison operators can be used as infix operators. A 2690 true results has a value of -1 whereas a false result has a 2691 value of 0. Note, these operators perform signed 2692 comparisons. 2693 2694 4. Lowest Precedence 2695 2696 `&&' 2697 "Logical And". 2698 2699 `||' 2700 "Logical Or". 2701 2702 These two logical operations can be used to combine the 2703 results of sub expressions. Note, unlike the comparison 2704 operators a true result returns a value of 1 but a false 2705 results does still return 0. Also note that the logical or 2706 operator has a slightly lower precedence than logical and. 2707 2708 2709 In short, it's only meaningful to add or subtract the _offsets_ in an 2710address; you can only have a defined section in one of the two 2711arguments. 2712 2713 2714File: as.info, Node: Pseudo Ops, Next: Machine Dependencies, Prev: Expressions, Up: Top 2715 27167 Assembler Directives 2717********************** 2718 2719All assembler directives have names that begin with a period (`.'). 2720The rest of the name is letters, usually in lower case. 2721 2722 This chapter discusses directives that are available regardless of 2723the target machine configuration for the GNU assembler. Some machine 2724configurations provide additional directives. *Note Machine 2725Dependencies::. 2726 2727* Menu: 2728 2729* Abort:: `.abort' 2730 2731* ABORT:: `.ABORT' 2732 2733* Align:: `.align ABS-EXPR , ABS-EXPR' 2734* Altmacro:: `.altmacro' 2735* Ascii:: `.ascii "STRING"'... 2736* Asciz:: `.asciz "STRING"'... 2737* Balign:: `.balign ABS-EXPR , ABS-EXPR' 2738* Byte:: `.byte EXPRESSIONS' 2739* Comm:: `.comm SYMBOL , LENGTH ' 2740 2741* CFI directives:: `.cfi_startproc', `.cfi_endproc', etc. 2742 2743* Data:: `.data SUBSECTION' 2744 2745* Def:: `.def NAME' 2746 2747* Desc:: `.desc SYMBOL, ABS-EXPRESSION' 2748 2749* Dim:: `.dim' 2750 2751* Double:: `.double FLONUMS' 2752* Eject:: `.eject' 2753* Else:: `.else' 2754* Elseif:: `.elseif' 2755* End:: `.end' 2756 2757* Endef:: `.endef' 2758 2759* Endfunc:: `.endfunc' 2760* Endif:: `.endif' 2761* Equ:: `.equ SYMBOL, EXPRESSION' 2762* Equiv:: `.equiv SYMBOL, EXPRESSION' 2763* Eqv:: `.eqv SYMBOL, EXPRESSION' 2764* Err:: `.err' 2765* Error:: `.error STRING' 2766* Exitm:: `.exitm' 2767* Extern:: `.extern' 2768* Fail:: `.fail' 2769 2770* File:: `.file STRING' 2771 2772* Fill:: `.fill REPEAT , SIZE , VALUE' 2773* Float:: `.float FLONUMS' 2774* Func:: `.func' 2775* Global:: `.global SYMBOL', `.globl SYMBOL' 2776 2777* Hidden:: `.hidden NAMES' 2778 2779* hword:: `.hword EXPRESSIONS' 2780* Ident:: `.ident' 2781* If:: `.if ABSOLUTE EXPRESSION' 2782* Incbin:: `.incbin "FILE"[,SKIP[,COUNT]]' 2783* Include:: `.include "FILE"' 2784* Int:: `.int EXPRESSIONS' 2785 2786* Internal:: `.internal NAMES' 2787 2788* Irp:: `.irp SYMBOL,VALUES'... 2789* Irpc:: `.irpc SYMBOL,VALUES'... 2790* Lcomm:: `.lcomm SYMBOL , LENGTH' 2791* Lflags:: `.lflags' 2792 2793* Line:: `.line LINE-NUMBER' 2794 2795* Linkonce:: `.linkonce [TYPE]' 2796* List:: `.list' 2797* Ln:: `.ln LINE-NUMBER' 2798 2799* LNS directives:: `.file', `.loc', etc. 2800 2801* Long:: `.long EXPRESSIONS' 2802 2803* Macro:: `.macro NAME ARGS'... 2804* MRI:: `.mri VAL' 2805* Noaltmacro:: `.noaltmacro' 2806* Nolist:: `.nolist' 2807* Octa:: `.octa BIGNUMS' 2808* Org:: `.org NEW-LC , FILL' 2809* P2align:: `.p2align ABS-EXPR , ABS-EXPR' 2810 2811* PopSection:: `.popsection' 2812* Previous:: `.previous' 2813 2814* Print:: `.print STRING' 2815 2816* Protected:: `.protected NAMES' 2817 2818* Psize:: `.psize LINES, COLUMNS' 2819* Purgem:: `.purgem NAME' 2820 2821* PushSection:: `.pushsection NAME' 2822 2823* Quad:: `.quad BIGNUMS' 2824* Rept:: `.rept COUNT' 2825* Sbttl:: `.sbttl "SUBHEADING"' 2826 2827* Scl:: `.scl CLASS' 2828 2829* Section:: `.section NAME' 2830 2831* Set:: `.set SYMBOL, EXPRESSION' 2832* Short:: `.short EXPRESSIONS' 2833* Single:: `.single FLONUMS' 2834 2835* Size:: `.size [NAME , EXPRESSION]' 2836 2837* Skip:: `.skip SIZE , FILL' 2838* Sleb128:: `.sleb128 EXPRESSIONS' 2839* Space:: `.space SIZE , FILL' 2840 2841* Stab:: `.stabd, .stabn, .stabs' 2842 2843* String:: `.string "STR"' 2844* Struct:: `.struct EXPRESSION' 2845 2846* SubSection:: `.subsection' 2847* Symver:: `.symver NAME,NAME2@NODENAME' 2848 2849 2850* Tag:: `.tag STRUCTNAME' 2851 2852* Text:: `.text SUBSECTION' 2853* Title:: `.title "HEADING"' 2854 2855* Type:: `.type <INT | NAME , TYPE DESCRIPTION>' 2856 2857* Uleb128:: `.uleb128 EXPRESSIONS' 2858 2859* Val:: `.val ADDR' 2860 2861 2862* Version:: `.version "STRING"' 2863* VTableEntry:: `.vtable_entry TABLE, OFFSET' 2864* VTableInherit:: `.vtable_inherit CHILD, PARENT' 2865 2866* Warning:: `.warning STRING' 2867* Weak:: `.weak NAMES' 2868* Weakref:: `.weakref ALIAS, SYMBOL' 2869* Word:: `.word EXPRESSIONS' 2870* Deprecated:: Deprecated Directives 2871 2872 2873File: as.info, Node: Abort, Next: ABORT, Up: Pseudo Ops 2874 28757.1 `.abort' 2876============ 2877 2878This directive stops the assembly immediately. It is for compatibility 2879with other assemblers. The original idea was that the assembly 2880language source would be piped into the assembler. If the sender of 2881the source quit, it could use this directive tells `as' to quit also. 2882One day `.abort' will not be supported. 2883 2884 2885File: as.info, Node: ABORT, Next: Align, Prev: Abort, Up: Pseudo Ops 2886 28877.2 `.ABORT' 2888============ 2889 2890When producing COFF output, `as' accepts this directive as a synonym 2891for `.abort'. 2892 2893 2894File: as.info, Node: Align, Next: Altmacro, Prev: ABORT, Up: Pseudo Ops 2895 28967.3 `.align ABS-EXPR, ABS-EXPR, ABS-EXPR' 2897========================================= 2898 2899Pad the location counter (in the current subsection) to a particular 2900storage boundary. The first expression (which must be absolute) is the 2901alignment required, as described below. 2902 2903 The second expression (also absolute) gives the fill value to be 2904stored in the padding bytes. It (and the comma) may be omitted. If it 2905is omitted, the padding bytes are normally zero. However, on some 2906systems, if the section is marked as containing code and the fill value 2907is omitted, the space is filled with no-op instructions. 2908 2909 The third expression is also absolute, and is also optional. If it 2910is present, it is the maximum number of bytes that should be skipped by 2911this alignment directive. If doing the alignment would require 2912skipping more bytes than the specified maximum, then the alignment is 2913not done at all. You can omit the fill value (the second argument) 2914entirely by simply using two commas after the required alignment; this 2915can be useful if you want the alignment to be filled with no-op 2916instructions when appropriate. 2917 2918 The way the required alignment is specified varies from system to 2919system. For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32, 2920s390, sparc, tic4x, tic80 and xtensa, the first expression is the 2921alignment request in bytes. For example `.align 8' advances the 2922location counter until it is a multiple of 8. If the location counter 2923is already a multiple of 8, no change is needed. For the tic54x, the 2924first expression is the alignment request in words. 2925 2926 For other systems, including the i386 using a.out format, and the 2927arm and strongarm, it is the number of low-order zero bits the location 2928counter must have after advancement. For example `.align 3' advances 2929the location counter until it a multiple of 8. If the location counter 2930is already a multiple of 8, no change is needed. 2931 2932 This inconsistency is due to the different behaviors of the various 2933native assemblers for these systems which GAS must emulate. GAS also 2934provides `.balign' and `.p2align' directives, described later, which 2935have a consistent behavior across all architectures (but are specific 2936to GAS). 2937 2938 2939File: as.info, Node: Ascii, Next: Asciz, Prev: Altmacro, Up: Pseudo Ops 2940 29417.4 `.ascii "STRING"'... 2942======================== 2943 2944`.ascii' expects zero or more string literals (*note Strings::) 2945separated by commas. It assembles each string (with no automatic 2946trailing zero byte) into consecutive addresses. 2947 2948 2949File: as.info, Node: Asciz, Next: Balign, Prev: Ascii, Up: Pseudo Ops 2950 29517.5 `.asciz "STRING"'... 2952======================== 2953 2954`.asciz' is just like `.ascii', but each string is followed by a zero 2955byte. The "z" in `.asciz' stands for "zero". 2956 2957 2958File: as.info, Node: Balign, Next: Byte, Prev: Asciz, Up: Pseudo Ops 2959 29607.6 `.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR' 2961============================================== 2962 2963Pad the location counter (in the current subsection) to a particular 2964storage boundary. The first expression (which must be absolute) is the 2965alignment request in bytes. For example `.balign 8' advances the 2966location counter until it is a multiple of 8. If the location counter 2967is already a multiple of 8, no change is needed. 2968 2969 The second expression (also absolute) gives the fill value to be 2970stored in the padding bytes. It (and the comma) may be omitted. If it 2971is omitted, the padding bytes are normally zero. However, on some 2972systems, if the section is marked as containing code and the fill value 2973is omitted, the space is filled with no-op instructions. 2974 2975 The third expression is also absolute, and is also optional. If it 2976is present, it is the maximum number of bytes that should be skipped by 2977this alignment directive. If doing the alignment would require 2978skipping more bytes than the specified maximum, then the alignment is 2979not done at all. You can omit the fill value (the second argument) 2980entirely by simply using two commas after the required alignment; this 2981can be useful if you want the alignment to be filled with no-op 2982instructions when appropriate. 2983 2984 The `.balignw' and `.balignl' directives are variants of the 2985`.balign' directive. The `.balignw' directive treats the fill pattern 2986as a two byte word value. The `.balignl' directives treats the fill 2987pattern as a four byte longword value. For example, `.balignw 29884,0x368d' will align to a multiple of 4. If it skips two bytes, they 2989will be filled in with the value 0x368d (the exact placement of the 2990bytes depends upon the endianness of the processor). If it skips 1 or 29913 bytes, the fill value is undefined. 2992 2993 2994File: as.info, Node: Byte, Next: Comm, Prev: Balign, Up: Pseudo Ops 2995 29967.7 `.byte EXPRESSIONS' 2997======================= 2998 2999`.byte' expects zero or more expressions, separated by commas. Each 3000expression is assembled into the next byte. 3001 3002 3003File: as.info, Node: Comm, Next: CFI directives, Prev: Byte, Up: Pseudo Ops 3004 30057.8 `.comm SYMBOL , LENGTH ' 3006============================ 3007 3008`.comm' declares a common symbol named SYMBOL. When linking, a common 3009symbol in one object file may be merged with a defined or common symbol 3010of the same name in another object file. If `ld' does not see a 3011definition for the symbol-just one or more common symbols-then it will 3012allocate LENGTH bytes of uninitialized memory. LENGTH must be an 3013absolute expression. If `ld' sees multiple common symbols with the 3014same name, and they do not all have the same size, it will allocate 3015space using the largest size. 3016 3017 When using ELF, the `.comm' directive takes an optional third 3018argument. This is the desired alignment of the symbol, specified as a 3019byte boundary (for example, an alignment of 16 means that the least 3020significant 4 bits of the address should be zero). The alignment must 3021be an absolute expression, and it must be a power of two. If `ld' 3022allocates uninitialized memory for the common symbol, it will use the 3023alignment when placing the symbol. If no alignment is specified, `as' 3024will set the alignment to the largest power of two less than or equal 3025to the size of the symbol, up to a maximum of 16. 3026 3027 The syntax for `.comm' differs slightly on the HPPA. The syntax is 3028`SYMBOL .comm, LENGTH'; SYMBOL is optional. 3029 3030 3031File: as.info, Node: CFI directives, Next: Data, Prev: Comm, Up: Pseudo Ops 3032 30337.9 `.cfi_startproc' 3034==================== 3035 3036`.cfi_startproc' is used at the beginning of each function that should 3037have an entry in `.eh_frame'. It initializes some internal data 3038structures and emits architecture dependent initial CFI instructions. 3039Don't forget to close the function by `.cfi_endproc'. 3040 30417.10 `.cfi_endproc' 3042=================== 3043 3044`.cfi_endproc' is used at the end of a function where it closes its 3045unwind entry previously opened by `.cfi_startproc'. and emits it to 3046`.eh_frame'. 3047 30487.11 `.cfi_def_cfa REGISTER, OFFSET' 3049==================================== 3050 3051`.cfi_def_cfa' defines a rule for computing CFA as: take address from 3052REGISTER and add OFFSET to it. 3053 30547.12 `.cfi_def_cfa_register REGISTER' 3055===================================== 3056 3057`.cfi_def_cfa_register' modifies a rule for computing CFA. From now on 3058REGISTER will be used instead of the old one. Offset remains the same. 3059 30607.13 `.cfi_def_cfa_offset OFFSET' 3061================================= 3062 3063`.cfi_def_cfa_offset' modifies a rule for computing CFA. Register 3064remains the same, but OFFSET is new. Note that it is the absolute 3065offset that will be added to a defined register to compute CFA address. 3066 30677.14 `.cfi_adjust_cfa_offset OFFSET' 3068==================================== 3069 3070Same as `.cfi_def_cfa_offset' but OFFSET is a relative value that is 3071added/substracted from the previous offset. 3072 30737.15 `.cfi_offset REGISTER, OFFSET' 3074=================================== 3075 3076Previous value of REGISTER is saved at offset OFFSET from CFA. 3077 30787.16 `.cfi_rel_offset REGISTER, OFFSET' 3079======================================= 3080 3081Previous value of REGISTER is saved at offset OFFSET from the current 3082CFA register. This is transformed to `.cfi_offset' using the known 3083displacement of the CFA register from the CFA. This is often easier to 3084use, because the number will match the code it's annotating. 3085 30867.17 `.cfi_signal_frame' 3087======================== 3088 3089Mark current function as signal trampoline. 3090 30917.18 `.cfi_window_save' 3092======================= 3093 3094SPARC register window has been saved. 3095 30967.19 `.cfi_escape' EXPRESSION[, ...] 3097==================================== 3098 3099Allows the user to add arbitrary bytes to the unwind info. One might 3100use this to add OS-specific CFI opcodes, or generic CFI opcodes that 3101GAS does not yet support. 3102 3103 3104File: as.info, Node: LNS directives, Next: Long, Prev: Ln, Up: Pseudo Ops 3105 31067.20 `.file FILENO FILENAME' 3107============================ 3108 3109When emitting dwarf2 line number information `.file' assigns filenames 3110to the `.debug_line' file name table. The FILENO operand should be a 3111unique positive integer to use as the index of the entry in the table. 3112The FILENAME operand is a C string literal. 3113 3114 The detail of filename indicies is exposed to the user because the 3115filename table is shared with the `.debug_info' section of the dwarf2 3116debugging information, and thus the user must know the exact indicies 3117that table entries will have. 3118 31197.21 `.loc FILENO LINENO [COLUMN] [OPTIONS]' 3120============================================ 3121 3122The `.loc' directive will add row to the `.debug_line' line number 3123matrix corresponding to the immediately following assembly instruction. 3124The FILENO, LINENO, and optional COLUMN arguments will be applied to 3125the `.debug_line' state machine before the row is added. 3126 3127 The OPTIONS are a sequence of the following tokens in any order: 3128 3129`basic_block' 3130 This option will set the `basic_block' register in the 3131 `.debug_line' state machine to `true'. 3132 3133`prologue_end' 3134 This option will set the `prologue_end' register in the 3135 `.debug_line' state machine to `true'. 3136 3137`epilogue_begin' 3138 This option will set the `epilogue_begin' register in the 3139 `.debug_line' state machine to `true'. 3140 3141`is_stmt VALUE' 3142 This option will set the `is_stmt' register in the `.debug_line' 3143 state machine to `value', which must be either 0 or 1. 3144 3145`isa VALUE' 3146 This directive will set the `isa' register in the `.debug_line' 3147 state machine to VALUE, which must be an unsigned integer. 3148 3149 31507.22 `.loc_mark_blocks ENABLE' 3151============================== 3152 3153The `.loc_mark_blocks' directive makes the assembler emit an entry to 3154the `.debug_line' line number matrix with the `basic_block' register in 3155the state machine set whenever a code label is seen. The ENABLE 3156argument should be either 1 or 0, to enable or disable this function 3157respectively. 3158 3159 3160File: as.info, Node: Data, Next: Def, Prev: CFI directives, Up: Pseudo Ops 3161 31627.23 `.data SUBSECTION' 3163======================= 3164 3165`.data' tells `as' to assemble the following statements onto the end of 3166the data subsection numbered SUBSECTION (which is an absolute 3167expression). If SUBSECTION is omitted, it defaults to zero. 3168 3169 3170File: as.info, Node: Def, Next: Desc, Prev: Data, Up: Pseudo Ops 3171 31727.24 `.def NAME' 3173================ 3174 3175Begin defining debugging information for a symbol NAME; the definition 3176extends until the `.endef' directive is encountered. 3177 3178 3179File: as.info, Node: Desc, Next: Dim, Prev: Def, Up: Pseudo Ops 3180 31817.25 `.desc SYMBOL, ABS-EXPRESSION' 3182=================================== 3183 3184This directive sets the descriptor of the symbol (*note Symbol 3185Attributes::) to the low 16 bits of an absolute expression. 3186 3187 The `.desc' directive is not available when `as' is configured for 3188COFF output; it is only for `a.out' or `b.out' object format. For the 3189sake of compatibility, `as' accepts it, but produces no output, when 3190configured for COFF. 3191 3192 3193File: as.info, Node: Dim, Next: Double, Prev: Desc, Up: Pseudo Ops 3194 31957.26 `.dim' 3196=========== 3197 3198This directive is generated by compilers to include auxiliary debugging 3199information in the symbol table. It is only permitted inside 3200`.def'/`.endef' pairs. 3201 3202 3203File: as.info, Node: Double, Next: Eject, Prev: Dim, Up: Pseudo Ops 3204 32057.27 `.double FLONUMS' 3206====================== 3207 3208`.double' expects zero or more flonums, separated by commas. It 3209assembles floating point numbers. The exact kind of floating point 3210numbers emitted depends on how `as' is configured. *Note Machine 3211Dependencies::. 3212 3213 3214File: as.info, Node: Eject, Next: Else, Prev: Double, Up: Pseudo Ops 3215 32167.28 `.eject' 3217============= 3218 3219Force a page break at this point, when generating assembly listings. 3220 3221 3222File: as.info, Node: Else, Next: Elseif, Prev: Eject, Up: Pseudo Ops 3223 32247.29 `.else' 3225============ 3226 3227`.else' is part of the `as' support for conditional assembly; *note 3228`.if': If. It marks the beginning of a section of code to be assembled 3229if the condition for the preceding `.if' was false. 3230 3231 3232File: as.info, Node: Elseif, Next: End, Prev: Else, Up: Pseudo Ops 3233 32347.30 `.elseif' 3235============== 3236 3237`.elseif' is part of the `as' support for conditional assembly; *note 3238`.if': If. It is shorthand for beginning a new `.if' block that would 3239otherwise fill the entire `.else' section. 3240 3241 3242File: as.info, Node: End, Next: Endef, Prev: Elseif, Up: Pseudo Ops 3243 32447.31 `.end' 3245=========== 3246 3247`.end' marks the end of the assembly file. `as' does not process 3248anything in the file past the `.end' directive. 3249 3250 3251File: as.info, Node: Endef, Next: Endfunc, Prev: End, Up: Pseudo Ops 3252 32537.32 `.endef' 3254============= 3255 3256This directive flags the end of a symbol definition begun with `.def'. 3257 3258 3259File: as.info, Node: Endfunc, Next: Endif, Prev: Endef, Up: Pseudo Ops 3260 32617.33 `.endfunc' 3262=============== 3263 3264`.endfunc' marks the end of a function specified with `.func'. 3265 3266 3267File: as.info, Node: Endif, Next: Equ, Prev: Endfunc, Up: Pseudo Ops 3268 32697.34 `.endif' 3270============= 3271 3272`.endif' is part of the `as' support for conditional assembly; it marks 3273the end of a block of code that is only assembled conditionally. *Note 3274`.if': If. 3275 3276 3277File: as.info, Node: Equ, Next: Equiv, Prev: Endif, Up: Pseudo Ops 3278 32797.35 `.equ SYMBOL, EXPRESSION' 3280============================== 3281 3282This directive sets the value of SYMBOL to EXPRESSION. It is 3283synonymous with `.set'; *note `.set': Set. 3284 3285 The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'. 3286 3287 The syntax for `equ' on the Z80 is `SYMBOL equ EXPRESSION'. On the 3288Z80 it is an eror if SYMBOL is already defined, but the symbol is not 3289protected from later redefinition, compare *Note Equiv::. 3290 3291 3292File: as.info, Node: Equiv, Next: Eqv, Prev: Equ, Up: Pseudo Ops 3293 32947.36 `.equiv SYMBOL, EXPRESSION' 3295================================ 3296 3297The `.equiv' directive is like `.equ' and `.set', except that the 3298assembler will signal an error if SYMBOL is already defined. Note a 3299symbol which has been referenced but not actually defined is considered 3300to be undefined. 3301 3302 Except for the contents of the error message, this is roughly 3303equivalent to 3304 .ifdef SYM 3305 .err 3306 .endif 3307 .equ SYM,VAL 3308 plus it protects the symbol from later redefinition. 3309 3310 3311File: as.info, Node: Eqv, Next: Err, Prev: Equiv, Up: Pseudo Ops 3312 33137.37 `.eqv SYMBOL, EXPRESSION' 3314============================== 3315 3316The `.eqv' directive is like `.equiv', but no attempt is made to 3317evaluate the expression or any part of it immediately. Instead each 3318time the resulting symbol is used in an expression, a snapshot of its 3319current value is taken. 3320 3321 3322File: as.info, Node: Err, Next: Error, Prev: Eqv, Up: Pseudo Ops 3323 33247.38 `.err' 3325=========== 3326 3327If `as' assembles a `.err' directive, it will print an error message 3328and, unless the `-Z' option was used, it will not generate an object 3329file. This can be used to signal an error in conditionally compiled 3330code. 3331 3332 3333File: as.info, Node: Error, Next: Exitm, Prev: Err, Up: Pseudo Ops 3334 33357.39 `.error "STRING"' 3336====================== 3337 3338Similarly to `.err', this directive emits an error, but you can specify 3339a string that will be emitted as the error message. If you don't 3340specify the message, it defaults to `".error directive invoked in 3341source file"'. *Note Error and Warning Messages: Errors. 3342 3343 .error "This code has not been assembled and tested." 3344 3345 3346File: as.info, Node: Exitm, Next: Extern, Prev: Error, Up: Pseudo Ops 3347 33487.40 `.exitm' 3349============= 3350 3351Exit early from the current macro definition. *Note Macro::. 3352 3353 3354File: as.info, Node: Extern, Next: Fail, Prev: Exitm, Up: Pseudo Ops 3355 33567.41 `.extern' 3357============== 3358 3359`.extern' is accepted in the source program--for compatibility with 3360other assemblers--but it is ignored. `as' treats all undefined symbols 3361as external. 3362 3363 3364File: as.info, Node: Fail, Next: File, Prev: Extern, Up: Pseudo Ops 3365 33667.42 `.fail EXPRESSION' 3367======================= 3368 3369Generates an error or a warning. If the value of the EXPRESSION is 500 3370or more, `as' will print a warning message. If the value is less than 3371500, `as' will print an error message. The message will include the 3372value of EXPRESSION. This can occasionally be useful inside complex 3373nested macros or conditional assembly. 3374 3375 3376File: as.info, Node: File, Next: Fill, Prev: Fail, Up: Pseudo Ops 3377 33787.43 `.file STRING' 3379=================== 3380 3381`.file' tells `as' that we are about to start a new logical file. 3382STRING is the new file name. In general, the filename is recognized 3383whether or not it is surrounded by quotes `"'; but if you wish to 3384specify an empty file name, you must give the quotes-`""'. This 3385statement may go away in future: it is only recognized to be compatible 3386with old `as' programs. 3387 3388 3389File: as.info, Node: Fill, Next: Float, Prev: File, Up: Pseudo Ops 3390 33917.44 `.fill REPEAT , SIZE , VALUE' 3392================================== 3393 3394REPEAT, SIZE and VALUE are absolute expressions. This emits REPEAT 3395copies of SIZE bytes. REPEAT may be zero or more. SIZE may be zero or 3396more, but if it is more than 8, then it is deemed to have the value 8, 3397compatible with other people's assemblers. The contents of each REPEAT 3398bytes is taken from an 8-byte number. The highest order 4 bytes are 3399zero. The lowest order 4 bytes are VALUE rendered in the byte-order of 3400an integer on the computer `as' is assembling for. Each SIZE bytes in 3401a repetition is taken from the lowest order SIZE bytes of this number. 3402Again, this bizarre behavior is compatible with other people's 3403assemblers. 3404 3405 SIZE and VALUE are optional. If the second comma and VALUE are 3406absent, VALUE is assumed zero. If the first comma and following tokens 3407are absent, SIZE is assumed to be 1. 3408 3409 3410File: as.info, Node: Float, Next: Func, Prev: Fill, Up: Pseudo Ops 3411 34127.45 `.float FLONUMS' 3413===================== 3414 3415This directive assembles zero or more flonums, separated by commas. It 3416has the same effect as `.single'. The exact kind of floating point 3417numbers emitted depends on how `as' is configured. *Note Machine 3418Dependencies::. 3419 3420 3421File: as.info, Node: Func, Next: Global, Prev: Float, Up: Pseudo Ops 3422 34237.46 `.func NAME[,LABEL]' 3424========================= 3425 3426`.func' emits debugging information to denote function NAME, and is 3427ignored unless the file is assembled with debugging enabled. Only 3428`--gstabs[+]' is currently supported. LABEL is the entry point of the 3429function and if omitted NAME prepended with the `leading char' is used. 3430`leading char' is usually `_' or nothing, depending on the target. All 3431functions are currently defined to have `void' return type. The 3432function must be terminated with `.endfunc'. 3433 3434 3435File: as.info, Node: Global, Next: Hidden, Prev: Func, Up: Pseudo Ops 3436 34377.47 `.global SYMBOL', `.globl SYMBOL' 3438====================================== 3439 3440`.global' makes the symbol visible to `ld'. If you define SYMBOL in 3441your partial program, its value is made available to other partial 3442programs that are linked with it. Otherwise, SYMBOL takes its 3443attributes from a symbol of the same name from another file linked into 3444the same program. 3445 3446 Both spellings (`.globl' and `.global') are accepted, for 3447compatibility with other assemblers. 3448 3449 On the HPPA, `.global' is not always enough to make it accessible to 3450other partial programs. You may need the HPPA-only `.EXPORT' directive 3451as well. *Note HPPA Assembler Directives: HPPA Directives. 3452 3453 3454File: as.info, Node: Hidden, Next: hword, Prev: Global, Up: Pseudo Ops 3455 34567.48 `.hidden NAMES' 3457==================== 3458 3459This is one of the ELF visibility directives. The other two are 3460`.internal' (*note `.internal': Internal.) and `.protected' (*note 3461`.protected': Protected.). 3462 3463 This directive overrides the named symbols default visibility (which 3464is set by their binding: local, global or weak). The directive sets 3465the visibility to `hidden' which means that the symbols are not visible 3466to other components. Such symbols are always considered to be 3467`protected' as well. 3468 3469 3470File: as.info, Node: hword, Next: Ident, Prev: Hidden, Up: Pseudo Ops 3471 34727.49 `.hword EXPRESSIONS' 3473========================= 3474 3475This expects zero or more EXPRESSIONS, and emits a 16 bit number for 3476each. 3477 3478 This directive is a synonym for `.short'; depending on the target 3479architecture, it may also be a synonym for `.word'. 3480 3481 3482File: as.info, Node: Ident, Next: If, Prev: hword, Up: Pseudo Ops 3483 34847.50 `.ident' 3485============= 3486 3487This directive is used by some assemblers to place tags in object 3488files. The behavior of this directive varies depending on the target. 3489When using the a.out object file format, `as' simply accepts the 3490directive for source-file compatibility with existing assemblers, but 3491does not emit anything for it. When using COFF, comments are emitted 3492to the `.comment' or `.rdata' section, depending on the target. When 3493using ELF, comments are emitted to the `.comment' section. 3494 3495 3496File: as.info, Node: If, Next: Incbin, Prev: Ident, Up: Pseudo Ops 3497 34987.51 `.if ABSOLUTE EXPRESSION' 3499============================== 3500 3501`.if' marks the beginning of a section of code which is only considered 3502part of the source program being assembled if the argument (which must 3503be an ABSOLUTE EXPRESSION) is non-zero. The end of the conditional 3504section of code must be marked by `.endif' (*note `.endif': Endif.); 3505optionally, you may include code for the alternative condition, flagged 3506by `.else' (*note `.else': Else.). If you have several conditions to 3507check, `.elseif' may be used to avoid nesting blocks if/else within 3508each subsequent `.else' block. 3509 3510 The following variants of `.if' are also supported: 3511`.ifdef SYMBOL' 3512 Assembles the following section of code if the specified SYMBOL 3513 has been defined. Note a symbol which has been referenced but not 3514 yet defined is considered to be undefined. 3515 3516`.ifb TEXT' 3517 Assembles the following section of code if the operand is blank 3518 (empty). 3519 3520`.ifc STRING1,STRING2' 3521 Assembles the following section of code if the two strings are the 3522 same. The strings may be optionally quoted with single quotes. 3523 If they are not quoted, the first string stops at the first comma, 3524 and the second string stops at the end of the line. Strings which 3525 contain whitespace should be quoted. The string comparison is 3526 case sensitive. 3527 3528`.ifeq ABSOLUTE EXPRESSION' 3529 Assembles the following section of code if the argument is zero. 3530 3531`.ifeqs STRING1,STRING2' 3532 Another form of `.ifc'. The strings must be quoted using double 3533 quotes. 3534 3535`.ifge ABSOLUTE EXPRESSION' 3536 Assembles the following section of code if the argument is greater 3537 than or equal to zero. 3538 3539`.ifgt ABSOLUTE EXPRESSION' 3540 Assembles the following section of code if the argument is greater 3541 than zero. 3542 3543`.ifle ABSOLUTE EXPRESSION' 3544 Assembles the following section of code if the argument is less 3545 than or equal to zero. 3546 3547`.iflt ABSOLUTE EXPRESSION' 3548 Assembles the following section of code if the argument is less 3549 than zero. 3550 3551`.ifnb TEXT' 3552 Like `.ifb', but the sense of the test is reversed: this assembles 3553 the following section of code if the operand is non-blank 3554 (non-empty). 3555 3556`.ifnc STRING1,STRING2.' 3557 Like `.ifc', but the sense of the test is reversed: this assembles 3558 the following section of code if the two strings are not the same. 3559 3560`.ifndef SYMBOL' 3561`.ifnotdef SYMBOL' 3562 Assembles the following section of code if the specified SYMBOL 3563 has not been defined. Both spelling variants are equivalent. 3564 Note a symbol which has been referenced but not yet defined is 3565 considered to be undefined. 3566 3567`.ifne ABSOLUTE EXPRESSION' 3568 Assembles the following section of code if the argument is not 3569 equal to zero (in other words, this is equivalent to `.if'). 3570 3571`.ifnes STRING1,STRING2' 3572 Like `.ifeqs', but the sense of the test is reversed: this 3573 assembles the following section of code if the two strings are not 3574 the same. 3575 3576 3577File: as.info, Node: Incbin, Next: Include, Prev: If, Up: Pseudo Ops 3578 35797.52 `.incbin "FILE"[,SKIP[,COUNT]]' 3580==================================== 3581 3582The `incbin' directive includes FILE verbatim at the current location. 3583You can control the search paths used with the `-I' command-line option 3584(*note Command-Line Options: Invoking.). Quotation marks are required 3585around FILE. 3586 3587 The SKIP argument skips a number of bytes from the start of the 3588FILE. The COUNT argument indicates the maximum number of bytes to 3589read. Note that the data is not aligned in any way, so it is the user's 3590responsibility to make sure that proper alignment is provided both 3591before and after the `incbin' directive. 3592 3593 3594File: as.info, Node: Include, Next: Int, Prev: Incbin, Up: Pseudo Ops 3595 35967.53 `.include "FILE"' 3597====================== 3598 3599This directive provides a way to include supporting files at specified 3600points in your source program. The code from FILE is assembled as if 3601it followed the point of the `.include'; when the end of the included 3602file is reached, assembly of the original file continues. You can 3603control the search paths used with the `-I' command-line option (*note 3604Command-Line Options: Invoking.). Quotation marks are required around 3605FILE. 3606 3607 3608File: as.info, Node: Int, Next: Internal, Prev: Include, Up: Pseudo Ops 3609 36107.54 `.int EXPRESSIONS' 3611======================= 3612 3613Expect zero or more EXPRESSIONS, of any section, separated by commas. 3614For each expression, emit a number that, at run time, is the value of 3615that expression. The byte order and bit size of the number depends on 3616what kind of target the assembly is for. 3617 3618 3619File: as.info, Node: Internal, Next: Irp, Prev: Int, Up: Pseudo Ops 3620 36217.55 `.internal NAMES' 3622====================== 3623 3624This is one of the ELF visibility directives. The other two are 3625`.hidden' (*note `.hidden': Hidden.) and `.protected' (*note 3626`.protected': Protected.). 3627 3628 This directive overrides the named symbols default visibility (which 3629is set by their binding: local, global or weak). The directive sets 3630the visibility to `internal' which means that the symbols are 3631considered to be `hidden' (i.e., not visible to other components), and 3632that some extra, processor specific processing must also be performed 3633upon the symbols as well. 3634 3635 3636File: as.info, Node: Irp, Next: Irpc, Prev: Internal, Up: Pseudo Ops 3637 36387.56 `.irp SYMBOL,VALUES'... 3639============================ 3640 3641Evaluate a sequence of statements assigning different values to SYMBOL. 3642The sequence of statements starts at the `.irp' directive, and is 3643terminated by an `.endr' directive. For each VALUE, SYMBOL is set to 3644VALUE, and the sequence of statements is assembled. If no VALUE is 3645listed, the sequence of statements is assembled once, with SYMBOL set 3646to the null string. To refer to SYMBOL within the sequence of 3647statements, use \SYMBOL. 3648 3649 For example, assembling 3650 3651 .irp param,1,2,3 3652 move d\param,sp@- 3653 .endr 3654 3655 is equivalent to assembling 3656 3657 move d1,sp@- 3658 move d2,sp@- 3659 move d3,sp@- 3660 3661 For some caveats with the spelling of SYMBOL, see also the discussion 3662at *Note Macro::. 3663 3664 3665File: as.info, Node: Irpc, Next: Lcomm, Prev: Irp, Up: Pseudo Ops 3666 36677.57 `.irpc SYMBOL,VALUES'... 3668============================= 3669 3670Evaluate a sequence of statements assigning different values to SYMBOL. 3671The sequence of statements starts at the `.irpc' directive, and is 3672terminated by an `.endr' directive. For each character in VALUE, 3673SYMBOL is set to the character, and the sequence of statements is 3674assembled. If no VALUE is listed, the sequence of statements is 3675assembled once, with SYMBOL set to the null string. To refer to SYMBOL 3676within the sequence of statements, use \SYMBOL. 3677 3678 For example, assembling 3679 3680 .irpc param,123 3681 move d\param,sp@- 3682 .endr 3683 3684 is equivalent to assembling 3685 3686 move d1,sp@- 3687 move d2,sp@- 3688 move d3,sp@- 3689 3690 For some caveats with the spelling of SYMBOL, see also the discussion 3691at *Note Macro::. 3692 3693 3694File: as.info, Node: Lcomm, Next: Lflags, Prev: Irpc, Up: Pseudo Ops 3695 36967.58 `.lcomm SYMBOL , LENGTH' 3697============================= 3698 3699Reserve LENGTH (an absolute expression) bytes for a local common 3700denoted by SYMBOL. The section and value of SYMBOL are those of the 3701new local common. The addresses are allocated in the bss section, so 3702that at run-time the bytes start off zeroed. SYMBOL is not declared 3703global (*note `.global': Global.), so is normally not visible to `ld'. 3704 3705 Some targets permit a third argument to be used with `.lcomm'. This 3706argument specifies the desired alignment of the symbol in the bss 3707section. 3708 3709 The syntax for `.lcomm' differs slightly on the HPPA. The syntax is 3710`SYMBOL .lcomm, LENGTH'; SYMBOL is optional. 3711 3712 3713File: as.info, Node: Lflags, Next: Line, Prev: Lcomm, Up: Pseudo Ops 3714 37157.59 `.lflags' 3716============== 3717 3718`as' accepts this directive, for compatibility with other assemblers, 3719but ignores it. 3720 3721 3722File: as.info, Node: Line, Next: Linkonce, Prev: Lflags, Up: Pseudo Ops 3723 37247.60 `.line LINE-NUMBER' 3725======================== 3726 3727 Change the logical line number. LINE-NUMBER must be an absolute 3728expression. The next line has that logical line number. Therefore any 3729other statements on the current line (after a statement separator 3730character) are reported as on logical line number LINE-NUMBER - 1. One 3731day `as' will no longer support this directive: it is recognized only 3732for compatibility with existing assembler programs. 3733 3734 Even though this is a directive associated with the `a.out' or 3735`b.out' object-code formats, `as' still recognizes it when producing 3736COFF output, and treats `.line' as though it were the COFF `.ln' _if_ 3737it is found outside a `.def'/`.endef' pair. 3738 3739 Inside a `.def', `.line' is, instead, one of the directives used by 3740compilers to generate auxiliary symbol information for debugging. 3741 3742 3743File: as.info, Node: Linkonce, Next: List, Prev: Line, Up: Pseudo Ops 3744 37457.61 `.linkonce [TYPE]' 3746======================= 3747 3748Mark the current section so that the linker only includes a single copy 3749of it. This may be used to include the same section in several 3750different object files, but ensure that the linker will only include it 3751once in the final output file. The `.linkonce' pseudo-op must be used 3752for each instance of the section. Duplicate sections are detected 3753based on the section name, so it should be unique. 3754 3755 This directive is only supported by a few object file formats; as of 3756this writing, the only object file format which supports it is the 3757Portable Executable format used on Windows NT. 3758 3759 The TYPE argument is optional. If specified, it must be one of the 3760following strings. For example: 3761 .linkonce same_size 3762 Not all types may be supported on all object file formats. 3763 3764`discard' 3765 Silently discard duplicate sections. This is the default. 3766 3767`one_only' 3768 Warn if there are duplicate sections, but still keep only one copy. 3769 3770`same_size' 3771 Warn if any of the duplicates have different sizes. 3772 3773`same_contents' 3774 Warn if any of the duplicates do not have exactly the same 3775 contents. 3776 3777 3778File: as.info, Node: Ln, Next: LNS directives, Prev: List, Up: Pseudo Ops 3779 37807.62 `.ln LINE-NUMBER' 3781====================== 3782 3783`.ln' is a synonym for `.line'. 3784 3785 3786File: as.info, Node: MRI, Next: Noaltmacro, Prev: Macro, Up: Pseudo Ops 3787 37887.63 `.mri VAL' 3789=============== 3790 3791If VAL is non-zero, this tells `as' to enter MRI mode. If VAL is zero, 3792this tells `as' to exit MRI mode. This change affects code assembled 3793until the next `.mri' directive, or until the end of the file. *Note 3794MRI mode: M. 3795 3796 3797File: as.info, Node: List, Next: Ln, Prev: Linkonce, Up: Pseudo Ops 3798 37997.64 `.list' 3800============ 3801 3802Control (in conjunction with the `.nolist' directive) whether or not 3803assembly listings are generated. These two directives maintain an 3804internal counter (which is zero initially). `.list' increments the 3805counter, and `.nolist' decrements it. Assembly listings are generated 3806whenever the counter is greater than zero. 3807 3808 By default, listings are disabled. When you enable them (with the 3809`-a' command line option; *note Command-Line Options: Invoking.), the 3810initial value of the listing counter is one. 3811 3812 3813File: as.info, Node: Long, Next: Macro, Prev: LNS directives, Up: Pseudo Ops 3814 38157.65 `.long EXPRESSIONS' 3816======================== 3817 3818`.long' is the same as `.int', *note `.int': Int. 3819 3820 3821File: as.info, Node: Macro, Next: MRI, Prev: Long, Up: Pseudo Ops 3822 38237.66 `.macro' 3824============= 3825 3826The commands `.macro' and `.endm' allow you to define macros that 3827generate assembly output. For example, this definition specifies a 3828macro `sum' that puts a sequence of numbers into memory: 3829 3830 .macro sum from=0, to=5 3831 .long \from 3832 .if \to-\from 3833 sum "(\from+1)",\to 3834 .endif 3835 .endm 3836 3837With that definition, `SUM 0,5' is equivalent to this assembly input: 3838 3839 .long 0 3840 .long 1 3841 .long 2 3842 .long 3 3843 .long 4 3844 .long 5 3845 3846`.macro MACNAME' 3847`.macro MACNAME MACARGS ...' 3848 Begin the definition of a macro called MACNAME. If your macro 3849 definition requires arguments, specify their names after the macro 3850 name, separated by commas or spaces. You can qualify the macro 3851 argument to indicate whether all invocations must specify a 3852 non-blank value (through `:`req''), or whether it takes all of the 3853 remaining arguments (through `:`vararg''). You can supply a 3854 default value for any macro argument by following the name with 3855 `=DEFLT'. You cannot define two macros with the same MACNAME 3856 unless it has been subject to the `.purgem' directive (*Note 3857 Purgem::.) between the two definitions. For example, these are 3858 all valid `.macro' statements: 3859 3860 `.macro comm' 3861 Begin the definition of a macro called `comm', which takes no 3862 arguments. 3863 3864 `.macro plus1 p, p1' 3865 `.macro plus1 p p1' 3866 Either statement begins the definition of a macro called 3867 `plus1', which takes two arguments; within the macro 3868 definition, write `\p' or `\p1' to evaluate the arguments. 3869 3870 `.macro reserve_str p1=0 p2' 3871 Begin the definition of a macro called `reserve_str', with two 3872 arguments. The first argument has a default value, but not 3873 the second. After the definition is complete, you can call 3874 the macro either as `reserve_str A,B' (with `\p1' evaluating 3875 to A and `\p2' evaluating to B), or as `reserve_str ,B' (with 3876 `\p1' evaluating as the default, in this case `0', and `\p2' 3877 evaluating to B). 3878 3879`.macro m p1:req, p2=0, p3:vararg' 3880 Begin the definition of a macro called `m', with at least three 3881 arguments. The first argument must always have a value specified, 3882 but not the second, which instead has a default value. The third 3883 formal will get assigned all remaining arguments specified at 3884 invocation time. 3885 3886 When you call a macro, you can specify the argument values either 3887 by position, or by keyword. For example, `sum 9,17' is equivalent 3888 to `sum to=17, from=9'. 3889 3890 Note that since each of the MACARGS can be an identifier exactly 3891 as any other one permitted by the target architecture, there may be 3892 occasional problems if the target hand-crafts special meanings to 3893 certain characters when they occur in a special position. For 3894 example, if colon (`:') is generally permitted to be part of a 3895 symbol name, but the architecture specific code special-cases it 3896 when occuring as the final character of a symbol (to denote a 3897 label), then the macro parameter replacement code will have no way 3898 of knowing that and consider the whole construct (including the 3899 colon) an identifier, and check only this identifier for being the 3900 subject to parameter substitution. In this example, besides the 3901 potential of just separating identifier and colon by white space, 3902 using alternate macro syntax (*Note Altmacro::.) and ampersand 3903 (`&') as the character to separate literal text from macro 3904 parameters (or macro parameters from one another) would provide a 3905 way to achieve the same effect: 3906 3907 .altmacro 3908 .macro label l 3909 l&: 3910 .endm 3911 3912 This applies identically to the identifiers used in `.irp' (*Note 3913 Irp::.) and `.irpc' (*Note Irpc::.). 3914 3915`.endm' 3916 Mark the end of a macro definition. 3917 3918`.exitm' 3919 Exit early from the current macro definition. 3920 3921`\@' 3922 `as' maintains a counter of how many macros it has executed in 3923 this pseudo-variable; you can copy that number to your output with 3924 `\@', but _only within a macro definition_. 3925 3926`LOCAL NAME [ , ... ]' 3927 _Warning: `LOCAL' is only available if you select "alternate macro 3928 syntax" with `--alternate' or `.altmacro'._ *Note `.altmacro': 3929 Altmacro. 3930 3931 3932File: as.info, Node: Altmacro, Next: Ascii, Prev: Align, Up: Pseudo Ops 3933 39347.67 `.altmacro' 3935================ 3936 3937Enable alternate macro mode, enabling: 3938 3939`LOCAL NAME [ , ... ]' 3940 One additional directive, `LOCAL', is available. It is used to 3941 generate a string replacement for each of the NAME arguments, and 3942 replace any instances of NAME in each macro expansion. The 3943 replacement string is unique in the assembly, and different for 3944 each separate macro expansion. `LOCAL' allows you to write macros 3945 that define symbols, without fear of conflict between separate 3946 macro expansions. 3947 3948`String delimiters' 3949 You can write strings delimited in these other ways besides 3950 `"STRING"': 3951 3952 `'STRING'' 3953 You can delimit strings with single-quote charaters. 3954 3955 `<STRING>' 3956 You can delimit strings with matching angle brackets. 3957 3958`single-character string escape' 3959 To include any single character literally in a string (even if the 3960 character would otherwise have some special meaning), you can 3961 prefix the character with `!' (an exclamation mark). For example, 3962 you can write `<4.3 !> 5.4!!>' to get the literal text `4.3 > 3963 5.4!'. 3964 3965`Expression results as strings' 3966 You can write `%EXPR' to evaluate the expression EXPR and use the 3967 result as a string. 3968 3969 3970File: as.info, Node: Noaltmacro, Next: Nolist, Prev: MRI, Up: Pseudo Ops 3971 39727.68 `.noaltmacro' 3973================== 3974 3975Disable alternate macro mode. *note Altmacro:: 3976 3977 3978File: as.info, Node: Nolist, Next: Octa, Prev: Noaltmacro, Up: Pseudo Ops 3979 39807.69 `.nolist' 3981============== 3982 3983Control (in conjunction with the `.list' directive) whether or not 3984assembly listings are generated. These two directives maintain an 3985internal counter (which is zero initially). `.list' increments the 3986counter, and `.nolist' decrements it. Assembly listings are generated 3987whenever the counter is greater than zero. 3988 3989 3990File: as.info, Node: Octa, Next: Org, Prev: Nolist, Up: Pseudo Ops 3991 39927.70 `.octa BIGNUMS' 3993==================== 3994 3995This directive expects zero or more bignums, separated by commas. For 3996each bignum, it emits a 16-byte integer. 3997 3998 The term "octa" comes from contexts in which a "word" is two bytes; 3999hence _octa_-word for 16 bytes. 4000 4001 4002File: as.info, Node: Org, Next: P2align, Prev: Octa, Up: Pseudo Ops 4003 40047.71 `.org NEW-LC , FILL' 4005========================= 4006 4007Advance the location counter of the current section to NEW-LC. NEW-LC 4008is either an absolute expression or an expression with the same section 4009as the current subsection. That is, you can't use `.org' to cross 4010sections: if NEW-LC has the wrong section, the `.org' directive is 4011ignored. To be compatible with former assemblers, if the section of 4012NEW-LC is absolute, `as' issues a warning, then pretends the section of 4013NEW-LC is the same as the current subsection. 4014 4015 `.org' may only increase the location counter, or leave it 4016unchanged; you cannot use `.org' to move the location counter backwards. 4017 4018 Because `as' tries to assemble programs in one pass, NEW-LC may not 4019be undefined. If you really detest this restriction we eagerly await a 4020chance to share your improved assembler. 4021 4022 Beware that the origin is relative to the start of the section, not 4023to the start of the subsection. This is compatible with other people's 4024assemblers. 4025 4026 When the location counter (of the current subsection) is advanced, 4027the intervening bytes are filled with FILL which should be an absolute 4028expression. If the comma and FILL are omitted, FILL defaults to zero. 4029 4030 4031File: as.info, Node: P2align, Next: PopSection, Prev: Org, Up: Pseudo Ops 4032 40337.72 `.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR' 4034================================================ 4035 4036Pad the location counter (in the current subsection) to a particular 4037storage boundary. The first expression (which must be absolute) is the 4038number of low-order zero bits the location counter must have after 4039advancement. For example `.p2align 3' advances the location counter 4040until it a multiple of 8. If the location counter is already a 4041multiple of 8, no change is needed. 4042 4043 The second expression (also absolute) gives the fill value to be 4044stored in the padding bytes. It (and the comma) may be omitted. If it 4045is omitted, the padding bytes are normally zero. However, on some 4046systems, if the section is marked as containing code and the fill value 4047is omitted, the space is filled with no-op instructions. 4048 4049 The third expression is also absolute, and is also optional. If it 4050is present, it is the maximum number of bytes that should be skipped by 4051this alignment directive. If doing the alignment would require 4052skipping more bytes than the specified maximum, then the alignment is 4053not done at all. You can omit the fill value (the second argument) 4054entirely by simply using two commas after the required alignment; this 4055can be useful if you want the alignment to be filled with no-op 4056instructions when appropriate. 4057 4058 The `.p2alignw' and `.p2alignl' directives are variants of the 4059`.p2align' directive. The `.p2alignw' directive treats the fill 4060pattern as a two byte word value. The `.p2alignl' directives treats the 4061fill pattern as a four byte longword value. For example, `.p2alignw 40622,0x368d' will align to a multiple of 4. If it skips two bytes, they 4063will be filled in with the value 0x368d (the exact placement of the 4064bytes depends upon the endianness of the processor). If it skips 1 or 40653 bytes, the fill value is undefined. 4066 4067 4068File: as.info, Node: Previous, Next: Print, Prev: PopSection, Up: Pseudo Ops 4069 40707.73 `.previous' 4071================ 4072 4073This is one of the ELF section stack manipulation directives. The 4074others are `.section' (*note Section::), `.subsection' (*note 4075SubSection::), `.pushsection' (*note PushSection::), and `.popsection' 4076(*note PopSection::). 4077 4078 This directive swaps the current section (and subsection) with most 4079recently referenced section (and subsection) prior to this one. 4080Multiple `.previous' directives in a row will flip between two sections 4081(and their subsections). 4082 4083 In terms of the section stack, this directive swaps the current 4084section with the top section on the section stack. 4085 4086 4087File: as.info, Node: PopSection, Next: Previous, Prev: P2align, Up: Pseudo Ops 4088 40897.74 `.popsection' 4090================== 4091 4092This is one of the ELF section stack manipulation directives. The 4093others are `.section' (*note Section::), `.subsection' (*note 4094SubSection::), `.pushsection' (*note PushSection::), and `.previous' 4095(*note Previous::). 4096 4097 This directive replaces the current section (and subsection) with 4098the top section (and subsection) on the section stack. This section is 4099popped off the stack. 4100 4101 4102File: as.info, Node: Print, Next: Protected, Prev: Previous, Up: Pseudo Ops 4103 41047.75 `.print STRING' 4105==================== 4106 4107`as' will print STRING on the standard output during assembly. You 4108must put STRING in double quotes. 4109 4110 4111File: as.info, Node: Protected, Next: Psize, Prev: Print, Up: Pseudo Ops 4112 41137.76 `.protected NAMES' 4114======================= 4115 4116This is one of the ELF visibility directives. The other two are 4117`.hidden' (*note Hidden::) and `.internal' (*note Internal::). 4118 4119 This directive overrides the named symbols default visibility (which 4120is set by their binding: local, global or weak). The directive sets 4121the visibility to `protected' which means that any references to the 4122symbols from within the components that defines them must be resolved 4123to the definition in that component, even if a definition in another 4124component would normally preempt this. 4125 4126 4127File: as.info, Node: Psize, Next: Purgem, Prev: Protected, Up: Pseudo Ops 4128 41297.77 `.psize LINES , COLUMNS' 4130============================= 4131 4132Use this directive to declare the number of lines--and, optionally, the 4133number of columns--to use for each page, when generating listings. 4134 4135 If you do not use `.psize', listings use a default line-count of 60. 4136You may omit the comma and COLUMNS specification; the default width is 4137200 columns. 4138 4139 `as' generates formfeeds whenever the specified number of lines is 4140exceeded (or whenever you explicitly request one, using `.eject'). 4141 4142 If you specify LINES as `0', no formfeeds are generated save those 4143explicitly specified with `.eject'. 4144 4145 4146File: as.info, Node: Purgem, Next: PushSection, Prev: Psize, Up: Pseudo Ops 4147 41487.78 `.purgem NAME' 4149=================== 4150 4151Undefine the macro NAME, so that later uses of the string will not be 4152expanded. *Note Macro::. 4153 4154 4155File: as.info, Node: PushSection, Next: Quad, Prev: Purgem, Up: Pseudo Ops 4156 41577.79 `.pushsection NAME , SUBSECTION' 4158===================================== 4159 4160This is one of the ELF section stack manipulation directives. The 4161others are `.section' (*note Section::), `.subsection' (*note 4162SubSection::), `.popsection' (*note PopSection::), and `.previous' 4163(*note Previous::). 4164 4165 This directive pushes the current section (and subsection) onto the 4166top of the section stack, and then replaces the current section and 4167subsection with `name' and `subsection'. 4168 4169 4170File: as.info, Node: Quad, Next: Rept, Prev: PushSection, Up: Pseudo Ops 4171 41727.80 `.quad BIGNUMS' 4173==================== 4174 4175`.quad' expects zero or more bignums, separated by commas. For each 4176bignum, it emits an 8-byte integer. If the bignum won't fit in 8 4177bytes, it prints a warning message; and just takes the lowest order 8 4178bytes of the bignum. 4179 4180 The term "quad" comes from contexts in which a "word" is two bytes; 4181hence _quad_-word for 8 bytes. 4182 4183 4184File: as.info, Node: Rept, Next: Sbttl, Prev: Quad, Up: Pseudo Ops 4185 41867.81 `.rept COUNT' 4187================== 4188 4189Repeat the sequence of lines between the `.rept' directive and the next 4190`.endr' directive COUNT times. 4191 4192 For example, assembling 4193 4194 .rept 3 4195 .long 0 4196 .endr 4197 4198 is equivalent to assembling 4199 4200 .long 0 4201 .long 0 4202 .long 0 4203 4204 4205File: as.info, Node: Sbttl, Next: Scl, Prev: Rept, Up: Pseudo Ops 4206 42077.82 `.sbttl "SUBHEADING"' 4208========================== 4209 4210Use SUBHEADING as the title (third line, immediately after the title 4211line) when generating assembly listings. 4212 4213 This directive affects subsequent pages, as well as the current page 4214if it appears within ten lines of the top of a page. 4215 4216 4217File: as.info, Node: Scl, Next: Section, Prev: Sbttl, Up: Pseudo Ops 4218 42197.83 `.scl CLASS' 4220================= 4221 4222Set the storage-class value for a symbol. This directive may only be 4223used inside a `.def'/`.endef' pair. Storage class may flag whether a 4224symbol is static or external, or it may record further symbolic 4225debugging information. 4226 4227 4228File: as.info, Node: Section, Next: Set, Prev: Scl, Up: Pseudo Ops 4229 42307.84 `.section NAME' 4231==================== 4232 4233Use the `.section' directive to assemble the following code into a 4234section named NAME. 4235 4236 This directive is only supported for targets that actually support 4237arbitrarily named sections; on `a.out' targets, for example, it is not 4238accepted, even with a standard `a.out' section name. 4239 4240COFF Version 4241------------ 4242 4243 For COFF targets, the `.section' directive is used in one of the 4244following ways: 4245 4246 .section NAME[, "FLAGS"] 4247 .section NAME[, SUBSEGMENT] 4248 4249 If the optional argument is quoted, it is taken as flags to use for 4250the section. Each flag is a single character. The following flags are 4251recognized: 4252`b' 4253 bss section (uninitialized data) 4254 4255`n' 4256 section is not loaded 4257 4258`w' 4259 writable section 4260 4261`d' 4262 data section 4263 4264`r' 4265 read-only section 4266 4267`x' 4268 executable section 4269 4270`s' 4271 shared section (meaningful for PE targets) 4272 4273`a' 4274 ignored. (For compatibility with the ELF version) 4275 4276 If no flags are specified, the default flags depend upon the section 4277name. If the section name is not recognized, the default will be for 4278the section to be loaded and writable. Note the `n' and `w' flags 4279remove attributes from the section, rather than adding them, so if they 4280are used on their own it will be as if no flags had been specified at 4281all. 4282 4283 If the optional argument to the `.section' directive is not quoted, 4284it is taken as a subsegment number (*note Sub-Sections::). 4285 4286ELF Version 4287----------- 4288 4289 This is one of the ELF section stack manipulation directives. The 4290others are `.subsection' (*note SubSection::), `.pushsection' (*note 4291PushSection::), `.popsection' (*note PopSection::), and `.previous' 4292(*note Previous::). 4293 4294 For ELF targets, the `.section' directive is used like this: 4295 4296 .section NAME [, "FLAGS"[, @TYPE[,FLAG_SPECIFIC_ARGUMENTS]]] 4297 4298 The optional FLAGS argument is a quoted string which may contain any 4299combination of the following characters: 4300`a' 4301 section is allocatable 4302 4303`w' 4304 section is writable 4305 4306`x' 4307 section is executable 4308 4309`M' 4310 section is mergeable 4311 4312`S' 4313 section contains zero terminated strings 4314 4315`G' 4316 section is a member of a section group 4317 4318`T' 4319 section is used for thread-local-storage 4320 4321 The optional TYPE argument may contain one of the following 4322constants: 4323`@progbits' 4324 section contains data 4325 4326`@nobits' 4327 section does not contain data (i.e., section only occupies space) 4328 4329`@note' 4330 section contains data which is used by things other than the 4331 program 4332 4333`@init_array' 4334 section contains an array of pointers to init functions 4335 4336`@fini_array' 4337 section contains an array of pointers to finish functions 4338 4339`@preinit_array' 4340 section contains an array of pointers to pre-init functions 4341 4342 Many targets only support the first three section types. 4343 4344 Note on targets where the `@' character is the start of a comment (eg 4345ARM) then another character is used instead. For example the ARM port 4346uses the `%' character. 4347 4348 If FLAGS contains the `M' symbol then the TYPE argument must be 4349specified as well as an extra argument - ENTSIZE - like this: 4350 4351 .section NAME , "FLAGS"M, @TYPE, ENTSIZE 4352 4353 Sections with the `M' flag but not `S' flag must contain fixed size 4354constants, each ENTSIZE octets long. Sections with both `M' and `S' 4355must contain zero terminated strings where each character is ENTSIZE 4356bytes long. The linker may remove duplicates within sections with the 4357same name, same entity size and same flags. ENTSIZE must be an 4358absolute expression. 4359 4360 If FLAGS contains the `G' symbol then the TYPE argument must be 4361present along with an additional field like this: 4362 4363 .section NAME , "FLAGS"G, @TYPE, GROUPNAME[, LINKAGE] 4364 4365 The GROUPNAME field specifies the name of the section group to which 4366this particular section belongs. The optional linkage field can 4367contain: 4368`comdat' 4369 indicates that only one copy of this section should be retained 4370 4371`.gnu.linkonce' 4372 an alias for comdat 4373 4374 Note - if both the M and G flags are present then the fields for the 4375Merge flag should come first, like this: 4376 4377 .section NAME , "FLAGS"MG, @TYPE, ENTSIZE, GROUPNAME[, LINKAGE] 4378 4379 If no flags are specified, the default flags depend upon the section 4380name. If the section name is not recognized, the default will be for 4381the section to have none of the above flags: it will not be allocated 4382in memory, nor writable, nor executable. The section will contain data. 4383 4384 For ELF targets, the assembler supports another type of `.section' 4385directive for compatibility with the Solaris assembler: 4386 4387 .section "NAME"[, FLAGS...] 4388 4389 Note that the section name is quoted. There may be a sequence of 4390comma separated flags: 4391`#alloc' 4392 section is allocatable 4393 4394`#write' 4395 section is writable 4396 4397`#execinstr' 4398 section is executable 4399 4400`#tls' 4401 section is used for thread local storage 4402 4403 This directive replaces the current section and subsection. See the 4404contents of the gas testsuite directory `gas/testsuite/gas/elf' for 4405some examples of how this directive and the other section stack 4406directives work. 4407 4408 4409File: as.info, Node: Set, Next: Short, Prev: Section, Up: Pseudo Ops 4410 44117.85 `.set SYMBOL, EXPRESSION' 4412============================== 4413 4414Set the value of SYMBOL to EXPRESSION. This changes SYMBOL's value and 4415type to conform to EXPRESSION. If SYMBOL was flagged as external, it 4416remains flagged (*note Symbol Attributes::). 4417 4418 You may `.set' a symbol many times in the same assembly. 4419 4420 If you `.set' a global symbol, the value stored in the object file 4421is the last value stored into it. 4422 4423 The syntax for `set' on the HPPA is `SYMBOL .set EXPRESSION'. 4424 4425 On Z80 `set' is a real instruction, use `SYMBOL defl EXPRESSION' 4426instead. 4427 4428 4429File: as.info, Node: Short, Next: Single, Prev: Set, Up: Pseudo Ops 4430 44317.86 `.short EXPRESSIONS' 4432========================= 4433 4434`.short' is normally the same as `.word'. *Note `.word': Word. 4435 4436 In some configurations, however, `.short' and `.word' generate 4437numbers of different lengths; *note Machine Dependencies::. 4438 4439 4440File: as.info, Node: Single, Next: Size, Prev: Short, Up: Pseudo Ops 4441 44427.87 `.single FLONUMS' 4443====================== 4444 4445This directive assembles zero or more flonums, separated by commas. It 4446has the same effect as `.float'. The exact kind of floating point 4447numbers emitted depends on how `as' is configured. *Note Machine 4448Dependencies::. 4449 4450 4451File: as.info, Node: Size, Next: Skip, Prev: Single, Up: Pseudo Ops 4452 44537.88 `.size' 4454============ 4455 4456This directive is used to set the size associated with a symbol. 4457 4458COFF Version 4459------------ 4460 4461 For COFF targets, the `.size' directive is only permitted inside 4462`.def'/`.endef' pairs. It is used like this: 4463 4464 .size EXPRESSION 4465 4466ELF Version 4467----------- 4468 4469 For ELF targets, the `.size' directive is used like this: 4470 4471 .size NAME , EXPRESSION 4472 4473 This directive sets the size associated with a symbol NAME. The 4474size in bytes is computed from EXPRESSION which can make use of label 4475arithmetic. This directive is typically used to set the size of 4476function symbols. 4477 4478 4479File: as.info, Node: Sleb128, Next: Space, Prev: Skip, Up: Pseudo Ops 4480 44817.89 `.sleb128 EXPRESSIONS' 4482=========================== 4483 4484SLEB128 stands for "signed little endian base 128." This is a compact, 4485variable length representation of numbers used by the DWARF symbolic 4486debugging format. *Note `.uleb128': Uleb128. 4487 4488 4489File: as.info, Node: Skip, Next: Sleb128, Prev: Size, Up: Pseudo Ops 4490 44917.90 `.skip SIZE , FILL' 4492======================== 4493 4494This directive emits SIZE bytes, each of value FILL. Both SIZE and 4495FILL are absolute expressions. If the comma and FILL are omitted, FILL 4496is assumed to be zero. This is the same as `.space'. 4497 4498 4499File: as.info, Node: Space, Next: Stab, Prev: Sleb128, Up: Pseudo Ops 4500 45017.91 `.space SIZE , FILL' 4502========================= 4503 4504This directive emits SIZE bytes, each of value FILL. Both SIZE and 4505FILL are absolute expressions. If the comma and FILL are omitted, FILL 4506is assumed to be zero. This is the same as `.skip'. 4507 4508 _Warning:_ `.space' has a completely different meaning for HPPA 4509 targets; use `.block' as a substitute. See `HP9000 Series 800 4510 Assembly Language Reference Manual' (HP 92432-90001) for the 4511 meaning of the `.space' directive. *Note HPPA Assembler 4512 Directives: HPPA Directives, for a summary. 4513 4514 4515File: as.info, Node: Stab, Next: String, Prev: Space, Up: Pseudo Ops 4516 45177.92 `.stabd, .stabn, .stabs' 4518============================= 4519 4520There are three directives that begin `.stab'. All emit symbols (*note 4521Symbols::), for use by symbolic debuggers. The symbols are not entered 4522in the `as' hash table: they cannot be referenced elsewhere in the 4523source file. Up to five fields are required: 4524 4525STRING 4526 This is the symbol's name. It may contain any character except 4527 `\000', so is more general than ordinary symbol names. Some 4528 debuggers used to code arbitrarily complex structures into symbol 4529 names using this field. 4530 4531TYPE 4532 An absolute expression. The symbol's type is set to the low 8 4533 bits of this expression. Any bit pattern is permitted, but `ld' 4534 and debuggers choke on silly bit patterns. 4535 4536OTHER 4537 An absolute expression. The symbol's "other" attribute is set to 4538 the low 8 bits of this expression. 4539 4540DESC 4541 An absolute expression. The symbol's descriptor is set to the low 4542 16 bits of this expression. 4543 4544VALUE 4545 An absolute expression which becomes the symbol's value. 4546 4547 If a warning is detected while reading a `.stabd', `.stabn', or 4548`.stabs' statement, the symbol has probably already been created; you 4549get a half-formed symbol in your object file. This is compatible with 4550earlier assemblers! 4551 4552`.stabd TYPE , OTHER , DESC' 4553 The "name" of the symbol generated is not even an empty string. 4554 It is a null pointer, for compatibility. Older assemblers used a 4555 null pointer so they didn't waste space in object files with empty 4556 strings. 4557 4558 The symbol's value is set to the location counter, relocatably. 4559 When your program is linked, the value of this symbol is the 4560 address of the location counter when the `.stabd' was assembled. 4561 4562`.stabn TYPE , OTHER , DESC , VALUE' 4563 The name of the symbol is set to the empty string `""'. 4564 4565`.stabs STRING , TYPE , OTHER , DESC , VALUE' 4566 All five fields are specified. 4567 4568 4569File: as.info, Node: String, Next: Struct, Prev: Stab, Up: Pseudo Ops 4570 45717.93 `.string' "STR" 4572==================== 4573 4574Copy the characters in STR to the object file. You may specify more 4575than one string to copy, separated by commas. Unless otherwise 4576specified for a particular machine, the assembler marks the end of each 4577string with a 0 byte. You can use any of the escape sequences 4578described in *note Strings: Strings. 4579 4580 4581File: as.info, Node: Struct, Next: SubSection, Prev: String, Up: Pseudo Ops 4582 45837.94 `.struct EXPRESSION' 4584========================= 4585 4586Switch to the absolute section, and set the section offset to 4587EXPRESSION, which must be an absolute expression. You might use this 4588as follows: 4589 .struct 0 4590 field1: 4591 .struct field1 + 4 4592 field2: 4593 .struct field2 + 4 4594 field3: 4595 This would define the symbol `field1' to have the value 0, the symbol 4596`field2' to have the value 4, and the symbol `field3' to have the value 45978. Assembly would be left in the absolute section, and you would need 4598to use a `.section' directive of some sort to change to some other 4599section before further assembly. 4600 4601 4602File: as.info, Node: SubSection, Next: Symver, Prev: Struct, Up: Pseudo Ops 4603 46047.95 `.subsection NAME' 4605======================= 4606 4607This is one of the ELF section stack manipulation directives. The 4608others are `.section' (*note Section::), `.pushsection' (*note 4609PushSection::), `.popsection' (*note PopSection::), and `.previous' 4610(*note Previous::). 4611 4612 This directive replaces the current subsection with `name'. The 4613current section is not changed. The replaced subsection is put onto 4614the section stack in place of the then current top of stack subsection. 4615 4616 4617File: as.info, Node: Symver, Next: Tag, Prev: SubSection, Up: Pseudo Ops 4618 46197.96 `.symver' 4620============== 4621 4622Use the `.symver' directive to bind symbols to specific version nodes 4623within a source file. This is only supported on ELF platforms, and is 4624typically used when assembling files to be linked into a shared library. 4625There are cases where it may make sense to use this in objects to be 4626bound into an application itself so as to override a versioned symbol 4627from a shared library. 4628 4629 For ELF targets, the `.symver' directive can be used like this: 4630 .symver NAME, NAME2@NODENAME 4631 If the symbol NAME is defined within the file being assembled, the 4632`.symver' directive effectively creates a symbol alias with the name 4633NAME2@NODENAME, and in fact the main reason that we just don't try and 4634create a regular alias is that the @ character isn't permitted in 4635symbol names. The NAME2 part of the name is the actual name of the 4636symbol by which it will be externally referenced. The name NAME itself 4637is merely a name of convenience that is used so that it is possible to 4638have definitions for multiple versions of a function within a single 4639source file, and so that the compiler can unambiguously know which 4640version of a function is being mentioned. The NODENAME portion of the 4641alias should be the name of a node specified in the version script 4642supplied to the linker when building a shared library. If you are 4643attempting to override a versioned symbol from a shared library, then 4644NODENAME should correspond to the nodename of the symbol you are trying 4645to override. 4646 4647 If the symbol NAME is not defined within the file being assembled, 4648all references to NAME will be changed to NAME2@NODENAME. If no 4649reference to NAME is made, NAME2@NODENAME will be removed from the 4650symbol table. 4651 4652 Another usage of the `.symver' directive is: 4653 .symver NAME, NAME2@@NODENAME 4654 In this case, the symbol NAME must exist and be defined within the 4655file being assembled. It is similar to NAME2@NODENAME. The difference 4656is NAME2@@NODENAME will also be used to resolve references to NAME2 by 4657the linker. 4658 4659 The third usage of the `.symver' directive is: 4660 .symver NAME, NAME2@@@NODENAME 4661 When NAME is not defined within the file being assembled, it is 4662treated as NAME2@NODENAME. When NAME is defined within the file being 4663assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME. 4664 4665 4666File: as.info, Node: Tag, Next: Text, Prev: Symver, Up: Pseudo Ops 4667 46687.97 `.tag STRUCTNAME' 4669====================== 4670 4671This directive is generated by compilers to include auxiliary debugging 4672information in the symbol table. It is only permitted inside 4673`.def'/`.endef' pairs. Tags are used to link structure definitions in 4674the symbol table with instances of those structures. 4675 4676 4677File: as.info, Node: Text, Next: Title, Prev: Tag, Up: Pseudo Ops 4678 46797.98 `.text SUBSECTION' 4680======================= 4681 4682Tells `as' to assemble the following statements onto the end of the 4683text subsection numbered SUBSECTION, which is an absolute expression. 4684If SUBSECTION is omitted, subsection number zero is used. 4685 4686 4687File: as.info, Node: Title, Next: Type, Prev: Text, Up: Pseudo Ops 4688 46897.99 `.title "HEADING"' 4690======================= 4691 4692Use HEADING as the title (second line, immediately after the source 4693file name and pagenumber) when generating assembly listings. 4694 4695 This directive affects subsequent pages, as well as the current page 4696if it appears within ten lines of the top of a page. 4697 4698 4699File: as.info, Node: Type, Next: Uleb128, Prev: Title, Up: Pseudo Ops 4700 47017.100 `.type' 4702============= 4703 4704This directive is used to set the type of a symbol. 4705 4706COFF Version 4707------------ 4708 4709 For COFF targets, this directive is permitted only within 4710`.def'/`.endef' pairs. It is used like this: 4711 4712 .type INT 4713 4714 This records the integer INT as the type attribute of a symbol table 4715entry. 4716 4717ELF Version 4718----------- 4719 4720 For ELF targets, the `.type' directive is used like this: 4721 4722 .type NAME , TYPE DESCRIPTION 4723 4724 This sets the type of symbol NAME to be either a function symbol or 4725an object symbol. There are five different syntaxes supported for the 4726TYPE DESCRIPTION field, in order to provide compatibility with various 4727other assemblers. The syntaxes supported are: 4728 4729 .type <name>,#function 4730 .type <name>,#object 4731 4732 .type <name>,@function 4733 .type <name>,@object 4734 4735 .type <name>,%function 4736 .type <name>,%object 4737 4738 .type <name>,"function" 4739 .type <name>,"object" 4740 4741 .type <name> STT_FUNCTION 4742 .type <name> STT_OBJECT 4743 4744 4745File: as.info, Node: Uleb128, Next: Val, Prev: Type, Up: Pseudo Ops 4746 47477.101 `.uleb128 EXPRESSIONS' 4748============================ 4749 4750ULEB128 stands for "unsigned little endian base 128." This is a 4751compact, variable length representation of numbers used by the DWARF 4752symbolic debugging format. *Note `.sleb128': Sleb128. 4753 4754 4755File: as.info, Node: Val, Next: Version, Prev: Uleb128, Up: Pseudo Ops 4756 47577.102 `.val ADDR' 4758================= 4759 4760This directive, permitted only within `.def'/`.endef' pairs, records 4761the address ADDR as the value attribute of a symbol table entry. 4762 4763 4764File: as.info, Node: Version, Next: VTableEntry, Prev: Val, Up: Pseudo Ops 4765 47667.103 `.version "STRING"' 4767========================= 4768 4769This directive creates a `.note' section and places into it an ELF 4770formatted note of type NT_VERSION. The note's name is set to `string'. 4771 4772 4773File: as.info, Node: VTableEntry, Next: VTableInherit, Prev: Version, Up: Pseudo Ops 4774 47757.104 `.vtable_entry TABLE, OFFSET' 4776=================================== 4777 4778This directive finds or creates a symbol `table' and creates a 4779`VTABLE_ENTRY' relocation for it with an addend of `offset'. 4780 4781 4782File: as.info, Node: VTableInherit, Next: Warning, Prev: VTableEntry, Up: Pseudo Ops 4783 47847.105 `.vtable_inherit CHILD, PARENT' 4785===================================== 4786 4787This directive finds the symbol `child' and finds or creates the symbol 4788`parent' and then creates a `VTABLE_INHERIT' relocation for the parent 4789whose addend is the value of the child symbol. As a special case the 4790parent name of `0' is treated as refering the `*ABS*' section. 4791 4792 4793File: as.info, Node: Warning, Next: Weak, Prev: VTableInherit, Up: Pseudo Ops 4794 47957.106 `.warning "STRING"' 4796========================= 4797 4798Similar to the directive `.error' (*note `.error "STRING"': Error.), 4799but just emits a warning. 4800 4801 4802File: as.info, Node: Weak, Next: Weakref, Prev: Warning, Up: Pseudo Ops 4803 48047.107 `.weak NAMES' 4805=================== 4806 4807This directive sets the weak attribute on the comma separated list of 4808symbol `names'. If the symbols do not already exist, they will be 4809created. 4810 4811 On COFF targets other than PE, weak symbols are a GNU extension. 4812This directive sets the weak attribute on the comma separated list of 4813symbol `names'. If the symbols do not already exist, they will be 4814created. 4815 4816 On the PE target, weak symbols are supported natively as weak 4817aliases. When a weak symbol is created that is not an alias, GAS 4818creates an alternate symbol to hold the default value. 4819 4820 4821File: as.info, Node: Weakref, Next: Word, Prev: Weak, Up: Pseudo Ops 4822 48237.108 `.weakref ALIAS, TARGET' 4824============================== 4825 4826This directive creates an alias to the target symbol that enables the 4827symbol to be referenced with weak-symbol semantics, but without 4828actually making it weak. If direct references or definitions of the 4829symbol are present, then the symbol will not be weak, but if all 4830references to it are through weak references, the symbol will be marked 4831as weak in the symbol table. 4832 4833 The effect is equivalent to moving all references to the alias to a 4834separate assembly source file, renaming the alias to the symbol in it, 4835declaring the symbol as weak there, and running a reloadable link to 4836merge the object files resulting from the assembly of the new source 4837file and the old source file that had the references to the alias 4838removed. 4839 4840 The alias itself never makes to the symbol table, and is entirely 4841handled within the assembler. 4842 4843 4844File: as.info, Node: Word, Next: Deprecated, Prev: Weakref, Up: Pseudo Ops 4845 48467.109 `.word EXPRESSIONS' 4847========================= 4848 4849This directive expects zero or more EXPRESSIONS, of any section, 4850separated by commas. 4851 4852 The size of the number emitted, and its byte order, depend on what 4853target computer the assembly is for. 4854 4855 _Warning: Special Treatment to support Compilers_ 4856 4857 Machines with a 32-bit address space, but that do less than 32-bit 4858addressing, require the following special treatment. If the machine of 4859interest to you does 32-bit addressing (or doesn't require it; *note 4860Machine Dependencies::), you can ignore this issue. 4861 4862 In order to assemble compiler output into something that works, `as' 4863occasionally does strange things to `.word' directives. Directives of 4864the form `.word sym1-sym2' are often emitted by compilers as part of 4865jump tables. Therefore, when `as' assembles a directive of the form 4866`.word sym1-sym2', and the difference between `sym1' and `sym2' does 4867not fit in 16 bits, `as' creates a "secondary jump table", immediately 4868before the next label. This secondary jump table is preceded by a 4869short-jump to the first byte after the secondary table. This 4870short-jump prevents the flow of control from accidentally falling into 4871the new table. Inside the table is a long-jump to `sym2'. The 4872original `.word' contains `sym1' minus the address of the long-jump to 4873`sym2'. 4874 4875 If there were several occurrences of `.word sym1-sym2' before the 4876secondary jump table, all of them are adjusted. If there was a `.word 4877sym3-sym4', that also did not fit in sixteen bits, a long-jump to 4878`sym4' is included in the secondary jump table, and the `.word' 4879directives are adjusted to contain `sym3' minus the address of the 4880long-jump to `sym4'; and so on, for as many entries in the original 4881jump table as necessary. 4882 4883 4884File: as.info, Node: Deprecated, Prev: Word, Up: Pseudo Ops 4885 48867.110 Deprecated Directives 4887=========================== 4888 4889One day these directives won't work. They are included for 4890compatibility with older assemblers. 4891.abort 4892 4893.line 4894 4895 4896File: as.info, Node: Machine Dependencies, Next: Reporting Bugs, Prev: Pseudo Ops, Up: Top 4897 48988 Machine Dependent Features 4899**************************** 4900 4901The machine instruction sets are (almost by definition) different on 4902each machine where `as' runs. Floating point representations vary as 4903well, and `as' often supports a few additional directives or 4904command-line options for compatibility with other assemblers on a 4905particular platform. Finally, some versions of `as' support special 4906pseudo-instructions for branch optimization. 4907 4908 This chapter discusses most of these differences, though it does not 4909include details on any machine's instruction set. For details on that 4910subject, see the hardware manufacturer's manual. 4911 4912* Menu: 4913 4914 4915* Alpha-Dependent:: Alpha Dependent Features 4916 4917* ARC-Dependent:: ARC Dependent Features 4918 4919* ARM-Dependent:: ARM Dependent Features 4920 4921* BFIN-Dependent:: BFIN Dependent Features 4922 4923* CRIS-Dependent:: CRIS Dependent Features 4924 4925* D10V-Dependent:: D10V Dependent Features 4926 4927* D30V-Dependent:: D30V Dependent Features 4928 4929* H8/300-Dependent:: Renesas H8/300 Dependent Features 4930 4931* HPPA-Dependent:: HPPA Dependent Features 4932 4933* ESA/390-Dependent:: IBM ESA/390 Dependent Features 4934 4935* i386-Dependent:: Intel 80386 and AMD x86-64 Dependent Features 4936 4937* i860-Dependent:: Intel 80860 Dependent Features 4938 4939* i960-Dependent:: Intel 80960 Dependent Features 4940 4941* IA-64-Dependent:: Intel IA-64 Dependent Features 4942 4943* IP2K-Dependent:: IP2K Dependent Features 4944 4945* M32C-Dependent:: M32C Dependent Features 4946 4947* M32R-Dependent:: M32R Dependent Features 4948 4949* M68K-Dependent:: M680x0 Dependent Features 4950 4951* M68HC11-Dependent:: M68HC11 and 68HC12 Dependent Features 4952 4953* MIPS-Dependent:: MIPS Dependent Features 4954 4955* MMIX-Dependent:: MMIX Dependent Features 4956 4957* MSP430-Dependent:: MSP430 Dependent Features 4958 4959* SH-Dependent:: Renesas / SuperH SH Dependent Features 4960* SH64-Dependent:: SuperH SH64 Dependent Features 4961 4962* PDP-11-Dependent:: PDP-11 Dependent Features 4963 4964* PJ-Dependent:: picoJava Dependent Features 4965 4966* PPC-Dependent:: PowerPC Dependent Features 4967 4968* Sparc-Dependent:: SPARC Dependent Features 4969 4970* TIC54X-Dependent:: TI TMS320C54x Dependent Features 4971 4972* V850-Dependent:: V850 Dependent Features 4973 4974* Xtensa-Dependent:: Xtensa Dependent Features 4975 4976* Z80-Dependent:: Z80 Dependent Features 4977 4978* Z8000-Dependent:: Z8000 Dependent Features 4979 4980* Vax-Dependent:: VAX Dependent Features 4981 4982 4983File: as.info, Node: Alpha-Dependent, Next: ARC-Dependent, Up: Machine Dependencies 4984 49858.1 Alpha Dependent Features 4986============================ 4987 4988* Menu: 4989 4990* Alpha Notes:: Notes 4991* Alpha Options:: Options 4992* Alpha Syntax:: Syntax 4993* Alpha Floating Point:: Floating Point 4994* Alpha Directives:: Alpha Machine Directives 4995* Alpha Opcodes:: Opcodes 4996 4997 4998File: as.info, Node: Alpha Notes, Next: Alpha Options, Up: Alpha-Dependent 4999 50008.1.1 Notes 5001----------- 5002 5003The documentation here is primarily for the ELF object format. `as' 5004also supports the ECOFF and EVAX formats, but features specific to 5005these formats are not yet documented. 5006 5007 5008File: as.info, Node: Alpha Options, Next: Alpha Syntax, Prev: Alpha Notes, Up: Alpha-Dependent 5009 50108.1.2 Options 5011------------- 5012 5013`-mCPU' 5014 This option specifies the target processor. If an attempt is made 5015 to assemble an instruction which will not execute on the target 5016 processor, the assembler may either expand the instruction as a 5017 macro or issue an error message. This option is equivalent to the 5018 `.arch' directive. 5019 5020 The following processor names are recognized: `21064', `21064a', 5021 `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a', 5022 `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6', 5023 `ev67', `ev68'. The special name `all' may be used to allow the 5024 assembler to accept instructions valid for any Alpha processor. 5025 5026 In order to support existing practice in OSF/1 with respect to 5027 `.arch', and existing practice within `MILO' (the Linux ARC 5028 bootloader), the numbered processor names (e.g. 21064) enable the 5029 processor-specific PALcode instructions, while the 5030 "electro-vlasic" names (e.g. `ev4') do not. 5031 5032`-mdebug' 5033`-no-mdebug' 5034 Enables or disables the generation of `.mdebug' encapsulation for 5035 stabs directives and procedure descriptors. The default is to 5036 automatically enable `.mdebug' when the first stabs directive is 5037 seen. 5038 5039`-relax' 5040 This option forces all relocations to be put into the object file, 5041 instead of saving space and resolving some relocations at assembly 5042 time. Note that this option does not propagate all symbol 5043 arithmetic into the object file, because not all symbol arithmetic 5044 can be represented. However, the option can still be useful in 5045 specific applications. 5046 5047`-g' 5048 This option is used when the compiler generates debug information. 5049 When `gcc' is using `mips-tfile' to generate debug information for 5050 ECOFF, local labels must be passed through to the object file. 5051 Otherwise this option has no effect. 5052 5053`-GSIZE' 5054 A local common symbol larger than SIZE is placed in `.bss', while 5055 smaller symbols are placed in `.sbss'. 5056 5057`-F' 5058`-32addr' 5059 These options are ignored for backward compatibility. 5060 5061 5062File: as.info, Node: Alpha Syntax, Next: Alpha Floating Point, Prev: Alpha Options, Up: Alpha-Dependent 5063 50648.1.3 Syntax 5065------------ 5066 5067The assembler syntax closely follow the Alpha Reference Manual; 5068assembler directives and general syntax closely follow the OSF/1 and 5069OpenVMS syntax, with a few differences for ELF. 5070 5071* Menu: 5072 5073* Alpha-Chars:: Special Characters 5074* Alpha-Regs:: Register Names 5075* Alpha-Relocs:: Relocations 5076 5077 5078File: as.info, Node: Alpha-Chars, Next: Alpha-Regs, Up: Alpha Syntax 5079 50808.1.3.1 Special Characters 5081.......................... 5082 5083`#' is the line comment character. 5084 5085 `;' can be used instead of a newline to separate statements. 5086 5087 5088File: as.info, Node: Alpha-Regs, Next: Alpha-Relocs, Prev: Alpha-Chars, Up: Alpha Syntax 5089 50908.1.3.2 Register Names 5091...................... 5092 5093The 32 integer registers are referred to as `$N' or `$rN'. In 5094addition, registers 15, 28, 29, and 30 may be referred to by the 5095symbols `$fp', `$at', `$gp', and `$sp' respectively. 5096 5097 The 32 floating-point registers are referred to as `$fN'. 5098 5099 5100File: as.info, Node: Alpha-Relocs, Prev: Alpha-Regs, Up: Alpha Syntax 5101 51028.1.3.3 Relocations 5103................... 5104 5105Some of these relocations are available for ECOFF, but mostly only for 5106ELF. They are modeled after the relocation format introduced in 5107Digital Unix 4.0, but there are additions. 5108 5109 The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the 5110relocation. In some cases NUMBER is used to relate specific 5111instructions. 5112 5113 The relocation is placed at the end of the instruction like so: 5114 5115 ldah $0,a($29) !gprelhigh 5116 lda $0,a($0) !gprellow 5117 ldq $1,b($29) !literal!100 5118 ldl $2,0($1) !lituse_base!100 5119 5120`!literal' 5121`!literal!N' 5122 Used with an `ldq' instruction to load the address of a symbol 5123 from the GOT. 5124 5125 A sequence number N is optional, and if present is used to pair 5126 `lituse' relocations with this `literal' relocation. The `lituse' 5127 relocations are used by the linker to optimize the code based on 5128 the final location of the symbol. 5129 5130 Note that these optimizations are dependent on the data flow of the 5131 program. Therefore, if _any_ `lituse' is paired with a `literal' 5132 relocation, then _all_ uses of the register set by the `literal' 5133 instruction must also be marked with `lituse' relocations. This 5134 is because the original `literal' instruction may be deleted or 5135 transformed into another instruction. 5136 5137 Also note that there may be a one-to-many relationship between 5138 `literal' and `lituse', but not a many-to-one. That is, if there 5139 are two code paths that load up the same address and feed the 5140 value to a single use, then the use may not use a `lituse' 5141 relocation. 5142 5143`!lituse_base!N' 5144 Used with any memory format instruction (e.g. `ldl') to indicate 5145 that the literal is used for an address load. The offset field of 5146 the instruction must be zero. During relaxation, the code may be 5147 altered to use a gp-relative load. 5148 5149`!lituse_jsr!N' 5150 Used with a register branch format instruction (e.g. `jsr') to 5151 indicate that the literal is used for a call. During relaxation, 5152 the code may be altered to use a direct branch (e.g. `bsr'). 5153 5154`!lituse_jsrdirect!N' 5155 Similar to `lituse_jsr', but also that this call cannot be vectored 5156 through a PLT entry. This is useful for functions with special 5157 calling conventions which do not allow the normal call-clobbered 5158 registers to be clobbered. 5159 5160`!lituse_bytoff!N' 5161 Used with a byte mask instruction (e.g. `extbl') to indicate that 5162 only the low 3 bits of the address are relevant. During 5163 relaxation, the code may be altered to use an immediate instead of 5164 a register shift. 5165 5166`!lituse_addr!N' 5167 Used with any other instruction to indicate that the original 5168 address is in fact used, and the original `ldq' instruction may 5169 not be altered or deleted. This is useful in conjunction with 5170 `lituse_jsr' to test whether a weak symbol is defined. 5171 5172 ldq $27,foo($29) !literal!1 5173 beq $27,is_undef !lituse_addr!1 5174 jsr $26,($27),foo !lituse_jsr!1 5175 5176`!lituse_tlsgd!N' 5177 Used with a register branch format instruction to indicate that the 5178 literal is the call to `__tls_get_addr' used to compute the 5179 address of the thread-local storage variable whose descriptor was 5180 loaded with `!tlsgd!N'. 5181 5182`!lituse_tlsldm!N' 5183 Used with a register branch format instruction to indicate that the 5184 literal is the call to `__tls_get_addr' used to compute the 5185 address of the base of the thread-local storage block for the 5186 current module. The descriptor for the module must have been 5187 loaded with `!tlsldm!N'. 5188 5189`!gpdisp!N' 5190 Used with `ldah' and `lda' to load the GP from the current 5191 address, a-la the `ldgp' macro. The source register for the 5192 `ldah' instruction must contain the address of the `ldah' 5193 instruction. There must be exactly one `lda' instruction paired 5194 with the `ldah' instruction, though it may appear anywhere in the 5195 instruction stream. The immediate operands must be zero. 5196 5197 bsr $26,foo 5198 ldah $29,0($26) !gpdisp!1 5199 lda $29,0($29) !gpdisp!1 5200 5201`!gprelhigh' 5202 Used with an `ldah' instruction to add the high 16 bits of a 5203 32-bit displacement from the GP. 5204 5205`!gprellow' 5206 Used with any memory format instruction to add the low 16 bits of a 5207 32-bit displacement from the GP. 5208 5209`!gprel' 5210 Used with any memory format instruction to add a 16-bit 5211 displacement from the GP. 5212 5213`!samegp' 5214 Used with any branch format instruction to skip the GP load at the 5215 target address. The referenced symbol must have the same GP as the 5216 source object file, and it must be declared to either not use `$27' 5217 or perform a standard GP load in the first two instructions via the 5218 `.prologue' directive. 5219 5220`!tlsgd' 5221`!tlsgd!N' 5222 Used with an `lda' instruction to load the address of a TLS 5223 descriptor for a symbol in the GOT. 5224 5225 The sequence number N is optional, and if present it used to pair 5226 the descriptor load with both the `literal' loading the address of 5227 the `__tls_get_addr' function and the `lituse_tlsgd' marking the 5228 call to that function. 5229 5230 For proper relaxation, both the `tlsgd', `literal' and `lituse' 5231 relocations must be in the same extended basic block. That is, 5232 the relocation with the lowest address must be executed first at 5233 runtime. 5234 5235`!tlsldm' 5236`!tlsldm!N' 5237 Used with an `lda' instruction to load the address of a TLS 5238 descriptor for the current module in the GOT. 5239 5240 Similar in other respects to `tlsgd'. 5241 5242`!gotdtprel' 5243 Used with an `ldq' instruction to load the offset of the TLS 5244 symbol within its module's thread-local storage block. Also known 5245 as the dynamic thread pointer offset or dtp-relative offset. 5246 5247`!dtprelhi' 5248`!dtprello' 5249`!dtprel' 5250 Like `gprel' relocations except they compute dtp-relative offsets. 5251 5252`!gottprel' 5253 Used with an `ldq' instruction to load the offset of the TLS 5254 symbol from the thread pointer. Also known as the tp-relative 5255 offset. 5256 5257`!tprelhi' 5258`!tprello' 5259`!tprel' 5260 Like `gprel' relocations except they compute tp-relative offsets. 5261 5262 5263File: as.info, Node: Alpha Floating Point, Next: Alpha Directives, Prev: Alpha Syntax, Up: Alpha-Dependent 5264 52658.1.4 Floating Point 5266-------------------- 5267 5268The Alpha family uses both IEEE and VAX floating-point numbers. 5269 5270 5271File: as.info, Node: Alpha Directives, Next: Alpha Opcodes, Prev: Alpha Floating Point, Up: Alpha-Dependent 5272 52738.1.5 Alpha Assembler Directives 5274-------------------------------- 5275 5276`as' for the Alpha supports many additional directives for 5277compatibility with the native assembler. This section describes them 5278only briefly. 5279 5280 These are the additional directives in `as' for the Alpha: 5281 5282`.arch CPU' 5283 Specifies the target processor. This is equivalent to the `-mCPU' 5284 command-line option. *Note Options: Alpha Options, for a list of 5285 values for CPU. 5286 5287`.ent FUNCTION[, N]' 5288 Mark the beginning of FUNCTION. An optional number may follow for 5289 compatibility with the OSF/1 assembler, but is ignored. When 5290 generating `.mdebug' information, this will create a procedure 5291 descriptor for the function. In ELF, it will mark the symbol as a 5292 function a-la the generic `.type' directive. 5293 5294`.end FUNCTION' 5295 Mark the end of FUNCTION. In ELF, it will set the size of the 5296 symbol a-la the generic `.size' directive. 5297 5298`.mask MASK, OFFSET' 5299 Indicate which of the integer registers are saved in the current 5300 function's stack frame. MASK is interpreted a bit mask in which 5301 bit N set indicates that register N is saved. The registers are 5302 saved in a block located OFFSET bytes from the "canonical frame 5303 address" (CFA) which is the value of the stack pointer on entry to 5304 the function. The registers are saved sequentially, except that 5305 the return address register (normally `$26') is saved first. 5306 5307 This and the other directives that describe the stack frame are 5308 currently only used when generating `.mdebug' information. They 5309 may in the future be used to generate DWARF2 `.debug_frame' unwind 5310 information for hand written assembly. 5311 5312`.fmask MASK, OFFSET' 5313 Indicate which of the floating-point registers are saved in the 5314 current stack frame. The MASK and OFFSET parameters are 5315 interpreted as with `.mask'. 5316 5317`.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]' 5318 Describes the shape of the stack frame. The frame pointer in use 5319 is FRAMEREG; normally this is either `$fp' or `$sp'. The frame 5320 pointer is FRAMEOFFSET bytes below the CFA. The return address is 5321 initially located in RETREG until it is saved as indicated in 5322 `.mask'. For compatibility with OSF/1 an optional ARGOFFSET 5323 parameter is accepted and ignored. It is believed to indicate the 5324 offset from the CFA to the saved argument registers. 5325 5326`.prologue N' 5327 Indicate that the stack frame is set up and all registers have been 5328 spilled. The argument N indicates whether and how the function 5329 uses the incoming "procedure vector" (the address of the called 5330 function) in `$27'. 0 indicates that `$27' is not used; 1 5331 indicates that the first two instructions of the function use `$27' 5332 to perform a load of the GP register; 2 indicates that `$27' is 5333 used in some non-standard way and so the linker cannot elide the 5334 load of the procedure vector during relaxation. 5335 5336`.usepv FUNCTION, WHICH' 5337 Used to indicate the use of the `$27' register, similar to 5338 `.prologue', but without the other semantics of needing to be 5339 inside an open `.ent'/`.end' block. 5340 5341 The WHICH argument should be either `no', indicating that `$27' is 5342 not used, or `std', indicating that the first two instructions of 5343 the function perform a GP load. 5344 5345 One might use this directive instead of `.prologue' if you are 5346 also using dwarf2 CFI directives. 5347 5348`.gprel32 EXPRESSION' 5349 Computes the difference between the address in EXPRESSION and the 5350 GP for the current object file, and stores it in 4 bytes. In 5351 addition to being smaller than a full 8 byte address, this also 5352 does not require a dynamic relocation when used in a shared 5353 library. 5354 5355`.t_floating EXPRESSION' 5356 Stores EXPRESSION as an IEEE double precision value. 5357 5358`.s_floating EXPRESSION' 5359 Stores EXPRESSION as an IEEE single precision value. 5360 5361`.f_floating EXPRESSION' 5362 Stores EXPRESSION as a VAX F format value. 5363 5364`.g_floating EXPRESSION' 5365 Stores EXPRESSION as a VAX G format value. 5366 5367`.d_floating EXPRESSION' 5368 Stores EXPRESSION as a VAX D format value. 5369 5370`.set FEATURE' 5371 Enables or disables various assembler features. Using the positive 5372 name of the feature enables while using `noFEATURE' disables. 5373 5374 `at' 5375 Indicates that macro expansions may clobber the "assembler 5376 temporary" (`$at' or `$28') register. Some macros may not be 5377 expanded without this and will generate an error message if 5378 `noat' is in effect. When `at' is in effect, a warning will 5379 be generated if `$at' is used by the programmer. 5380 5381 `macro' 5382 Enables the expansion of macro instructions. Note that 5383 variants of real instructions, such as `br label' vs `br 5384 $31,label' are considered alternate forms and not macros. 5385 5386 `move' 5387 `reorder' 5388 `volatile' 5389 These control whether and how the assembler may re-order 5390 instructions. Accepted for compatibility with the OSF/1 5391 assembler, but `as' does not do instruction scheduling, so 5392 these features are ignored. 5393 5394 The following directives are recognized for compatibility with the 5395OSF/1 assembler but are ignored. 5396 5397 .proc .aproc 5398 .reguse .livereg 5399 .option .aent 5400 .ugen .eflag 5401 .alias .noalias 5402 5403 5404File: as.info, Node: Alpha Opcodes, Prev: Alpha Directives, Up: Alpha-Dependent 5405 54068.1.6 Opcodes 5407------------- 5408 5409For detailed information on the Alpha machine instruction set, see the 5410Alpha Architecture Handbook 5411(ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf). 5412 5413 5414File: as.info, Node: ARC-Dependent, Next: ARM-Dependent, Prev: Alpha-Dependent, Up: Machine Dependencies 5415 54168.2 ARC Dependent Features 5417========================== 5418 5419* Menu: 5420 5421* ARC Options:: Options 5422* ARC Syntax:: Syntax 5423* ARC Floating Point:: Floating Point 5424* ARC Directives:: ARC Machine Directives 5425* ARC Opcodes:: Opcodes 5426 5427 5428File: as.info, Node: ARC Options, Next: ARC Syntax, Up: ARC-Dependent 5429 54308.2.1 Options 5431------------- 5432 5433`-marc[5|6|7|8]' 5434 This option selects the core processor variant. Using `-marc' is 5435 the same as `-marc6', which is also the default. 5436 5437 `arc5' 5438 Base instruction set. 5439 5440 `arc6' 5441 Jump-and-link (jl) instruction. No requirement of an 5442 instruction between setting flags and conditional jump. For 5443 example: 5444 5445 mov.f r0,r1 5446 beq foo 5447 5448 `arc7' 5449 Break (brk) and sleep (sleep) instructions. 5450 5451 `arc8' 5452 Software interrupt (swi) instruction. 5453 5454 5455 Note: the `.option' directive can to be used to select a core 5456 variant from within assembly code. 5457 5458`-EB' 5459 This option specifies that the output generated by the assembler 5460 should be marked as being encoded for a big-endian processor. 5461 5462`-EL' 5463 This option specifies that the output generated by the assembler 5464 should be marked as being encoded for a little-endian processor - 5465 this is the default. 5466 5467 5468 5469File: as.info, Node: ARC Syntax, Next: ARC Floating Point, Prev: ARC Options, Up: ARC-Dependent 5470 54718.2.2 Syntax 5472------------ 5473 5474* Menu: 5475 5476* ARC-Chars:: Special Characters 5477* ARC-Regs:: Register Names 5478 5479 5480File: as.info, Node: ARC-Chars, Next: ARC-Regs, Up: ARC Syntax 5481 54828.2.2.1 Special Characters 5483.......................... 5484 5485*TODO* 5486 5487 5488File: as.info, Node: ARC-Regs, Prev: ARC-Chars, Up: ARC Syntax 5489 54908.2.2.2 Register Names 5491...................... 5492 5493*TODO* 5494 5495 5496File: as.info, Node: ARC Floating Point, Next: ARC Directives, Prev: ARC Syntax, Up: ARC-Dependent 5497 54988.2.3 Floating Point 5499-------------------- 5500 5501The ARC core does not currently have hardware floating point support. 5502Software floating point support is provided by `GCC' and uses IEEE 5503floating-point numbers. 5504 5505 5506File: as.info, Node: ARC Directives, Next: ARC Opcodes, Prev: ARC Floating Point, Up: ARC-Dependent 5507 55088.2.4 ARC Machine Directives 5509---------------------------- 5510 5511The ARC version of `as' supports the following additional machine 5512directives: 5513 5514`.2byte EXPRESSIONS' 5515 *TODO* 5516 5517`.3byte EXPRESSIONS' 5518 *TODO* 5519 5520`.4byte EXPRESSIONS' 5521 *TODO* 5522 5523`.extAuxRegister NAME,ADDRESS,MODE' 5524 The ARCtangent A4 has extensible auxiliary register space. The 5525 auxiliary registers can be defined in the assembler source code by 5526 using this directive. The first parameter is the NAME of the new 5527 auxiallry register. The second parameter is the ADDRESS of the 5528 register in the auxiliary register memory map for the variant of 5529 the ARC. The third parameter specifies the MODE in which the 5530 register can be operated is and it can be one of: 5531 5532 `r (readonly)' 5533 5534 `w (write only)' 5535 5536 `r|w (read or write)' 5537 5538 For example: 5539 5540 .extAuxRegister mulhi,0x12,w 5541 5542 This specifies an extension auxiliary register called _mulhi_ 5543 which is at address 0x12 in the memory space and which is only 5544 writable. 5545 5546`.extCondCode SUFFIX,VALUE' 5547 The condition codes on the ARCtangent A4 are extensible and can be 5548 specified by means of this assembler directive. They are specified 5549 by the suffix and the value for the condition code. They can be 5550 used to specify extra condition codes with any values. For 5551 example: 5552 5553 .extCondCode is_busy,0x14 5554 5555 add.is_busy r1,r2,r3 5556 bis_busy _main 5557 5558`.extCoreRegister NAME,REGNUM,MODE,SHORTCUT' 5559 Specifies an extension core register NAME for the application. 5560 This allows a register NAME with a valid REGNUM between 0 and 60, 5561 with the following as valid values for MODE 5562 5563 `_r_ (readonly)' 5564 5565 `_w_ (write only)' 5566 5567 `_r|w_ (read or write)' 5568 5569 The other parameter gives a description of the register having a 5570 SHORTCUT in the pipeline. The valid values are: 5571 5572 `can_shortcut' 5573 5574 `cannot_shortcut' 5575 5576 For example: 5577 5578 .extCoreRegister mlo,57,r,can_shortcut 5579 5580 This defines an extension core register mlo with the value 57 which 5581 can shortcut the pipeline. 5582 5583`.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS' 5584 The ARCtangent A4 allows the user to specify extension 5585 instructions. The extension instructions are not macros. The 5586 assembler creates encodings for use of these instructions 5587 according to the specification by the user. The parameters are: 5588 5589 *NAME 5590 Name of the extension instruction 5591 5592 *OPCODE 5593 Opcode to be used. (Bits 27:31 in the encoding). Valid values 5594 0x10-0x1f or 0x03 5595 5596 *SUBOPCODE 5597 Subopcode to be used. Valid values are from 0x09-0x3f. 5598 However the correct value also depends on SYNTAXCLASS 5599 5600 *SUFFIXCLASS 5601 Determines the kinds of suffixes to be allowed. Valid values 5602 are `SUFFIX_NONE', `SUFFIX_COND', `SUFFIX_FLAG' which 5603 indicates the absence or presence of conditional suffixes and 5604 flag setting by the extension instruction. It is also 5605 possible to specify that an instruction sets the flags and is 5606 conditional by using `SUFFIX_CODE' | `SUFFIX_FLAG'. 5607 5608 *SYNTAXCLASS 5609 Determines the syntax class for the instruction. It can have 5610 the following values: 5611 5612 ``SYNTAX_2OP':' 5613 2 Operand Instruction 5614 5615 ``SYNTAX_3OP':' 5616 3 Operand Instruction 5617 5618 In addition there could be modifiers for the syntax class as 5619 described below: 5620 5621 Syntax Class Modifiers are: 5622 5623 - `OP1_MUST_BE_IMM': Modifies syntax class SYNTAX_3OP, 5624 specifying that the first operand of a three-operand 5625 instruction must be an immediate (i.e. the result is 5626 discarded). OP1_MUST_BE_IMM is used by bitwise ORing it 5627 with SYNTAX_3OP as given in the example below. This 5628 could usually be used to set the flags using specific 5629 instructions and not retain results. 5630 5631 - `OP1_IMM_IMPLIED': Modifies syntax class SYNTAX_20P, it 5632 specifies that there is an implied immediate destination 5633 operand which does not appear in the syntax. For 5634 example, if the source code contains an instruction like: 5635 5636 inst r1,r2 5637 5638 it really means that the first argument is an implied 5639 immediate (that is, the result is discarded). This is 5640 the same as though the source code were: inst 0,r1,r2. 5641 You use OP1_IMM_IMPLIED by bitwise ORing it with 5642 SYNTAX_20P. 5643 5644 5645 For example, defining 64-bit multiplier with immediate operands: 5646 5647 .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG , 5648 SYNTAX_3OP|OP1_MUST_BE_IMM 5649 5650 The above specifies an extension instruction called mp64 which has 5651 3 operands, sets the flags, can be used with a condition code, for 5652 which the first operand is an immediate. (Equivalent to 5653 discarding the result of the operation). 5654 5655 .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED 5656 5657 This describes a 2 operand instruction with an implicit first 5658 immediate operand. The result of this operation would be 5659 discarded. 5660 5661`.half EXPRESSIONS' 5662 *TODO* 5663 5664`.long EXPRESSIONS' 5665 *TODO* 5666 5667`.option ARC|ARC5|ARC6|ARC7|ARC8' 5668 The `.option' directive must be followed by the desired core 5669 version. Again `arc' is an alias for `arc6'. 5670 5671 Note: the `.option' directive overrides the command line option 5672 `-marc'; a warning is emitted when the version is not consistent 5673 between the two - even for the implicit default core version 5674 (arc6). 5675 5676`.short EXPRESSIONS' 5677 *TODO* 5678 5679`.word EXPRESSIONS' 5680 *TODO* 5681 5682 5683 5684File: as.info, Node: ARC Opcodes, Prev: ARC Directives, Up: ARC-Dependent 5685 56868.2.5 Opcodes 5687------------- 5688 5689For information on the ARC instruction set, see `ARC Programmers 5690Reference Manual', ARC International (www.arc.com) 5691 5692 5693File: as.info, Node: ARM-Dependent, Next: BFIN-Dependent, Prev: ARC-Dependent, Up: Machine Dependencies 5694 56958.3 ARM Dependent Features 5696========================== 5697 5698* Menu: 5699 5700* ARM Options:: Options 5701* ARM Syntax:: Syntax 5702* ARM Floating Point:: Floating Point 5703* ARM Directives:: ARM Machine Directives 5704* ARM Opcodes:: Opcodes 5705* ARM Mapping Symbols:: Mapping Symbols 5706 5707 5708File: as.info, Node: ARM Options, Next: ARM Syntax, Up: ARM-Dependent 5709 57108.3.1 Options 5711------------- 5712 5713`-mcpu=PROCESSOR[+EXTENSION...]' 5714 This option specifies the target processor. The assembler will 5715 issue an error message if an attempt is made to assemble an 5716 instruction which will not execute on the target processor. The 5717 following processor names are recognized: `arm1', `arm2', `arm250', 5718 `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7', 5719 `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700', 5720 `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t', 5721 `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi', 5722 `arm7tdmi-s', `arm8', `arm810', `strongarm', `strongarm1', 5723 `strongarm110', `strongarm1100', `strongarm1110', `arm9', `arm920', 5724 `arm920t', `arm922t', `arm940t', `arm9tdmi', `arm9e', `arm926e', 5725 `arm926ej-s', `arm946e-r0', `arm946e', `arm946e-s', `arm966e-r0', 5726 `arm966e', `arm966e-s', `arm968e-s', `arm10t', `arm10tdmi', 5727 `arm10e', `arm1020', `arm1020t', `arm1020e', `arm1022e', 5728 `arm1026ej-s', `arm1136j-s', `arm1136jf-s', `arm1156t2-s', 5729 `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s', `mpcore', 5730 `mpcorenovfp', `cortex-a8', `cortex-r4', `cortex-m3', `ep9312' 5731 (ARM920 with Cirrus Maverick coprocessor), `i80200' (Intel XScale 5732 processor) `iwmmxt' (Intel(r) XScale processor with Wireless 5733 MMX(tm) technology coprocessor) and `xscale'. The special name 5734 `all' may be used to allow the assembler to accept instructions 5735 valid for any ARM processor. 5736 5737 In addition to the basic instruction set, the assembler can be 5738 told to accept various extension mnemonics that extend the 5739 processor using the co-processor instruction space. For example, 5740 `-mcpu=arm920+maverick' is equivalent to specifying 5741 `-mcpu=ep9312'. The following extensions are currently supported: 5742 `+maverick' `+iwmmxt' and `+xscale'. 5743 5744`-march=ARCHITECTURE[+EXTENSION...]' 5745 This option specifies the target architecture. The assembler will 5746 issue an error message if an attempt is made to assemble an 5747 instruction which will not execute on the target architecture. 5748 The following architecture names are recognized: `armv1', `armv2', 5749 `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm', 5750 `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te', 5751 `armv5texp', `armv6', `armv6j', `armv6k', `armv6z', `armv6zk', 5752 `armv7', `armv7a', `armv7r', `armv7m', `iwmmxt' and `xscale'. If 5753 both `-mcpu' and `-march' are specified, the assembler will use 5754 the setting for `-mcpu'. 5755 5756 The architecture option can be extended with the same instruction 5757 set extension options as the `-mcpu' option. 5758 5759`-mfpu=FLOATING-POINT-FORMAT' 5760 This option specifies the floating point format to assemble for. 5761 The assembler will issue an error message if an attempt is made to 5762 assemble an instruction which will not execute on the target 5763 floating point unit. The following format options are recognized: 5764 `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11', 5765 `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0', 5766 `vfp9', `vfpxd', `arm1020t', `arm1020e', `arm1136jf-s' and 5767 `maverick'. 5768 5769 In addition to determining which instructions are assembled, this 5770 option also affects the way in which the `.double' assembler 5771 directive behaves when assembling little-endian code. 5772 5773 The default is dependent on the processor selected. For 5774 Architecture 5 or later, the default is to assembler for VFP 5775 instructions; for earlier architectures the default is to assemble 5776 for FPA instructions. 5777 5778`-mthumb' 5779 This option specifies that the assembler should start assembling 5780 Thumb instructions; that is, it should behave as though the file 5781 starts with a `.code 16' directive. 5782 5783`-mthumb-interwork' 5784 This option specifies that the output generated by the assembler 5785 should be marked as supporting interworking. 5786 5787`-mapcs `[26|32]'' 5788 This option specifies that the output generated by the assembler 5789 should be marked as supporting the indicated version of the Arm 5790 Procedure. Calling Standard. 5791 5792`-matpcs' 5793 This option specifies that the output generated by the assembler 5794 should be marked as supporting the Arm/Thumb Procedure Calling 5795 Standard. If enabled this option will cause the assembler to 5796 create an empty debugging section in the object file called 5797 .arm.atpcs. Debuggers can use this to determine the ABI being 5798 used by. 5799 5800`-mapcs-float' 5801 This indicates the floating point variant of the APCS should be 5802 used. In this variant floating point arguments are passed in FP 5803 registers rather than integer registers. 5804 5805`-mapcs-reentrant' 5806 This indicates that the reentrant variant of the APCS should be 5807 used. This variant supports position independent code. 5808 5809`-mfloat-abi=ABI' 5810 This option specifies that the output generated by the assembler 5811 should be marked as using specified floating point ABI. The 5812 following values are recognized: `soft', `softfp' and `hard'. 5813 5814`-meabi=VER' 5815 This option specifies which EABI version the produced object files 5816 should conform to. The following values are recognised: `gnu', `4' 5817 and `5'. 5818 5819`-EB' 5820 This option specifies that the output generated by the assembler 5821 should be marked as being encoded for a big-endian processor. 5822 5823`-EL' 5824 This option specifies that the output generated by the assembler 5825 should be marked as being encoded for a little-endian processor. 5826 5827`-k' 5828 This option specifies that the output of the assembler should be 5829 marked as position-independent code (PIC). 5830 5831 5832 5833File: as.info, Node: ARM Syntax, Next: ARM Floating Point, Prev: ARM Options, Up: ARM-Dependent 5834 58358.3.2 Syntax 5836------------ 5837 5838* Menu: 5839 5840* ARM-Chars:: Special Characters 5841* ARM-Regs:: Register Names 5842 5843 5844File: as.info, Node: ARM-Chars, Next: ARM-Regs, Up: ARM Syntax 5845 58468.3.2.1 Special Characters 5847.......................... 5848 5849The presence of a `@' on a line indicates the start of a comment that 5850extends to the end of the current line. If a `#' appears as the first 5851character of a line, the whole line is treated as a comment. 5852 5853 The `;' character can be used instead of a newline to separate 5854statements. 5855 5856 Either `#' or `$' can be used to indicate immediate operands. 5857 5858 *TODO* Explain about /data modifier on symbols. 5859 5860 5861File: as.info, Node: ARM-Regs, Prev: ARM-Chars, Up: ARM Syntax 5862 58638.3.2.2 Register Names 5864...................... 5865 5866*TODO* Explain about ARM register naming, and the predefined names. 5867 5868 5869File: as.info, Node: ARM Floating Point, Next: ARM Directives, Prev: ARM Syntax, Up: ARM-Dependent 5870 58718.3.3 Floating Point 5872-------------------- 5873 5874The ARM family uses IEEE floating-point numbers. 5875 5876 5877File: as.info, Node: ARM Directives, Next: ARM Opcodes, Prev: ARM Floating Point, Up: ARM-Dependent 5878 58798.3.4 ARM Machine Directives 5880---------------------------- 5881 5882`.align EXPRESSION [, EXPRESSION]' 5883 This is the generic .ALIGN directive. For the ARM however if the 5884 first argument is zero (ie no alignment is needed) the assembler 5885 will behave as if the argument had been 2 (ie pad to the next four 5886 byte boundary). This is for compatibility with ARM's own 5887 assembler. 5888 5889`NAME .req REGISTER NAME' 5890 This creates an alias for REGISTER NAME called NAME. For example: 5891 5892 foo .req r0 5893 5894`.unreq ALIAS-NAME' 5895 This undefines a register alias which was previously defined using 5896 the `req' directive. For example: 5897 5898 foo .req r0 5899 .unreq foo 5900 5901 An error occurs if the name is undefined. Note - this pseudo op 5902 can be used to delete builtin in register name aliases (eg 'r0'). 5903 This should only be done if it is really necessary. 5904 5905`.code `[16|32]'' 5906 This directive selects the instruction set being generated. The 5907 value 16 selects Thumb, with the value 32 selecting ARM. 5908 5909`.thumb' 5910 This performs the same action as .CODE 16. 5911 5912`.arm' 5913 This performs the same action as .CODE 32. 5914 5915`.force_thumb' 5916 This directive forces the selection of Thumb instructions, even if 5917 the target processor does not support those instructions 5918 5919`.thumb_func' 5920 This directive specifies that the following symbol is the name of a 5921 Thumb encoded function. This information is necessary in order to 5922 allow the assembler and linker to generate correct code for 5923 interworking between Arm and Thumb instructions and should be used 5924 even if interworking is not going to be performed. The presence 5925 of this directive also implies `.thumb' 5926 5927`.thumb_set' 5928 This performs the equivalent of a `.set' directive in that it 5929 creates a symbol which is an alias for another symbol (possibly 5930 not yet defined). This directive also has the added property in 5931 that it marks the aliased symbol as being a thumb function entry 5932 point, in the same way that the `.thumb_func' directive does. 5933 5934`.ltorg' 5935 This directive causes the current contents of the literal pool to 5936 be dumped into the current section (which is assumed to be the 5937 .text section) at the current location (aligned to a word 5938 boundary). `GAS' maintains a separate literal pool for each 5939 section and each sub-section. The `.ltorg' directive will only 5940 affect the literal pool of the current section and sub-section. 5941 At the end of assembly all remaining, un-empty literal pools will 5942 automatically be dumped. 5943 5944 Note - older versions of `GAS' would dump the current literal pool 5945 any time a section change occurred. This is no longer done, since 5946 it prevents accurate control of the placement of literal pools. 5947 5948`.pool' 5949 This is a synonym for .ltorg. 5950 5951`.unwind_fnstart' 5952 Marks the start of a function with an unwind table entry. 5953 5954`.unwind_fnend' 5955 Marks the end of a function with an unwind table entry. The 5956 unwind index table entry is created when this directive is 5957 processed. 5958 5959 If no personality routine has been specified then standard 5960 personality routine 0 or 1 will be used, depending on the number 5961 of unwind opcodes required. 5962 5963`.cantunwind' 5964 Prevents unwinding through the current function. No personality 5965 routine or exception table data is required or permitted. 5966 5967`.personality NAME' 5968 Sets the personality routine for the current function to NAME. 5969 5970`.personalityindex INDEX' 5971 Sets the personality routine for the current function to the EABI 5972 standard routine number INDEX 5973 5974`.handlerdata' 5975 Marks the end of the current function, and the start of the 5976 exception table entry for that function. Anything between this 5977 directive and the `.fnend' directive will be added to the 5978 exception table entry. 5979 5980 Must be preceded by a `.personality' or `.personalityindex' 5981 directive. 5982 5983`.save REGLIST' 5984 Generate unwinder annotations to restore the registers in REGLIST. 5985 The format of REGLIST is the same as the corresponding 5986 store-multiple instruction. 5987 5988 _core registers_ 5989 .save {r4, r5, r6, lr} 5990 stmfd sp!, {r4, r5, r6, lr} 5991 _FPA registers_ 5992 .save f4, 2 5993 sfmfd f4, 2, [sp]! 5994 _VFP registers_ 5995 .save {d8, d9, d10} 5996 fstmdf sp!, {d8, d9, d10} 5997 _iWMMXt registers_ 5998 .save {wr10, wr11} 5999 wstrd wr11, [sp, #-8]! 6000 wstrd wr10, [sp, #-8]! 6001 or 6002 .save wr11 6003 wstrd wr11, [sp, #-8]! 6004 .save wr10 6005 wstrd wr10, [sp, #-8]! 6006 6007`.pad #COUNT' 6008 Generate unwinder annotations for a stack adjustment of COUNT 6009 bytes. A positive value indicates the function prologue allocated 6010 stack space by decrementing the stack pointer. 6011 6012`.movsp REG' 6013 Tell the unwinder that REG contains the current stack pointer. 6014 6015`.setfp FPREG, SPREG [, #OFFSET]' 6016 Make all unwinder annotations relaive to a frame pointer. Without 6017 this the unwinder will use offsets from the stack pointer. 6018 6019 The syntax of this directive is the same as the `sub' or `mov' 6020 instruction used to set the frame pointer. SPREG must be either 6021 `sp' or mentioned in a previous `.movsp' directive. 6022 6023 .movsp ip 6024 mov ip, sp 6025 ... 6026 .setfp fp, ip, #4 6027 sub fp, ip, #4 6028 6029`.raw OFFSET, BYTE1, ...' 6030 Insert one of more arbitary unwind opcode bytes, which are known 6031 to adjust the stack pointer by OFFSET bytes. 6032 6033 For example `.unwind_raw 4, 0xb1, 0x01' is equivalent to `.save 6034 {r0}' 6035 6036`.cpu NAME' 6037 Select the target processor. Valid values for NAME are the same as 6038 for the `-mcpu' commandline option. 6039 6040`.arch NAME' 6041 Select the target architecture. Valid values for NAME are the 6042 same as for the `-march' commandline option. 6043 6044`.fpu NAME' 6045 Select the floating point unit to assemble for. Valid values for 6046 NAME are the same as for the `-mfpu' commandline option. 6047 6048`.eabi_attribute TAG, VALUE' 6049 Set the EABI object attribute number TAG to VALUE. The value is 6050 either a `number', `"string"', or `number, "string"' depending on 6051 the tag. 6052 6053 6054 6055File: as.info, Node: ARM Opcodes, Next: ARM Mapping Symbols, Prev: ARM Directives, Up: ARM-Dependent 6056 60578.3.5 Opcodes 6058------------- 6059 6060`as' implements all the standard ARM opcodes. It also implements 6061several pseudo opcodes, including several synthetic load instructions. 6062 6063`NOP' 6064 nop 6065 6066 This pseudo op will always evaluate to a legal ARM instruction 6067 that does nothing. Currently it will evaluate to MOV r0, r0. 6068 6069`LDR' 6070 ldr <register> , = <expression> 6071 6072 If expression evaluates to a numeric constant then a MOV or MVN 6073 instruction will be used in place of the LDR instruction, if the 6074 constant can be generated by either of these instructions. 6075 Otherwise the constant will be placed into the nearest literal 6076 pool (if it not already there) and a PC relative LDR instruction 6077 will be generated. 6078 6079`ADR' 6080 adr <register> <label> 6081 6082 This instruction will load the address of LABEL into the indicated 6083 register. The instruction will evaluate to a PC relative ADD or 6084 SUB instruction depending upon where the label is located. If the 6085 label is out of range, or if it is not defined in the same file 6086 (and section) as the ADR instruction, then an error will be 6087 generated. This instruction will not make use of the literal pool. 6088 6089`ADRL' 6090 adrl <register> <label> 6091 6092 This instruction will load the address of LABEL into the indicated 6093 register. The instruction will evaluate to one or two PC relative 6094 ADD or SUB instructions depending upon where the label is located. 6095 If a second instruction is not needed a NOP instruction will be 6096 generated in its place, so that this instruction is always 8 bytes 6097 long. 6098 6099 If the label is out of range, or if it is not defined in the same 6100 file (and section) as the ADRL instruction, then an error will be 6101 generated. This instruction will not make use of the literal pool. 6102 6103 6104 For information on the ARM or Thumb instruction sets, see `ARM 6105Software Development Toolkit Reference Manual', Advanced RISC Machines 6106Ltd. 6107 6108 6109File: as.info, Node: ARM Mapping Symbols, Prev: ARM Opcodes, Up: ARM-Dependent 6110 61118.3.6 Mapping Symbols 6112--------------------- 6113 6114The ARM ELF specification requires that special symbols be inserted 6115into object files to mark certain features: 6116 6117`$a' 6118 At the start of a region of code containing ARM instructions. 6119 6120`$t' 6121 At the start of a region of code containing THUMB instructions. 6122 6123`$d' 6124 At the start of a region of data. 6125 6126 6127 The assembler will automatically insert these symbols for you - there 6128is no need to code them yourself. Support for tagging symbols ($b, $f, 6129$p and $m) which is also mentioned in the current ARM ELF specification 6130is not implemented. This is because they have been dropped from the 6131new EABI and so tools cannot rely upon their presence. 6132 6133 6134File: as.info, Node: BFIN-Dependent, Next: CRIS-Dependent, Prev: ARM-Dependent, Up: Machine Dependencies 6135 61368.4 Blackfin Dependent Features 6137=============================== 6138 6139* Menu: 6140 6141* BFIN Syntax:: BFIN Syntax 6142* BFIN Directives:: BFIN Directives 6143 6144 6145File: as.info, Node: BFIN Syntax, Next: BFIN Directives, Up: BFIN-Dependent 6146 61478.4.1 Syntax 6148------------ 6149 6150`Special Characters' 6151 Assembler input is free format and may appear anywhere on the line. 6152 One instruction may extend across multiple lines or more than one 6153 instruction may appear on the same line. White space (space, tab, 6154 comments or newline) may appear anywhere between tokens. A token 6155 must not have embedded spaces. Tokens include numbers, register 6156 names, keywords, user identifiers, and also some multicharacter 6157 special symbols like "+=", "/*" or "||". 6158 6159`Instruction Delimiting' 6160 A semicolon must terminate every instruction. Sometimes a complete 6161 instruction will consist of more than one operation. There are two 6162 cases where this occurs. The first is when two general operations 6163 are combined. Normally a comma separates the different parts, as 6164 in 6165 6166 a0= r3.h * r2.l, a1 = r3.l * r2.h ; 6167 6168 The second case occurs when a general instruction is combined with 6169 one or two memory references for joint issue. The latter portions 6170 are set off by a "||" token. 6171 6172 a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++]; 6173 6174`Register Names' 6175 The assembler treats register names and instruction keywords in a 6176 case insensitive manner. User identifiers are case sensitive. 6177 Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the 6178 assembler. 6179 6180 Register names are reserved and may not be used as program 6181 identifiers. 6182 6183 Some operations (such as "Move Register") require a register pair. 6184 Register pairs are always data registers and are denoted using a 6185 colon, eg., R3:2. The larger number must be written firsts. Note 6186 that the hardware only supports odd-even pairs, eg., R7:6, R5:4, 6187 R3:2, and R1:0. 6188 6189 Some instructions (such as -SP (Push Multiple)) require a group of 6190 adjacent registers. Adjacent registers are denoted in the syntax 6191 by the range enclosed in parentheses and separated by a colon, 6192 eg., (R7:3). Again, the larger number appears first. 6193 6194 Portions of a particular register may be individually specified. 6195 This is written with a dot (".") following the register name and 6196 then a letter denoting the desired portion. For 32-bit registers, 6197 ".H" denotes the most significant ("High") portion. ".L" denotes 6198 the least-significant portion. The subdivisions of the 40-bit 6199 registers are described later. 6200 6201`Accumulators' 6202 The set of 40-bit registers A1 and A0 that normally contain data 6203 that is being manipulated. Each accumulator can be accessed in 6204 four ways. 6205 6206 `one 40-bit register' 6207 The register will be referred to as A1 or A0. 6208 6209 `one 32-bit register' 6210 The registers are designated as A1.W or A0.W. 6211 6212 `two 16-bit registers' 6213 The registers are designated as A1.H, A1.L, A0.H or A0.L. 6214 6215 `one 8-bit register' 6216 The registers are designated as A1.X or A0.X for the bits that 6217 extend beyond bit 31. 6218 6219`Data Registers' 6220 The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7) 6221 that normally contain data for manipulation. These are 6222 abbreviated as D-register or Dreg. Data registers can be accessed 6223 as 32-bit registers or as two independent 16-bit registers. The 6224 least significant 16 bits of each register is called the "low" 6225 half and is desginated with ".L" following the register name. The 6226 most significant 16 bits are called the "high" half and is 6227 designated with ".H". following the name. 6228 6229 R7.L, r2.h, r4.L, R0.H 6230 6231`Pointer Registers' 6232 The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP) 6233 that normally contain byte addresses of data structures. These are 6234 abbreviated as P-register or Preg. 6235 6236 p2, p5, fp, sp 6237 6238`Stack Pointer SP' 6239 The stack pointer contains the 32-bit address of the last occupied 6240 byte location in the stack. The stack grows by decrementing the 6241 stack pointer. 6242 6243`Frame Pointer FP' 6244 The frame pointer contains the 32-bit address of the previous frame 6245 pointer in the stack. It is located at the top of a frame. 6246 6247`Loop Top' 6248 LT0 and LT1. These registers contain the 32-bit address of the 6249 top of a zero overhead loop. 6250 6251`Loop Count' 6252 LC0 and LC1. These registers contain the 32-bit counter of the 6253 zero overhead loop executions. 6254 6255`Loop Bottom' 6256 LB0 and LB1. These registers contain the 32-bit address of the 6257 bottom of a zero overhead loop. 6258 6259`Index Registers' 6260 The set of 32-bit registers (I0, I1, I2, I3) that normally contain 6261 byte addresses of data structures. Abbreviated I-register or Ireg. 6262 6263`Modify Registers' 6264 The set of 32-bit registers (M0, M1, M2, M3) that normally contain 6265 offset values that are added and subracted to one of the index 6266 registers. Abbreviated as Mreg. 6267 6268`Length Registers' 6269 The set of 32-bit registers (L0, L1, L2, L3) that normally contain 6270 the length in bytes of the circular buffer. Abbreviated as Lreg. 6271 Clear the Lreg to disable circular addressing for the 6272 corresponding Ireg. 6273 6274`Base Registers' 6275 The set of 32-bit registers (B0, B1, B2, B3) that normally contain 6276 the base address in bytes of the circular buffer. Abbreviated as 6277 Breg. 6278 6279`Floating Point' 6280 The Blackfin family has no hardware floating point but the .float 6281 directive generates ieee floating point numbers for use with 6282 software floating point libraries. 6283 6284`Blackfin Opcodes' 6285 For detailed information on the Blackfin machine instruction set, 6286 see the Blackfin(r) Processor Instruction Set Reference. 6287 6288 6289 6290File: as.info, Node: BFIN Directives, Prev: BFIN Syntax, Up: BFIN-Dependent 6291 62928.4.2 Directives 6293---------------- 6294 6295The following directives are provided for compatibility with the VDSP 6296assembler. 6297 6298`.byte2' 6299 Initializes a four byte data object. 6300 6301`.byte4' 6302 Initializes a two byte data object. 6303 6304`.db' 6305 TBD 6306 6307`.dd' 6308 TBD 6309 6310`.dw' 6311 TBD 6312 6313`.var' 6314 Define and initialize a 32 bit data object. 6315 6316 6317File: as.info, Node: CRIS-Dependent, Next: D10V-Dependent, Prev: BFIN-Dependent, Up: Machine Dependencies 6318 63198.5 CRIS Dependent Features 6320=========================== 6321 6322* Menu: 6323 6324* CRIS-Opts:: Command-line Options 6325* CRIS-Expand:: Instruction expansion 6326* CRIS-Symbols:: Symbols 6327* CRIS-Syntax:: Syntax 6328 6329 6330File: as.info, Node: CRIS-Opts, Next: CRIS-Expand, Up: CRIS-Dependent 6331 63328.5.1 Command-line Options 6333-------------------------- 6334 6335The CRIS version of `as' has these machine-dependent command-line 6336options. 6337 6338 The format of the generated object files can be either ELF or a.out, 6339specified by the command-line options `--emulation=crisaout' and 6340`--emulation=criself'. The default is ELF (criself), unless `as' has 6341been configured specifically for a.out by using the configuration name 6342`cris-axis-aout'. 6343 6344 There are two different link-incompatible ELF object file variants 6345for CRIS, for use in environments where symbols are expected to be 6346prefixed by a leading `_' character and for environments without such a 6347symbol prefix. The variant used for GNU/Linux port has no symbol 6348prefix. Which variant to produce is specified by either of the options 6349`--underscore' and `--no-underscore'. The default is `--underscore'. 6350Since symbols in CRIS a.out objects are expected to have a `_' prefix, 6351specifying `--no-underscore' when generating a.out objects is an error. 6352Besides the object format difference, the effect of this option is to 6353parse register names differently (*note crisnous::). The 6354`--no-underscore' option makes a `$' register prefix mandatory. 6355 6356 The option `--pic' must be passed to `as' in order to recognize the 6357symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note 6358crispic::). This will also affect expansion of instructions. The 6359expansion with `--pic' will use PC-relative rather than (slightly 6360faster) absolute addresses in those expansions. 6361 6362 The option `--march=ARCHITECTURE' specifies the recognized 6363instruction set and recognized register names. It also controls the 6364architecture type of the object file. Valid values for ARCHITECTURE 6365are: 6366`v0_v10' 6367 All instructions and register names for any architecture variant 6368 in the set v0...v10 are recognized. This is the default if the 6369 target is configured as cris-*. 6370 6371`v10' 6372 Only instructions and register names for CRIS v10 (as found in 6373 ETRAX 100 LX) are recognized. This is the default if the target 6374 is configured as crisv10-*. 6375 6376`v32' 6377 Only instructions and register names for CRIS v32 (code name 6378 Guinness) are recognized. This is the default if the target is 6379 configured as crisv32-*. This value implies `--no-mul-bug-abort'. 6380 (A subsequent `--mul-bug-abort' will turn it back on.) 6381 6382`common_v10_v32' 6383 Only instructions with register names and addressing modes with 6384 opcodes common to the v10 and v32 are recognized. 6385 6386 When `-N' is specified, `as' will emit a warning when a 16-bit 6387branch instruction is expanded into a 32-bit multiple-instruction 6388construct (*note CRIS-Expand::). 6389 6390 Some versions of the CRIS v10, for example in the Etrax 100 LX, 6391contain a bug that causes destabilizing memory accesses when a multiply 6392instruction is executed with certain values in the first operand just 6393before a cache-miss. When the `--mul-bug-abort' command line option is 6394active (the default value), `as' will refuse to assemble a file 6395containing a multiply instruction at a dangerous offset, one that could 6396be the last on a cache-line, or is in a section with insufficient 6397alignment. This placement checking does not catch any case where the 6398multiply instruction is dangerously placed because it is located in a 6399delay-slot. The `--mul-bug-abort' command line option turns off the 6400checking. 6401 6402 6403File: as.info, Node: CRIS-Expand, Next: CRIS-Symbols, Prev: CRIS-Opts, Up: CRIS-Dependent 6404 64058.5.2 Instruction expansion 6406--------------------------- 6407 6408`as' will silently choose an instruction that fits the operand size for 6409`[register+constant]' operands. For example, the offset `127' in 6410`move.d [r3+127],r4' fits in an instruction using a signed-byte offset. 6411Similarly, `move.d [r2+32767],r1' will generate an instruction using a 641216-bit offset. For symbolic expressions and constants that do not fit 6413in 16 bits including the sign bit, a 32-bit offset is generated. 6414 6415 For branches, `as' will expand from a 16-bit branch instruction into 6416a sequence of instructions that can reach a full 32-bit address. Since 6417this does not correspond to a single instruction, such expansions can 6418optionally be warned about. *Note CRIS-Opts::. 6419 6420 If the operand is found to fit the range, a `lapc' mnemonic will 6421translate to a `lapcq' instruction. Use `lapc.d' to force the 32-bit 6422`lapc' instruction. 6423 6424 Similarly, the `addo' mnemonic will translate to the shortest 6425fitting instruction of `addoq', `addo.w' and `addo.d', when used with a 6426operand that is a constant known at assembly time. 6427 6428 6429File: as.info, Node: CRIS-Symbols, Next: CRIS-Syntax, Prev: CRIS-Expand, Up: CRIS-Dependent 6430 64318.5.3 Symbols 6432------------- 6433 6434Some symbols are defined by the assembler. They're intended to be used 6435in conditional assembly, for example: 6436 .if ..asm.arch.cris.v32 6437 CODE FOR CRIS V32 6438 .elseif ..asm.arch.cris.common_v10_v32 6439 CODE COMMON TO CRIS V32 AND CRIS V10 6440 .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10 6441 CODE FOR V10 6442 .else 6443 .error "Code needs to be added here." 6444 .endif 6445 6446 These symbols are defined in the assembler, reflecting command-line 6447options, either when specified or the default. They are always 6448defined, to 0 or 1. 6449`..asm.arch.cris.any_v0_v10' 6450 This symbol is non-zero when `--march=v0_v10' is specified or the 6451 default. 6452 6453`..asm.arch.cris.common_v10_v32' 6454 Set according to the option `--march=common_v10_v32'. 6455 6456`..asm.arch.cris.v10' 6457 Reflects the option `--march=v10'. 6458 6459`..asm.arch.cris.v32' 6460 Corresponds to `--march=v10'. 6461 6462 Speaking of symbols, when a symbol is used in code, it can have a 6463suffix modifying its value for use in position-independent code. *Note 6464CRIS-Pic::. 6465 6466 6467File: as.info, Node: CRIS-Syntax, Prev: CRIS-Symbols, Up: CRIS-Dependent 6468 64698.5.4 Syntax 6470------------ 6471 6472There are different aspects of the CRIS assembly syntax. 6473 6474* Menu: 6475 6476* CRIS-Chars:: Special Characters 6477* CRIS-Pic:: Position-Independent Code Symbols 6478* CRIS-Regs:: Register Names 6479* CRIS-Pseudos:: Assembler Directives 6480 6481 6482File: as.info, Node: CRIS-Chars, Next: CRIS-Pic, Up: CRIS-Syntax 6483 64848.5.4.1 Special Characters 6485.......................... 6486 6487The character `#' is a line comment character. It starts a comment if 6488and only if it is placed at the beginning of a line. 6489 6490 A `;' character starts a comment anywhere on the line, causing all 6491characters up to the end of the line to be ignored. 6492 6493 A `@' character is handled as a line separator equivalent to a 6494logical new-line character (except in a comment), so separate 6495instructions can be specified on a single line. 6496 6497 6498File: as.info, Node: CRIS-Pic, Next: CRIS-Regs, Prev: CRIS-Chars, Up: CRIS-Syntax 6499 65008.5.4.2 Symbols in position-independent code 6501............................................ 6502 6503When generating position-independent code (SVR4 PIC) for use in 6504cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol 6505suffixes are used to specify what kind of run-time symbol lookup will 6506be used, expressed in the object as different _relocation types_. 6507Usually, all absolute symbol values must be located in a table, the 6508_global offset table_, leaving the code position-independent; 6509independent of values of global symbols and independent of the address 6510of the code. The suffix modifies the value of the symbol, into for 6511example an index into the global offset table where the real symbol 6512value is entered, or a PC-relative value, or a value relative to the 6513start of the global offset table. All symbol suffixes start with the 6514character `:' (omitted in the list below). Every symbol use in code or 6515a read-only section must therefore have a PIC suffix to enable a useful 6516shared library to be created. Usually, these constructs must not be 6517used with an additive constant offset as is usually allowed, i.e. no 4 6518as in `symbol + 4' is allowed. This restriction is checked at 6519link-time, not at assembly-time. 6520 6521`GOT' 6522 Attaching this suffix to a symbol in an instruction causes the 6523 symbol to be entered into the global offset table. The value is a 6524 32-bit index for that symbol into the global offset table. The 6525 name of the corresponding relocation is `R_CRIS_32_GOT'. Example: 6526 `move.d [$r0+extsym:GOT],$r9' 6527 6528`GOT16' 6529 Same as for `GOT', but the value is a 16-bit index into the global 6530 offset table. The corresponding relocation is `R_CRIS_16_GOT'. 6531 Example: `move.d [$r0+asymbol:GOT16],$r10' 6532 6533`PLT' 6534 This suffix is used for function symbols. It causes a _procedure 6535 linkage table_, an array of code stubs, to be created at the time 6536 the shared object is created or linked against, together with a 6537 global offset table entry. The value is a pc-relative offset to 6538 the corresponding stub code in the procedure linkage table. This 6539 arrangement causes the run-time symbol resolver to be called to 6540 look up and set the value of the symbol the first time the 6541 function is called (at latest; depending environment variables). 6542 It is only safe to leave the symbol unresolved this way if all 6543 references are function calls. The name of the relocation is 6544 `R_CRIS_32_PLT_PCREL'. Example: `add.d fnname:PLT,$pc' 6545 6546`PLTG' 6547 Like PLT, but the value is relative to the beginning of the global 6548 offset table. The relocation is `R_CRIS_32_PLT_GOTREL'. Example: 6549 `move.d fnname:PLTG,$r3' 6550 6551`GOTPLT' 6552 Similar to `PLT', but the value of the symbol is a 32-bit index 6553 into the global offset table. This is somewhat of a mix between 6554 the effect of the `GOT' and the `PLT' suffix; the difference to 6555 `GOT' is that there will be a procedure linkage table entry 6556 created, and that the symbol is assumed to be a function entry and 6557 will be resolved by the run-time resolver as with `PLT'. The 6558 relocation is `R_CRIS_32_GOTPLT'. Example: `jsr 6559 [$r0+fnname:GOTPLT]' 6560 6561`GOTPLT16' 6562 A variant of `GOTPLT' giving a 16-bit value. Its relocation name 6563 is `R_CRIS_16_GOTPLT'. Example: `jsr [$r0+fnname:GOTPLT16]' 6564 6565`GOTOFF' 6566 This suffix must only be attached to a local symbol, but may be 6567 used in an expression adding an offset. The value is the address 6568 of the symbol relative to the start of the global offset table. 6569 The relocation name is `R_CRIS_32_GOTREL'. Example: `move.d 6570 [$r0+localsym:GOTOFF],r3' 6571 6572 6573File: as.info, Node: CRIS-Regs, Next: CRIS-Pseudos, Prev: CRIS-Pic, Up: CRIS-Syntax 6574 65758.5.4.3 Register names 6576...................... 6577 6578A `$' character may always prefix a general or special register name in 6579an instruction operand but is mandatory when the option 6580`--no-underscore' is specified or when the `.syntax register_prefix' 6581directive is in effect (*note crisnous::). Register names are 6582case-insensitive. 6583 6584 6585File: as.info, Node: CRIS-Pseudos, Prev: CRIS-Regs, Up: CRIS-Syntax 6586 65878.5.4.4 Assembler Directives 6588............................ 6589 6590There are a few CRIS-specific pseudo-directives in addition to the 6591generic ones. *Note Pseudo Ops::. Constants emitted by 6592pseudo-directives are in little-endian order for CRIS. There is no 6593support for floating-point-specific directives for CRIS. 6594 6595`.dword EXPRESSIONS' 6596 The `.dword' directive is a synonym for `.int', expecting zero or 6597 more EXPRESSIONS, separated by commas. For each expression, a 6598 32-bit little-endian constant is emitted. 6599 6600`.syntax ARGUMENT' 6601 The `.syntax' directive takes as ARGUMENT one of the following 6602 case-sensitive choices. 6603 6604 `no_register_prefix' 6605 The `.syntax no_register_prefix' directive makes a `$' 6606 character prefix on all registers optional. It overrides a 6607 previous setting, including the corresponding effect of the 6608 option `--no-underscore'. If this directive is used when 6609 ordinary symbols do not have a `_' character prefix, care 6610 must be taken to avoid ambiguities whether an operand is a 6611 register or a symbol; using symbols with names the same as 6612 general or special registers then invoke undefined behavior. 6613 6614 `register_prefix' 6615 This directive makes a `$' character prefix on all registers 6616 mandatory. It overrides a previous setting, including the 6617 corresponding effect of the option `--underscore'. 6618 6619 `leading_underscore' 6620 This is an assertion directive, emitting an error if the 6621 `--no-underscore' option is in effect. 6622 6623 `no_leading_underscore' 6624 This is the opposite of the `.syntax leading_underscore' 6625 directive and emits an error if the option `--underscore' is 6626 in effect. 6627 6628`.arch ARGUMENT' 6629 This is an assertion directive, giving an error if the specified 6630 ARGUMENT is not the same as the specified or default value for the 6631 `--march=ARCHITECTURE' option (*note march-option::). 6632 6633 6634 6635File: as.info, Node: D10V-Dependent, Next: D30V-Dependent, Prev: CRIS-Dependent, Up: Machine Dependencies 6636 66378.6 D10V Dependent Features 6638=========================== 6639 6640* Menu: 6641 6642* D10V-Opts:: D10V Options 6643* D10V-Syntax:: Syntax 6644* D10V-Float:: Floating Point 6645* D10V-Opcodes:: Opcodes 6646 6647 6648File: as.info, Node: D10V-Opts, Next: D10V-Syntax, Up: D10V-Dependent 6649 66508.6.1 D10V Options 6651------------------ 6652 6653The Mitsubishi D10V version of `as' has a few machine dependent options. 6654 6655`-O' 6656 The D10V can often execute two sub-instructions in parallel. When 6657 this option is used, `as' will attempt to optimize its output by 6658 detecting when instructions can be executed in parallel. 6659 6660`--nowarnswap' 6661 To optimize execution performance, `as' will sometimes swap the 6662 order of instructions. Normally this generates a warning. When 6663 this option is used, no warning will be generated when 6664 instructions are swapped. 6665 6666`--gstabs-packing' 6667 6668`--no-gstabs-packing' 6669 `as' packs adjacent short instructions into a single packed 6670 instruction. `--no-gstabs-packing' turns instruction packing off if 6671 `--gstabs' is specified as well; `--gstabs-packing' (the default) 6672 turns instruction packing on even when `--gstabs' is specified. 6673 6674 6675File: as.info, Node: D10V-Syntax, Next: D10V-Float, Prev: D10V-Opts, Up: D10V-Dependent 6676 66778.6.2 Syntax 6678------------ 6679 6680The D10V syntax is based on the syntax in Mitsubishi's D10V 6681architecture manual. The differences are detailed below. 6682 6683* Menu: 6684 6685* D10V-Size:: Size Modifiers 6686* D10V-Subs:: Sub-Instructions 6687* D10V-Chars:: Special Characters 6688* D10V-Regs:: Register Names 6689* D10V-Addressing:: Addressing Modes 6690* D10V-Word:: @WORD Modifier 6691 6692 6693File: as.info, Node: D10V-Size, Next: D10V-Subs, Up: D10V-Syntax 6694 66958.6.2.1 Size Modifiers 6696...................... 6697 6698The D10V version of `as' uses the instruction names in the D10V 6699Architecture Manual. However, the names in the manual are sometimes 6700ambiguous. There are instruction names that can assemble to a short or 6701long form opcode. How does the assembler pick the correct form? `as' 6702will always pick the smallest form if it can. When dealing with a 6703symbol that is not defined yet when a line is being assembled, it will 6704always use the long form. If you need to force the assembler to use 6705either the short or long form of the instruction, you can append either 6706`.s' (short) or `.l' (long) to it. For example, if you are writing an 6707assembly program and you want to do a branch to a symbol that is 6708defined later in your program, you can write `bra.s foo'. Objdump 6709and GDB will always append `.s' or `.l' to instructions which have both 6710short and long forms. 6711 6712 6713File: as.info, Node: D10V-Subs, Next: D10V-Chars, Prev: D10V-Size, Up: D10V-Syntax 6714 67158.6.2.2 Sub-Instructions 6716........................ 6717 6718The D10V assembler takes as input a series of instructions, either 6719one-per-line, or in the special two-per-line format described in the 6720next section. Some of these instructions will be short-form or 6721sub-instructions. These sub-instructions can be packed into a single 6722instruction. The assembler will do this automatically. It will also 6723detect when it should not pack instructions. For example, when a label 6724is defined, the next instruction will never be packaged with the 6725previous one. Whenever a branch and link instruction is called, it 6726will not be packaged with the next instruction so the return address 6727will be valid. Nops are automatically inserted when necessary. 6728 6729 If you do not want the assembler automatically making these 6730decisions, you can control the packaging and execution type (parallel 6731or sequential) with the special execution symbols described in the next 6732section. 6733 6734 6735File: as.info, Node: D10V-Chars, Next: D10V-Regs, Prev: D10V-Subs, Up: D10V-Syntax 6736 67378.6.2.3 Special Characters 6738.......................... 6739 6740`;' and `#' are the line comment characters. Sub-instructions may be 6741executed in order, in reverse-order, or in parallel. Instructions 6742listed in the standard one-per-line format will be executed 6743sequentially. To specify the executing order, use the following 6744symbols: 6745`->' 6746 Sequential with instruction on the left first. 6747 6748`<-' 6749 Sequential with instruction on the right first. 6750 6751`||' 6752 Parallel 6753 The D10V syntax allows either one instruction per line, one 6754instruction per line with the execution symbol, or two instructions per 6755line. For example 6756`abs a1 -> abs r0' 6757 Execute these sequentially. The instruction on the right is in 6758 the right container and is executed second. 6759 6760`abs r0 <- abs a1' 6761 Execute these reverse-sequentially. The instruction on the right 6762 is in the right container, and is executed first. 6763 6764`ld2w r2,@r8+ || mac a0,r0,r7' 6765 Execute these in parallel. 6766 6767`ld2w r2,@r8+ ||' 6768`mac a0,r0,r7' 6769 Two-line format. Execute these in parallel. 6770 6771`ld2w r2,@r8+' 6772`mac a0,r0,r7' 6773 Two-line format. Execute these sequentially. Assembler will put 6774 them in the proper containers. 6775 6776`ld2w r2,@r8+ ->' 6777`mac a0,r0,r7' 6778 Two-line format. Execute these sequentially. Same as above but 6779 second instruction will always go into right container. 6780 Since `$' has no special meaning, you may use it in symbol names. 6781 6782 6783File: as.info, Node: D10V-Regs, Next: D10V-Addressing, Prev: D10V-Chars, Up: D10V-Syntax 6784 67858.6.2.4 Register Names 6786...................... 6787 6788You can use the predefined symbols `r0' through `r15' to refer to the 6789D10V registers. You can also use `sp' as an alias for `r15'. The 6790accumulators are `a0' and `a1'. There are special register-pair names 6791that may optionally be used in opcodes that require even-numbered 6792registers. Register names are not case sensitive. 6793 6794 Register Pairs 6795`r0-r1' 6796 6797`r2-r3' 6798 6799`r4-r5' 6800 6801`r6-r7' 6802 6803`r8-r9' 6804 6805`r10-r11' 6806 6807`r12-r13' 6808 6809`r14-r15' 6810 6811 The D10V also has predefined symbols for these control registers and 6812status bits: 6813`psw' 6814 Processor Status Word 6815 6816`bpsw' 6817 Backup Processor Status Word 6818 6819`pc' 6820 Program Counter 6821 6822`bpc' 6823 Backup Program Counter 6824 6825`rpt_c' 6826 Repeat Count 6827 6828`rpt_s' 6829 Repeat Start address 6830 6831`rpt_e' 6832 Repeat End address 6833 6834`mod_s' 6835 Modulo Start address 6836 6837`mod_e' 6838 Modulo End address 6839 6840`iba' 6841 Instruction Break Address 6842 6843`f0' 6844 Flag 0 6845 6846`f1' 6847 Flag 1 6848 6849`c' 6850 Carry flag 6851 6852 6853File: as.info, Node: D10V-Addressing, Next: D10V-Word, Prev: D10V-Regs, Up: D10V-Syntax 6854 68558.6.2.5 Addressing Modes 6856........................ 6857 6858`as' understands the following addressing modes for the D10V. `RN' in 6859the following refers to any of the numbered registers, but _not_ the 6860control registers. 6861`RN' 6862 Register direct 6863 6864`@RN' 6865 Register indirect 6866 6867`@RN+' 6868 Register indirect with post-increment 6869 6870`@RN-' 6871 Register indirect with post-decrement 6872 6873`@-SP' 6874 Register indirect with pre-decrement 6875 6876`@(DISP, RN)' 6877 Register indirect with displacement 6878 6879`ADDR' 6880 PC relative address (for branch or rep). 6881 6882`#IMM' 6883 Immediate data (the `#' is optional and ignored) 6884 6885 6886File: as.info, Node: D10V-Word, Prev: D10V-Addressing, Up: D10V-Syntax 6887 68888.6.2.6 @WORD Modifier 6889...................... 6890 6891Any symbol followed by `@word' will be replaced by the symbol's value 6892shifted right by 2. This is used in situations such as loading a 6893register with the address of a function (or any other code fragment). 6894For example, if you want to load a register with the location of the 6895function `main' then jump to that function, you could do it as follows: 6896 ldi r2, main@word 6897 jmp r2 6898 6899 6900File: as.info, Node: D10V-Float, Next: D10V-Opcodes, Prev: D10V-Syntax, Up: D10V-Dependent 6901 69028.6.3 Floating Point 6903-------------------- 6904 6905The D10V has no hardware floating point, but the `.float' and `.double' 6906directives generates IEEE floating-point numbers for compatibility with 6907other development tools. 6908 6909 6910File: as.info, Node: D10V-Opcodes, Prev: D10V-Float, Up: D10V-Dependent 6911 69128.6.4 Opcodes 6913------------- 6914 6915For detailed information on the D10V machine instruction set, see `D10V 6916Architecture: A VLIW Microprocessor for Multimedia Applications' 6917(Mitsubishi Electric Corp.). `as' implements all the standard D10V 6918opcodes. The only changes are those described in the section on size 6919modifiers 6920 6921 6922File: as.info, Node: D30V-Dependent, Next: H8/300-Dependent, Prev: D10V-Dependent, Up: Machine Dependencies 6923 69248.7 D30V Dependent Features 6925=========================== 6926 6927* Menu: 6928 6929* D30V-Opts:: D30V Options 6930* D30V-Syntax:: Syntax 6931* D30V-Float:: Floating Point 6932* D30V-Opcodes:: Opcodes 6933 6934 6935File: as.info, Node: D30V-Opts, Next: D30V-Syntax, Up: D30V-Dependent 6936 69378.7.1 D30V Options 6938------------------ 6939 6940The Mitsubishi D30V version of `as' has a few machine dependent options. 6941 6942`-O' 6943 The D30V can often execute two sub-instructions in parallel. When 6944 this option is used, `as' will attempt to optimize its output by 6945 detecting when instructions can be executed in parallel. 6946 6947`-n' 6948 When this option is used, `as' will issue a warning every time it 6949 adds a nop instruction. 6950 6951`-N' 6952 When this option is used, `as' will issue a warning if it needs to 6953 insert a nop after a 32-bit multiply before a load or 16-bit 6954 multiply instruction. 6955 6956 6957File: as.info, Node: D30V-Syntax, Next: D30V-Float, Prev: D30V-Opts, Up: D30V-Dependent 6958 69598.7.2 Syntax 6960------------ 6961 6962The D30V syntax is based on the syntax in Mitsubishi's D30V 6963architecture manual. The differences are detailed below. 6964 6965* Menu: 6966 6967* D30V-Size:: Size Modifiers 6968* D30V-Subs:: Sub-Instructions 6969* D30V-Chars:: Special Characters 6970* D30V-Guarded:: Guarded Execution 6971* D30V-Regs:: Register Names 6972* D30V-Addressing:: Addressing Modes 6973 6974 6975File: as.info, Node: D30V-Size, Next: D30V-Subs, Up: D30V-Syntax 6976 69778.7.2.1 Size Modifiers 6978...................... 6979 6980The D30V version of `as' uses the instruction names in the D30V 6981Architecture Manual. However, the names in the manual are sometimes 6982ambiguous. There are instruction names that can assemble to a short or 6983long form opcode. How does the assembler pick the correct form? `as' 6984will always pick the smallest form if it can. When dealing with a 6985symbol that is not defined yet when a line is being assembled, it will 6986always use the long form. If you need to force the assembler to use 6987either the short or long form of the instruction, you can append either 6988`.s' (short) or `.l' (long) to it. For example, if you are writing an 6989assembly program and you want to do a branch to a symbol that is 6990defined later in your program, you can write `bra.s foo'. Objdump and 6991GDB will always append `.s' or `.l' to instructions which have both 6992short and long forms. 6993 6994 6995File: as.info, Node: D30V-Subs, Next: D30V-Chars, Prev: D30V-Size, Up: D30V-Syntax 6996 69978.7.2.2 Sub-Instructions 6998........................ 6999 7000The D30V assembler takes as input a series of instructions, either 7001one-per-line, or in the special two-per-line format described in the 7002next section. Some of these instructions will be short-form or 7003sub-instructions. These sub-instructions can be packed into a single 7004instruction. The assembler will do this automatically. It will also 7005detect when it should not pack instructions. For example, when a label 7006is defined, the next instruction will never be packaged with the 7007previous one. Whenever a branch and link instruction is called, it 7008will not be packaged with the next instruction so the return address 7009will be valid. Nops are automatically inserted when necessary. 7010 7011 If you do not want the assembler automatically making these 7012decisions, you can control the packaging and execution type (parallel 7013or sequential) with the special execution symbols described in the next 7014section. 7015 7016 7017File: as.info, Node: D30V-Chars, Next: D30V-Guarded, Prev: D30V-Subs, Up: D30V-Syntax 7018 70198.7.2.3 Special Characters 7020.......................... 7021 7022`;' and `#' are the line comment characters. Sub-instructions may be 7023executed in order, in reverse-order, or in parallel. Instructions 7024listed in the standard one-per-line format will be executed 7025sequentially unless you use the `-O' option. 7026 7027 To specify the executing order, use the following symbols: 7028`->' 7029 Sequential with instruction on the left first. 7030 7031`<-' 7032 Sequential with instruction on the right first. 7033 7034`||' 7035 Parallel 7036 7037 The D30V syntax allows either one instruction per line, one 7038instruction per line with the execution symbol, or two instructions per 7039line. For example 7040`abs r2,r3 -> abs r4,r5' 7041 Execute these sequentially. The instruction on the right is in 7042 the right container and is executed second. 7043 7044`abs r2,r3 <- abs r4,r5' 7045 Execute these reverse-sequentially. The instruction on the right 7046 is in the right container, and is executed first. 7047 7048`abs r2,r3 || abs r4,r5' 7049 Execute these in parallel. 7050 7051`ldw r2,@(r3,r4) ||' 7052`mulx r6,r8,r9' 7053 Two-line format. Execute these in parallel. 7054 7055`mulx a0,r8,r9' 7056`stw r2,@(r3,r4)' 7057 Two-line format. Execute these sequentially unless `-O' option is 7058 used. If the `-O' option is used, the assembler will determine if 7059 the instructions could be done in parallel (the above two 7060 instructions can be done in parallel), and if so, emit them as 7061 parallel instructions. The assembler will put them in the proper 7062 containers. In the above example, the assembler will put the 7063 `stw' instruction in left container and the `mulx' instruction in 7064 the right container. 7065 7066`stw r2,@(r3,r4) ->' 7067`mulx a0,r8,r9' 7068 Two-line format. Execute the `stw' instruction followed by the 7069 `mulx' instruction sequentially. The first instruction goes in the 7070 left container and the second instruction goes into right 7071 container. The assembler will give an error if the machine 7072 ordering constraints are violated. 7073 7074`stw r2,@(r3,r4) <-' 7075`mulx a0,r8,r9' 7076 Same as previous example, except that the `mulx' instruction is 7077 executed before the `stw' instruction. 7078 7079 Since `$' has no special meaning, you may use it in symbol names. 7080 7081 7082File: as.info, Node: D30V-Guarded, Next: D30V-Regs, Prev: D30V-Chars, Up: D30V-Syntax 7083 70848.7.2.4 Guarded Execution 7085......................... 7086 7087`as' supports the full range of guarded execution directives for each 7088instruction. Just append the directive after the instruction proper. 7089The directives are: 7090 7091`/tx' 7092 Execute the instruction if flag f0 is true. 7093 7094`/fx' 7095 Execute the instruction if flag f0 is false. 7096 7097`/xt' 7098 Execute the instruction if flag f1 is true. 7099 7100`/xf' 7101 Execute the instruction if flag f1 is false. 7102 7103`/tt' 7104 Execute the instruction if both flags f0 and f1 are true. 7105 7106`/tf' 7107 Execute the instruction if flag f0 is true and flag f1 is false. 7108 7109 7110File: as.info, Node: D30V-Regs, Next: D30V-Addressing, Prev: D30V-Guarded, Up: D30V-Syntax 7111 71128.7.2.5 Register Names 7113...................... 7114 7115You can use the predefined symbols `r0' through `r63' to refer to the 7116D30V registers. You can also use `sp' as an alias for `r63' and `link' 7117as an alias for `r62'. The accumulators are `a0' and `a1'. 7118 7119 The D30V also has predefined symbols for these control registers and 7120status bits: 7121`psw' 7122 Processor Status Word 7123 7124`bpsw' 7125 Backup Processor Status Word 7126 7127`pc' 7128 Program Counter 7129 7130`bpc' 7131 Backup Program Counter 7132 7133`rpt_c' 7134 Repeat Count 7135 7136`rpt_s' 7137 Repeat Start address 7138 7139`rpt_e' 7140 Repeat End address 7141 7142`mod_s' 7143 Modulo Start address 7144 7145`mod_e' 7146 Modulo End address 7147 7148`iba' 7149 Instruction Break Address 7150 7151`f0' 7152 Flag 0 7153 7154`f1' 7155 Flag 1 7156 7157`f2' 7158 Flag 2 7159 7160`f3' 7161 Flag 3 7162 7163`f4' 7164 Flag 4 7165 7166`f5' 7167 Flag 5 7168 7169`f6' 7170 Flag 6 7171 7172`f7' 7173 Flag 7 7174 7175`s' 7176 Same as flag 4 (saturation flag) 7177 7178`v' 7179 Same as flag 5 (overflow flag) 7180 7181`va' 7182 Same as flag 6 (sticky overflow flag) 7183 7184`c' 7185 Same as flag 7 (carry/borrow flag) 7186 7187`b' 7188 Same as flag 7 (carry/borrow flag) 7189 7190 7191File: as.info, Node: D30V-Addressing, Prev: D30V-Regs, Up: D30V-Syntax 7192 71938.7.2.6 Addressing Modes 7194........................ 7195 7196`as' understands the following addressing modes for the D30V. `RN' in 7197the following refers to any of the numbered registers, but _not_ the 7198control registers. 7199`RN' 7200 Register direct 7201 7202`@RN' 7203 Register indirect 7204 7205`@RN+' 7206 Register indirect with post-increment 7207 7208`@RN-' 7209 Register indirect with post-decrement 7210 7211`@-SP' 7212 Register indirect with pre-decrement 7213 7214`@(DISP, RN)' 7215 Register indirect with displacement 7216 7217`ADDR' 7218 PC relative address (for branch or rep). 7219 7220`#IMM' 7221 Immediate data (the `#' is optional and ignored) 7222 7223 7224File: as.info, Node: D30V-Float, Next: D30V-Opcodes, Prev: D30V-Syntax, Up: D30V-Dependent 7225 72268.7.3 Floating Point 7227-------------------- 7228 7229The D30V has no hardware floating point, but the `.float' and `.double' 7230directives generates IEEE floating-point numbers for compatibility with 7231other development tools. 7232 7233 7234File: as.info, Node: D30V-Opcodes, Prev: D30V-Float, Up: D30V-Dependent 7235 72368.7.4 Opcodes 7237------------- 7238 7239For detailed information on the D30V machine instruction set, see `D30V 7240Architecture: A VLIW Microprocessor for Multimedia Applications' 7241(Mitsubishi Electric Corp.). `as' implements all the standard D30V 7242opcodes. The only changes are those described in the section on size 7243modifiers 7244 7245 7246File: as.info, Node: H8/300-Dependent, Next: HPPA-Dependent, Prev: D30V-Dependent, Up: Machine Dependencies 7247 72488.8 H8/300 Dependent Features 7249============================= 7250 7251* Menu: 7252 7253* H8/300 Options:: Options 7254* H8/300 Syntax:: Syntax 7255* H8/300 Floating Point:: Floating Point 7256* H8/300 Directives:: H8/300 Machine Directives 7257* H8/300 Opcodes:: Opcodes 7258 7259 7260File: as.info, Node: H8/300 Options, Next: H8/300 Syntax, Up: H8/300-Dependent 7261 72628.8.1 Options 7263------------- 7264 7265`as' has no additional command-line options for the Renesas (formerly 7266Hitachi) H8/300 family. 7267 7268 7269File: as.info, Node: H8/300 Syntax, Next: H8/300 Floating Point, Prev: H8/300 Options, Up: H8/300-Dependent 7270 72718.8.2 Syntax 7272------------ 7273 7274* Menu: 7275 7276* H8/300-Chars:: Special Characters 7277* H8/300-Regs:: Register Names 7278* H8/300-Addressing:: Addressing Modes 7279 7280 7281File: as.info, Node: H8/300-Chars, Next: H8/300-Regs, Up: H8/300 Syntax 7282 72838.8.2.1 Special Characters 7284.......................... 7285 7286`;' is the line comment character. 7287 7288 `$' can be used instead of a newline to separate statements. 7289Therefore _you may not use `$' in symbol names_ on the H8/300. 7290 7291 7292File: as.info, Node: H8/300-Regs, Next: H8/300-Addressing, Prev: H8/300-Chars, Up: H8/300 Syntax 7293 72948.8.2.2 Register Names 7295...................... 7296 7297You can use predefined symbols of the form `rNh' and `rNl' to refer to 7298the H8/300 registers as sixteen 8-bit general-purpose registers. N is 7299a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid 7300register names. 7301 7302 You can also use the eight predefined symbols `rN' to refer to the 7303H8/300 registers as 16-bit registers (you must use this form for 7304addressing). 7305 7306 On the H8/300H, you can also use the eight predefined symbols `erN' 7307(`er0' ... `er7') to refer to the 32-bit general purpose registers. 7308 7309 The two control registers are called `pc' (program counter; a 16-bit 7310register, except on the H8/300H where it is 24 bits) and `ccr' 7311(condition code register; an 8-bit register). `r7' is used as the 7312stack pointer, and can also be called `sp'. 7313 7314 7315File: as.info, Node: H8/300-Addressing, Prev: H8/300-Regs, Up: H8/300 Syntax 7316 73178.8.2.3 Addressing Modes 7318........................ 7319 7320as understands the following addressing modes for the H8/300: 7321`rN' 7322 Register direct 7323 7324`@rN' 7325 Register indirect 7326 7327`@(D, rN)' 7328`@(D:16, rN)' 7329`@(D:24, rN)' 7330 Register indirect: 16-bit or 24-bit displacement D from register 7331 N. (24-bit displacements are only meaningful on the H8/300H.) 7332 7333`@rN+' 7334 Register indirect with post-increment 7335 7336`@-rN' 7337 Register indirect with pre-decrement 7338 7339``@'AA' 7340``@'AA:8' 7341``@'AA:16' 7342``@'AA:24' 7343 Absolute address `aa'. (The address size `:24' only makes sense 7344 on the H8/300H.) 7345 7346`#XX' 7347`#XX:8' 7348`#XX:16' 7349`#XX:32' 7350 Immediate data XX. You may specify the `:8', `:16', or `:32' for 7351 clarity, if you wish; but `as' neither requires this nor uses 7352 it--the data size required is taken from context. 7353 7354``@'`@'AA' 7355``@'`@'AA:8' 7356 Memory indirect. You may specify the `:8' for clarity, if you 7357 wish; but `as' neither requires this nor uses it. 7358 7359 7360File: as.info, Node: H8/300 Floating Point, Next: H8/300 Directives, Prev: H8/300 Syntax, Up: H8/300-Dependent 7361 73628.8.3 Floating Point 7363-------------------- 7364 7365The H8/300 family has no hardware floating point, but the `.float' 7366directive generates IEEE floating-point numbers for compatibility with 7367other development tools. 7368 7369 7370File: as.info, Node: H8/300 Directives, Next: H8/300 Opcodes, Prev: H8/300 Floating Point, Up: H8/300-Dependent 7371 73728.8.4 H8/300 Machine Directives 7373------------------------------- 7374 7375`as' has the following machine-dependent directives for the H8/300: 7376 7377`.h8300h' 7378 Recognize and emit additional instructions for the H8/300H 7379 variant, and also make `.int' emit 32-bit numbers rather than the 7380 usual (16-bit) for the H8/300 family. 7381 7382`.h8300s' 7383 Recognize and emit additional instructions for the H8S variant, and 7384 also make `.int' emit 32-bit numbers rather than the usual (16-bit) 7385 for the H8/300 family. 7386 7387`.h8300hn' 7388 Recognize and emit additional instructions for the H8/300H variant 7389 in normal mode, and also make `.int' emit 32-bit numbers rather 7390 than the usual (16-bit) for the H8/300 family. 7391 7392`.h8300sn' 7393 Recognize and emit additional instructions for the H8S variant in 7394 normal mode, and also make `.int' emit 32-bit numbers rather than 7395 the usual (16-bit) for the H8/300 family. 7396 7397 On the H8/300 family (including the H8/300H) `.word' directives 7398generate 16-bit numbers. 7399 7400 7401File: as.info, Node: H8/300 Opcodes, Prev: H8/300 Directives, Up: H8/300-Dependent 7402 74038.8.5 Opcodes 7404------------- 7405 7406For detailed information on the H8/300 machine instruction set, see 7407`H8/300 Series Programming Manual'. For information specific to the 7408H8/300H, see `H8/300H Series Programming Manual' (Renesas). 7409 7410 `as' implements all the standard H8/300 opcodes. No additional 7411pseudo-instructions are needed on this family. 7412 7413 The following table summarizes the H8/300 opcodes, and their 7414arguments. Entries marked `*' are opcodes used only on the H8/300H. 7415 7416 Legend: 7417 Rs source register 7418 Rd destination register 7419 abs absolute address 7420 imm immediate data 7421 disp:N N-bit displacement from a register 7422 pcrel:N N-bit displacement relative to program counter 7423 7424 add.b #imm,rd * andc #imm,ccr 7425 add.b rs,rd band #imm,rd 7426 add.w rs,rd band #imm,@rd 7427 * add.w #imm,rd band #imm,@abs:8 7428 * add.l rs,rd bra pcrel:8 7429 * add.l #imm,rd * bra pcrel:16 7430 adds #imm,rd bt pcrel:8 7431 addx #imm,rd * bt pcrel:16 7432 addx rs,rd brn pcrel:8 7433 and.b #imm,rd * brn pcrel:16 7434 and.b rs,rd bf pcrel:8 7435 * and.w rs,rd * bf pcrel:16 7436 * and.w #imm,rd bhi pcrel:8 7437 * and.l #imm,rd * bhi pcrel:16 7438 * and.l rs,rd bls pcrel:8 7439 7440 * bls pcrel:16 bld #imm,rd 7441 bcc pcrel:8 bld #imm,@rd 7442 * bcc pcrel:16 bld #imm,@abs:8 7443 bhs pcrel:8 bnot #imm,rd 7444 * bhs pcrel:16 bnot #imm,@rd 7445 bcs pcrel:8 bnot #imm,@abs:8 7446 * bcs pcrel:16 bnot rs,rd 7447 blo pcrel:8 bnot rs,@rd 7448 * blo pcrel:16 bnot rs,@abs:8 7449 bne pcrel:8 bor #imm,rd 7450 * bne pcrel:16 bor #imm,@rd 7451 beq pcrel:8 bor #imm,@abs:8 7452 * beq pcrel:16 bset #imm,rd 7453 bvc pcrel:8 bset #imm,@rd 7454 * bvc pcrel:16 bset #imm,@abs:8 7455 bvs pcrel:8 bset rs,rd 7456 * bvs pcrel:16 bset rs,@rd 7457 bpl pcrel:8 bset rs,@abs:8 7458 * bpl pcrel:16 bsr pcrel:8 7459 bmi pcrel:8 bsr pcrel:16 7460 * bmi pcrel:16 bst #imm,rd 7461 bge pcrel:8 bst #imm,@rd 7462 * bge pcrel:16 bst #imm,@abs:8 7463 blt pcrel:8 btst #imm,rd 7464 * blt pcrel:16 btst #imm,@rd 7465 bgt pcrel:8 btst #imm,@abs:8 7466 * bgt pcrel:16 btst rs,rd 7467 ble pcrel:8 btst rs,@rd 7468 * ble pcrel:16 btst rs,@abs:8 7469 bclr #imm,rd bxor #imm,rd 7470 bclr #imm,@rd bxor #imm,@rd 7471 bclr #imm,@abs:8 bxor #imm,@abs:8 7472 bclr rs,rd cmp.b #imm,rd 7473 bclr rs,@rd cmp.b rs,rd 7474 bclr rs,@abs:8 cmp.w rs,rd 7475 biand #imm,rd cmp.w rs,rd 7476 biand #imm,@rd * cmp.w #imm,rd 7477 biand #imm,@abs:8 * cmp.l #imm,rd 7478 bild #imm,rd * cmp.l rs,rd 7479 bild #imm,@rd daa rs 7480 bild #imm,@abs:8 das rs 7481 bior #imm,rd dec.b rs 7482 bior #imm,@rd * dec.w #imm,rd 7483 bior #imm,@abs:8 * dec.l #imm,rd 7484 bist #imm,rd divxu.b rs,rd 7485 bist #imm,@rd * divxu.w rs,rd 7486 bist #imm,@abs:8 * divxs.b rs,rd 7487 bixor #imm,rd * divxs.w rs,rd 7488 bixor #imm,@rd eepmov 7489 bixor #imm,@abs:8 * eepmovw 7490 7491 * exts.w rd mov.w rs,@abs:16 7492 * exts.l rd * mov.l #imm,rd 7493 * extu.w rd * mov.l rs,rd 7494 * extu.l rd * mov.l @rs,rd 7495 inc rs * mov.l @(disp:16,rs),rd 7496 * inc.w #imm,rd * mov.l @(disp:24,rs),rd 7497 * inc.l #imm,rd * mov.l @rs+,rd 7498 jmp @rs * mov.l @abs:16,rd 7499 jmp abs * mov.l @abs:24,rd 7500 jmp @@abs:8 * mov.l rs,@rd 7501 jsr @rs * mov.l rs,@(disp:16,rd) 7502 jsr abs * mov.l rs,@(disp:24,rd) 7503 jsr @@abs:8 * mov.l rs,@-rd 7504 ldc #imm,ccr * mov.l rs,@abs:16 7505 ldc rs,ccr * mov.l rs,@abs:24 7506 * ldc @abs:16,ccr movfpe @abs:16,rd 7507 * ldc @abs:24,ccr movtpe rs,@abs:16 7508 * ldc @(disp:16,rs),ccr mulxu.b rs,rd 7509 * ldc @(disp:24,rs),ccr * mulxu.w rs,rd 7510 * ldc @rs+,ccr * mulxs.b rs,rd 7511 * ldc @rs,ccr * mulxs.w rs,rd 7512 * mov.b @(disp:24,rs),rd neg.b rs 7513 * mov.b rs,@(disp:24,rd) * neg.w rs 7514 mov.b @abs:16,rd * neg.l rs 7515 mov.b rs,rd nop 7516 mov.b @abs:8,rd not.b rs 7517 mov.b rs,@abs:8 * not.w rs 7518 mov.b rs,rd * not.l rs 7519 mov.b #imm,rd or.b #imm,rd 7520 mov.b @rs,rd or.b rs,rd 7521 mov.b @(disp:16,rs),rd * or.w #imm,rd 7522 mov.b @rs+,rd * or.w rs,rd 7523 mov.b @abs:8,rd * or.l #imm,rd 7524 mov.b rs,@rd * or.l rs,rd 7525 mov.b rs,@(disp:16,rd) orc #imm,ccr 7526 mov.b rs,@-rd pop.w rs 7527 mov.b rs,@abs:8 * pop.l rs 7528 mov.w rs,@rd push.w rs 7529 * mov.w @(disp:24,rs),rd * push.l rs 7530 * mov.w rs,@(disp:24,rd) rotl.b rs 7531 * mov.w @abs:24,rd * rotl.w rs 7532 * mov.w rs,@abs:24 * rotl.l rs 7533 mov.w rs,rd rotr.b rs 7534 mov.w #imm,rd * rotr.w rs 7535 mov.w @rs,rd * rotr.l rs 7536 mov.w @(disp:16,rs),rd rotxl.b rs 7537 mov.w @rs+,rd * rotxl.w rs 7538 mov.w @abs:16,rd * rotxl.l rs 7539 mov.w rs,@(disp:16,rd) rotxr.b rs 7540 mov.w rs,@-rd * rotxr.w rs 7541 7542 * rotxr.l rs * stc ccr,@(disp:24,rd) 7543 bpt * stc ccr,@-rd 7544 rte * stc ccr,@abs:16 7545 rts * stc ccr,@abs:24 7546 shal.b rs sub.b rs,rd 7547 * shal.w rs sub.w rs,rd 7548 * shal.l rs * sub.w #imm,rd 7549 shar.b rs * sub.l rs,rd 7550 * shar.w rs * sub.l #imm,rd 7551 * shar.l rs subs #imm,rd 7552 shll.b rs subx #imm,rd 7553 * shll.w rs subx rs,rd 7554 * shll.l rs * trapa #imm 7555 shlr.b rs xor #imm,rd 7556 * shlr.w rs xor rs,rd 7557 * shlr.l rs * xor.w #imm,rd 7558 sleep * xor.w rs,rd 7559 stc ccr,rd * xor.l #imm,rd 7560 * stc ccr,@rs * xor.l rs,rd 7561 * stc ccr,@(disp:16,rd) xorc #imm,ccr 7562 7563 Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined 7564with variants using the suffixes `.b', `.w', and `.l' to specify the 7565size of a memory operand. `as' supports these suffixes, but does not 7566require them; since one of the operands is always a register, `as' can 7567deduce the correct size. 7568 7569 For example, since `r0' refers to a 16-bit register, 7570 mov r0,@foo 7571is equivalent to 7572 mov.w r0,@foo 7573 7574 If you use the size suffixes, `as' issues a warning when the suffix 7575and the register size do not match. 7576 7577 7578File: as.info, Node: HPPA-Dependent, Next: ESA/390-Dependent, Prev: H8/300-Dependent, Up: Machine Dependencies 7579 75808.9 HPPA Dependent Features 7581=========================== 7582 7583* Menu: 7584 7585* HPPA Notes:: Notes 7586* HPPA Options:: Options 7587* HPPA Syntax:: Syntax 7588* HPPA Floating Point:: Floating Point 7589* HPPA Directives:: HPPA Machine Directives 7590* HPPA Opcodes:: Opcodes 7591 7592 7593File: as.info, Node: HPPA Notes, Next: HPPA Options, Up: HPPA-Dependent 7594 75958.9.1 Notes 7596----------- 7597 7598As a back end for GNU CC `as' has been throughly tested and should work 7599extremely well. We have tested it only minimally on hand written 7600assembly code and no one has tested it much on the assembly output from 7601the HP compilers. 7602 7603 The format of the debugging sections has changed since the original 7604`as' port (version 1.3X) was released; therefore, you must rebuild all 7605HPPA objects and libraries with the new assembler so that you can debug 7606the final executable. 7607 7608 The HPPA `as' port generates a small subset of the relocations 7609available in the SOM and ELF object file formats. Additional relocation 7610support will be added as it becomes necessary. 7611 7612 7613File: as.info, Node: HPPA Options, Next: HPPA Syntax, Prev: HPPA Notes, Up: HPPA-Dependent 7614 76158.9.2 Options 7616------------- 7617 7618`as' has no machine-dependent command-line options for the HPPA. 7619 7620 7621File: as.info, Node: HPPA Syntax, Next: HPPA Floating Point, Prev: HPPA Options, Up: HPPA-Dependent 7622 76238.9.3 Syntax 7624------------ 7625 7626The assembler syntax closely follows the HPPA instruction set reference 7627manual; assembler directives and general syntax closely follow the HPPA 7628assembly language reference manual, with a few noteworthy differences. 7629 7630 First, a colon may immediately follow a label definition. This is 7631simply for compatibility with how most assembly language programmers 7632write code. 7633 7634 Some obscure expression parsing problems may affect hand written 7635code which uses the `spop' instructions, or code which makes significant 7636use of the `!' line separator. 7637 7638 `as' is much less forgiving about missing arguments and other 7639similar oversights than the HP assembler. `as' notifies you of missing 7640arguments as syntax errors; this is regarded as a feature, not a bug. 7641 7642 Finally, `as' allows you to use an external symbol without 7643explicitly importing the symbol. _Warning:_ in the future this will be 7644an error for HPPA targets. 7645 7646 Special characters for HPPA targets include: 7647 7648 `;' is the line comment character. 7649 7650 `!' can be used instead of a newline to separate statements. 7651 7652 Since `$' has no special meaning, you may use it in symbol names. 7653 7654 7655File: as.info, Node: HPPA Floating Point, Next: HPPA Directives, Prev: HPPA Syntax, Up: HPPA-Dependent 7656 76578.9.4 Floating Point 7658-------------------- 7659 7660The HPPA family uses IEEE floating-point numbers. 7661 7662 7663File: as.info, Node: HPPA Directives, Next: HPPA Opcodes, Prev: HPPA Floating Point, Up: HPPA-Dependent 7664 76658.9.5 HPPA Assembler Directives 7666------------------------------- 7667 7668`as' for the HPPA supports many additional directives for compatibility 7669with the native assembler. This section describes them only briefly. 7670For detailed information on HPPA-specific assembler directives, see 7671`HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001). 7672 7673 `as' does _not_ support the following assembler directives described 7674in the HP manual: 7675 7676 .endm .liston 7677 .enter .locct 7678 .leave .macro 7679 .listoff 7680 7681 Beyond those implemented for compatibility, `as' supports one 7682additional assembler directive for the HPPA: `.param'. It conveys 7683register argument locations for static functions. Its syntax closely 7684follows the `.export' directive. 7685 7686 These are the additional directives in `as' for the HPPA: 7687 7688`.block N' 7689`.blockz N' 7690 Reserve N bytes of storage, and initialize them to zero. 7691 7692`.call' 7693 Mark the beginning of a procedure call. Only the special case 7694 with _no arguments_ is allowed. 7695 7696`.callinfo [ PARAM=VALUE, ... ] [ FLAG, ... ]' 7697 Specify a number of parameters and flags that define the 7698 environment for a procedure. 7699 7700 PARAM may be any of `frame' (frame size), `entry_gr' (end of 7701 general register range), `entry_fr' (end of float register range), 7702 `entry_sr' (end of space register range). 7703 7704 The values for FLAG are `calls' or `caller' (proc has 7705 subroutines), `no_calls' (proc does not call subroutines), 7706 `save_rp' (preserve return pointer), `save_sp' (proc preserves 7707 stack pointer), `no_unwind' (do not unwind this proc), `hpux_int' 7708 (proc is interrupt routine). 7709 7710`.code' 7711 Assemble into the standard section called `$TEXT$', subsection 7712 `$CODE$'. 7713 7714`.copyright "STRING"' 7715 In the SOM object format, insert STRING into the object code, 7716 marked as a copyright string. 7717 7718`.copyright "STRING"' 7719 In the ELF object format, insert STRING into the object code, 7720 marked as a version string. 7721 7722`.enter' 7723 Not yet supported; the assembler rejects programs containing this 7724 directive. 7725 7726`.entry' 7727 Mark the beginning of a procedure. 7728 7729`.exit' 7730 Mark the end of a procedure. 7731 7732`.export NAME [ ,TYP ] [ ,PARAM=R ]' 7733 Make a procedure NAME available to callers. TYP, if present, must 7734 be one of `absolute', `code' (ELF only, not SOM), `data', `entry', 7735 `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'. 7736 7737 PARAM, if present, provides either relocation information for the 7738 procedure arguments and result, or a privilege level. PARAM may be 7739 `argwN' (where N ranges from `0' to `3', and indicates one of four 7740 one-word arguments); `rtnval' (the procedure's result); or 7741 `priv_lev' (privilege level). For arguments or the result, R 7742 specifies how to relocate, and must be one of `no' (not 7743 relocatable), `gr' (argument is in general register), `fr' (in 7744 floating point register), or `fu' (upper half of float register). 7745 For `priv_lev', R is an integer. 7746 7747`.half N' 7748 Define a two-byte integer constant N; synonym for the portable 7749 `as' directive `.short'. 7750 7751`.import NAME [ ,TYP ]' 7752 Converse of `.export'; make a procedure available to call. The 7753 arguments use the same conventions as the first two arguments for 7754 `.export'. 7755 7756`.label NAME' 7757 Define NAME as a label for the current assembly location. 7758 7759`.leave' 7760 Not yet supported; the assembler rejects programs containing this 7761 directive. 7762 7763`.origin LC' 7764 Advance location counter to LC. Synonym for the `as' portable 7765 directive `.org'. 7766 7767`.param NAME [ ,TYP ] [ ,PARAM=R ]' 7768 Similar to `.export', but used for static procedures. 7769 7770`.proc' 7771 Use preceding the first statement of a procedure. 7772 7773`.procend' 7774 Use following the last statement of a procedure. 7775 7776`LABEL .reg EXPR' 7777 Synonym for `.equ'; define LABEL with the absolute expression EXPR 7778 as its value. 7779 7780`.space SECNAME [ ,PARAMS ]' 7781 Switch to section SECNAME, creating a new section by that name if 7782 necessary. You may only use PARAMS when creating a new section, 7783 not when switching to an existing one. SECNAME may identify a 7784 section by number rather than by name. 7785 7786 If specified, the list PARAMS declares attributes of the section, 7787 identified by keywords. The keywords recognized are `spnum=EXP' 7788 (identify this section by the number EXP, an absolute expression), 7789 `sort=EXP' (order sections according to this sort key when linking; 7790 EXP is an absolute expression), `unloadable' (section contains no 7791 loadable data), `notdefined' (this section defined elsewhere), and 7792 `private' (data in this section not available to other programs). 7793 7794`.spnum SECNAM' 7795 Allocate four bytes of storage, and initialize them with the 7796 section number of the section named SECNAM. (You can define the 7797 section number with the HPPA `.space' directive.) 7798 7799`.string "STR"' 7800 Copy the characters in the string STR to the object file. *Note 7801 Strings: Strings, for information on escape sequences you can use 7802 in `as' strings. 7803 7804 _Warning!_ The HPPA version of `.string' differs from the usual 7805 `as' definition: it does _not_ write a zero byte after copying STR. 7806 7807`.stringz "STR"' 7808 Like `.string', but appends a zero byte after copying STR to object 7809 file. 7810 7811`.subspa NAME [ ,PARAMS ]' 7812`.nsubspa NAME [ ,PARAMS ]' 7813 Similar to `.space', but selects a subsection NAME within the 7814 current section. You may only specify PARAMS when you create a 7815 subsection (in the first instance of `.subspa' for this NAME). 7816 7817 If specified, the list PARAMS declares attributes of the 7818 subsection, identified by keywords. The keywords recognized are 7819 `quad=EXPR' ("quadrant" for this subsection), `align=EXPR' 7820 (alignment for beginning of this subsection; a power of two), 7821 `access=EXPR' (value for "access rights" field), `sort=EXPR' 7822 (sorting order for this subspace in link), `code_only' (subsection 7823 contains only code), `unloadable' (subsection cannot be loaded 7824 into memory), `comdat' (subsection is comdat), `common' 7825 (subsection is common block), `dup_comm' (subsection may have 7826 duplicate names), or `zero' (subsection is all zeros, do not write 7827 in object file). 7828 7829 `.nsubspa' always creates a new subspace with the given name, even 7830 if one with the same name already exists. 7831 7832 `comdat', `common' and `dup_comm' can be used to implement various 7833 flavors of one-only support when using the SOM linker. The SOM 7834 linker only supports specific combinations of these flags. The 7835 details are not documented. A brief description is provided here. 7836 7837 `comdat' provides a form of linkonce support. It is useful for 7838 both code and data subspaces. A `comdat' subspace has a key symbol 7839 marked by the `is_comdat' flag or `ST_COMDAT'. Only the first 7840 subspace for any given key is selected. The key symbol becomes 7841 universal in shared links. This is similar to the behavior of 7842 `secondary_def' symbols. 7843 7844 `common' provides Fortran named common support. It is only useful 7845 for data subspaces. Symbols with the flag `is_common' retain this 7846 flag in shared links. Referencing a `is_common' symbol in a shared 7847 library from outside the library doesn't work. Thus, `is_common' 7848 symbols must be output whenever they are needed. 7849 7850 `common' and `dup_comm' together provide Cobol common support. 7851 The subspaces in this case must all be the same length. 7852 Otherwise, this support is similar to the Fortran common support. 7853 7854 `dup_comm' by itself provides a type of one-only support for code. 7855 Only the first `dup_comm' subspace is selected. There is a rather 7856 complex algorithm to compare subspaces. Code symbols marked with 7857 the `dup_common' flag are hidden. This support was intended for 7858 "C++ duplicate inlines". 7859 7860 A simplified technique is used to mark the flags of symbols based 7861 on the flags of their subspace. A symbol with the scope 7862 SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with 7863 the corresponding settings of `comdat', `common' and `dup_comm' 7864 from the subspace, respectively. This avoids having to introduce 7865 additional directives to mark these symbols. The HP assembler 7866 sets `is_common' from `common'. However, it doesn't set the 7867 `dup_common' from `dup_comm'. It doesn't have `comdat' support. 7868 7869`.version "STR"' 7870 Write STR as version identifier in object code. 7871 7872 7873File: as.info, Node: HPPA Opcodes, Prev: HPPA Directives, Up: HPPA-Dependent 7874 78758.9.6 Opcodes 7876------------- 7877 7878For detailed information on the HPPA machine instruction set, see 7879`PA-RISC Architecture and Instruction Set Reference Manual' (HP 788009740-90039). 7881 7882 7883File: as.info, Node: ESA/390-Dependent, Next: i386-Dependent, Prev: HPPA-Dependent, Up: Machine Dependencies 7884 78858.10 ESA/390 Dependent Features 7886=============================== 7887 7888* Menu: 7889 7890* ESA/390 Notes:: Notes 7891* ESA/390 Options:: Options 7892* ESA/390 Syntax:: Syntax 7893* ESA/390 Floating Point:: Floating Point 7894* ESA/390 Directives:: ESA/390 Machine Directives 7895* ESA/390 Opcodes:: Opcodes 7896 7897 7898File: as.info, Node: ESA/390 Notes, Next: ESA/390 Options, Up: ESA/390-Dependent 7899 79008.10.1 Notes 7901------------ 7902 7903The ESA/390 `as' port is currently intended to be a back-end for the 7904GNU CC compiler. It is not HLASM compatible, although it does support 7905a subset of some of the HLASM directives. The only supported binary 7906file format is ELF; none of the usual MVS/VM/OE/USS object file 7907formats, such as ESD or XSD, are supported. 7908 7909 When used with the GNU CC compiler, the ESA/390 `as' will produce 7910correct, fully relocated, functional binaries, and has been used to 7911compile and execute large projects. However, many aspects should still 7912be considered experimental; these include shared library support, 7913dynamically loadable objects, and any relocation other than the 31-bit 7914relocation. 7915 7916 7917File: as.info, Node: ESA/390 Options, Next: ESA/390 Syntax, Prev: ESA/390 Notes, Up: ESA/390-Dependent 7918 79198.10.2 Options 7920-------------- 7921 7922`as' has no machine-dependent command-line options for the ESA/390. 7923 7924 7925File: as.info, Node: ESA/390 Syntax, Next: ESA/390 Floating Point, Prev: ESA/390 Options, Up: ESA/390-Dependent 7926 79278.10.3 Syntax 7928------------- 7929 7930The opcode/operand syntax follows the ESA/390 Principles of Operation 7931manual; assembler directives and general syntax are loosely based on the 7932prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives 7933are _not_ supported for the most part, with the exception of those 7934described herein. 7935 7936 A leading dot in front of directives is optional, and the case of 7937directives is ignored; thus for example, .using and USING have the same 7938effect. 7939 7940 A colon may immediately follow a label definition. This is simply 7941for compatibility with how most assembly language programmers write 7942code. 7943 7944 `#' is the line comment character. 7945 7946 `;' can be used instead of a newline to separate statements. 7947 7948 Since `$' has no special meaning, you may use it in symbol names. 7949 7950 Registers can be given the symbolic names r0..r15, fp0, fp2, fp4, 7951fp6. By using thesse symbolic names, `as' can detect simple syntax 7952errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for 7953r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base 7954for r3 and rpgt or r.pgt for r4. 7955 7956 `*' is the current location counter. Unlike `.' it is always 7957relative to the last USING directive. Note that this means that 7958expressions cannot use multiplication, as any occurrence of `*' will be 7959interpreted as a location counter. 7960 7961 All labels are relative to the last USING. Thus, branches to a label 7962always imply the use of base+displacement. 7963 7964 Many of the usual forms of address constants / address literals are 7965supported. Thus, 7966 .using *,r3 7967 L r15,=A(some_routine) 7968 LM r6,r7,=V(some_longlong_extern) 7969 A r1,=F'12' 7970 AH r0,=H'42' 7971 ME r6,=E'3.1416' 7972 MD r6,=D'3.14159265358979' 7973 O r6,=XL4'cacad0d0' 7974 .ltorg 7975 should all behave as expected: that is, an entry in the literal pool 7976will be created (or reused if it already exists), and the instruction 7977operands will be the displacement into the literal pool using the 7978current base register (as last declared with the `.using' directive). 7979 7980 7981File: as.info, Node: ESA/390 Floating Point, Next: ESA/390 Directives, Prev: ESA/390 Syntax, Up: ESA/390-Dependent 7982 79838.10.4 Floating Point 7984--------------------- 7985 7986The assembler generates only IEEE floating-point numbers. The older 7987floating point formats are not supported. 7988 7989 7990File: as.info, Node: ESA/390 Directives, Next: ESA/390 Opcodes, Prev: ESA/390 Floating Point, Up: ESA/390-Dependent 7991 79928.10.5 ESA/390 Assembler Directives 7993----------------------------------- 7994 7995`as' for the ESA/390 supports all of the standard ELF/SVR4 assembler 7996directives that are documented in the main part of this documentation. 7997Several additional directives are supported in order to implement the 7998ESA/390 addressing model. The most important of these are `.using' and 7999`.ltorg' 8000 8001 These are the additional directives in `as' for the ESA/390: 8002 8003`.dc' 8004 A small subset of the usual DC directive is supported. 8005 8006`.drop REGNO' 8007 Stop using REGNO as the base register. The REGNO must have been 8008 previously declared with a `.using' directive in the same section 8009 as the current section. 8010 8011`.ebcdic STRING' 8012 Emit the EBCDIC equivalent of the indicated string. The emitted 8013 string will be null terminated. Note that the directives 8014 `.string' etc. emit ascii strings by default. 8015 8016`EQU' 8017 The standard HLASM-style EQU directive is not supported; however, 8018 the standard `as' directive .equ can be used to the same effect. 8019 8020`.ltorg' 8021 Dump the literal pool accumulated so far; begin a new literal pool. 8022 The literal pool will be written in the current section; in order 8023 to generate correct assembly, a `.using' must have been previously 8024 specified in the same section. 8025 8026`.using EXPR,REGNO' 8027 Use REGNO as the base register for all subsequent RX, RS, and SS 8028 form instructions. The EXPR will be evaluated to obtain the base 8029 address; usually, EXPR will merely be `*'. 8030 8031 This assembler allows two `.using' directives to be simultaneously 8032 outstanding, one in the `.text' section, and one in another section 8033 (typically, the `.data' section). This feature allows dynamically 8034 loaded objects to be implemented in a relatively straightforward 8035 way. A `.using' directive must always be specified in the `.text' 8036 section; this will specify the base register that will be used for 8037 branches in the `.text' section. A second `.using' may be 8038 specified in another section; this will specify the base register 8039 that is used for non-label address literals. When a second 8040 `.using' is specified, then the subsequent `.ltorg' must be put in 8041 the same section; otherwise an error will result. 8042 8043 Thus, for example, the following code uses `r3' to address branch 8044 targets and `r4' to address the literal pool, which has been 8045 written to the `.data' section. The is, the constants 8046 `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in 8047 the `.data' section. 8048 8049 .data 8050 .using LITPOOL,r4 8051 .text 8052 BASR r3,0 8053 .using *,r3 8054 B START 8055 .long LITPOOL 8056 START: 8057 L r4,4(,r3) 8058 L r15,=A(some_routine) 8059 LTR r15,r15 8060 BNE LABEL 8061 AH r0,=H'42' 8062 LABEL: 8063 ME r6,=E'3.1416' 8064 .data 8065 LITPOOL: 8066 .ltorg 8067 8068 Note that this dual-`.using' directive semantics extends and is 8069 not compatible with HLASM semantics. Note that this assembler 8070 directive does not support the full range of HLASM semantics. 8071 8072 8073 8074File: as.info, Node: ESA/390 Opcodes, Prev: ESA/390 Directives, Up: ESA/390-Dependent 8075 80768.10.6 Opcodes 8077-------------- 8078 8079For detailed information on the ESA/390 machine instruction set, see 8080`ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004). 8081 8082 8083File: as.info, Node: i386-Dependent, Next: i860-Dependent, Prev: ESA/390-Dependent, Up: Machine Dependencies 8084 80858.11 80386 Dependent Features 8086============================= 8087 8088 The i386 version `as' supports both the original Intel 386 8089architecture in both 16 and 32-bit mode as well as AMD x86-64 8090architecture extending the Intel architecture to 64-bits. 8091 8092* Menu: 8093 8094* i386-Options:: Options 8095* i386-Syntax:: AT&T Syntax versus Intel Syntax 8096* i386-Mnemonics:: Instruction Naming 8097* i386-Regs:: Register Naming 8098* i386-Prefixes:: Instruction Prefixes 8099* i386-Memory:: Memory References 8100* i386-Jumps:: Handling of Jump Instructions 8101* i386-Float:: Floating Point 8102* i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations 8103* i386-16bit:: Writing 16-bit Code 8104* i386-Arch:: Specifying an x86 CPU architecture 8105* i386-Bugs:: AT&T Syntax bugs 8106* i386-Notes:: Notes 8107 8108 8109File: as.info, Node: i386-Options, Next: i386-Syntax, Up: i386-Dependent 8110 81118.11.1 Options 8112-------------- 8113 8114The i386 version of `as' has a few machine dependent options: 8115 8116`--32 | --64' 8117 Select the word size, either 32 bits or 64 bits. Selecting 32-bit 8118 implies Intel i386 architecture, while 64-bit implies AMD x86-64 8119 architecture. 8120 8121 These options are only available with the ELF object file format, 8122 and require that the necessary BFD support has been included (on a 8123 32-bit platform you have to add -enable-64-bit-bfd to configure 8124 enable 64-bit usage and use x86-64 as target platform). 8125 8126`-n' 8127 By default, x86 GAS replaces multiple nop instructions used for 8128 alignment within code sections with multi-byte nop instructions 8129 such as leal 0(%esi,1),%esi. This switch disables the 8130 optimization. 8131 8132`--divide' 8133 On SVR4-derived platforms, the character `/' is treated as a 8134 comment character, which means that it cannot be used in 8135 expressions. The `--divide' option turns `/' into a normal 8136 character. This does not disable `/' at the beginning of a line 8137 starting a comment, or affect using `#' for starting a comment. 8138 8139 8140 8141File: as.info, Node: i386-Syntax, Next: i386-Mnemonics, Prev: i386-Options, Up: i386-Dependent 8142 81438.11.2 AT&T Syntax versus Intel Syntax 8144-------------------------------------- 8145 8146`as' now supports assembly using Intel assembler syntax. 8147`.intel_syntax' selects Intel mode, and `.att_syntax' switches back to 8148the usual AT&T mode for compatibility with the output of `gcc'. Either 8149of these directives may have an optional argument, `prefix', or 8150`noprefix' specifying whether registers require a `%' prefix. AT&T 8151System V/386 assembler syntax is quite different from Intel syntax. We 8152mention these differences because almost all 80386 documents use Intel 8153syntax. Notable differences between the two syntaxes are: 8154 8155 * AT&T immediate operands are preceded by `$'; Intel immediate 8156 operands are undelimited (Intel `push 4' is AT&T `pushl $4'). 8157 AT&T register operands are preceded by `%'; Intel register operands 8158 are undelimited. AT&T absolute (as opposed to PC relative) 8159 jump/call operands are prefixed by `*'; they are undelimited in 8160 Intel syntax. 8161 8162 * AT&T and Intel syntax use the opposite order for source and 8163 destination operands. Intel `add eax, 4' is `addl $4, %eax'. The 8164 `source, dest' convention is maintained for compatibility with 8165 previous Unix assemblers. Note that instructions with more than 8166 one source operand, such as the `enter' instruction, do _not_ have 8167 reversed order. *note i386-Bugs::. 8168 8169 * In AT&T syntax the size of memory operands is determined from the 8170 last character of the instruction mnemonic. Mnemonic suffixes of 8171 `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long 8172 (32-bit) and quadruple word (64-bit) memory references. Intel 8173 syntax accomplishes this by prefixing memory operands (_not_ the 8174 instruction mnemonics) with `byte ptr', `word ptr', `dword ptr' 8175 and `qword ptr'. Thus, Intel `mov al, byte ptr FOO' is `movb FOO, 8176 %al' in AT&T syntax. 8177 8178 * Immediate form long jumps and calls are `lcall/ljmp $SECTION, 8179 $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far 8180 SECTION:OFFSET'. Also, the far return instruction is `lret 8181 $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far 8182 STACK-ADJUST'. 8183 8184 * The AT&T assembler does not provide support for multiple section 8185 programs. Unix style systems expect all programs to be single 8186 sections. 8187 8188 8189File: as.info, Node: i386-Mnemonics, Next: i386-Regs, Prev: i386-Syntax, Up: i386-Dependent 8190 81918.11.3 Instruction Naming 8192------------------------- 8193 8194Instruction mnemonics are suffixed with one character modifiers which 8195specify the size of operands. The letters `b', `w', `l' and `q' 8196specify byte, word, long and quadruple word operands. If no suffix is 8197specified by an instruction then `as' tries to fill in the missing 8198suffix based on the destination register operand (the last one by 8199convention). Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx'; 8200also, `mov $1, %bx' is equivalent to `movw $1, bx'. Note that this is 8201incompatible with the AT&T Unix assembler which assumes that a missing 8202mnemonic suffix implies long operand size. (This incompatibility does 8203not affect compiler output since compilers always explicitly specify 8204the mnemonic suffix.) 8205 8206 Almost all instructions have the same names in AT&T and Intel format. 8207There are a few exceptions. The sign extend and zero extend 8208instructions need two sizes to specify them. They need a size to 8209sign/zero extend _from_ and a size to zero extend _to_. This is 8210accomplished by using two instruction mnemonic suffixes in AT&T syntax. 8211Base names for sign extend and zero extend are `movs...' and `movz...' 8212in AT&T syntax (`movsx' and `movzx' in Intel syntax). The instruction 8213mnemonic suffixes are tacked on to this base name, the _from_ suffix 8214before the _to_ suffix. Thus, `movsbl %al, %edx' is AT&T syntax for 8215"move sign extend _from_ %al _to_ %edx." Possible suffixes, thus, are 8216`bl' (from byte to long), `bw' (from byte to word), `wl' (from word to 8217long), `bq' (from byte to quadruple word), `wq' (from word to quadruple 8218word), and `lq' (from long to quadruple word). 8219 8220 The Intel-syntax conversion instructions 8221 8222 * `cbw' -- sign-extend byte in `%al' to word in `%ax', 8223 8224 * `cwde' -- sign-extend word in `%ax' to long in `%eax', 8225 8226 * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax', 8227 8228 * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax', 8229 8230 * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64 8231 only), 8232 8233 * `cqo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax' 8234 (x86-64 only), 8235 8236are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T 8237naming. `as' accepts either naming for these instructions. 8238 8239 Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax, 8240but are `call far' and `jump far' in Intel convention. 8241 8242 8243File: as.info, Node: i386-Regs, Next: i386-Prefixes, Prev: i386-Mnemonics, Up: i386-Dependent 8244 82458.11.4 Register Naming 8246---------------------- 8247 8248Register operands are always prefixed with `%'. The 80386 registers 8249consist of 8250 8251 * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx', 8252 `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp' 8253 (the stack pointer). 8254 8255 * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di', 8256 `%si', `%bp', and `%sp'. 8257 8258 * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl', 8259 `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax', 8260 `%bx', `%cx', and `%dx') 8261 8262 * the 6 section registers `%cs' (code section), `%ds' (data 8263 section), `%ss' (stack section), `%es', `%fs', and `%gs'. 8264 8265 * the 3 processor control registers `%cr0', `%cr2', and `%cr3'. 8266 8267 * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and 8268 `%db7'. 8269 8270 * the 2 test registers `%tr6' and `%tr7'. 8271 8272 * the 8 floating point register stack `%st' or equivalently 8273 `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)', 8274 `%st(6)', and `%st(7)'. These registers are overloaded by 8 MMX 8275 registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6' 8276 and `%mm7'. 8277 8278 * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3', 8279 `%xmm4', `%xmm5', `%xmm6' and `%xmm7'. 8280 8281 The AMD x86-64 architecture extends the register set by: 8282 8283 * enhancing the 8 32-bit registers to 64-bit: `%rax' (the 8284 accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the 8285 frame pointer), `%rsp' (the stack pointer) 8286 8287 * the 8 extended registers `%r8'-`%r15'. 8288 8289 * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d' 8290 8291 * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w' 8292 8293 * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b' 8294 8295 * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'. 8296 8297 * the 8 debug registers: `%db8'-`%db15'. 8298 8299 * the 8 SSE registers: `%xmm8'-`%xmm15'. 8300 8301 8302File: as.info, Node: i386-Prefixes, Next: i386-Memory, Prev: i386-Regs, Up: i386-Dependent 8303 83048.11.5 Instruction Prefixes 8305--------------------------- 8306 8307Instruction prefixes are used to modify the following instruction. They 8308are used to repeat string instructions, to provide section overrides, to 8309perform bus lock operations, and to change operand and address sizes. 8310(Most instructions that normally operate on 32-bit operands will use 831116-bit operands if the instruction has an "operand size" prefix.) 8312Instruction prefixes are best written on the same line as the 8313instruction they act upon. For example, the `scas' (scan string) 8314instruction is repeated with: 8315 8316 repne scas %es:(%edi),%al 8317 8318 You may also place prefixes on the lines immediately preceding the 8319instruction, but this circumvents checks that `as' does with prefixes, 8320and will not work with all prefixes. 8321 8322 Here is a list of instruction prefixes: 8323 8324 * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'. 8325 These are automatically added by specifying using the 8326 SECTION:MEMORY-OPERAND form for memory references. 8327 8328 * Operand/Address size prefixes `data16' and `addr16' change 32-bit 8329 operands/addresses into 16-bit operands/addresses, while `data32' 8330 and `addr32' change 16-bit ones (in a `.code16' section) into 8331 32-bit operands/addresses. These prefixes _must_ appear on the 8332 same line of code as the instruction they modify. For example, in 8333 a 16-bit `.code16' section, you might write: 8334 8335 addr32 jmpl *(%ebx) 8336 8337 * The bus lock prefix `lock' inhibits interrupts during execution of 8338 the instruction it precedes. (This is only valid with certain 8339 instructions; see a 80386 manual for details). 8340 8341 * The wait for coprocessor prefix `wait' waits for the coprocessor to 8342 complete the current instruction. This should never be needed for 8343 the 80386/80387 combination. 8344 8345 * The `rep', `repe', and `repne' prefixes are added to string 8346 instructions to make them repeat `%ecx' times (`%cx' times if the 8347 current address size is 16-bits). 8348 8349 * The `rex' family of prefixes is used by x86-64 to encode 8350 extensions to i386 instruction set. The `rex' prefix has four 8351 bits -- an operand size overwrite (`64') used to change operand 8352 size from 32-bit to 64-bit and X, Y and Z extensions bits used to 8353 extend the register set. 8354 8355 You may write the `rex' prefixes directly. The `rex64xyz' 8356 instruction emits `rex' prefix with all the bits set. By omitting 8357 the `64', `x', `y' or `z' you may write other prefixes as well. 8358 Normally, there is no need to write the prefixes explicitly, since 8359 gas will automatically generate them based on the instruction 8360 operands. 8361 8362 8363File: as.info, Node: i386-Memory, Next: i386-Jumps, Prev: i386-Prefixes, Up: i386-Dependent 8364 83658.11.6 Memory References 8366------------------------ 8367 8368An Intel syntax indirect memory reference of the form 8369 8370 SECTION:[BASE + INDEX*SCALE + DISP] 8371 8372is translated into the AT&T syntax 8373 8374 SECTION:DISP(BASE, INDEX, SCALE) 8375 8376where BASE and INDEX are the optional 32-bit base and index registers, 8377DISP is the optional displacement, and SCALE, taking the values 1, 2, 83784, and 8, multiplies INDEX to calculate the address of the operand. If 8379no SCALE is specified, SCALE is taken to be 1. SECTION specifies the 8380optional section register for the memory operand, and may override the 8381default section register (see a 80386 manual for section register 8382defaults). Note that section overrides in AT&T syntax _must_ be 8383preceded by a `%'. If you specify a section override which coincides 8384with the default section register, `as' does _not_ output any section 8385register override prefixes to assemble the given instruction. Thus, 8386section overrides can be specified to emphasize which section register 8387is used for a given memory operand. 8388 8389 Here are some examples of Intel and AT&T style memory references: 8390 8391AT&T: `-4(%ebp)', Intel: `[ebp - 4]' 8392 BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default 8393 section is used (`%ss' for addressing with `%ebp' as the base 8394 register). INDEX, SCALE are both missing. 8395 8396AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]' 8397 INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'. All other 8398 fields are missing. The section register here defaults to `%ds'. 8399 8400AT&T: `foo(,1)'; Intel `[foo]' 8401 This uses the value pointed to by `foo' as a memory operand. Note 8402 that BASE and INDEX are both missing, but there is only _one_ `,'. 8403 This is a syntactic exception. 8404 8405AT&T: `%gs:foo'; Intel `gs:foo' 8406 This selects the contents of the variable `foo' with section 8407 register SECTION being `%gs'. 8408 8409 Absolute (as opposed to PC relative) call and jump operands must be 8410prefixed with `*'. If no `*' is specified, `as' always chooses PC 8411relative addressing for jump/call labels. 8412 8413 Any instruction that has a memory operand, but no register operand, 8414_must_ specify its size (byte, word, long, or quadruple) with an 8415instruction mnemonic suffix (`b', `w', `l' or `q', respectively). 8416 8417 The x86-64 architecture adds an RIP (instruction pointer relative) 8418addressing. This addressing mode is specified by using `rip' as a base 8419register. Only constant offsets are valid. For example: 8420 8421AT&T: `1234(%rip)', Intel: `[rip + 1234]' 8422 Points to the address 1234 bytes past the end of the current 8423 instruction. 8424 8425AT&T: `symbol(%rip)', Intel: `[rip + symbol]' 8426 Points to the `symbol' in RIP relative way, this is shorter than 8427 the default absolute addressing. 8428 8429 Other addressing modes remain unchanged in x86-64 architecture, 8430except registers used are 64-bit instead of 32-bit. 8431 8432 8433File: as.info, Node: i386-Jumps, Next: i386-Float, Prev: i386-Memory, Up: i386-Dependent 8434 84358.11.7 Handling of Jump Instructions 8436------------------------------------ 8437 8438Jump instructions are always optimized to use the smallest possible 8439displacements. This is accomplished by using byte (8-bit) displacement 8440jumps whenever the target is sufficiently close. If a byte displacement 8441is insufficient a long displacement is used. We do not support word 8442(16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump 8443instruction with the `data16' instruction prefix), since the 80386 8444insists upon masking `%eip' to 16 bits after the word displacement is 8445added. (See also *note i386-Arch::) 8446 8447 Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz' 8448and `loopne' instructions only come in byte displacements, so that if 8449you use these instructions (`gcc' does not use them) you may get an 8450error message (and incorrect code). The AT&T 80386 assembler tries to 8451get around this problem by expanding `jcxz foo' to 8452 8453 jcxz cx_zero 8454 jmp cx_nonzero 8455 cx_zero: jmp foo 8456 cx_nonzero: 8457 8458 8459File: as.info, Node: i386-Float, Next: i386-SIMD, Prev: i386-Jumps, Up: i386-Dependent 8460 84618.11.8 Floating Point 8462--------------------- 8463 8464All 80387 floating point types except packed BCD are supported. (BCD 8465support may be added without much difficulty). These data types are 846616-, 32-, and 64- bit integers, and single (32-bit), double (64-bit), 8467and extended (80-bit) precision floating point. Each supported type 8468has an instruction mnemonic suffix and a constructor associated with 8469it. Instruction mnemonic suffixes specify the operand's data type. 8470Constructors build these data types into memory. 8471 8472 * Floating point constructors are `.float' or `.single', `.double', 8473 and `.tfloat' for 32-, 64-, and 80-bit formats. These correspond 8474 to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for 8475 80-bit (ten byte) real. The 80387 only supports this format via 8476 the `fldt' (load 80-bit real to stack top) and `fstpt' (store 8477 80-bit real and pop stack) instructions. 8478 8479 * Integer constructors are `.word', `.long' or `.int', and `.quad' 8480 for the 16-, 32-, and 64-bit integer formats. The corresponding 8481 instruction mnemonic suffixes are `s' (single), `l' (long), and 8482 `q' (quad). As with the 80-bit real format, the 64-bit `q' format 8483 is only present in the `fildq' (load quad integer to stack top) 8484 and `fistpq' (store quad integer and pop stack) instructions. 8485 8486 Register to register operations should not use instruction mnemonic 8487suffixes. `fstl %st, %st(1)' will give a warning, and be assembled as 8488if you wrote `fst %st, %st(1)', since all register to register 8489operations use 80-bit floating point operands. (Contrast this with 8490`fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating 8491point format, then stores the result in the 4 byte location `mem') 8492 8493 8494File: as.info, Node: i386-SIMD, Next: i386-16bit, Prev: i386-Float, Up: i386-Dependent 8495 84968.11.9 Intel's MMX and AMD's 3DNow! SIMD Operations 8497--------------------------------------------------- 8498 8499`as' supports Intel's MMX instruction set (SIMD instructions for 8500integer data), available on Intel's Pentium MMX processors and Pentium 8501II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and 8502probably others. It also supports AMD's 3DNow! instruction set (SIMD 8503instructions for 32-bit floating point data) available on AMD's K6-2 8504processor and possibly others in the future. 8505 8506 Currently, `as' does not support Intel's floating point SIMD, Katmai 8507(KNI). 8508 8509 The eight 64-bit MMX operands, also used by 3DNow!, are called 8510`%mm0', `%mm1', ... `%mm7'. They contain eight 8-bit integers, four 851116-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit 8512floating point values. The MMX registers cannot be used at the same 8513time as the floating point stack. 8514 8515 See Intel and AMD documentation, keeping in mind that the operand 8516order in instructions is reversed from the Intel syntax. 8517 8518 8519File: as.info, Node: i386-16bit, Next: i386-Arch, Prev: i386-SIMD, Up: i386-Dependent 8520 85218.11.10 Writing 16-bit Code 8522--------------------------- 8523 8524While `as' normally writes only "pure" 32-bit i386 code or 64-bit 8525x86-64 code depending on the default configuration, it also supports 8526writing code to run in real mode or in 16-bit protected mode code 8527segments. To do this, put a `.code16' or `.code16gcc' directive before 8528the assembly language instructions to be run in 16-bit mode. You can 8529switch `as' back to writing normal 32-bit code with the `.code32' 8530directive. 8531 8532 `.code16gcc' provides experimental support for generating 16-bit 8533code from gcc, and differs from `.code16' in that `call', `ret', 8534`enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf' 8535instructions default to 32-bit size. This is so that the stack pointer 8536is manipulated in the same way over function calls, allowing access to 8537function parameters at the same stack offsets as in 32-bit mode. 8538`.code16gcc' also automatically adds address size prefixes where 8539necessary to use the 32-bit addressing modes that gcc generates. 8540 8541 The code which `as' generates in 16-bit mode will not necessarily 8542run on a 16-bit pre-80386 processor. To write code that runs on such a 8543processor, you must refrain from using _any_ 32-bit constructs which 8544require `as' to output address or operand size prefixes. 8545 8546 Note that writing 16-bit code instructions by explicitly specifying a 8547prefix or an instruction mnemonic suffix within a 32-bit code section 8548generates different machine instructions than those generated for a 854916-bit code segment. In a 32-bit code section, the following code 8550generates the machine opcode bytes `66 6a 04', which pushes the value 8551`4' onto the stack, decrementing `%esp' by 2. 8552 8553 pushw $4 8554 8555 The same code in a 16-bit code section would generate the machine 8556opcode bytes `6a 04' (ie. without the operand size prefix), which is 8557correct since the processor default operand size is assumed to be 16 8558bits in a 16-bit code section. 8559 8560 8561File: as.info, Node: i386-Bugs, Next: i386-Notes, Prev: i386-Arch, Up: i386-Dependent 8562 85638.11.11 AT&T Syntax bugs 8564------------------------ 8565 8566The UnixWare assembler, and probably other AT&T derived ix86 Unix 8567assemblers, generate floating point instructions with reversed source 8568and destination registers in certain cases. Unfortunately, gcc and 8569possibly many other programs use this reversed syntax, so we're stuck 8570with it. 8571 8572 For example 8573 8574 fsub %st,%st(3) 8575 results in `%st(3)' being updated to `%st - %st(3)' rather than the 8576expected `%st(3) - %st'. This happens with all the non-commutative 8577arithmetic floating point operations with two register operands where 8578the source register is `%st' and the destination register is `%st(i)'. 8579 8580 8581File: as.info, Node: i386-Arch, Next: i386-Bugs, Prev: i386-16bit, Up: i386-Dependent 8582 85838.11.12 Specifying CPU Architecture 8584----------------------------------- 8585 8586`as' may be told to assemble for a particular CPU (sub-)architecture 8587with the `.arch CPU_TYPE' directive. This directive enables a warning 8588when gas detects an instruction that is not supported on the CPU 8589specified. The choices for CPU_TYPE are: 8590 8591`i8086' `i186' `i286' `i386' 8592`i486' `i586' `i686' `pentium' 8593`pentiumpro' `pentiumii' `pentiumiii' `pentium4' 8594`k6' `athlon' 8595 `sledgehammer' 8596`.mmx' `.sse' 8597`.sse2' 8598`.sse3' 8599`.3dnow' 8600 8601 Apart from the warning, there are only two other effects on `as' 8602operation; Firstly, if you specify a CPU other than `i486', then shift 8603by one instructions such as `sarl $1, %eax' will automatically use a 8604two byte opcode sequence. The larger three byte opcode sequence is 8605used on the 486 (and when no architecture is specified) because it 8606executes faster on the 486. Note that you can explicitly request the 8607two byte opcode by writing `sarl %eax'. Secondly, if you specify 8608`i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte 8609offset conditional jumps will be promoted when necessary to a two 8610instruction sequence consisting of a conditional jump of the opposite 8611sense around an unconditional jump to the target. 8612 8613 Following the CPU architecture (but not a sub-architecture, which 8614are those starting with a dot), you may specify `jumps' or `nojumps' to 8615control automatic promotion of conditional jumps. `jumps' is the 8616default, and enables jump promotion; All external jumps will be of the 8617long variety, and file-local jumps will be promoted as necessary. 8618(*note i386-Jumps::) `nojumps' leaves external conditional jumps as 8619byte offset jumps, and warns about file-local conditional jumps that 8620`as' promotes. Unconditional jumps are treated as for `jumps'. 8621 8622 For example 8623 8624 .arch i8086,nojumps 8625 8626 8627File: as.info, Node: i386-Notes, Prev: i386-Bugs, Up: i386-Dependent 8628 86298.11.13 Notes 8630------------- 8631 8632There is some trickery concerning the `mul' and `imul' instructions 8633that deserves mention. The 16-, 32-, 64- and 128-bit expanding 8634multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul') 8635can be output only in the one operand form. Thus, `imul %ebx, %eax' 8636does _not_ select the expanding multiply; the expanding multiply would 8637clobber the `%edx' register, and this would confuse `gcc' output. Use 8638`imul %ebx' to get the 64-bit product in `%edx:%eax'. 8639 8640 We have added a two operand form of `imul' when the first operand is 8641an immediate mode expression and the second operand is a register. 8642This is just a shorthand, so that, multiplying `%eax' by 69, for 8643example, can be done with `imul $69, %eax' rather than `imul $69, %eax, 8644%eax'. 8645 8646 8647File: as.info, Node: i860-Dependent, Next: i960-Dependent, Prev: i386-Dependent, Up: Machine Dependencies 8648 86498.12 Intel i860 Dependent Features 8650================================== 8651 8652* Menu: 8653 8654* Notes-i860:: i860 Notes 8655* Options-i860:: i860 Command-line Options 8656* Directives-i860:: i860 Machine Directives 8657* Opcodes for i860:: i860 Opcodes 8658 8659 8660File: as.info, Node: Notes-i860, Next: Options-i860, Up: i860-Dependent 8661 86628.12.1 i860 Notes 8663----------------- 8664 8665This is a fairly complete i860 assembler which is compatible with the 8666UNIX System V/860 Release 4 assembler. However, it does not currently 8667support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT'). 8668 8669 Like the SVR4/860 assembler, the output object format is ELF32. 8670Currently, this is the only supported object format. If there is 8671sufficient interest, other formats such as COFF may be implemented. 8672 8673 Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter 8674being the default. One difference is that AT&T syntax requires the '%' 8675prefix on register names while Intel syntax does not. Another 8676difference is in the specification of relocatable expressions. The 8677Intel syntax is `ha%expression' whereas the SVR4 syntax is 8678`[expression]@ha' (and similarly for the "l" and "h" selectors). 8679 8680 8681File: as.info, Node: Options-i860, Next: Directives-i860, Prev: Notes-i860, Up: i860-Dependent 8682 86838.12.2 i860 Command-line Options 8684-------------------------------- 8685 86868.12.2.1 SVR4 compatibility options 8687................................... 8688 8689`-V' 8690 Print assembler version. 8691 8692`-Qy' 8693 Ignored. 8694 8695`-Qn' 8696 Ignored. 8697 86988.12.2.2 Other options 8699...................... 8700 8701`-EL' 8702 Select little endian output (this is the default). 8703 8704`-EB' 8705 Select big endian output. Note that the i860 always reads 8706 instructions as little endian data, so this option only effects 8707 data and not instructions. 8708 8709`-mwarn-expand' 8710 Emit a warning message if any pseudo-instruction expansions 8711 occurred. For example, a `or' instruction with an immediate 8712 larger than 16-bits will be expanded into two instructions. This 8713 is a very undesirable feature to rely on, so this flag can help 8714 detect any code where it happens. One use of it, for instance, has 8715 been to find and eliminate any place where `gcc' may emit these 8716 pseudo-instructions. 8717 8718`-mxp' 8719 Enable support for the i860XP instructions and control registers. 8720 By default, this option is disabled so that only the base 8721 instruction set (i.e., i860XR) is supported. 8722 8723`-mintel-syntax' 8724 The i860 assembler defaults to AT&T/SVR4 syntax. This option 8725 enables the Intel syntax. 8726 8727 8728File: as.info, Node: Directives-i860, Next: Opcodes for i860, Prev: Options-i860, Up: i860-Dependent 8729 87308.12.3 i860 Machine Directives 8731------------------------------ 8732 8733`.dual' 8734 Enter dual instruction mode. While this directive is supported, the 8735 preferred way to use dual instruction mode is to explicitly code 8736 the dual bit with the `d.' prefix. 8737 8738`.enddual' 8739 Exit dual instruction mode. While this directive is supported, the 8740 preferred way to use dual instruction mode is to explicitly code 8741 the dual bit with the `d.' prefix. 8742 8743`.atmp' 8744 Change the temporary register used when expanding pseudo 8745 operations. The default register is `r31'. 8746 8747 The `.dual', `.enddual', and `.atmp' directives are available only 8748in the Intel syntax mode. 8749 8750 Both syntaxes allow for the standard `.align' directive. However, 8751the Intel syntax additionally allows keywords for the alignment 8752parameter: "`.align type'", where `type' is one of `.short', `.long', 8753`.quad', `.single', `.double' representing alignments of 2, 4, 16, 4, 8754and 8, respectively. 8755 8756 8757File: as.info, Node: Opcodes for i860, Prev: Directives-i860, Up: i860-Dependent 8758 87598.12.4 i860 Opcodes 8760------------------- 8761 8762All of the Intel i860XR and i860XP machine instructions are supported. 8763Please see either _i860 Microprocessor Programmer's Reference Manual_ 8764or _i860 Microprocessor Architecture_ for more information. 8765 87668.12.4.1 Other instruction support (pseudo-instructions) 8767........................................................ 8768 8769For compatibility with some other i860 assemblers, a number of 8770pseudo-instructions are supported. While these are supported, they are 8771a very undesirable feature that should be avoided - in particular, when 8772they result in an expansion to multiple actual i860 instructions. Below 8773are the pseudo-instructions that result in expansions. 8774 * Load large immediate into general register: 8775 8776 The pseudo-instruction `mov imm,%rn' (where the immediate does not 8777 fit within a signed 16-bit field) will be expanded into: 8778 orh large_imm@h,%r0,%rn 8779 or large_imm@l,%rn,%rn 8780 8781 * Load/store with relocatable address expression: 8782 8783 For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will 8784 be expanded into: 8785 orh addr_exp@ha,%rx,%r31 8786 ld.l addr_exp@l(%r31),%rn 8787 8788 The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x, 8789 fst.x', and `pst.x' as well. 8790 8791 * Signed large immediate with add/subtract: 8792 8793 If any of the arithmetic operations `adds, addu, subs, subu' are 8794 used with an immediate larger than 16-bits (signed), then they 8795 will be expanded. For instance, the pseudo-instruction `adds 8796 large_imm,%rx,%rn' expands to: 8797 orh large_imm@h,%r0,%r31 8798 or large_imm@l,%r31,%r31 8799 adds %r31,%rx,%rn 8800 8801 * Unsigned large immediate with logical operations: 8802 8803 Logical operations (`or, andnot, or, xor') also result in 8804 expansions. The pseudo-instruction `or large_imm,%rx,%rn' results 8805 in: 8806 orh large_imm@h,%rx,%r31 8807 or large_imm@l,%r31,%rn 8808 8809 Similarly for the others, except for `and' which expands to: 8810 andnot (-1 - large_imm)@h,%rx,%r31 8811 andnot (-1 - large_imm)@l,%r31,%rn 8812 8813 8814File: as.info, Node: i960-Dependent, Next: IA-64-Dependent, Prev: i860-Dependent, Up: Machine Dependencies 8815 88168.13 Intel 80960 Dependent Features 8817=================================== 8818 8819* Menu: 8820 8821* Options-i960:: i960 Command-line Options 8822* Floating Point-i960:: Floating Point 8823* Directives-i960:: i960 Machine Directives 8824* Opcodes for i960:: i960 Opcodes 8825 8826 8827File: as.info, Node: Options-i960, Next: Floating Point-i960, Up: i960-Dependent 8828 88298.13.1 i960 Command-line Options 8830-------------------------------- 8831 8832`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC' 8833 Select the 80960 architecture. Instructions or features not 8834 supported by the selected architecture cause fatal errors. 8835 8836 `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'. 8837 Synonyms are provided for compatibility with other tools. 8838 8839 If you do not specify any of these options, `as' generates code 8840 for any instruction or feature that is supported by _some_ version 8841 of the 960 (even if this means mixing architectures!). In 8842 principle, `as' attempts to deduce the minimal sufficient 8843 processor type if none is specified; depending on the object code 8844 format, the processor type may be recorded in the object file. If 8845 it is critical that the `as' output match a specific architecture, 8846 specify that architecture explicitly. 8847 8848`-b' 8849 Add code to collect information about conditional branches taken, 8850 for later optimization using branch prediction bits. (The 8851 conditional branch instructions have branch prediction bits in the 8852 CA, CB, and CC architectures.) If BR represents a conditional 8853 branch instruction, the following represents the code generated by 8854 the assembler when `-b' is specified: 8855 8856 call INCREMENT ROUTINE 8857 .word 0 # pre-counter 8858 Label: BR 8859 call INCREMENT ROUTINE 8860 .word 0 # post-counter 8861 8862 The counter following a branch records the number of times that 8863 branch was _not_ taken; the differenc between the two counters is 8864 the number of times the branch _was_ taken. 8865 8866 A table of every such `Label' is also generated, so that the 8867 external postprocessor `gbr960' (supplied by Intel) can locate all 8868 the counters. This table is always labeled `__BRANCH_TABLE__'; 8869 this is a local symbol to permit collecting statistics for many 8870 separate object files. The table is word aligned, and begins with 8871 a two-word header. The first word, initialized to 0, is used in 8872 maintaining linked lists of branch tables. The second word is a 8873 count of the number of entries in the table, which follow 8874 immediately: each is a word, pointing to one of the labels 8875 illustrated above. 8876 8877 +------------+------------+------------+ ... +------------+ 8878 | | | | | | 8879 | *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N | 8880 | | | | | | 8881 +------------+------------+------------+ ... +------------+ 8882 8883 __BRANCH_TABLE__ layout 8884 8885 The first word of the header is used to locate multiple branch 8886 tables, since each object file may contain one. Normally the links 8887 are maintained with a call to an initialization routine, placed at 8888 the beginning of each function in the file. The GNU C compiler 8889 generates these calls automatically when you give it a `-b' option. 8890 For further details, see the documentation of `gbr960'. 8891 8892`-no-relax' 8893 Normally, Compare-and-Branch instructions with targets that require 8894 displacements greater than 13 bits (or that have external targets) 8895 are replaced with the corresponding compare (or `chkbit') and 8896 branch instructions. You can use the `-no-relax' option to 8897 specify that `as' should generate errors instead, if the target 8898 displacement is larger than 13 bits. 8899 8900 This option does not affect the Compare-and-Jump instructions; the 8901 code emitted for them is _always_ adjusted when necessary 8902 (depending on displacement size), regardless of whether you use 8903 `-no-relax'. 8904 8905 8906File: as.info, Node: Floating Point-i960, Next: Directives-i960, Prev: Options-i960, Up: i960-Dependent 8907 89088.13.2 Floating Point 8909--------------------- 8910 8911`as' generates IEEE floating-point numbers for the directives `.float', 8912`.double', `.extended', and `.single'. 8913 8914 8915File: as.info, Node: Directives-i960, Next: Opcodes for i960, Prev: Floating Point-i960, Up: i960-Dependent 8916 89178.13.3 i960 Machine Directives 8918------------------------------ 8919 8920`.bss SYMBOL, LENGTH, ALIGN' 8921 Reserve LENGTH bytes in the bss section for a local SYMBOL, 8922 aligned to the power of two specified by ALIGN. LENGTH and ALIGN 8923 must be positive absolute expressions. This directive differs 8924 from `.lcomm' only in that it permits you to specify an alignment. 8925 *Note `.lcomm': Lcomm. 8926 8927`.extended FLONUMS' 8928 `.extended' expects zero or more flonums, separated by commas; for 8929 each flonum, `.extended' emits an IEEE extended-format (80-bit) 8930 floating-point number. 8931 8932`.leafproc CALL-LAB, BAL-LAB' 8933 You can use the `.leafproc' directive in conjunction with the 8934 optimized `callj' instruction to enable faster calls of leaf 8935 procedures. If a procedure is known to call no other procedures, 8936 you may define an entry point that skips procedure prolog code 8937 (and that does not depend on system-supplied saved context), and 8938 declare it as the BAL-LAB using `.leafproc'. If the procedure 8939 also has an entry point that goes through the normal prolog, you 8940 can specify that entry point as CALL-LAB. 8941 8942 A `.leafproc' declaration is meant for use in conjunction with the 8943 optimized call instruction `callj'; the directive records the data 8944 needed later to choose between converting the `callj' into a `bal' 8945 or a `call'. 8946 8947 CALL-LAB is optional; if only one argument is present, or if the 8948 two arguments are identical, the single argument is assumed to be 8949 the `bal' entry point. 8950 8951`.sysproc NAME, INDEX' 8952 The `.sysproc' directive defines a name for a system procedure. 8953 After you define it using `.sysproc', you can use NAME to refer to 8954 the system procedure identified by INDEX when calling procedures 8955 with the optimized call instruction `callj'. 8956 8957 Both arguments are required; INDEX must be between 0 and 31 8958 (inclusive). 8959 8960 8961File: as.info, Node: Opcodes for i960, Prev: Directives-i960, Up: i960-Dependent 8962 89638.13.4 i960 Opcodes 8964------------------- 8965 8966All Intel 960 machine instructions are supported; *note i960 8967Command-line Options: Options-i960. for a discussion of selecting the 8968instruction subset for a particular 960 architecture. 8969 8970 Some opcodes are processed beyond simply emitting a single 8971corresponding instruction: `callj', and Compare-and-Branch or 8972Compare-and-Jump instructions with target displacements larger than 13 8973bits. 8974 8975* Menu: 8976 8977* callj-i960:: `callj' 8978* Compare-and-branch-i960:: Compare-and-Branch 8979 8980 8981File: as.info, Node: callj-i960, Next: Compare-and-branch-i960, Up: Opcodes for i960 8982 89838.13.4.1 `callj' 8984................ 8985 8986You can write `callj' to have the assembler or the linker determine the 8987most appropriate form of subroutine call: `call', `bal', or `calls'. 8988If the assembly source contains enough information--a `.leafproc' or 8989`.sysproc' directive defining the operand--then `as' translates the 8990`callj'; if not, it simply emits the `callj', leaving it for the linker 8991to resolve. 8992 8993 8994File: as.info, Node: Compare-and-branch-i960, Prev: callj-i960, Up: Opcodes for i960 8995 89968.13.4.2 Compare-and-Branch 8997........................... 8998 8999The 960 architectures provide combined Compare-and-Branch instructions 9000that permit you to store the branch target in the lower 13 bits of the 9001instruction word itself. However, if you specify a branch target far 9002enough away that its address won't fit in 13 bits, the assembler can 9003either issue an error, or convert your Compare-and-Branch instruction 9004into separate instructions to do the compare and the branch. 9005 9006 Whether `as' gives an error or expands the instruction depends on 9007two choices you can make: whether you use the `-no-relax' option, and 9008whether you use a "Compare and Branch" instruction or a "Compare and 9009Jump" instruction. The "Jump" instructions are _always_ expanded if 9010necessary; the "Branch" instructions are expanded when necessary 9011_unless_ you specify `-no-relax'--in which case `as' gives an error 9012instead. 9013 9014 These are the Compare-and-Branch instructions, their "Jump" variants, 9015and the instruction pairs they may expand into: 9016 9017 Compare and 9018 Branch Jump Expanded to 9019 ------ ------ ------------ 9020 bbc chkbit; bno 9021 bbs chkbit; bo 9022 cmpibe cmpije cmpi; be 9023 cmpibg cmpijg cmpi; bg 9024 cmpibge cmpijge cmpi; bge 9025 cmpibl cmpijl cmpi; bl 9026 cmpible cmpijle cmpi; ble 9027 cmpibno cmpijno cmpi; bno 9028 cmpibne cmpijne cmpi; bne 9029 cmpibo cmpijo cmpi; bo 9030 cmpobe cmpoje cmpo; be 9031 cmpobg cmpojg cmpo; bg 9032 cmpobge cmpojge cmpo; bge 9033 cmpobl cmpojl cmpo; bl 9034 cmpoble cmpojle cmpo; ble 9035 cmpobne cmpojne cmpo; bne 9036 9037 9038File: as.info, Node: IA-64-Dependent, Next: IP2K-Dependent, Prev: i960-Dependent, Up: Machine Dependencies 9039 90408.14 IA-64 Dependent Features 9041============================= 9042 9043* Menu: 9044 9045* IA-64 Options:: Options 9046* IA-64 Syntax:: Syntax 9047* IA-64 Opcodes:: Opcodes 9048 9049 9050File: as.info, Node: IA-64 Options, Next: IA-64 Syntax, Up: IA-64-Dependent 9051 90528.14.1 Options 9053-------------- 9054 9055`-mconstant-gp' 9056 This option instructs the assembler to mark the resulting object 9057 file as using the "constant GP" model. With this model, it is 9058 assumed that the entire program uses a single global pointer (GP) 9059 value. Note that this option does not in any fashion affect the 9060 machine code emitted by the assembler. All it does is turn on the 9061 EF_IA_64_CONS_GP flag in the ELF file header. 9062 9063`-mauto-pic' 9064 This option instructs the assembler to mark the resulting object 9065 file as using the "constant GP without function descriptor" data 9066 model. This model is like the "constant GP" model, except that it 9067 additionally does away with function descriptors. What this means 9068 is that the address of a function refers directly to the 9069 function's code entry-point. Normally, such an address would 9070 refer to a function descriptor, which contains both the code 9071 entry-point and the GP-value needed by the function. Note that 9072 this option does not in any fashion affect the machine code 9073 emitted by the assembler. All it does is turn on the 9074 EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header. 9075 9076`-milp32' 9077 9078`-milp64' 9079 9080`-mlp64' 9081 9082`-mp64' 9083 These options select the data model. The assembler defaults to 9084 `-mlp64' (LP64 data model). 9085 9086`-mle' 9087 9088`-mbe' 9089 These options select the byte order. The `-mle' option selects 9090 little-endian byte order (default) and `-mbe' selects big-endian 9091 byte order. Note that IA-64 machine code always uses 9092 little-endian byte order. 9093 9094`-mtune=itanium1' 9095 9096`-mtune=itanium2' 9097 Tune for a particular IA-64 CPU, ITANIUM1 or ITANIUM2. The default 9098 is ITANIUM2. 9099 9100`-munwind-check=warning' 9101 9102`-munwind-check=error' 9103 These options control what the assembler will do when performing 9104 consistency checks on unwind directives. `-munwind-check=warning' 9105 will make the assembler issue a warning when an unwind directive 9106 check fails. This is the default. `-munwind-check=error' will 9107 make the assembler issue an error when an unwind directive check 9108 fails. 9109 9110`-mhint.b=ok' 9111 9112`-mhint.b=warning' 9113 9114`-mhint.b=error' 9115 These options control what the assembler will do when the `hint.b' 9116 instruction is used. `-mhint.b=ok' will make the assembler accept 9117 `hint.b'. `-mint.b=warning' will make the assembler issue a 9118 warning when `hint.b' is used. `-mhint.b=error' will make the 9119 assembler treat `hint.b' as an error, which is the default. 9120 9121`-x' 9122 9123`-xexplicit' 9124 These options turn on dependency violation checking. 9125 9126`-xauto' 9127 This option instructs the assembler to automatically insert stop 9128 bits where necessary to remove dependency violations. This is the 9129 default mode. 9130 9131`-xnone' 9132 This option turns off dependency violation checking. 9133 9134`-xdebug' 9135 This turns on debug output intended to help tracking down bugs in 9136 the dependency violation checker. 9137 9138`-xdebugn' 9139 This is a shortcut for -xnone -xdebug. 9140 9141`-xdebugx' 9142 This is a shortcut for -xexplicit -xdebug. 9143 9144 9145 9146File: as.info, Node: IA-64 Syntax, Next: IA-64 Opcodes, Prev: IA-64 Options, Up: IA-64-Dependent 9147 91488.14.2 Syntax 9149------------- 9150 9151The assembler syntax closely follows the IA-64 Assembly Language 9152Reference Guide. 9153 9154* Menu: 9155 9156* IA-64-Chars:: Special Characters 9157* IA-64-Regs:: Register Names 9158* IA-64-Bits:: Bit Names 9159 9160 9161File: as.info, Node: IA-64-Chars, Next: IA-64-Regs, Up: IA-64 Syntax 9162 91638.14.2.1 Special Characters 9164........................... 9165 9166`//' is the line comment token. 9167 9168 `;' can be used instead of a newline to separate statements. 9169 9170 9171File: as.info, Node: IA-64-Regs, Next: IA-64-Bits, Prev: IA-64-Chars, Up: IA-64 Syntax 9172 91738.14.2.2 Register Names 9174....................... 9175 9176The 128 integer registers are referred to as `rN'. The 128 9177floating-point registers are referred to as `fN'. The 128 application 9178registers are referred to as `arN'. The 128 control registers are 9179referred to as `crN'. The 64 one-bit predicate registers are referred 9180to as `pN'. The 8 branch registers are referred to as `bN'. In 9181addition, the assembler defines a number of aliases: `gp' (`r1'), `sp' 9182(`r12'), `rp' (`b0'), `ret0' (`r8'), `ret1' (`r9'), `ret2' (`r10'), 9183`ret3' (`r9'), `fargN' (`f8+N'), and `fretN' (`f8+N'). 9184 9185 For convenience, the assembler also defines aliases for all named 9186application and control registers. For example, `ar.bsp' refers to the 9187register backing store pointer (`ar17'). Similarly, `cr.eoi' refers to 9188the end-of-interrupt register (`cr67'). 9189 9190 9191File: as.info, Node: IA-64-Bits, Prev: IA-64-Regs, Up: IA-64 Syntax 9192 91938.14.2.3 IA-64 Processor-Status-Register (PSR) Bit Names 9194........................................................ 9195 9196The assembler defines bit masks for each of the bits in the IA-64 9197processor status register. For example, `psr.ic' corresponds to a 9198value of 0x2000. These masks are primarily intended for use with the 9199`ssm'/`sum' and `rsm'/`rum' instructions, but they can be used anywhere 9200else where an integer constant is expected. 9201 9202 9203File: as.info, Node: IA-64 Opcodes, Prev: IA-64 Syntax, Up: IA-64-Dependent 9204 92058.14.3 Opcodes 9206-------------- 9207 9208For detailed information on the IA-64 machine instruction set, see the 9209IA-64 Architecture Handbook 9210(http://developer.intel.com/design/itanium/arch_spec.htm). 9211 9212 9213File: as.info, Node: IP2K-Dependent, Next: M32C-Dependent, Prev: IA-64-Dependent, Up: Machine Dependencies 9214 92158.15 IP2K Dependent Features 9216============================ 9217 9218* Menu: 9219 9220* IP2K-Opts:: IP2K Options 9221 9222 9223File: as.info, Node: IP2K-Opts, Up: IP2K-Dependent 9224 92258.15.1 IP2K Options 9226------------------- 9227 9228The Ubicom IP2K version of `as' has a few machine dependent options: 9229 9230`-mip2022ext' 9231 `as' can assemble the extended IP2022 instructions, but it will 9232 only do so if this is specifically allowed via this command line 9233 option. 9234 9235`-mip2022' 9236 This option restores the assembler's default behaviour of not 9237 permitting the extended IP2022 instructions to be assembled. 9238 9239 9240 9241File: as.info, Node: M32C-Dependent, Next: M32R-Dependent, Prev: IP2K-Dependent, Up: Machine Dependencies 9242 92438.16 M32C Dependent Features 9244============================ 9245 9246 `as' can assemble code for several different members of the Renesas 9247M32C family. Normally the default is to assemble code for the M16C 9248microprocessor. The `-m32c' option may be used to change the default 9249to the M32C microprocessor. 9250 9251* Menu: 9252 9253* M32C-Opts:: M32C Options 9254* M32C-Modifiers:: Symbolic Operand Modifiers 9255 9256 9257File: as.info, Node: M32C-Opts, Next: M32C-Modifiers, Up: M32C-Dependent 9258 92598.16.1 M32C Options 9260------------------- 9261 9262The Renesas M32C version of `as' has two machine-dependent options: 9263 9264`-m32c' 9265 Assemble M32C instructions. 9266 9267`-m16c' 9268 Assemble M16C instructions (default). 9269 9270 9271 9272File: as.info, Node: M32C-Modifiers, Prev: M32C-Opts, Up: M32C-Dependent 9273 92748.16.2 Symbolic Operand Modifiers 9275--------------------------------- 9276 9277The assembler supports several modifiers when using symbol addresses in 9278M32C instruction operands. The general syntax is the following: 9279 9280 %modifier(symbol) 9281 9282`%dsp8' 9283`%dsp16' 9284 These modifiers override the assembler's assumptions about how big 9285 a symbol's address is. Normally, when it sees an operand like 9286 `sym[a0]' it assumes `sym' may require the widest displacement 9287 field (16 bits for `-m16c', 24 bits for `-m32c'). These modifiers 9288 tell it to assume the address will fit in an 8 or 16 bit 9289 (respectively) unsigned displacement. Note that, of course, if it 9290 doesn't actually fit you will get linker errors. Example: 9291 9292 mov.w %dsp8(sym)[a0],r1 9293 mov.b #0,%dsp8(sym)[a0] 9294 9295`%hi8' 9296 This modifier allows you to load bits 16 through 23 of a 24 bit 9297 address into an 8 bit register. This is useful with, for example, 9298 the M16C `smovf' instruction, which expects a 20 bit address in 9299 `r1h' and `a0'. Example: 9300 9301 mov.b #%hi8(sym),r1h 9302 mov.w #%lo16(sym),a0 9303 smovf.b 9304 9305`%lo16' 9306 Likewise, this modifier allows you to load bits 0 through 15 of a 9307 24 bit address into a 16 bit register. 9308 9309`%hi16' 9310 This modifier allows you to load bits 16 through 31 of a 32 bit 9311 address into a 16 bit register. While the M32C family only has 24 9312 bits of address space, it does support addresses in pairs of 16 bit 9313 registers (like `a1a0' for the `lde' instruction). This modifier 9314 is for loading the upper half in such cases. Example: 9315 9316 mov.w #%hi16(sym),a1 9317 mov.w #%lo16(sym),a0 9318 ... 9319 lde.w [a1a0],r1 9320 9321 9322 9323File: as.info, Node: M32R-Dependent, Next: M68K-Dependent, Prev: M32C-Dependent, Up: Machine Dependencies 9324 93258.17 M32R Dependent Features 9326============================ 9327 9328* Menu: 9329 9330* M32R-Opts:: M32R Options 9331* M32R-Directives:: M32R Directives 9332* M32R-Warnings:: M32R Warnings 9333 9334 9335File: as.info, Node: M32R-Opts, Next: M32R-Directives, Up: M32R-Dependent 9336 93378.17.1 M32R Options 9338------------------- 9339 9340The Renease M32R version of `as' has a few machine dependent options: 9341 9342`-m32rx' 9343 `as' can assemble code for several different members of the 9344 Renesas M32R family. Normally the default is to assemble code for 9345 the M32R microprocessor. This option may be used to change the 9346 default to the M32RX microprocessor, which adds some more 9347 instructions to the basic M32R instruction set, and some 9348 additional parameters to some of the original instructions. 9349 9350`-m32r2' 9351 This option changes the target processor to the the M32R2 9352 microprocessor. 9353 9354`-m32r' 9355 This option can be used to restore the assembler's default 9356 behaviour of assembling for the M32R microprocessor. This can be 9357 useful if the default has been changed by a previous command line 9358 option. 9359 9360`-little' 9361 This option tells the assembler to produce little-endian code and 9362 data. The default is dependent upon how the toolchain was 9363 configured. 9364 9365`-EL' 9366 This is a synonum for _-little_. 9367 9368`-big' 9369 This option tells the assembler to produce big-endian code and 9370 data. 9371 9372`-EB' 9373 This is a synonum for _-big_. 9374 9375`-KPIC' 9376 This option specifies that the output of the assembler should be 9377 marked as position-independent code (PIC). 9378 9379`-parallel' 9380 This option tells the assembler to attempts to combine two 9381 sequential instructions into a single, parallel instruction, where 9382 it is legal to do so. 9383 9384`-no-parallel' 9385 This option disables a previously enabled _-parallel_ option. 9386 9387`-no-bitinst' 9388 This option disables the support for the extended bit-field 9389 instructions provided by the M32R2. If this support needs to be 9390 re-enabled the _-bitinst_ switch can be used to restore it. 9391 9392`-O' 9393 This option tells the assembler to attempt to optimize the 9394 instructions that it produces. This includes filling delay slots 9395 and converting sequential instructions into parallel ones. This 9396 option implies _-parallel_. 9397 9398`-warn-explicit-parallel-conflicts' 9399 Instructs `as' to produce warning messages when questionable 9400 parallel instructions are encountered. This option is enabled by 9401 default, but `gcc' disables it when it invokes `as' directly. 9402 Questionable instructions are those whoes behaviour would be 9403 different if they were executed sequentially. For example the 9404 code fragment `mv r1, r2 || mv r3, r1' produces a different result 9405 from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3 9406 and then r2 into r1, whereas the later moves r2 into r1 and r3. 9407 9408`-Wp' 9409 This is a shorter synonym for the 9410 _-warn-explicit-parallel-conflicts_ option. 9411 9412`-no-warn-explicit-parallel-conflicts' 9413 Instructs `as' not to produce warning messages when questionable 9414 parallel instructions are encountered. 9415 9416`-Wnp' 9417 This is a shorter synonym for the 9418 _-no-warn-explicit-parallel-conflicts_ option. 9419 9420`-ignore-parallel-conflicts' 9421 This option tells the assembler's to stop checking parallel 9422 instructions for contraint violations. This ability is provided 9423 for hardware vendors testing chip designs and should not be used 9424 under normal circumstances. 9425 9426`-no-ignore-parallel-conflicts' 9427 This option restores the assembler's default behaviour of checking 9428 parallel instructions to detect constraint violations. 9429 9430`-Ip' 9431 This is a shorter synonym for the _-ignore-parallel-conflicts_ 9432 option. 9433 9434`-nIp' 9435 This is a shorter synonym for the _-no-ignore-parallel-conflicts_ 9436 option. 9437 9438`-warn-unmatched-high' 9439 This option tells the assembler to produce a warning message if a 9440 `.high' pseudo op is encountered without a mathcing `.low' pseudo 9441 op. The presence of such an unmatches pseudo op usually indicates 9442 a programming error. 9443 9444`-no-warn-unmatched-high' 9445 Disables a previously enabled _-warn-unmatched-high_ option. 9446 9447`-Wuh' 9448 This is a shorter synonym for the _-warn-unmatched-high_ option. 9449 9450`-Wnuh' 9451 This is a shorter synonym for the _-no-warn-unmatched-high_ option. 9452 9453 9454 9455File: as.info, Node: M32R-Directives, Next: M32R-Warnings, Prev: M32R-Opts, Up: M32R-Dependent 9456 94578.17.2 M32R Directives 9458---------------------- 9459 9460The Renease M32R version of `as' has a few architecture specific 9461directives: 9462 9463`low EXPRESSION' 9464 The `low' directive computes the value of its expression and 9465 places the lower 16-bits of the result into the immediate-field of 9466 the instruction. For example: 9467 9468 or3 r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678 9469 add3, r0, r0, #low(fred) ; compute r0 = r0 + low 16-bits of address of fred 9470 9471`high EXPRESSION' 9472 The `high' directive computes the value of its expression and 9473 places the upper 16-bits of the result into the immediate-field of 9474 the instruction. For example: 9475 9476 seth r0, #high(0x12345678) ; compute r0 = 0x12340000 9477 seth, r0, #high(fred) ; compute r0 = upper 16-bits of address of fred 9478 9479`shigh EXPRESSION' 9480 The `shigh' directive is very similar to the `high' directive. It 9481 also computes the value of its expression and places the upper 9482 16-bits of the result into the immediate-field of the instruction. 9483 The difference is that `shigh' also checks to see if the lower 9484 16-bits could be interpreted as a signed number, and if so it 9485 assumes that a borrow will occur from the upper-16 bits. To 9486 compensate for this the `shigh' directive pre-biases the upper 16 9487 bit value by adding one to it. For example: 9488 9489 For example: 9490 9491 seth r0, #shigh(0x12345678) ; compute r0 = 0x12340000 9492 seth r0, #shigh(0x00008000) ; compute r0 = 0x00010000 9493 9494 In the second example the lower 16-bits are 0x8000. If these are 9495 treated as a signed value and sign extended to 32-bits then the 9496 value becomes 0xffff8000. If this value is then added to 9497 0x00010000 then the result is 0x00008000. 9498 9499 This behaviour is to allow for the different semantics of the 9500 `or3' and `add3' instructions. The `or3' instruction treats its 9501 16-bit immediate argument as unsigned whereas the `add3' treats 9502 its 16-bit immediate as a signed value. So for example: 9503 9504 seth r0, #shigh(0x00008000) 9505 add3 r0, r0, #low(0x00008000) 9506 9507 Produces the correct result in r0, whereas: 9508 9509 seth r0, #shigh(0x00008000) 9510 or3 r0, r0, #low(0x00008000) 9511 9512 Stores 0xffff8000 into r0. 9513 9514 Note - the `shigh' directive does not know where in the assembly 9515 source code the lower 16-bits of the value are going set, so it 9516 cannot check to make sure that an `or3' instruction is being used 9517 rather than an `add3' instruction. It is up to the programmer to 9518 make sure that correct directives are used. 9519 9520`.m32r' 9521 The directive performs a similar thing as the _-m32r_ command line 9522 option. It tells the assembler to only accept M32R instructions 9523 from now on. An instructions from later M32R architectures are 9524 refused. 9525 9526`.m32rx' 9527 The directive performs a similar thing as the _-m32rx_ command 9528 line option. It tells the assembler to start accepting the extra 9529 instructions in the M32RX ISA as well as the ordinary M32R ISA. 9530 9531`.m32r2' 9532 The directive performs a similar thing as the _-m32r2_ command 9533 line option. It tells the assembler to start accepting the extra 9534 instructions in the M32R2 ISA as well as the ordinary M32R ISA. 9535 9536`.little' 9537 The directive performs a similar thing as the _-little_ command 9538 line option. It tells the assembler to start producing 9539 little-endian code and data. This option should be used with care 9540 as producing mixed-endian binary files is frought with danger. 9541 9542`.big' 9543 The directive performs a similar thing as the _-big_ command line 9544 option. It tells the assembler to start producing big-endian code 9545 and data. This option should be used with care as producing 9546 mixed-endian binary files is frought with danger. 9547 9548 9549 9550File: as.info, Node: M32R-Warnings, Prev: M32R-Directives, Up: M32R-Dependent 9551 95528.17.3 M32R Warnings 9553-------------------- 9554 9555There are several warning and error messages that can be produced by 9556`as' which are specific to the M32R: 9557 9558`output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?' 9559 This message is only produced if warnings for explicit parallel 9560 conflicts have been enabled. It indicates that the assembler has 9561 encountered a parallel instruction in which the destination 9562 register of the left hand instruction is used as an input register 9563 in the right hand instruction. For example in this code fragment 9564 `mv r1, r2 || neg r3, r1' register r1 is the destination of the 9565 move instruction and the input to the neg instruction. 9566 9567`output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?' 9568 This message is only produced if warnings for explicit parallel 9569 conflicts have been enabled. It indicates that the assembler has 9570 encountered a parallel instruction in which the destination 9571 register of the right hand instruction is used as an input 9572 register in the left hand instruction. For example in this code 9573 fragment `mv r1, r2 || neg r2, r3' register r2 is the destination 9574 of the neg instruction and the input to the move instruction. 9575 9576`instruction `...' is for the M32RX only' 9577 This message is produced when the assembler encounters an 9578 instruction which is only supported by the M32Rx processor, and 9579 the `-m32rx' command line flag has not been specified to allow 9580 assembly of such instructions. 9581 9582`unknown instruction `...'' 9583 This message is produced when the assembler encounters an 9584 instruction which it does not recognise. 9585 9586`only the NOP instruction can be issued in parallel on the m32r' 9587 This message is produced when the assembler encounters a parallel 9588 instruction which does not involve a NOP instruction and the 9589 `-m32rx' command line flag has not been specified. Only the M32Rx 9590 processor is able to execute two instructions in parallel. 9591 9592`instruction `...' cannot be executed in parallel.' 9593 This message is produced when the assembler encounters a parallel 9594 instruction which is made up of one or two instructions which 9595 cannot be executed in parallel. 9596 9597`Instructions share the same execution pipeline' 9598 This message is produced when the assembler encounters a parallel 9599 instruction whoes components both use the same execution pipeline. 9600 9601`Instructions write to the same destination register.' 9602 This message is produced when the assembler encounters a parallel 9603 instruction where both components attempt to modify the same 9604 register. For example these code fragments will produce this 9605 message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2, 9606 @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx 9607 r3, r4' (Both write to the condition bit) 9608 9609 9610 9611File: as.info, Node: M68K-Dependent, Next: M68HC11-Dependent, Prev: M32R-Dependent, Up: Machine Dependencies 9612 96138.18 M680x0 Dependent Features 9614============================== 9615 9616* Menu: 9617 9618* M68K-Opts:: M680x0 Options 9619* M68K-Syntax:: Syntax 9620* M68K-Moto-Syntax:: Motorola Syntax 9621* M68K-Float:: Floating Point 9622* M68K-Directives:: 680x0 Machine Directives 9623* M68K-opcodes:: Opcodes 9624 9625 9626File: as.info, Node: M68K-Opts, Next: M68K-Syntax, Up: M68K-Dependent 9627 96288.18.1 M680x0 Options 9629--------------------- 9630 9631The Motorola 680x0 version of `as' has a few machine dependent options: 9632 9633`-march=ARCHITECTURE' 9634 This option specifies a target architecture. The following 9635 architectures are recognized: `68000', `68010', `68020', `68030', 9636 `68040', `68060', `cpu32', `isaa', `isaaplus', `isab' and `cfv4e'. 9637 9638`-mcpu=CPU' 9639 This option specifies a target cpu. When used in conjunction with 9640 the `-march' option, the cpu must be within the specified 9641 architecture. Also, the generic features of the architecture are 9642 used for instruction generation, rather than those of the specific 9643 chip. 9644 9645`-m[no-]68851' 9646 9647`-m[no-]68881' 9648 9649`-m[no-]div' 9650 9651`-m[no-]usp' 9652 9653`-m[no-]float' 9654 9655`-m[no-]mac' 9656 9657`-m[no-]emac' 9658 Enable or disable various architecture specific features. If a 9659 chip or architecture by default supports an option (for instance 9660 `-march=isaaplus' includes the `-mdiv' option), explicitly 9661 disabling the option will override the default. 9662 9663`-l' 9664 You can use the `-l' option to shorten the size of references to 9665 undefined symbols. If you do not use the `-l' option, references 9666 to undefined symbols are wide enough for a full `long' (32 bits). 9667 (Since `as' cannot know where these symbols end up, `as' can only 9668 allocate space for the linker to fill in later. Since `as' does 9669 not know how far away these symbols are, it allocates as much 9670 space as it can.) If you use this option, the references are only 9671 one word wide (16 bits). This may be useful if you want the 9672 object file to be as small as possible, and you know that the 9673 relevant symbols are always less than 17 bits away. 9674 9675`--register-prefix-optional' 9676 For some configurations, especially those where the compiler 9677 normally does not prepend an underscore to the names of user 9678 variables, the assembler requires a `%' before any use of a 9679 register name. This is intended to let the assembler distinguish 9680 between C variables and functions named `a0' through `a7', and so 9681 on. The `%' is always accepted, but is not required for certain 9682 configurations, notably `sun3'. The `--register-prefix-optional' 9683 option may be used to permit omitting the `%' even for 9684 configurations for which it is normally required. If this is 9685 done, it will generally be impossible to refer to C variables and 9686 functions with the same names as register names. 9687 9688`--bitwise-or' 9689 Normally the character `|' is treated as a comment character, which 9690 means that it can not be used in expressions. The `--bitwise-or' 9691 option turns `|' into a normal character. In this mode, you must 9692 either use C style comments, or start comments with a `#' character 9693 at the beginning of a line. 9694 9695`--base-size-default-16 --base-size-default-32' 9696 If you use an addressing mode with a base register without 9697 specifying the size, `as' will normally use the full 32 bit value. 9698 For example, the addressing mode `%a0@(%d0)' is equivalent to 9699 `%a0@(%d0:l)'. You may use the `--base-size-default-16' option to 9700 tell `as' to default to using the 16 bit value. In this case, 9701 `%a0@(%d0)' is equivalent to `%a0@(%d0:w)'. You may use the 9702 `--base-size-default-32' option to restore the default behaviour. 9703 9704`--disp-size-default-16 --disp-size-default-32' 9705 If you use an addressing mode with a displacement, and the value 9706 of the displacement is not known, `as' will normally assume that 9707 the value is 32 bits. For example, if the symbol `disp' has not 9708 been defined, `as' will assemble the addressing mode 9709 `%a0@(disp,%d0)' as though `disp' is a 32 bit value. You may use 9710 the `--disp-size-default-16' option to tell `as' to instead assume 9711 that the displacement is 16 bits. In this case, `as' will 9712 assemble `%a0@(disp,%d0)' as though `disp' is a 16 bit value. You 9713 may use the `--disp-size-default-32' option to restore the default 9714 behaviour. 9715 9716`--pcrel' 9717 Always keep branches PC-relative. In the M680x0 architecture all 9718 branches are defined as PC-relative. However, on some processors 9719 they are limited to word displacements maximum. When `as' needs a 9720 long branch that is not available, it normally emits an absolute 9721 jump instead. This option disables this substitution. When this 9722 option is given and no long branches are available, only word 9723 branches will be emitted. An error message will be generated if a 9724 word branch cannot reach its target. This option has no effect on 9725 68020 and other processors that have long branches. *note Branch 9726 Improvement: M68K-Branch. 9727 9728`-m68000' 9729 `as' can assemble code for several different members of the 9730 Motorola 680x0 family. The default depends upon how `as' was 9731 configured when it was built; normally, the default is to assemble 9732 code for the 68020 microprocessor. The following options may be 9733 used to change the default. These options control which 9734 instructions and addressing modes are permitted. The members of 9735 the 680x0 family are very similar. For detailed information about 9736 the differences, see the Motorola manuals. 9737 9738 `-m68000' 9739 `-m68ec000' 9740 `-m68hc000' 9741 `-m68hc001' 9742 `-m68008' 9743 `-m68302' 9744 `-m68306' 9745 `-m68307' 9746 `-m68322' 9747 `-m68356' 9748 Assemble for the 68000. `-m68008', `-m68302', and so on are 9749 synonyms for `-m68000', since the chips are the same from the 9750 point of view of the assembler. 9751 9752 `-m68010' 9753 Assemble for the 68010. 9754 9755 `-m68020' 9756 `-m68ec020' 9757 Assemble for the 68020. This is normally the default. 9758 9759 `-m68030' 9760 `-m68ec030' 9761 Assemble for the 68030. 9762 9763 `-m68040' 9764 `-m68ec040' 9765 Assemble for the 68040. 9766 9767 `-m68060' 9768 `-m68ec060' 9769 Assemble for the 68060. 9770 9771 `-mcpu32' 9772 `-m68330' 9773 `-m68331' 9774 `-m68332' 9775 `-m68333' 9776 `-m68334' 9777 `-m68336' 9778 `-m68340' 9779 `-m68341' 9780 `-m68349' 9781 `-m68360' 9782 Assemble for the CPU32 family of chips. 9783 9784 `-m5200' 9785 9786 `-m5202' 9787 9788 `-m5204' 9789 9790 `-m5206' 9791 9792 `-m5206e' 9793 9794 `-m521x' 9795 9796 `-m5249' 9797 9798 `-m528x' 9799 9800 `-m5307' 9801 9802 `-m5407' 9803 9804 `-m547x' 9805 9806 `-m548x' 9807 9808 `-mcfv4' 9809 9810 `-mcfv4e' 9811 Assemble for the ColdFire family of chips. 9812 9813 `-m68881' 9814 `-m68882' 9815 Assemble 68881 floating point instructions. This is the 9816 default for the 68020, 68030, and the CPU32. The 68040 and 9817 68060 always support floating point instructions. 9818 9819 `-mno-68881' 9820 Do not assemble 68881 floating point instructions. This is 9821 the default for 68000 and the 68010. The 68040 and 68060 9822 always support floating point instructions, even if this 9823 option is used. 9824 9825 `-m68851' 9826 Assemble 68851 MMU instructions. This is the default for the 9827 68020, 68030, and 68060. The 68040 accepts a somewhat 9828 different set of MMU instructions; `-m68851' and `-m68040' 9829 should not be used together. 9830 9831 `-mno-68851' 9832 Do not assemble 68851 MMU instructions. This is the default 9833 for the 68000, 68010, and the CPU32. The 68040 accepts a 9834 somewhat different set of MMU instructions. 9835 9836 9837File: as.info, Node: M68K-Syntax, Next: M68K-Moto-Syntax, Prev: M68K-Opts, Up: M68K-Dependent 9838 98398.18.2 Syntax 9840------------- 9841 9842This syntax for the Motorola 680x0 was developed at MIT. 9843 9844 The 680x0 version of `as' uses instructions names and syntax 9845compatible with the Sun assembler. Intervening periods are ignored; 9846for example, `movl' is equivalent to `mov.l'. 9847 9848 In the following table APC stands for any of the address registers 9849(`%a0' through `%a7'), the program counter (`%pc'), the zero-address 9850relative to the program counter (`%zpc'), a suppressed address register 9851(`%za0' through `%za7'), or it may be omitted entirely. The use of 9852SIZE means one of `w' or `l', and it may be omitted, along with the 9853leading colon, unless a scale is also specified. The use of SCALE 9854means one of `1', `2', `4', or `8', and it may always be omitted along 9855with the leading colon. 9856 9857 The following addressing modes are understood: 9858"Immediate" 9859 `#NUMBER' 9860 9861"Data Register" 9862 `%d0' through `%d7' 9863 9864"Address Register" 9865 `%a0' through `%a7' 9866 `%a7' is also known as `%sp', i.e. the Stack Pointer. `%a6' is 9867 also known as `%fp', the Frame Pointer. 9868 9869"Address Register Indirect" 9870 `%a0@' through `%a7@' 9871 9872"Address Register Postincrement" 9873 `%a0@+' through `%a7@+' 9874 9875"Address Register Predecrement" 9876 `%a0@-' through `%a7@-' 9877 9878"Indirect Plus Offset" 9879 `APC@(NUMBER)' 9880 9881"Index" 9882 `APC@(NUMBER,REGISTER:SIZE:SCALE)' 9883 9884 The NUMBER may be omitted. 9885 9886"Postindex" 9887 `APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)' 9888 9889 The ONUMBER or the REGISTER, but not both, may be omitted. 9890 9891"Preindex" 9892 `APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)' 9893 9894 The NUMBER may be omitted. Omitting the REGISTER produces the 9895 Postindex addressing mode. 9896 9897"Absolute" 9898 `SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'. 9899 9900 9901File: as.info, Node: M68K-Moto-Syntax, Next: M68K-Float, Prev: M68K-Syntax, Up: M68K-Dependent 9902 99038.18.3 Motorola Syntax 9904---------------------- 9905 9906The standard Motorola syntax for this chip differs from the syntax 9907already discussed (*note Syntax: M68K-Syntax.). `as' can accept 9908Motorola syntax for operands, even if MIT syntax is used for other 9909operands in the same instruction. The two kinds of syntax are fully 9910compatible. 9911 9912 In the following table APC stands for any of the address registers 9913(`%a0' through `%a7'), the program counter (`%pc'), the zero-address 9914relative to the program counter (`%zpc'), or a suppressed address 9915register (`%za0' through `%za7'). The use of SIZE means one of `w' or 9916`l', and it may always be omitted along with the leading dot. The use 9917of SCALE means one of `1', `2', `4', or `8', and it may always be 9918omitted along with the leading asterisk. 9919 9920 The following additional addressing modes are understood: 9921 9922"Address Register Indirect" 9923 `(%a0)' through `(%a7)' 9924 `%a7' is also known as `%sp', i.e. the Stack Pointer. `%a6' is 9925 also known as `%fp', the Frame Pointer. 9926 9927"Address Register Postincrement" 9928 `(%a0)+' through `(%a7)+' 9929 9930"Address Register Predecrement" 9931 `-(%a0)' through `-(%a7)' 9932 9933"Indirect Plus Offset" 9934 `NUMBER(%A0)' through `NUMBER(%A7)', or `NUMBER(%PC)'. 9935 9936 The NUMBER may also appear within the parentheses, as in 9937 `(NUMBER,%A0)'. When used with the PC, the NUMBER may be omitted 9938 (with an address register, omitting the NUMBER produces Address 9939 Register Indirect mode). 9940 9941"Index" 9942 `NUMBER(APC,REGISTER.SIZE*SCALE)' 9943 9944 The NUMBER may be omitted, or it may appear within the 9945 parentheses. The APC may be omitted. The REGISTER and the APC 9946 may appear in either order. If both APC and REGISTER are address 9947 registers, and the SIZE and SCALE are omitted, then the first 9948 register is taken as the base register, and the second as the 9949 index register. 9950 9951"Postindex" 9952 `([NUMBER,APC],REGISTER.SIZE*SCALE,ONUMBER)' 9953 9954 The ONUMBER, or the REGISTER, or both, may be omitted. Either the 9955 NUMBER or the APC may be omitted, but not both. 9956 9957"Preindex" 9958 `([NUMBER,APC,REGISTER.SIZE*SCALE],ONUMBER)' 9959 9960 The NUMBER, or the APC, or the REGISTER, or any two of them, may 9961 be omitted. The ONUMBER may be omitted. The REGISTER and the APC 9962 may appear in either order. If both APC and REGISTER are address 9963 registers, and the SIZE and SCALE are omitted, then the first 9964 register is taken as the base register, and the second as the 9965 index register. 9966 9967 9968File: as.info, Node: M68K-Float, Next: M68K-Directives, Prev: M68K-Moto-Syntax, Up: M68K-Dependent 9969 99708.18.4 Floating Point 9971--------------------- 9972 9973Packed decimal (P) format floating literals are not supported. Feel 9974free to add the code! 9975 9976 The floating point formats generated by directives are these. 9977 9978`.float' 9979 `Single' precision floating point constants. 9980 9981`.double' 9982 `Double' precision floating point constants. 9983 9984`.extend' 9985`.ldouble' 9986 `Extended' precision (`long double') floating point constants. 9987 9988 9989File: as.info, Node: M68K-Directives, Next: M68K-opcodes, Prev: M68K-Float, Up: M68K-Dependent 9990 99918.18.5 680x0 Machine Directives 9992------------------------------- 9993 9994In order to be compatible with the Sun assembler the 680x0 assembler 9995understands the following directives. 9996 9997`.data1' 9998 This directive is identical to a `.data 1' directive. 9999 10000`.data2' 10001 This directive is identical to a `.data 2' directive. 10002 10003`.even' 10004 This directive is a special case of the `.align' directive; it 10005 aligns the output to an even byte boundary. 10006 10007`.skip' 10008 This directive is identical to a `.space' directive. 10009 10010`.arch NAME' 10011 Select the target architecture and extension features. Valid 10012 valuse for NAME are the same as for the `-march' command line 10013 option. This directive cannot be specified after any instructions 10014 have been assembled. If it is given multiple times, or in 10015 conjuction with the `-march' option, all uses must be for the same 10016 architecture and extension set. 10017 10018`.cpu NAME' 10019 Select the target cpu. Valid valuse for NAME are the same as for 10020 the `-mcpu' command line option. This directive cannot be 10021 specified after any instructions have been assembled. If it is 10022 given multiple times, or in conjuction with the `-mopt' option, 10023 all uses must be for the same cpu. 10024 10025 10026 10027File: as.info, Node: M68K-opcodes, Prev: M68K-Directives, Up: M68K-Dependent 10028 100298.18.6 Opcodes 10030-------------- 10031 10032* Menu: 10033 10034* M68K-Branch:: Branch Improvement 10035* M68K-Chars:: Special Characters 10036 10037 10038File: as.info, Node: M68K-Branch, Next: M68K-Chars, Up: M68K-opcodes 10039 100408.18.6.1 Branch Improvement 10041........................... 10042 10043Certain pseudo opcodes are permitted for branch instructions. They 10044expand to the shortest branch instruction that reach the target. 10045Generally these mnemonics are made by substituting `j' for `b' at the 10046start of a Motorola mnemonic. 10047 10048 The following table summarizes the pseudo-operations. A `*' flags 10049cases that are more fully described after the table: 10050 10051 Displacement 10052 +------------------------------------------------------------ 10053 | 68020 68000/10, not PC-relative OK 10054 Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP ** 10055 +------------------------------------------------------------ 10056 jbsr |bsrs bsrw bsrl jsr 10057 jra |bras braw bral jmp 10058 * jXX |bXXs bXXw bXXl bNXs;jmp 10059 * dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp 10060 fjXX | N/A fbXXw fbXXl N/A 10061 10062 XX: condition 10063 NX: negative of condition XX 10064 `*'--see full description below 10065 `**'--this expansion mode is disallowed by `--pcrel' 10066 10067`jbsr' 10068`jra' 10069 These are the simplest jump pseudo-operations; they always map to 10070 one particular machine instruction, depending on the displacement 10071 to the branch target. This instruction will be a byte or word 10072 branch is that is sufficient. Otherwise, a long branch will be 10073 emitted if available. If no long branches are available and the 10074 `--pcrel' option is not given, an absolute long jump will be 10075 emitted instead. If no long branches are available, the `--pcrel' 10076 option is given, and a word branch cannot reach the target, an 10077 error message is generated. 10078 10079 In addition to standard branch operands, `as' allows these 10080 pseudo-operations to have all operands that are allowed for jsr 10081 and jmp, substituting these instructions if the operand given is 10082 not valid for a branch instruction. 10083 10084`jXX' 10085 Here, `jXX' stands for an entire family of pseudo-operations, 10086 where XX is a conditional branch or condition-code test. The full 10087 list of pseudo-ops in this family is: 10088 jhi jls jcc jcs jne jeq jvc 10089 jvs jpl jmi jge jlt jgt jle 10090 10091 Usually, each of these pseudo-operations expands to a single branch 10092 instruction. However, if a word branch is not sufficient, no long 10093 branches are available, and the `--pcrel' option is not given, `as' 10094 issues a longer code fragment in terms of NX, the opposite 10095 condition to XX. For example, under these conditions: 10096 jXX foo 10097 gives 10098 bNXs oof 10099 jmp foo 10100 oof: 10101 10102`dbXX' 10103 The full family of pseudo-operations covered here is 10104 dbhi dbls dbcc dbcs dbne dbeq dbvc 10105 dbvs dbpl dbmi dbge dblt dbgt dble 10106 dbf dbra dbt 10107 10108 Motorola `dbXX' instructions allow word displacements only. When 10109 a word displacement is sufficient, each of these pseudo-operations 10110 expands to the corresponding Motorola instruction. When a word 10111 displacement is not sufficient and long branches are available, 10112 when the source reads `dbXX foo', `as' emits 10113 dbXX oo1 10114 bras oo2 10115 oo1:bral foo 10116 oo2: 10117 10118 If, however, long branches are not available and the `--pcrel' 10119 option is not given, `as' emits 10120 dbXX oo1 10121 bras oo2 10122 oo1:jmp foo 10123 oo2: 10124 10125`fjXX' 10126 This family includes 10127 fjne fjeq fjge fjlt fjgt fjle fjf 10128 fjt fjgl fjgle fjnge fjngl fjngle fjngt 10129 fjnle fjnlt fjoge fjogl fjogt fjole fjolt 10130 fjor fjseq fjsf fjsne fjst fjueq fjuge 10131 fjugt fjule fjult fjun 10132 10133 Each of these pseudo-operations always expands to a single Motorola 10134 coprocessor branch instruction, word or long. All Motorola 10135 coprocessor branch instructions allow both word and long 10136 displacements. 10137 10138 10139 10140File: as.info, Node: M68K-Chars, Prev: M68K-Branch, Up: M68K-opcodes 10141 101428.18.6.2 Special Characters 10143........................... 10144 10145The immediate character is `#' for Sun compatibility. The line-comment 10146character is `|' (unless the `--bitwise-or' option is used). If a `#' 10147appears at the beginning of a line, it is treated as a comment unless 10148it looks like `# line file', in which case it is treated normally. 10149 10150 10151File: as.info, Node: M68HC11-Dependent, Next: MIPS-Dependent, Prev: M68K-Dependent, Up: Machine Dependencies 10152 101538.19 M68HC11 and M68HC12 Dependent Features 10154=========================================== 10155 10156* Menu: 10157 10158* M68HC11-Opts:: M68HC11 and M68HC12 Options 10159* M68HC11-Syntax:: Syntax 10160* M68HC11-Modifiers:: Symbolic Operand Modifiers 10161* M68HC11-Directives:: Assembler Directives 10162* M68HC11-Float:: Floating Point 10163* M68HC11-opcodes:: Opcodes 10164 10165 10166File: as.info, Node: M68HC11-Opts, Next: M68HC11-Syntax, Up: M68HC11-Dependent 10167 101688.19.1 M68HC11 and M68HC12 Options 10169---------------------------------- 10170 10171The Motorola 68HC11 and 68HC12 version of `as' have a few machine 10172dependent options. 10173 10174`-m68hc11' 10175 This option switches the assembler in the M68HC11 mode. In this 10176 mode, the assembler only accepts 68HC11 operands and mnemonics. It 10177 produces code for the 68HC11. 10178 10179`-m68hc12' 10180 This option switches the assembler in the M68HC12 mode. In this 10181 mode, the assembler also accepts 68HC12 operands and mnemonics. It 10182 produces code for the 68HC12. A few 68HC11 instructions are 10183 replaced by some 68HC12 instructions as recommended by Motorola 10184 specifications. 10185 10186`-m68hcs12' 10187 This option switches the assembler in the M68HCS12 mode. This 10188 mode is similar to `-m68hc12' but specifies to assemble for the 10189 68HCS12 series. The only difference is on the assembling of the 10190 `movb' and `movw' instruction when a PC-relative operand is used. 10191 10192`-mshort' 10193 This option controls the ABI and indicates to use a 16-bit integer 10194 ABI. It has no effect on the assembled instructions. This is the 10195 default. 10196 10197`-mlong' 10198 This option controls the ABI and indicates to use a 32-bit integer 10199 ABI. 10200 10201`-mshort-double' 10202 This option controls the ABI and indicates to use a 32-bit float 10203 ABI. This is the default. 10204 10205`-mlong-double' 10206 This option controls the ABI and indicates to use a 64-bit float 10207 ABI. 10208 10209`--strict-direct-mode' 10210 You can use the `--strict-direct-mode' option to disable the 10211 automatic translation of direct page mode addressing into extended 10212 mode when the instruction does not support direct mode. For 10213 example, the `clr' instruction does not support direct page mode 10214 addressing. When it is used with the direct page mode, `as' will 10215 ignore it and generate an absolute addressing. This option 10216 prevents `as' from doing this, and the wrong usage of the direct 10217 page mode will raise an error. 10218 10219`--short-branchs' 10220 The `--short-branchs' option turns off the translation of relative 10221 branches into absolute branches when the branch offset is out of 10222 range. By default `as' transforms the relative branch (`bsr', 10223 `bgt', `bge', `beq', `bne', `ble', `blt', `bhi', `bcc', `bls', 10224 `bcs', `bmi', `bvs', `bvs', `bra') into an absolute branch when 10225 the offset is out of the -128 .. 127 range. In that case, the 10226 `bsr' instruction is translated into a `jsr', the `bra' 10227 instruction is translated into a `jmp' and the conditional branchs 10228 instructions are inverted and followed by a `jmp'. This option 10229 disables these translations and `as' will generate an error if a 10230 relative branch is out of range. This option does not affect the 10231 optimization associated to the `jbra', `jbsr' and `jbXX' pseudo 10232 opcodes. 10233 10234`--force-long-branchs' 10235 The `--force-long-branchs' option forces the translation of 10236 relative branches into absolute branches. This option does not 10237 affect the optimization associated to the `jbra', `jbsr' and 10238 `jbXX' pseudo opcodes. 10239 10240`--print-insn-syntax' 10241 You can use the `--print-insn-syntax' option to obtain the syntax 10242 description of the instruction when an error is detected. 10243 10244`--print-opcodes' 10245 The `--print-opcodes' option prints the list of all the 10246 instructions with their syntax. The first item of each line 10247 represents the instruction name and the rest of the line indicates 10248 the possible operands for that instruction. The list is printed in 10249 alphabetical order. Once the list is printed `as' exits. 10250 10251`--generate-example' 10252 The `--generate-example' option is similar to `--print-opcodes' 10253 but it generates an example for each instruction instead. 10254 10255 10256File: as.info, Node: M68HC11-Syntax, Next: M68HC11-Modifiers, Prev: M68HC11-Opts, Up: M68HC11-Dependent 10257 102588.19.2 Syntax 10259------------- 10260 10261In the M68HC11 syntax, the instruction name comes first and it may be 10262followed by one or several operands (up to three). Operands are 10263separated by comma (`,'). In the normal mode, `as' will complain if too 10264many operands are specified for a given instruction. In the MRI mode 10265(turned on with `-M' option), it will treat them as comments. Example: 10266 10267 inx 10268 lda #23 10269 bset 2,x #4 10270 brclr *bot #8 foo 10271 10272 The following addressing modes are understood for 68HC11 and 68HC12: 10273"Immediate" 10274 `#NUMBER' 10275 10276"Address Register" 10277 `NUMBER,X', `NUMBER,Y' 10278 10279 The NUMBER may be omitted in which case 0 is assumed. 10280 10281"Direct Addressing mode" 10282 `*SYMBOL', or `*DIGITS' 10283 10284"Absolute" 10285 `SYMBOL', or `DIGITS' 10286 10287 The M68HC12 has other more complex addressing modes. All of them are 10288supported and they are represented below: 10289 10290"Constant Offset Indexed Addressing Mode" 10291 `NUMBER,REG' 10292 10293 The NUMBER may be omitted in which case 0 is assumed. The 10294 register can be either `X', `Y', `SP' or `PC'. The assembler will 10295 use the smaller post-byte definition according to the constant 10296 value (5-bit constant offset, 9-bit constant offset or 16-bit 10297 constant offset). If the constant is not known by the assembler 10298 it will use the 16-bit constant offset post-byte and the value 10299 will be resolved at link time. 10300 10301"Offset Indexed Indirect" 10302 `[NUMBER,REG]' 10303 10304 The register can be either `X', `Y', `SP' or `PC'. 10305 10306"Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement" 10307 `NUMBER,-REG' `NUMBER,+REG' `NUMBER,REG-' `NUMBER,REG+' 10308 10309 The number must be in the range `-8'..`+8' and must not be 0. The 10310 register can be either `X', `Y', `SP' or `PC'. 10311 10312"Accumulator Offset" 10313 `ACC,REG' 10314 10315 The accumulator register can be either `A', `B' or `D'. The 10316 register can be either `X', `Y', `SP' or `PC'. 10317 10318"Accumulator D offset indexed-indirect" 10319 `[D,REG]' 10320 10321 The register can be either `X', `Y', `SP' or `PC'. 10322 10323 10324 For example: 10325 10326 ldab 1024,sp 10327 ldd [10,x] 10328 orab 3,+x 10329 stab -2,y- 10330 ldx a,pc 10331 sty [d,sp] 10332 10333 10334File: as.info, Node: M68HC11-Modifiers, Next: M68HC11-Directives, Prev: M68HC11-Syntax, Up: M68HC11-Dependent 10335 103368.19.3 Symbolic Operand Modifiers 10337--------------------------------- 10338 10339The assembler supports several modifiers when using symbol addresses in 1034068HC11 and 68HC12 instruction operands. The general syntax is the 10341following: 10342 10343 %modifier(symbol) 10344 10345`%addr' 10346 This modifier indicates to the assembler and linker to use the 10347 16-bit physical address corresponding to the symbol. This is 10348 intended to be used on memory window systems to map a symbol in 10349 the memory bank window. If the symbol is in a memory expansion 10350 part, the physical address corresponds to the symbol address 10351 within the memory bank window. If the symbol is not in a memory 10352 expansion part, this is the symbol address (using or not using the 10353 %addr modifier has no effect in that case). 10354 10355`%page' 10356 This modifier indicates to use the memory page number corresponding 10357 to the symbol. If the symbol is in a memory expansion part, its 10358 page number is computed by the linker as a number used to map the 10359 page containing the symbol in the memory bank window. If the 10360 symbol is not in a memory expansion part, the page number is 0. 10361 10362`%hi' 10363 This modifier indicates to use the 8-bit high part of the physical 10364 address of the symbol. 10365 10366`%lo' 10367 This modifier indicates to use the 8-bit low part of the physical 10368 address of the symbol. 10369 10370 10371 For example a 68HC12 call to a function `foo_example' stored in 10372memory expansion part could be written as follows: 10373 10374 call %addr(foo_example),%page(foo_example) 10375 10376 and this is equivalent to 10377 10378 call foo_example 10379 10380 And for 68HC11 it could be written as follows: 10381 10382 ldab #%page(foo_example) 10383 stab _page_switch 10384 jsr %addr(foo_example) 10385 10386 10387File: as.info, Node: M68HC11-Directives, Next: M68HC11-Float, Prev: M68HC11-Modifiers, Up: M68HC11-Dependent 10388 103898.19.4 Assembler Directives 10390--------------------------- 10391 10392The 68HC11 and 68HC12 version of `as' have the following specific 10393assembler directives: 10394 10395`.relax' 10396 The relax directive is used by the `GNU Compiler' to emit a 10397 specific relocation to mark a group of instructions for linker 10398 relaxation. The sequence of instructions within the group must be 10399 known to the linker so that relaxation can be performed. 10400 10401`.mode [mshort|mlong|mshort-double|mlong-double]' 10402 This directive specifies the ABI. It overrides the `-mshort', 10403 `-mlong', `-mshort-double' and `-mlong-double' options. 10404 10405`.far SYMBOL' 10406 This directive marks the symbol as a `far' symbol meaning that it 10407 uses a `call/rtc' calling convention as opposed to `jsr/rts'. 10408 During a final link, the linker will identify references to the 10409 `far' symbol and will verify the proper calling convention. 10410 10411`.interrupt SYMBOL' 10412 This directive marks the symbol as an interrupt entry point. This 10413 information is then used by the debugger to correctly unwind the 10414 frame across interrupts. 10415 10416`.xrefb SYMBOL' 10417 This directive is defined for compatibility with the 10418 `Specification for Motorola 8 and 16-Bit Assembly Language Input 10419 Standard' and is ignored. 10420 10421 10422 10423File: as.info, Node: M68HC11-Float, Next: M68HC11-opcodes, Prev: M68HC11-Directives, Up: M68HC11-Dependent 10424 104258.19.5 Floating Point 10426--------------------- 10427 10428Packed decimal (P) format floating literals are not supported. Feel 10429free to add the code! 10430 10431 The floating point formats generated by directives are these. 10432 10433`.float' 10434 `Single' precision floating point constants. 10435 10436`.double' 10437 `Double' precision floating point constants. 10438 10439`.extend' 10440`.ldouble' 10441 `Extended' precision (`long double') floating point constants. 10442 10443 10444File: as.info, Node: M68HC11-opcodes, Prev: M68HC11-Float, Up: M68HC11-Dependent 10445 104468.19.6 Opcodes 10447-------------- 10448 10449* Menu: 10450 10451* M68HC11-Branch:: Branch Improvement 10452 10453 10454File: as.info, Node: M68HC11-Branch, Up: M68HC11-opcodes 10455 104568.19.6.1 Branch Improvement 10457........................... 10458 10459Certain pseudo opcodes are permitted for branch instructions. They 10460expand to the shortest branch instruction that reach the target. 10461Generally these mnemonics are made by prepending `j' to the start of 10462Motorola mnemonic. These pseudo opcodes are not affected by the 10463`--short-branchs' or `--force-long-branchs' options. 10464 10465 The following table summarizes the pseudo-operations. 10466 10467 Displacement Width 10468 +-------------------------------------------------------------+ 10469 | Options | 10470 | --short-branchs --force-long-branchs | 10471 +--------------------------+----------------------------------+ 10472 Op |BYTE WORD | BYTE WORD | 10473 +--------------------------+----------------------------------+ 10474 bsr | bsr <pc-rel> <error> | jsr <abs> | 10475 bra | bra <pc-rel> <error> | jmp <abs> | 10476 jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> | 10477 jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> | 10478 bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> | 10479 jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> | 10480 | jmp <abs> | | 10481 +--------------------------+----------------------------------+ 10482 XX: condition 10483 NX: negative of condition XX 10484 10485`jbsr' 10486`jbra' 10487 These are the simplest jump pseudo-operations; they always map to 10488 one particular machine instruction, depending on the displacement 10489 to the branch target. 10490 10491`jbXX' 10492 Here, `jbXX' stands for an entire family of pseudo-operations, 10493 where XX is a conditional branch or condition-code test. The full 10494 list of pseudo-ops in this family is: 10495 jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo 10496 jbcs jbne jblt jble jbls jbvc jbmi 10497 10498 For the cases of non-PC relative displacements and long 10499 displacements, `as' issues a longer code fragment in terms of NX, 10500 the opposite condition to XX. For example, for the non-PC 10501 relative case: 10502 jbXX foo 10503 gives 10504 bNXs oof 10505 jmp foo 10506 oof: 10507 10508 10509 10510File: as.info, Node: MIPS-Dependent, Next: MMIX-Dependent, Prev: M68HC11-Dependent, Up: Machine Dependencies 10511 105128.20 MIPS Dependent Features 10513============================ 10514 10515 GNU `as' for MIPS architectures supports several different MIPS 10516processors, and MIPS ISA levels I through V, MIPS32, and MIPS64. For 10517information about the MIPS instruction set, see `MIPS RISC 10518Architecture', by Kane and Heindrich (Prentice-Hall). For an overview 10519of MIPS assembly conventions, see "Appendix D: Assembly Language 10520Programming" in the same work. 10521 10522* Menu: 10523 10524* MIPS Opts:: Assembler options 10525* MIPS Object:: ECOFF object code 10526* MIPS Stabs:: Directives for debugging information 10527* MIPS ISA:: Directives to override the ISA level 10528* MIPS symbol sizes:: Directives to override the size of symbols 10529* MIPS autoextend:: Directives for extending MIPS 16 bit instructions 10530* MIPS insn:: Directive to mark data as an instruction 10531* MIPS option stack:: Directives to save and restore options 10532* MIPS ASE instruction generation overrides:: Directives to control 10533 generation of MIPS ASE instructions 10534 10535 10536File: as.info, Node: MIPS Opts, Next: MIPS Object, Up: MIPS-Dependent 10537 105388.20.1 Assembler options 10539------------------------ 10540 10541The MIPS configurations of GNU `as' support these special options: 10542 10543`-G NUM' 10544 This option sets the largest size of an object that can be 10545 referenced implicitly with the `gp' register. It is only accepted 10546 for targets that use ECOFF format. The default value is 8. 10547 10548`-EB' 10549`-EL' 10550 Any MIPS configuration of `as' can select big-endian or 10551 little-endian output at run time (unlike the other GNU development 10552 tools, which must be configured for one or the other). Use `-EB' 10553 to select big-endian output, and `-EL' for little-endian. 10554 10555`-mips1' 10556`-mips2' 10557`-mips3' 10558`-mips4' 10559`-mips5' 10560`-mips32' 10561`-mips32r2' 10562`-mips64' 10563`-mips64r2' 10564 Generate code for a particular MIPS Instruction Set Architecture 10565 level. `-mips1' corresponds to the R2000 and R3000 processors, 10566 `-mips2' to the R6000 processor, `-mips3' to the R4000 processor, 10567 and `-mips4' to the R8000 and R10000 processors. `-mips5', 10568 `-mips32', `-mips32r2', `-mips64', and `-mips64r2' correspond to 10569 generic MIPS V, MIPS32, MIPS32 RELEASE 2, MIPS64, and MIPS64 10570 RELEASE 2 ISA processors, respectively. You can also switch 10571 instruction sets during the assembly; see *note Directives to 10572 override the ISA level: MIPS ISA. 10573 10574`-mgp32' 10575`-mfp32' 10576 Some macros have different expansions for 32-bit and 64-bit 10577 registers. The register sizes are normally inferred from the ISA 10578 and ABI, but these flags force a certain group of registers to be 10579 treated as 32 bits wide at all times. `-mgp32' controls the size 10580 of general-purpose registers and `-mfp32' controls the size of 10581 floating-point registers. 10582 10583 On some MIPS variants there is a 32-bit mode flag; when this flag 10584 is set, 64-bit instructions generate a trap. Also, some 32-bit 10585 OSes only save the 32-bit registers on a context switch, so it is 10586 essential never to use the 64-bit registers. 10587 10588`-mgp64' 10589 Assume that 64-bit general purpose registers are available. This 10590 is provided in the interests of symmetry with -gp32. 10591 10592`-mips16' 10593`-no-mips16' 10594 Generate code for the MIPS 16 processor. This is equivalent to 10595 putting `.set mips16' at the start of the assembly file. 10596 `-no-mips16' turns off this option. 10597 10598`-mips3d' 10599`-no-mips3d' 10600 Generate code for the MIPS-3D Application Specific Extension. 10601 This tells the assembler to accept MIPS-3D instructions. 10602 `-no-mips3d' turns off this option. 10603 10604`-mdmx' 10605`-no-mdmx' 10606 Generate code for the MDMX Application Specific Extension. This 10607 tells the assembler to accept MDMX instructions. `-no-mdmx' turns 10608 off this option. 10609 10610`-mdsp' 10611`-mno-dsp' 10612 Generate code for the DSP Application Specific Extension. This 10613 tells the assembler to accept DSP instructions. `-mno-dsp' turns 10614 off this option. 10615 10616`-mmt' 10617`-mno-mt' 10618 Generate code for the MT Application Specific Extension. This 10619 tells the assembler to accept MT instructions. `-mno-mt' turns 10620 off this option. 10621 10622`-mfix7000' 10623`-mno-fix7000' 10624 Cause nops to be inserted if the read of the destination register 10625 of an mfhi or mflo instruction occurs in the following two 10626 instructions. 10627 10628`-mfix-vr4120' 10629`-no-mfix-vr4120' 10630 Insert nops to work around certain VR4120 errata. This option is 10631 intended to be used on GCC-generated code: it is not designed to 10632 catch all problems in hand-written assembler code. 10633 10634`-mfix-vr4130' 10635`-no-mfix-vr4130' 10636 Insert nops to work around the VR4130 `mflo'/`mfhi' errata. 10637 10638`-m4010' 10639`-no-m4010' 10640 Generate code for the LSI R4010 chip. This tells the assembler to 10641 accept the R4010 specific instructions (`addciu', `ffc', etc.), 10642 and to not schedule `nop' instructions around accesses to the `HI' 10643 and `LO' registers. `-no-m4010' turns off this option. 10644 10645`-m4650' 10646`-no-m4650' 10647 Generate code for the MIPS R4650 chip. This tells the assembler 10648 to accept the `mad' and `madu' instruction, and to not schedule 10649 `nop' instructions around accesses to the `HI' and `LO' registers. 10650 `-no-m4650' turns off this option. 10651 10652`-m3900' 10653`-no-m3900' 10654`-m4100' 10655`-no-m4100' 10656 For each option `-mNNNN', generate code for the MIPS RNNNN chip. 10657 This tells the assembler to accept instructions specific to that 10658 chip, and to schedule for that chip's hazards. 10659 10660`-march=CPU' 10661 Generate code for a particular MIPS cpu. It is exactly equivalent 10662 to `-mCPU', except that there are more value of CPU understood. 10663 Valid CPU value are: 10664 10665 2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130, 10666 vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231, 10667 rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000, 10668 10000, 12000, mips32-4k, sb1 10669 10670`-mtune=CPU' 10671 Schedule and tune for a particular MIPS cpu. Valid CPU values are 10672 identical to `-march=CPU'. 10673 10674`-mabi=ABI' 10675 Record which ABI the source code uses. The recognized arguments 10676 are: `32', `n32', `o64', `64' and `eabi'. 10677 10678`-msym32' 10679`-mno-sym32' 10680 Equivalent to adding `.set sym32' or `.set nosym32' to the 10681 beginning of the assembler input. *Note MIPS symbol sizes::. 10682 10683`-nocpp' 10684 This option is ignored. It is accepted for command-line 10685 compatibility with other assemblers, which use it to turn off C 10686 style preprocessing. With GNU `as', there is no need for 10687 `-nocpp', because the GNU assembler itself never runs the C 10688 preprocessor. 10689 10690`--construct-floats' 10691`--no-construct-floats' 10692 The `--no-construct-floats' option disables the construction of 10693 double width floating point constants by loading the two halves of 10694 the value into the two single width floating point registers that 10695 make up the double width register. This feature is useful if the 10696 processor support the FR bit in its status register, and this bit 10697 is known (by the programmer) to be set. This bit prevents the 10698 aliasing of the double width register by the single width 10699 registers. 10700 10701 By default `--construct-floats' is selected, allowing construction 10702 of these floating point constants. 10703 10704`--trap' 10705`--no-break' 10706 `as' automatically macro expands certain division and 10707 multiplication instructions to check for overflow and division by 10708 zero. This option causes `as' to generate code to take a trap 10709 exception rather than a break exception when an error is detected. 10710 The trap instructions are only supported at Instruction Set 10711 Architecture level 2 and higher. 10712 10713`--break' 10714`--no-trap' 10715 Generate code to take a break exception rather than a trap 10716 exception when an error is detected. This is the default. 10717 10718`-mpdr' 10719`-mno-pdr' 10720 Control generation of `.pdr' sections. Off by default on IRIX, on 10721 elsewhere. 10722 10723`-mshared' 10724`-mno-shared' 10725 When generating code using the Unix calling conventions (selected 10726 by `-KPIC' or `-mcall_shared'), gas will normally generate code 10727 which can go into a shared library. The `-mno-shared' option 10728 tells gas to generate code which uses the calling convention, but 10729 can not go into a shared library. The resulting code is slightly 10730 more efficient. This option only affects the handling of the 10731 `.cpload' and `.cpsetup' pseudo-ops. 10732 10733 10734File: as.info, Node: MIPS Object, Next: MIPS Stabs, Prev: MIPS Opts, Up: MIPS-Dependent 10735 107368.20.2 MIPS ECOFF object code 10737----------------------------- 10738 10739Assembling for a MIPS ECOFF target supports some additional sections 10740besides the usual `.text', `.data' and `.bss'. The additional sections 10741are `.rdata', used for read-only data, `.sdata', used for small data, 10742and `.sbss', used for small common objects. 10743 10744 When assembling for ECOFF, the assembler uses the `$gp' (`$28') 10745register to form the address of a "small object". Any object in the 10746`.sdata' or `.sbss' sections is considered "small" in this sense. For 10747external objects, or for objects in the `.bss' section, you can use the 10748`gcc' `-G' option to control the size of objects addressed via `$gp'; 10749the default value is 8, meaning that a reference to any object eight 10750bytes or smaller uses `$gp'. Passing `-G 0' to `as' prevents it from 10751using the `$gp' register on the basis of object size (but the assembler 10752uses `$gp' for objects in `.sdata' or `sbss' in any case). The size of 10753an object in the `.bss' section is set by the `.comm' or `.lcomm' 10754directive that defines it. The size of an external object may be set 10755with the `.extern' directive. For example, `.extern sym,4' declares 10756that the object at `sym' is 4 bytes in length, whie leaving `sym' 10757otherwise undefined. 10758 10759 Using small ECOFF objects requires linker support, and assumes that 10760the `$gp' register is correctly initialized (normally done 10761automatically by the startup code). MIPS ECOFF assembly code must not 10762modify the `$gp' register. 10763 10764 10765File: as.info, Node: MIPS Stabs, Next: MIPS ISA, Prev: MIPS Object, Up: MIPS-Dependent 10766 107678.20.3 Directives for debugging information 10768------------------------------------------- 10769 10770MIPS ECOFF `as' supports several directives used for generating 10771debugging information which are not support by traditional MIPS 10772assemblers. These are `.def', `.endef', `.dim', `.file', `.scl', 10773`.size', `.tag', `.type', `.val', `.stabd', `.stabn', and `.stabs'. 10774The debugging information generated by the three `.stab' directives can 10775only be read by GDB, not by traditional MIPS debuggers (this 10776enhancement is required to fully support C++ debugging). These 10777directives are primarily used by compilers, not assembly language 10778programmers! 10779 10780 10781File: as.info, Node: MIPS symbol sizes, Next: MIPS autoextend, Prev: MIPS ISA, Up: MIPS-Dependent 10782 107838.20.4 Directives to override the size of symbols 10784------------------------------------------------- 10785 10786The n64 ABI allows symbols to have any 64-bit value. Although this 10787provides a great deal of flexibility, it means that some macros have 10788much longer expansions than their 32-bit counterparts. For example, 10789the non-PIC expansion of `dla $4,sym' is usually: 10790 10791 lui $4,%highest(sym) 10792 lui $1,%hi(sym) 10793 daddiu $4,$4,%higher(sym) 10794 daddiu $1,$1,%lo(sym) 10795 dsll32 $4,$4,0 10796 daddu $4,$4,$1 10797 10798 whereas the 32-bit expansion is simply: 10799 10800 lui $4,%hi(sym) 10801 daddiu $4,$4,%lo(sym) 10802 10803 n64 code is sometimes constructed in such a way that all symbolic 10804constants are known to have 32-bit values, and in such cases, it's 10805preferable to use the 32-bit expansion instead of the 64-bit expansion. 10806 10807 You can use the `.set sym32' directive to tell the assembler that, 10808from this point on, all expressions of the form `SYMBOL' or `SYMBOL + 10809OFFSET' have 32-bit values. For example: 10810 10811 .set sym32 10812 dla $4,sym 10813 lw $4,sym+16 10814 sw $4,sym+0x8000($4) 10815 10816 will cause the assembler to treat `sym', `sym+16' and `sym+0x8000' 10817as 32-bit values. The handling of non-symbolic addresses is not 10818affected. 10819 10820 The directive `.set nosym32' ends a `.set sym32' block and reverts 10821to the normal behavior. It is also possible to change the symbol size 10822using the command-line options `-msym32' and `-mno-sym32'. 10823 10824 These options and directives are always accepted, but at present, 10825they have no effect for anything other than n64. 10826 10827 10828File: as.info, Node: MIPS ISA, Next: MIPS symbol sizes, Prev: MIPS Stabs, Up: MIPS-Dependent 10829 108308.20.5 Directives to override the ISA level 10831------------------------------------------- 10832 10833GNU `as' supports an additional directive to change the MIPS 10834Instruction Set Architecture level on the fly: `.set mipsN'. N should 10835be a number from 0 to 5, or 32, 32r2, 64 or 64r2. The values other 10836than 0 make the assembler accept instructions for the corresponding ISA 10837level, from that point on in the assembly. `.set mipsN' affects not 10838only which instructions are permitted, but also how certain macros are 10839expanded. `.set mips0' restores the ISA level to its original level: 10840either the level you selected with command line options, or the default 10841for your configuration. You can use this feature to permit specific 10842R4000 instructions while assembling in 32 bit mode. Use this directive 10843with care! 10844 10845 The directive `.set mips16' puts the assembler into MIPS 16 mode, in 10846which it will assemble instructions for the MIPS 16 processor. Use 10847`.set nomips16' to return to normal 32 bit mode. 10848 10849 Traditional MIPS assemblers do not support this directive. 10850 10851 10852File: as.info, Node: MIPS autoextend, Next: MIPS insn, Prev: MIPS symbol sizes, Up: MIPS-Dependent 10853 108548.20.6 Directives for extending MIPS 16 bit instructions 10855-------------------------------------------------------- 10856 10857By default, MIPS 16 instructions are automatically extended to 32 bits 10858when necessary. The directive `.set noautoextend' will turn this off. 10859When `.set noautoextend' is in effect, any 32 bit instruction must be 10860explicitly extended with the `.e' modifier (e.g., `li.e $4,1000'). The 10861directive `.set autoextend' may be used to once again automatically 10862extend instructions when necessary. 10863 10864 This directive is only meaningful when in MIPS 16 mode. Traditional 10865MIPS assemblers do not support this directive. 10866 10867 10868File: as.info, Node: MIPS insn, Next: MIPS option stack, Prev: MIPS autoextend, Up: MIPS-Dependent 10869 108708.20.7 Directive to mark data as an instruction 10871----------------------------------------------- 10872 10873The `.insn' directive tells `as' that the following data is actually 10874instructions. This makes a difference in MIPS 16 mode: when loading 10875the address of a label which precedes instructions, `as' automatically 10876adds 1 to the value, so that jumping to the loaded address will do the 10877right thing. 10878 10879 10880File: as.info, Node: MIPS option stack, Next: MIPS ASE instruction generation overrides, Prev: MIPS insn, Up: MIPS-Dependent 10881 108828.20.8 Directives to save and restore options 10883--------------------------------------------- 10884 10885The directives `.set push' and `.set pop' may be used to save and 10886restore the current settings for all the options which are controlled 10887by `.set'. The `.set push' directive saves the current settings on a 10888stack. The `.set pop' directive pops the stack and restores the 10889settings. 10890 10891 These directives can be useful inside an macro which must change an 10892option such as the ISA level or instruction reordering but does not want 10893to change the state of the code which invoked the macro. 10894 10895 Traditional MIPS assemblers do not support these directives. 10896 10897 10898File: as.info, Node: MIPS ASE instruction generation overrides, Prev: MIPS option stack, Up: MIPS-Dependent 10899 109008.20.9 Directives to control generation of MIPS ASE instructions 10901---------------------------------------------------------------- 10902 10903The directive `.set mips3d' makes the assembler accept instructions 10904from the MIPS-3D Application Specific Extension from that point on in 10905the assembly. The `.set nomips3d' directive prevents MIPS-3D 10906instructions from being accepted. 10907 10908 The directive `.set mdmx' makes the assembler accept instructions 10909from the MDMX Application Specific Extension from that point on in the 10910assembly. The `.set nomdmx' directive prevents MDMX instructions from 10911being accepted. 10912 10913 The directive `.set dsp' makes the assembler accept instructions 10914from the DSP Application Specific Extension from that point on in the 10915assembly. The `.set nodsp' directive prevents DSP instructions from 10916being accepted. 10917 10918 The directive `.set mt' makes the assembler accept instructions from 10919the MT Application Specific Extension from that point on in the 10920assembly. The `.set nomt' directive prevents MT instructions from 10921being accepted. 10922 10923 Traditional MIPS assemblers do not support these directives. 10924 10925 10926File: as.info, Node: MMIX-Dependent, Next: MSP430-Dependent, Prev: MIPS-Dependent, Up: Machine Dependencies 10927 109288.21 MMIX Dependent Features 10929============================ 10930 10931* Menu: 10932 10933* MMIX-Opts:: Command-line Options 10934* MMIX-Expand:: Instruction expansion 10935* MMIX-Syntax:: Syntax 10936* MMIX-mmixal:: Differences to `mmixal' syntax and semantics 10937 10938 10939File: as.info, Node: MMIX-Opts, Next: MMIX-Expand, Up: MMIX-Dependent 10940 109418.21.1 Command-line Options 10942--------------------------- 10943 10944The MMIX version of `as' has some machine-dependent options. 10945 10946 When `--fixed-special-register-names' is specified, only the register 10947names specified in *note MMIX-Regs:: are recognized in the instructions 10948`PUT' and `GET'. 10949 10950 You can use the `--globalize-symbols' to make all symbols global. 10951This option is useful when splitting up a `mmixal' program into several 10952files. 10953 10954 The `--gnu-syntax' turns off most syntax compatibility with 10955`mmixal'. Its usability is currently doubtful. 10956 10957 The `--relax' option is not fully supported, but will eventually make 10958the object file prepared for linker relaxation. 10959 10960 If you want to avoid inadvertently calling a predefined symbol and 10961would rather get an error, for example when using `as' with a compiler 10962or other machine-generated code, specify `--no-predefined-syms'. This 10963turns off built-in predefined definitions of all such symbols, 10964including rounding-mode symbols, segment symbols, `BIT' symbols, and 10965`TRAP' symbols used in `mmix' "system calls". It also turns off 10966predefined special-register names, except when used in `PUT' and `GET' 10967instructions. 10968 10969 By default, some instructions are expanded to fit the size of the 10970operand or an external symbol (*note MMIX-Expand::). By passing 10971`--no-expand', no such expansion will be done, instead causing errors 10972at link time if the operand does not fit. 10973 10974 The `mmixal' documentation (*note mmixsite::) specifies that global 10975registers allocated with the `GREG' directive (*note MMIX-greg::) and 10976initialized to the same non-zero value, will refer to the same global 10977register. This isn't strictly enforceable in `as' since the final 10978addresses aren't known until link-time, but it will do an effort unless 10979the `--no-merge-gregs' option is specified. (Register merging isn't 10980yet implemented in `ld'.) 10981 10982 `as' will warn every time it expands an instruction to fit an 10983operand unless the option `-x' is specified. It is believed that this 10984behaviour is more useful than just mimicking `mmixal''s behaviour, in 10985which instructions are only expanded if the `-x' option is specified, 10986and assembly fails otherwise, when an instruction needs to be expanded. 10987It needs to be kept in mind that `mmixal' is both an assembler and 10988linker, while `as' will expand instructions that at link stage can be 10989contracted. (Though linker relaxation isn't yet implemented in `ld'.) 10990The option `-x' also imples `--linker-allocated-gregs'. 10991 10992 If instruction expansion is enabled, `as' can expand a `PUSHJ' 10993instruction into a series of instructions. The shortest expansion is 10994to not expand it, but just mark the call as redirectable to a stub, 10995which `ld' creates at link-time, but only if the original `PUSHJ' 10996instruction is found not to reach the target. The stub consists of the 10997necessary instructions to form a jump to the target. This happens if 10998`as' can assert that the `PUSHJ' instruction can reach such a stub. 10999The option `--no-pushj-stubs' disables this shorter expansion, and the 11000longer series of instructions is then created at assembly-time. The 11001option `--no-stubs' is a synonym, intended for compatibility with 11002future releases, where generation of stubs for other instructions may 11003be implemented. 11004 11005 Usually a two-operand-expression (*note GREG-base::) without a 11006matching `GREG' directive is treated as an error by `as'. When the 11007option `--linker-allocated-gregs' is in effect, they are instead passed 11008through to the linker, which will allocate as many global registers as 11009is needed. 11010 11011 11012File: as.info, Node: MMIX-Expand, Next: MMIX-Syntax, Prev: MMIX-Opts, Up: MMIX-Dependent 11013 110148.21.2 Instruction expansion 11015---------------------------- 11016 11017When `as' encounters an instruction with an operand that is either not 11018known or does not fit the operand size of the instruction, `as' (and 11019`ld') will expand the instruction into a sequence of instructions 11020semantically equivalent to the operand fitting the instruction. 11021Expansion will take place for the following instructions: 11022 11023`GETA' 11024 Expands to a sequence of four instructions: `SETL', `INCML', 11025 `INCMH' and `INCH'. The operand must be a multiple of four. 11026 11027Conditional branches 11028 A branch instruction is turned into a branch with the complemented 11029 condition and prediction bit over five instructions; four 11030 instructions setting `$255' to the operand value, which like with 11031 `GETA' must be a multiple of four, and a final `GO $255,$255,0'. 11032 11033`PUSHJ' 11034 Similar to expansion for conditional branches; four instructions 11035 set `$255' to the operand value, followed by a `PUSHGO 11036 $255,$255,0'. 11037 11038`JMP' 11039 Similar to conditional branches and `PUSHJ'. The final instruction 11040 is `GO $255,$255,0'. 11041 11042 The linker `ld' is expected to shrink these expansions for code 11043assembled with `--relax' (though not currently implemented). 11044 11045 11046File: as.info, Node: MMIX-Syntax, Next: MMIX-mmixal, Prev: MMIX-Expand, Up: MMIX-Dependent 11047 110488.21.3 Syntax 11049------------- 11050 11051The assembly syntax is supposed to be upward compatible with that 11052described in Sections 1.3 and 1.4 of `The Art of Computer Programming, 11053Volume 1'. Draft versions of those chapters as well as other MMIX 11054information is located at 11055`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html'. Most code 11056examples from the mmixal package located there should work unmodified 11057when assembled and linked as single files, with a few noteworthy 11058exceptions (*note MMIX-mmixal::). 11059 11060 Before an instruction is emitted, the current location is aligned to 11061the next four-byte boundary. If a label is defined at the beginning of 11062the line, its value will be the aligned value. 11063 11064 In addition to the traditional hex-prefix `0x', a hexadecimal number 11065can also be specified by the prefix character `#'. 11066 11067 After all operands to an MMIX instruction or directive have been 11068specified, the rest of the line is ignored, treated as a comment. 11069 11070* Menu: 11071 11072* MMIX-Chars:: Special Characters 11073* MMIX-Symbols:: Symbols 11074* MMIX-Regs:: Register Names 11075* MMIX-Pseudos:: Assembler Directives 11076 11077 11078File: as.info, Node: MMIX-Chars, Next: MMIX-Symbols, Up: MMIX-Syntax 11079 110808.21.3.1 Special Characters 11081........................... 11082 11083The characters `*' and `#' are line comment characters; each start a 11084comment at the beginning of a line, but only at the beginning of a 11085line. A `#' prefixes a hexadecimal number if found elsewhere on a line. 11086 11087 Two other characters, `%' and `!', each start a comment anywhere on 11088the line. Thus you can't use the `modulus' and `not' operators in 11089expressions normally associated with these two characters. 11090 11091 A `;' is a line separator, treated as a new-line, so separate 11092instructions can be specified on a single line. 11093 11094 11095File: as.info, Node: MMIX-Symbols, Next: MMIX-Regs, Prev: MMIX-Chars, Up: MMIX-Syntax 11096 110978.21.3.2 Symbols 11098................ 11099 11100The character `:' is permitted in identifiers. There are two 11101exceptions to it being treated as any other symbol character: if a 11102symbol begins with `:', it means that the symbol is in the global 11103namespace and that the current prefix should not be prepended to that 11104symbol (*note MMIX-prefix::). The `:' is then not considered part of 11105the symbol. For a symbol in the label position (first on a line), a `:' 11106at the end of a symbol is silently stripped off. A label is permitted, 11107but not required, to be followed by a `:', as with many other assembly 11108formats. 11109 11110 The character `@' in an expression, is a synonym for `.', the 11111current location. 11112 11113 In addition to the common forward and backward local symbol formats 11114(*note Symbol Names::), they can be specified with upper-case `B' and 11115`F', as in `8B' and `9F'. A local label defined for the current 11116position is written with a `H' appended to the number: 11117 3H LDB $0,$1,2 11118 This and traditional local-label formats cannot be mixed: a label 11119must be defined and referred to using the same format. 11120 11121 There's a minor caveat: just as for the ordinary local symbols, the 11122local symbols are translated into ordinary symbols using control 11123characters are to hide the ordinal number of the symbol. 11124Unfortunately, these symbols are not translated back in error messages. 11125Thus you may see confusing error messages when local symbols are used. 11126Control characters `\003' (control-C) and `\004' (control-D) are used 11127for the MMIX-specific local-symbol syntax. 11128 11129 The symbol `Main' is handled specially; it is always global. 11130 11131 By defining the symbols `__.MMIX.start..text' and 11132`__.MMIX.start..data', the address of respectively the `.text' and 11133`.data' segments of the final program can be defined, though when 11134linking more than one object file, the code or data in the object file 11135containing the symbol is not guaranteed to be start at that position; 11136just the final executable. *Note MMIX-loc::. 11137 11138 11139File: as.info, Node: MMIX-Regs, Next: MMIX-Pseudos, Prev: MMIX-Symbols, Up: MMIX-Syntax 11140 111418.21.3.3 Register names 11142....................... 11143 11144Local and global registers are specified as `$0' to `$255'. The 11145recognized special register names are `rJ', `rA', `rB', `rC', `rD', 11146`rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ', 11147`rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT', 11148`rWW', `rXX', `rYY' and `rZZ'. A leading `:' is optional for special 11149register names. 11150 11151 Local and global symbols can be equated to register names and used in 11152place of ordinary registers. 11153 11154 Similarly for special registers, local and global symbols can be 11155used. Also, symbols equated from numbers and constant expressions are 11156allowed in place of a special register, except when either of the 11157options `--no-predefined-syms' and `--fixed-special-register-names' are 11158specified. Then only the special register names above are allowed for 11159the instructions having a special register operand; `GET' and `PUT'. 11160 11161 11162File: as.info, Node: MMIX-Pseudos, Prev: MMIX-Regs, Up: MMIX-Syntax 11163 111648.21.3.4 Assembler Directives 11165............................. 11166 11167`LOC' 11168 The `LOC' directive sets the current location to the value of the 11169 operand field, which may include changing sections. If the 11170 operand is a constant, the section is set to either `.data' if the 11171 value is `0x2000000000000000' or larger, else it is set to `.text'. 11172 Within a section, the current location may only be changed to 11173 monotonically higher addresses. A LOC expression must be a 11174 previously defined symbol or a "pure" constant. 11175 11176 An example, which sets the label PREV to the current location, and 11177 updates the current location to eight bytes forward: 11178 prev LOC @+8 11179 11180 When a LOC has a constant as its operand, a symbol 11181 `__.MMIX.start..text' or `__.MMIX.start..data' is defined 11182 depending on the address as mentioned above. Each such symbol is 11183 interpreted as special by the linker, locating the section at that 11184 address. Note that if multiple files are linked, the first object 11185 file with that section will be mapped to that address (not 11186 necessarily the file with the LOC definition). 11187 11188`LOCAL' 11189 Example: 11190 LOCAL external_symbol 11191 LOCAL 42 11192 .local asymbol 11193 11194 This directive-operation generates a link-time assertion that the 11195 operand does not correspond to a global register. The operand is 11196 an expression that at link-time resolves to a register symbol or a 11197 number. A number is treated as the register having that number. 11198 There is one restriction on the use of this directive: the 11199 pseudo-directive must be placed in a section with contents, code 11200 or data. 11201 11202`IS' 11203 The `IS' directive: 11204 asymbol IS an_expression 11205 sets the symbol `asymbol' to `an_expression'. A symbol may not be 11206 set more than once using this directive. Local labels may be set 11207 using this directive, for example: 11208 5H IS @+4 11209 11210`GREG' 11211 This directive reserves a global register, gives it an initial 11212 value and optionally gives it a symbolic name. Some examples: 11213 11214 areg GREG 11215 breg GREG data_value 11216 GREG data_buffer 11217 .greg creg, another_data_value 11218 11219 The symbolic register name can be used in place of a (non-special) 11220 register. If a value isn't provided, it defaults to zero. Unless 11221 the option `--no-merge-gregs' is specified, non-zero registers 11222 allocated with this directive may be eliminated by `as'; another 11223 register with the same value used in its place. Any of the 11224 instructions `CSWAP', `GO', `LDA', `LDBU', `LDB', `LDHT', `LDOU', 11225 `LDO', `LDSF', `LDTU', `LDT', `LDUNC', `LDVTS', `LDWU', `LDW', 11226 `PREGO', `PRELD', `PREST', `PUSHGO', `STBU', `STB', `STCO', `STHT', 11227 `STOU', `STSF', `STTU', `STT', `STUNC', `SYNCD', `SYNCID', can 11228 have a value nearby an initial value in place of its second and 11229 third operands. Here, "nearby" is defined as within the range 11230 0...255 from the initial value of such an allocated register. 11231 11232 buffer1 BYTE 0,0,0,0,0 11233 buffer2 BYTE 0,0,0,0,0 11234 ... 11235 GREG buffer1 11236 LDOU $42,buffer2 11237 In the example above, the `Y' field of the `LDOUI' instruction 11238 (LDOU with a constant Z) will be replaced with the global register 11239 allocated for `buffer1', and the `Z' field will have the value 5, 11240 the offset from `buffer1' to `buffer2'. The result is equivalent 11241 to this code: 11242 buffer1 BYTE 0,0,0,0,0 11243 buffer2 BYTE 0,0,0,0,0 11244 ... 11245 tmpreg GREG buffer1 11246 LDOU $42,tmpreg,(buffer2-buffer1) 11247 11248 Global registers allocated with this directive are allocated in 11249 order higher-to-lower within a file. Other than that, the exact 11250 order of register allocation and elimination is undefined. For 11251 example, the order is undefined when more than one file with such 11252 directives are linked together. With the options `-x' and 11253 `--linker-allocated-gregs', `GREG' directives for two-operand 11254 cases like the one mentioned above can be omitted. Sufficient 11255 global registers will then be allocated by the linker. 11256 11257`BYTE' 11258 The `BYTE' directive takes a series of operands separated by a 11259 comma. If an operand is a string (*note Strings::), each 11260 character of that string is emitted as a byte. Other operands 11261 must be constant expressions without forward references, in the 11262 range 0...255. If you need operands having expressions with 11263 forward references, use `.byte' (*note Byte::). An operand can be 11264 omitted, defaulting to a zero value. 11265 11266`WYDE' 11267`TETRA' 11268`OCTA' 11269 The directives `WYDE', `TETRA' and `OCTA' emit constants of two, 11270 four and eight bytes size respectively. Before anything else 11271 happens for the directive, the current location is aligned to the 11272 respective constant-size boundary. If a label is defined at the 11273 beginning of the line, its value will be that after the alignment. 11274 A single operand can be omitted, defaulting to a zero value 11275 emitted for the directive. Operands can be expressed as strings 11276 (*note Strings::), in which case each character in the string is 11277 emitted as a separate constant of the size indicated by the 11278 directive. 11279 11280`PREFIX' 11281 The `PREFIX' directive sets a symbol name prefix to be prepended to 11282 all symbols (except local symbols, *note MMIX-Symbols::), that are 11283 not prefixed with `:', until the next `PREFIX' directive. Such 11284 prefixes accumulate. For example, 11285 PREFIX a 11286 PREFIX b 11287 c IS 0 11288 defines a symbol `abc' with the value 0. 11289 11290`BSPEC' 11291`ESPEC' 11292 A pair of `BSPEC' and `ESPEC' directives delimit a section of 11293 special contents (without specified semantics). Example: 11294 BSPEC 42 11295 TETRA 1,2,3 11296 ESPEC 11297 The single operand to `BSPEC' must be number in the range 0...255. 11298 The `BSPEC' number 80 is used by the GNU binutils implementation. 11299 11300 11301File: as.info, Node: MMIX-mmixal, Prev: MMIX-Syntax, Up: MMIX-Dependent 11302 113038.21.4 Differences to `mmixal' 11304------------------------------ 11305 11306The binutils `as' and `ld' combination has a few differences in 11307function compared to `mmixal' (*note mmixsite::). 11308 11309 The replacement of a symbol with a GREG-allocated register (*note 11310GREG-base::) is not handled the exactly same way in `as' as in 11311`mmixal'. This is apparent in the `mmixal' example file `inout.mms', 11312where different registers with different offsets, eventually yielding 11313the same address, are used in the first instruction. This type of 11314difference should however not affect the function of any program unless 11315it has specific assumptions about the allocated register number. 11316 11317 Line numbers (in the `mmo' object format) are currently not 11318supported. 11319 11320 Expression operator precedence is not that of mmixal: operator 11321precedence is that of the C programming language. It's recommended to 11322use parentheses to explicitly specify wanted operator precedence 11323whenever more than one type of operators are used. 11324 11325 The serialize unary operator `&', the fractional division operator 11326`//', the logical not operator `!' and the modulus operator `%' are not 11327available. 11328 11329 Symbols are not global by default, unless the option 11330`--globalize-symbols' is passed. Use the `.global' directive to 11331globalize symbols (*note Global::). 11332 11333 Operand syntax is a bit stricter with `as' than `mmixal'. For 11334example, you can't say `addu 1,2,3', instead you must write `addu 11335$1,$2,3'. 11336 11337 You can't LOC to a lower address than those already visited (i.e. 11338"backwards"). 11339 11340 A LOC directive must come before any emitted code. 11341 11342 Predefined symbols are visible as file-local symbols after use. (In 11343the ELF file, that is--the linked mmo file has no notion of a file-local 11344symbol.) 11345 11346 Some mapping of constant expressions to sections in LOC expressions 11347is attempted, but that functionality is easily confused and should be 11348avoided unless compatibility with `mmixal' is required. A LOC 11349expression to `0x2000000000000000' or higher, maps to the `.data' 11350section and lower addresses map to the `.text' section (*note 11351MMIX-loc::). 11352 11353 The code and data areas are each contiguous. Sparse programs with 11354far-away LOC directives will take up the same amount of space as a 11355contiguous program with zeros filled in the gaps between the LOC 11356directives. If you need sparse programs, you might try and get the 11357wanted effect with a linker script and splitting up the code parts into 11358sections (*note Section::). Assembly code for this, to be compatible 11359with `mmixal', would look something like: 11360 .if 0 11361 LOC away_expression 11362 .else 11363 .section away,"ax" 11364 .fi 11365 `as' will not execute the LOC directive and `mmixal' ignores the 11366lines with `.'. This construct can be used generally to help 11367compatibility. 11368 11369 Symbols can't be defined twice-not even to the same value. 11370 11371 Instruction mnemonics are recognized case-insensitive, though the 11372`IS' and `GREG' pseudo-operations must be specified in upper-case 11373characters. 11374 11375 There's no unicode support. 11376 11377 The following is a list of programs in `mmix.tar.gz', available at 11378`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html', last 11379checked with the version dated 2001-08-25 (md5sum 11380c393470cfc86fac040487d22d2bf0172) that assemble with `mmixal' but do 11381not assemble with `as': 11382 11383`silly.mms' 11384 LOC to a previous address. 11385 11386`sim.mms' 11387 Redefines symbol `Done'. 11388 11389`test.mms' 11390 Uses the serial operator `&'. 11391 11392 11393File: as.info, Node: MSP430-Dependent, Next: SH-Dependent, Prev: MMIX-Dependent, Up: Machine Dependencies 11394 113958.22 MSP 430 Dependent Features 11396=============================== 11397 11398* Menu: 11399 11400* MSP430 Options:: Options 11401* MSP430 Syntax:: Syntax 11402* MSP430 Floating Point:: Floating Point 11403* MSP430 Directives:: MSP 430 Machine Directives 11404* MSP430 Opcodes:: Opcodes 11405* MSP430 Profiling Capability:: Profiling Capability 11406 11407 11408File: as.info, Node: MSP430 Options, Next: MSP430 Syntax, Up: MSP430-Dependent 11409 114108.22.1 Options 11411-------------- 11412 11413`-m' 11414 select the mpu arch. Currently has no effect. 11415 11416`-mP' 11417 enables polymorph instructions handler. 11418 11419`-mQ' 11420 enables relaxation at assembly time. DANGEROUS! 11421 11422 11423 11424File: as.info, Node: MSP430 Syntax, Next: MSP430 Floating Point, Prev: MSP430 Options, Up: MSP430-Dependent 11425 114268.22.2 Syntax 11427------------- 11428 11429* Menu: 11430 11431* MSP430-Macros:: Macros 11432* MSP430-Chars:: Special Characters 11433* MSP430-Regs:: Register Names 11434* MSP430-Ext:: Assembler Extensions 11435 11436 11437File: as.info, Node: MSP430-Macros, Next: MSP430-Chars, Up: MSP430 Syntax 11438 114398.22.2.1 Macros 11440............... 11441 11442The macro syntax used on the MSP 430 is like that described in the MSP 11443430 Family Assembler Specification. Normal `as' macros should still 11444work. 11445 11446 Additional built-in macros are: 11447 11448`llo(exp)' 11449 Extracts least significant word from 32-bit expression 'exp'. 11450 11451`lhi(exp)' 11452 Extracts most significant word from 32-bit expression 'exp'. 11453 11454`hlo(exp)' 11455 Extracts 3rd word from 64-bit expression 'exp'. 11456 11457`hhi(exp)' 11458 Extracts 4rd word from 64-bit expression 'exp'. 11459 11460 11461 They normally being used as an immediate source operand. 11462 mov #llo(1), r10 ; == mov #1, r10 11463 mov #lhi(1), r10 ; == mov #0, r10 11464 11465 11466File: as.info, Node: MSP430-Chars, Next: MSP430-Regs, Prev: MSP430-Macros, Up: MSP430 Syntax 11467 114688.22.2.2 Special Characters 11469........................... 11470 11471`;' is the line comment character. 11472 11473 The character `$' in jump instructions indicates current location and 11474implemented only for TI syntax compatibility. 11475 11476 11477File: as.info, Node: MSP430-Regs, Next: MSP430-Ext, Prev: MSP430-Chars, Up: MSP430 Syntax 11478 114798.22.2.3 Register Names 11480....................... 11481 11482General-purpose registers are represented by predefined symbols of the 11483form `rN' (for global registers), where N represents a number between 11484`0' and `15'. The leading letters may be in either upper or lower 11485case; for example, `r13' and `R7' are both valid register names. 11486 11487 Register names `PC', `SP' and `SR' cannot be used as register names 11488and will be treated as variables. Use `r0', `r1', and `r2' instead. 11489 11490 11491File: as.info, Node: MSP430-Ext, Prev: MSP430-Regs, Up: MSP430 Syntax 11492 114938.22.2.4 Assembler Extensions 11494............................. 11495 11496`@rN' 11497 As destination operand being treated as `0(rn)' 11498 11499`0(rN)' 11500 As source operand being treated as `@rn' 11501 11502`jCOND +N' 11503 Skips next N bytes followed by jump instruction and equivalent to 11504 `jCOND $+N+2' 11505 11506 11507 Also, there are some instructions, which cannot be found in other 11508assemblers. These are branch instructions, which has different opcodes 11509upon jump distance. They all got PC relative addressing mode. 11510 11511`beq label' 11512 A polymorph instruction which is `jeq label' in case if jump 11513 distance within allowed range for cpu's jump instruction. If not, 11514 this unrolls into a sequence of 11515 jne $+6 11516 br label 11517 11518`bne label' 11519 A polymorph instruction which is `jne label' or `jeq +4; br label' 11520 11521`blt label' 11522 A polymorph instruction which is `jl label' or `jge +4; br label' 11523 11524`bltn label' 11525 A polymorph instruction which is `jn label' or `jn +2; jmp +4; br 11526 label' 11527 11528`bltu label' 11529 A polymorph instruction which is `jlo label' or `jhs +2; br label' 11530 11531`bge label' 11532 A polymorph instruction which is `jge label' or `jl +4; br label' 11533 11534`bgeu label' 11535 A polymorph instruction which is `jhs label' or `jlo +4; br label' 11536 11537`bgt label' 11538 A polymorph instruction which is `jeq +2; jge label' or `jeq +6; 11539 jl +4; br label' 11540 11541`bgtu label' 11542 A polymorph instruction which is `jeq +2; jhs label' or `jeq +6; 11543 jlo +4; br label' 11544 11545`bleu label' 11546 A polymorph instruction which is `jeq label; jlo label' or `jeq 11547 +2; jhs +4; br label' 11548 11549`ble label' 11550 A polymorph instruction which is `jeq label; jl label' or `jeq 11551 +2; jge +4; br label' 11552 11553`jump label' 11554 A polymorph instruction which is `jmp label' or `br label' 11555 11556 11557File: as.info, Node: MSP430 Floating Point, Next: MSP430 Directives, Prev: MSP430 Syntax, Up: MSP430-Dependent 11558 115598.22.3 Floating Point 11560--------------------- 11561 11562The MSP 430 family uses IEEE 32-bit floating-point numbers. 11563 11564 11565File: as.info, Node: MSP430 Directives, Next: MSP430 Opcodes, Prev: MSP430 Floating Point, Up: MSP430-Dependent 11566 115678.22.4 MSP 430 Machine Directives 11568--------------------------------- 11569 11570`.file' 11571 This directive is ignored; it is accepted for compatibility with 11572 other MSP 430 assemblers. 11573 11574 _Warning:_ in other versions of the GNU assembler, `.file' is 11575 used for the directive called `.app-file' in the MSP 430 11576 support. 11577 11578`.line' 11579 This directive is ignored; it is accepted for compatibility with 11580 other MSP 430 assemblers. 11581 11582`.arch' 11583 Currently this directive is ignored; it is accepted for 11584 compatibility with other MSP 430 assemblers. 11585 11586`.profiler' 11587 This directive instructs assembler to add new profile entry to the 11588 object file. 11589 11590 11591 11592File: as.info, Node: MSP430 Opcodes, Next: MSP430 Profiling Capability, Prev: MSP430 Directives, Up: MSP430-Dependent 11593 115948.22.5 Opcodes 11595-------------- 11596 11597`as' implements all the standard MSP 430 opcodes. No additional 11598pseudo-instructions are needed on this family. 11599 11600 For information on the 430 machine instruction set, see `MSP430 11601User's Manual, document slau049d', Texas Instrument, Inc. 11602 11603 11604File: as.info, Node: MSP430 Profiling Capability, Prev: MSP430 Opcodes, Up: MSP430-Dependent 11605 116068.22.6 Profiling Capability 11607--------------------------- 11608 11609It is a performance hit to use gcc's profiling approach for this tiny 11610target. Even more - jtag hardware facility does not perform any 11611profiling functions. However we've got gdb's built-in simulator where 11612we can do anything. 11613 11614 We define new section `.profiler' which holds all profiling 11615information. We define new pseudo operation `.profiler' which will 11616instruct assembler to add new profile entry to the object file. Profile 11617should take place at the present address. 11618 11619 Pseudo operation format: 11620 11621 `.profiler flags,function_to_profile [, cycle_corrector, extra]' 11622 11623 where: 11624 11625 `flags' is a combination of the following characters: 11626 11627 `s' 11628 function entry 11629 11630 `x' 11631 function exit 11632 11633 `i' 11634 function is in init section 11635 11636 `f' 11637 function is in fini section 11638 11639 `l' 11640 library call 11641 11642 `c' 11643 libc standard call 11644 11645 `d' 11646 stack value demand 11647 11648 `I' 11649 interrupt service routine 11650 11651 `P' 11652 prologue start 11653 11654 `p' 11655 prologue end 11656 11657 `E' 11658 epilogue start 11659 11660 `e' 11661 epilogue end 11662 11663 `j' 11664 long jump / sjlj unwind 11665 11666 `a' 11667 an arbitrary code fragment 11668 11669 `t' 11670 extra parameter saved (a constant value like frame size) 11671 11672`function_to_profile' 11673 a function address 11674 11675`cycle_corrector' 11676 a value which should be added to the cycle counter, zero if 11677 omitted. 11678 11679`extra' 11680 any extra parameter, zero if omitted. 11681 11682 11683 For example: 11684 .global fxx 11685 .type fxx,@function 11686 fxx: 11687 .LFrameOffset_fxx=0x08 11688 .profiler "scdP", fxx ; function entry. 11689 ; we also demand stack value to be saved 11690 push r11 11691 push r10 11692 push r9 11693 push r8 11694 .profiler "cdpt",fxx,0, .LFrameOffset_fxx ; check stack value at this point 11695 ; (this is a prologue end) 11696 ; note, that spare var filled with 11697 ; the farme size 11698 mov r15,r8 11699 ... 11700 .profiler cdE,fxx ; check stack 11701 pop r8 11702 pop r9 11703 pop r10 11704 pop r11 11705 .profiler xcde,fxx,3 ; exit adds 3 to the cycle counter 11706 ret ; cause 'ret' insn takes 3 cycles 11707 11708 11709File: as.info, Node: PDP-11-Dependent, Next: PJ-Dependent, Prev: SH64-Dependent, Up: Machine Dependencies 11710 117118.23 PDP-11 Dependent Features 11712============================== 11713 11714* Menu: 11715 11716* PDP-11-Options:: Options 11717* PDP-11-Pseudos:: Assembler Directives 11718* PDP-11-Syntax:: DEC Syntax versus BSD Syntax 11719* PDP-11-Mnemonics:: Instruction Naming 11720* PDP-11-Synthetic:: Synthetic Instructions 11721 11722 11723File: as.info, Node: PDP-11-Options, Next: PDP-11-Pseudos, Up: PDP-11-Dependent 11724 117258.23.1 Options 11726-------------- 11727 11728The PDP-11 version of `as' has a rich set of machine dependent options. 11729 117308.23.1.1 Code Generation Options 11731................................ 11732 11733`-mpic | -mno-pic' 11734 Generate position-independent (or position-dependent) code. 11735 11736 The default is to generate position-independent code. 11737 117388.23.1.2 Instruction Set Extension Options 11739.......................................... 11740 11741These options enables or disables the use of extensions over the base 11742line instruction set as introduced by the first PDP-11 CPU: the KA11. 11743Most options come in two variants: a `-m'EXTENSION that enables 11744EXTENSION, and a `-mno-'EXTENSION that disables EXTENSION. 11745 11746 The default is to enable all extensions. 11747 11748`-mall | -mall-extensions' 11749 Enable all instruction set extensions. 11750 11751`-mno-extensions' 11752 Disable all instruction set extensions. 11753 11754`-mcis | -mno-cis' 11755 Enable (or disable) the use of the commercial instruction set, 11756 which consists of these instructions: `ADDNI', `ADDN', `ADDPI', 11757 `ADDP', `ASHNI', `ASHN', `ASHPI', `ASHP', `CMPCI', `CMPC', 11758 `CMPNI', `CMPN', `CMPPI', `CMPP', `CVTLNI', `CVTLN', `CVTLPI', 11759 `CVTLP', `CVTNLI', `CVTNL', `CVTNPI', `CVTNP', `CVTPLI', `CVTPL', 11760 `CVTPNI', `CVTPN', `DIVPI', `DIVP', `L2DR', `L3DR', `LOCCI', 11761 `LOCC', `MATCI', `MATC', `MOVCI', `MOVC', `MOVRCI', `MOVRC', 11762 `MOVTCI', `MOVTC', `MULPI', `MULP', `SCANCI', `SCANC', `SKPCI', 11763 `SKPC', `SPANCI', `SPANC', `SUBNI', `SUBN', `SUBPI', and `SUBP'. 11764 11765`-mcsm | -mno-csm' 11766 Enable (or disable) the use of the `CSM' instruction. 11767 11768`-meis | -mno-eis' 11769 Enable (or disable) the use of the extended instruction set, which 11770 consists of these instructions: `ASHC', `ASH', `DIV', `MARK', 11771 `MUL', `RTT', `SOB' `SXT', and `XOR'. 11772 11773`-mfis | -mkev11' 11774`-mno-fis | -mno-kev11' 11775 Enable (or disable) the use of the KEV11 floating-point 11776 instructions: `FADD', `FDIV', `FMUL', and `FSUB'. 11777 11778`-mfpp | -mfpu | -mfp-11' 11779`-mno-fpp | -mno-fpu | -mno-fp-11' 11780 Enable (or disable) the use of FP-11 floating-point instructions: 11781 `ABSF', `ADDF', `CFCC', `CLRF', `CMPF', `DIVF', `LDCFF', `LDCIF', 11782 `LDEXP', `LDF', `LDFPS', `MODF', `MULF', `NEGF', `SETD', `SETF', 11783 `SETI', `SETL', `STCFF', `STCFI', `STEXP', `STF', `STFPS', `STST', 11784 `SUBF', and `TSTF'. 11785 11786`-mlimited-eis | -mno-limited-eis' 11787 Enable (or disable) the use of the limited extended instruction 11788 set: `MARK', `RTT', `SOB', `SXT', and `XOR'. 11789 11790 The -mno-limited-eis options also implies -mno-eis. 11791 11792`-mmfpt | -mno-mfpt' 11793 Enable (or disable) the use of the `MFPT' instruction. 11794 11795`-mmultiproc | -mno-multiproc' 11796 Enable (or disable) the use of multiprocessor instructions: 11797 `TSTSET' and `WRTLCK'. 11798 11799`-mmxps | -mno-mxps' 11800 Enable (or disable) the use of the `MFPS' and `MTPS' instructions. 11801 11802`-mspl | -mno-spl' 11803 Enable (or disable) the use of the `SPL' instruction. 11804 11805 Enable (or disable) the use of the microcode instructions: `LDUB', 11806 `MED', and `XFC'. 11807 118088.23.1.3 CPU Model Options 11809.......................... 11810 11811These options enable the instruction set extensions supported by a 11812particular CPU, and disables all other extensions. 11813 11814`-mka11' 11815 KA11 CPU. Base line instruction set only. 11816 11817`-mkb11' 11818 KB11 CPU. Enable extended instruction set and `SPL'. 11819 11820`-mkd11a' 11821 KD11-A CPU. Enable limited extended instruction set. 11822 11823`-mkd11b' 11824 KD11-B CPU. Base line instruction set only. 11825 11826`-mkd11d' 11827 KD11-D CPU. Base line instruction set only. 11828 11829`-mkd11e' 11830 KD11-E CPU. Enable extended instruction set, `MFPS', and `MTPS'. 11831 11832`-mkd11f | -mkd11h | -mkd11q' 11833 KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended 11834 instruction set, `MFPS', and `MTPS'. 11835 11836`-mkd11k' 11837 KD11-K CPU. Enable extended instruction set, `LDUB', `MED', 11838 `MFPS', `MFPT', `MTPS', and `XFC'. 11839 11840`-mkd11z' 11841 KD11-Z CPU. Enable extended instruction set, `CSM', `MFPS', 11842 `MFPT', `MTPS', and `SPL'. 11843 11844`-mf11' 11845 F11 CPU. Enable extended instruction set, `MFPS', `MFPT', and 11846 `MTPS'. 11847 11848`-mj11' 11849 J11 CPU. Enable extended instruction set, `CSM', `MFPS', `MFPT', 11850 `MTPS', `SPL', `TSTSET', and `WRTLCK'. 11851 11852`-mt11' 11853 T11 CPU. Enable limited extended instruction set, `MFPS', and 11854 `MTPS'. 11855 118568.23.1.4 Machine Model Options 11857.............................. 11858 11859These options enable the instruction set extensions supported by a 11860particular machine model, and disables all other extensions. 11861 11862`-m11/03' 11863 Same as `-mkd11f'. 11864 11865`-m11/04' 11866 Same as `-mkd11d'. 11867 11868`-m11/05 | -m11/10' 11869 Same as `-mkd11b'. 11870 11871`-m11/15 | -m11/20' 11872 Same as `-mka11'. 11873 11874`-m11/21' 11875 Same as `-mt11'. 11876 11877`-m11/23 | -m11/24' 11878 Same as `-mf11'. 11879 11880`-m11/34' 11881 Same as `-mkd11e'. 11882 11883`-m11/34a' 11884 Ame as `-mkd11e' `-mfpp'. 11885 11886`-m11/35 | -m11/40' 11887 Same as `-mkd11a'. 11888 11889`-m11/44' 11890 Same as `-mkd11z'. 11891 11892`-m11/45 | -m11/50 | -m11/55 | -m11/70' 11893 Same as `-mkb11'. 11894 11895`-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94' 11896 Same as `-mj11'. 11897 11898`-m11/60' 11899 Same as `-mkd11k'. 11900 11901 11902File: as.info, Node: PDP-11-Pseudos, Next: PDP-11-Syntax, Prev: PDP-11-Options, Up: PDP-11-Dependent 11903 119048.23.2 Assembler Directives 11905--------------------------- 11906 11907The PDP-11 version of `as' has a few machine dependent assembler 11908directives. 11909 11910`.bss' 11911 Switch to the `bss' section. 11912 11913`.even' 11914 Align the location counter to an even number. 11915 11916 11917File: as.info, Node: PDP-11-Syntax, Next: PDP-11-Mnemonics, Prev: PDP-11-Pseudos, Up: PDP-11-Dependent 11918 119198.23.3 PDP-11 Assembly Language Syntax 11920-------------------------------------- 11921 11922`as' supports both DEC syntax and BSD syntax. The only difference is 11923that in DEC syntax, a `#' character is used to denote an immediate 11924constants, while in BSD syntax the character for this purpose is `$'. 11925 11926 eneral-purpose registers are named `r0' through `r7'. Mnemonic 11927alternatives for `r6' and `r7' are `sp' and `pc', respectively. 11928 11929 Floating-point registers are named `ac0' through `ac3', or 11930alternatively `fr0' through `fr3'. 11931 11932 Comments are started with a `#' or a `/' character, and extend to 11933the end of the line. (FIXME: clash with immediates?) 11934 11935 11936File: as.info, Node: PDP-11-Mnemonics, Next: PDP-11-Synthetic, Prev: PDP-11-Syntax, Up: PDP-11-Dependent 11937 119388.23.4 Instruction Naming 11939------------------------- 11940 11941Some instructions have alternative names. 11942 11943`BCC' 11944 `BHIS' 11945 11946`BCS' 11947 `BLO' 11948 11949`L2DR' 11950 `L2D' 11951 11952`L3DR' 11953 `L3D' 11954 11955`SYS' 11956 `TRAP' 11957 11958 11959File: as.info, Node: PDP-11-Synthetic, Prev: PDP-11-Mnemonics, Up: PDP-11-Dependent 11960 119618.23.5 Synthetic Instructions 11962----------------------------- 11963 11964The `JBR' and `J'CC synthetic instructions are not supported yet. 11965 11966 11967File: as.info, Node: PJ-Dependent, Next: PPC-Dependent, Prev: PDP-11-Dependent, Up: Machine Dependencies 11968 119698.24 picoJava Dependent Features 11970================================ 11971 11972* Menu: 11973 11974* PJ Options:: Options 11975 11976 11977File: as.info, Node: PJ Options, Up: PJ-Dependent 11978 119798.24.1 Options 11980-------------- 11981 11982`as' has two additional command-line options for the picoJava 11983architecture. 11984`-ml' 11985 This option selects little endian data output. 11986 11987`-mb' 11988 This option selects big endian data output. 11989 11990 11991File: as.info, Node: PPC-Dependent, Next: Sparc-Dependent, Prev: PJ-Dependent, Up: Machine Dependencies 11992 119938.25 PowerPC Dependent Features 11994=============================== 11995 11996* Menu: 11997 11998* PowerPC-Opts:: Options 11999* PowerPC-Pseudo:: PowerPC Assembler Directives 12000 12001 12002File: as.info, Node: PowerPC-Opts, Next: PowerPC-Pseudo, Up: PPC-Dependent 12003 120048.25.1 Options 12005-------------- 12006 12007The PowerPC chip family includes several successive levels, using the 12008same core instruction set, but including a few additional instructions 12009at each level. There are exceptions to this however. For details on 12010what instructions each variant supports, please see the chip's 12011architecture reference manual. 12012 12013 The following table lists all available PowerPC options. 12014 12015`-mpwrx | -mpwr2' 12016 Generate code for POWER/2 (RIOS2). 12017 12018`-mpwr' 12019 Generate code for POWER (RIOS1) 12020 12021`-m601' 12022 Generate code for PowerPC 601. 12023 12024`-mppc, -mppc32, -m603, -m604' 12025 Generate code for PowerPC 603/604. 12026 12027`-m403, -m405' 12028 Generate code for PowerPC 403/405. 12029 12030`-m440' 12031 Generate code for PowerPC 440. BookE and some 405 instructions. 12032 12033`-m7400, -m7410, -m7450, -m7455' 12034 Generate code for PowerPC 7400/7410/7450/7455. 12035 12036`-mppc64, -m620' 12037 Generate code for PowerPC 620/625/630. 12038 12039`-mppc64bridge' 12040 Generate code for PowerPC 64, including bridge insns. 12041 12042`-mbooke64' 12043 Generate code for 64-bit BookE. 12044 12045`-mbooke, mbooke32' 12046 Generate code for 32-bit BookE. 12047 12048`-me300' 12049 Generate code for PowerPC e300 family. 12050 12051`-maltivec' 12052 Generate code for processors with AltiVec instructions. 12053 12054`-mpower4' 12055 Generate code for Power4 architecture. 12056 12057`-mpower5' 12058 Generate code for Power5 architecture. 12059 12060`-mcom' 12061 Generate code Power/PowerPC common instructions. 12062 12063`-many' 12064 Generate code for any architecture (PWR/PWRX/PPC). 12065 12066`-mregnames' 12067 Allow symbolic names for registers. 12068 12069`-mno-regnames' 12070 Do not allow symbolic names for registers. 12071 12072`-mrelocatable' 12073 Support for GCC's -mrelocatble option. 12074 12075`-mrelocatable-lib' 12076 Support for GCC's -mrelocatble-lib option. 12077 12078`-memb' 12079 Set PPC_EMB bit in ELF flags. 12080 12081`-mlittle, -mlittle-endian' 12082 Generate code for a little endian machine. 12083 12084`-mbig, -mbig-endian' 12085 Generate code for a big endian machine. 12086 12087`-msolaris' 12088 Generate code for Solaris. 12089 12090`-mno-solaris' 12091 Do not generate code for Solaris. 12092 12093 12094File: as.info, Node: PowerPC-Pseudo, Prev: PowerPC-Opts, Up: PPC-Dependent 12095 120968.25.2 PowerPC Assembler Directives 12097----------------------------------- 12098 12099A number of assembler directives are available for PowerPC. The 12100following table is far from complete. 12101 12102`.machine "string"' 12103 This directive allows you to change the machine for which code is 12104 generated. `"string"' may be any of the -m cpu selection options 12105 (without the -m) enclosed in double quotes, `"push"', or `"pop"'. 12106 `.machine "push"' saves the currently selected cpu, which may be 12107 restored with `.machine "pop"'. 12108 12109 12110File: as.info, Node: SH-Dependent, Next: SH64-Dependent, Prev: MSP430-Dependent, Up: Machine Dependencies 12111 121128.26 Renesas / SuperH SH Dependent Features 12113=========================================== 12114 12115* Menu: 12116 12117* SH Options:: Options 12118* SH Syntax:: Syntax 12119* SH Floating Point:: Floating Point 12120* SH Directives:: SH Machine Directives 12121* SH Opcodes:: Opcodes 12122 12123 12124File: as.info, Node: SH Options, Next: SH Syntax, Up: SH-Dependent 12125 121268.26.1 Options 12127-------------- 12128 12129`as' has following command-line options for the Renesas (formerly 12130Hitachi) / SuperH SH family. 12131 12132`--little' 12133 Generate little endian code. 12134 12135`--big' 12136 Generate big endian code. 12137 12138`--relax' 12139 Alter jump instructions for long displacements. 12140 12141`--small' 12142 Align sections to 4 byte boundaries, not 16. 12143 12144`--dsp' 12145 Enable sh-dsp insns, and disable sh3e / sh4 insns. 12146 12147`--renesas' 12148 Disable optimization with section symbol for compatibility with 12149 Renesas assembler. 12150 12151`--allow-reg-prefix' 12152 Allow '$' as a register name prefix. 12153 12154`--isa=sh4 | sh4a' 12155 Specify the sh4 or sh4a instruction set. 12156 12157`--isa=dsp' 12158 Enable sh-dsp insns, and disable sh3e / sh4 insns. 12159 12160`--isa=fp' 12161 Enable sh2e, sh3e, sh4, and sh4a insn sets. 12162 12163`--isa=all' 12164 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets. 12165 12166 12167 12168File: as.info, Node: SH Syntax, Next: SH Floating Point, Prev: SH Options, Up: SH-Dependent 12169 121708.26.2 Syntax 12171------------- 12172 12173* Menu: 12174 12175* SH-Chars:: Special Characters 12176* SH-Regs:: Register Names 12177* SH-Addressing:: Addressing Modes 12178 12179 12180File: as.info, Node: SH-Chars, Next: SH-Regs, Up: SH Syntax 12181 121828.26.2.1 Special Characters 12183........................... 12184 12185`!' is the line comment character. 12186 12187 You can use `;' instead of a newline to separate statements. 12188 12189 Since `$' has no special meaning, you may use it in symbol names. 12190 12191 12192File: as.info, Node: SH-Regs, Next: SH-Addressing, Prev: SH-Chars, Up: SH Syntax 12193 121948.26.2.2 Register Names 12195....................... 12196 12197You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5', 12198`r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to 12199refer to the SH registers. 12200 12201 The SH also has these control registers: 12202 12203`pr' 12204 procedure register (holds return address) 12205 12206`pc' 12207 program counter 12208 12209`mach' 12210`macl' 12211 high and low multiply accumulator registers 12212 12213`sr' 12214 status register 12215 12216`gbr' 12217 global base register 12218 12219`vbr' 12220 vector base register (for interrupt vectors) 12221 12222 12223File: as.info, Node: SH-Addressing, Prev: SH-Regs, Up: SH Syntax 12224 122258.26.2.3 Addressing Modes 12226......................... 12227 12228`as' understands the following addressing modes for the SH. `RN' in 12229the following refers to any of the numbered registers, but _not_ the 12230control registers. 12231 12232`RN' 12233 Register direct 12234 12235`@RN' 12236 Register indirect 12237 12238`@-RN' 12239 Register indirect with pre-decrement 12240 12241`@RN+' 12242 Register indirect with post-increment 12243 12244`@(DISP, RN)' 12245 Register indirect with displacement 12246 12247`@(R0, RN)' 12248 Register indexed 12249 12250`@(DISP, GBR)' 12251 `GBR' offset 12252 12253`@(R0, GBR)' 12254 GBR indexed 12255 12256`ADDR' 12257`@(DISP, PC)' 12258 PC relative address (for branch or for addressing memory). The 12259 `as' implementation allows you to use the simpler form ADDR 12260 anywhere a PC relative address is called for; the alternate form 12261 is supported for compatibility with other assemblers. 12262 12263`#IMM' 12264 Immediate data 12265 12266 12267File: as.info, Node: SH Floating Point, Next: SH Directives, Prev: SH Syntax, Up: SH-Dependent 12268 122698.26.3 Floating Point 12270--------------------- 12271 12272SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other 12273SH groups can use `.float' directive to generate IEEE floating-point 12274numbers. 12275 12276 SH2E and SH3E support single-precision floating point calculations as 12277well as entirely PCAPI compatible emulation of double-precision 12278floating point calculations. SH2E and SH3E instructions are a subset of 12279the floating point calculations conforming to the IEEE754 standard. 12280 12281 In addition to single-precision and double-precision floating-point 12282operation capability, the on-chip FPU of SH4 has a 128-bit graphic 12283engine that enables 32-bit floating-point data to be processed 128 bits 12284at a time. It also supports 4 * 4 array operations and inner product 12285operations. Also, a superscalar architecture is employed that enables 12286simultaneous execution of two instructions (including FPU 12287instructions), providing performance of up to twice that of 12288conventional architectures at the same frequency. 12289 12290 12291File: as.info, Node: SH Directives, Next: SH Opcodes, Prev: SH Floating Point, Up: SH-Dependent 12292 122938.26.4 SH Machine Directives 12294---------------------------- 12295 12296`uaword' 12297`ualong' 12298 `as' will issue a warning when a misaligned `.word' or `.long' 12299 directive is used. You may use `.uaword' or `.ualong' to indicate 12300 that the value is intentionally misaligned. 12301 12302 12303File: as.info, Node: SH Opcodes, Prev: SH Directives, Up: SH-Dependent 12304 123058.26.5 Opcodes 12306-------------- 12307 12308For detailed information on the SH machine instruction set, see 12309`SH-Microcomputer User's Manual' (Renesas) or `SH-4 32-bit CPU Core 12310Architecture' (SuperH) and `SuperH (SH) 64-Bit RISC Series' (SuperH). 12311 12312 `as' implements all the standard SH opcodes. No additional 12313pseudo-instructions are needed on this family. Note, however, that 12314because `as' supports a simpler form of PC-relative addressing, you may 12315simply write (for example) 12316 12317 mov.l bar,r0 12318 12319where other assemblers might require an explicit displacement to `bar' 12320from the program counter: 12321 12322 mov.l @(DISP, PC) 12323 12324 Here is a summary of SH opcodes: 12325 12326 Legend: 12327 Rn a numbered register 12328 Rm another numbered register 12329 #imm immediate data 12330 disp displacement 12331 disp8 8-bit displacement 12332 disp12 12-bit displacement 12333 12334 add #imm,Rn lds.l @Rn+,PR 12335 add Rm,Rn mac.w @Rm+,@Rn+ 12336 addc Rm,Rn mov #imm,Rn 12337 addv Rm,Rn mov Rm,Rn 12338 and #imm,R0 mov.b Rm,@(R0,Rn) 12339 and Rm,Rn mov.b Rm,@-Rn 12340 and.b #imm,@(R0,GBR) mov.b Rm,@Rn 12341 bf disp8 mov.b @(disp,Rm),R0 12342 bra disp12 mov.b @(disp,GBR),R0 12343 bsr disp12 mov.b @(R0,Rm),Rn 12344 bt disp8 mov.b @Rm+,Rn 12345 clrmac mov.b @Rm,Rn 12346 clrt mov.b R0,@(disp,Rm) 12347 cmp/eq #imm,R0 mov.b R0,@(disp,GBR) 12348 cmp/eq Rm,Rn mov.l Rm,@(disp,Rn) 12349 cmp/ge Rm,Rn mov.l Rm,@(R0,Rn) 12350 cmp/gt Rm,Rn mov.l Rm,@-Rn 12351 cmp/hi Rm,Rn mov.l Rm,@Rn 12352 cmp/hs Rm,Rn mov.l @(disp,Rn),Rm 12353 cmp/pl Rn mov.l @(disp,GBR),R0 12354 cmp/pz Rn mov.l @(disp,PC),Rn 12355 cmp/str Rm,Rn mov.l @(R0,Rm),Rn 12356 div0s Rm,Rn mov.l @Rm+,Rn 12357 div0u mov.l @Rm,Rn 12358 div1 Rm,Rn mov.l R0,@(disp,GBR) 12359 exts.b Rm,Rn mov.w Rm,@(R0,Rn) 12360 exts.w Rm,Rn mov.w Rm,@-Rn 12361 extu.b Rm,Rn mov.w Rm,@Rn 12362 extu.w Rm,Rn mov.w @(disp,Rm),R0 12363 jmp @Rn mov.w @(disp,GBR),R0 12364 jsr @Rn mov.w @(disp,PC),Rn 12365 ldc Rn,GBR mov.w @(R0,Rm),Rn 12366 ldc Rn,SR mov.w @Rm+,Rn 12367 ldc Rn,VBR mov.w @Rm,Rn 12368 ldc.l @Rn+,GBR mov.w R0,@(disp,Rm) 12369 ldc.l @Rn+,SR mov.w R0,@(disp,GBR) 12370 ldc.l @Rn+,VBR mova @(disp,PC),R0 12371 lds Rn,MACH movt Rn 12372 lds Rn,MACL muls Rm,Rn 12373 lds Rn,PR mulu Rm,Rn 12374 lds.l @Rn+,MACH neg Rm,Rn 12375 lds.l @Rn+,MACL negc Rm,Rn 12376 12377 nop stc VBR,Rn 12378 not Rm,Rn stc.l GBR,@-Rn 12379 or #imm,R0 stc.l SR,@-Rn 12380 or Rm,Rn stc.l VBR,@-Rn 12381 or.b #imm,@(R0,GBR) sts MACH,Rn 12382 rotcl Rn sts MACL,Rn 12383 rotcr Rn sts PR,Rn 12384 rotl Rn sts.l MACH,@-Rn 12385 rotr Rn sts.l MACL,@-Rn 12386 rte sts.l PR,@-Rn 12387 rts sub Rm,Rn 12388 sett subc Rm,Rn 12389 shal Rn subv Rm,Rn 12390 shar Rn swap.b Rm,Rn 12391 shll Rn swap.w Rm,Rn 12392 shll16 Rn tas.b @Rn 12393 shll2 Rn trapa #imm 12394 shll8 Rn tst #imm,R0 12395 shlr Rn tst Rm,Rn 12396 shlr16 Rn tst.b #imm,@(R0,GBR) 12397 shlr2 Rn xor #imm,R0 12398 shlr8 Rn xor Rm,Rn 12399 sleep xor.b #imm,@(R0,GBR) 12400 stc GBR,Rn xtrct Rm,Rn 12401 stc SR,Rn 12402 12403 12404File: as.info, Node: SH64-Dependent, Next: PDP-11-Dependent, Prev: SH-Dependent, Up: Machine Dependencies 12405 124068.27 SuperH SH64 Dependent Features 12407=================================== 12408 12409* Menu: 12410 12411* SH64 Options:: Options 12412* SH64 Syntax:: Syntax 12413* SH64 Directives:: SH64 Machine Directives 12414* SH64 Opcodes:: Opcodes 12415 12416 12417File: as.info, Node: SH64 Options, Next: SH64 Syntax, Up: SH64-Dependent 12418 124198.27.1 Options 12420-------------- 12421 12422`-isa=sh4 | sh4a' 12423 Specify the sh4 or sh4a instruction set. 12424 12425`-isa=dsp' 12426 Enable sh-dsp insns, and disable sh3e / sh4 insns. 12427 12428`-isa=fp' 12429 Enable sh2e, sh3e, sh4, and sh4a insn sets. 12430 12431`-isa=all' 12432 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets. 12433 12434`-isa=shmedia | -isa=shcompact' 12435 Specify the default instruction set. `SHmedia' specifies the 12436 32-bit opcodes, and `SHcompact' specifies the 16-bit opcodes 12437 compatible with previous SH families. The default depends on the 12438 ABI selected; the default for the 64-bit ABI is SHmedia, and the 12439 default for the 32-bit ABI is SHcompact. If neither the ABI nor 12440 the ISA is specified, the default is 32-bit SHcompact. 12441 12442 Note that the `.mode' pseudo-op is not permitted if the ISA is not 12443 specified on the command line. 12444 12445`-abi=32 | -abi=64' 12446 Specify the default ABI. If the ISA is specified and the ABI is 12447 not, the default ABI depends on the ISA, with SHmedia defaulting 12448 to 64-bit and SHcompact defaulting to 32-bit. 12449 12450 Note that the `.abi' pseudo-op is not permitted if the ABI is not 12451 specified on the command line. When the ABI is specified on the 12452 command line, any `.abi' pseudo-ops in the source must match it. 12453 12454`-shcompact-const-crange' 12455 Emit code-range descriptors for constants in SHcompact code 12456 sections. 12457 12458`-no-mix' 12459 Disallow SHmedia code in the same section as constants and 12460 SHcompact code. 12461 12462`-no-expand' 12463 Do not expand MOVI, PT, PTA or PTB instructions. 12464 12465`-expand-pt32' 12466 With -abi=64, expand PT, PTA and PTB instructions to 32 bits only. 12467 12468 12469 12470File: as.info, Node: SH64 Syntax, Next: SH64 Directives, Prev: SH64 Options, Up: SH64-Dependent 12471 124728.27.2 Syntax 12473------------- 12474 12475* Menu: 12476 12477* SH64-Chars:: Special Characters 12478* SH64-Regs:: Register Names 12479* SH64-Addressing:: Addressing Modes 12480 12481 12482File: as.info, Node: SH64-Chars, Next: SH64-Regs, Up: SH64 Syntax 12483 124848.27.2.1 Special Characters 12485........................... 12486 12487`!' is the line comment character. 12488 12489 You can use `;' instead of a newline to separate statements. 12490 12491 Since `$' has no special meaning, you may use it in symbol names. 12492 12493 12494File: as.info, Node: SH64-Regs, Next: SH64-Addressing, Prev: SH64-Chars, Up: SH64 Syntax 12495 124968.27.2.2 Register Names 12497....................... 12498 12499You can use the predefined symbols `r0' through `r63' to refer to the 12500SH64 general registers, `cr0' through `cr63' for control registers, 12501`tr0' through `tr7' for target address registers, `fr0' through `fr63' 12502for single-precision floating point registers, `dr0' through `dr62' 12503(even numbered registers only) for double-precision floating point 12504registers, `fv0' through `fv60' (multiples of four only) for 12505single-precision floating point vectors, `fp0' through `fp62' (even 12506numbered registers only) for single-precision floating point pairs, 12507`mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of 12508single-precision floating point registers, `pc' for the program 12509counter, and `fpscr' for the floating point status and control register. 12510 12511 You can also refer to the control registers by the mnemonics `sr', 12512`ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc', 12513`resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'. 12514 12515 12516File: as.info, Node: SH64-Addressing, Prev: SH64-Regs, Up: SH64 Syntax 12517 125188.27.2.3 Addressing Modes 12519......................... 12520 12521SH64 operands consist of either a register or immediate value. The 12522immediate value can be a constant or label reference (or portion of a 12523label reference), as in this example: 12524 12525 movi 4,r2 12526 pt function, tr4 12527 movi (function >> 16) & 65535,r0 12528 shori function & 65535, r0 12529 ld.l r0,4,r0 12530 12531 Instruction label references can reference labels in either SHmedia 12532or SHcompact. To differentiate between the two, labels in SHmedia 12533sections will always have the least significant bit set (i.e. they will 12534be odd), which SHcompact labels will have the least significant bit 12535reset (i.e. they will be even). If you need to reference the actual 12536address of a label, you can use the `datalabel' modifier, as in this 12537example: 12538 12539 .long function 12540 .long datalabel function 12541 12542 In that example, the first longword may or may not have the least 12543significant bit set depending on whether the label is an SHmedia label 12544or an SHcompact label. The second longword will be the actual address 12545of the label, regardless of what type of label it is. 12546 12547 12548File: as.info, Node: SH64 Directives, Next: SH64 Opcodes, Prev: SH64 Syntax, Up: SH64-Dependent 12549 125508.27.3 SH64 Machine Directives 12551------------------------------ 12552 12553In addition to the SH directives, the SH64 provides the following 12554directives: 12555 12556`.mode [shmedia|shcompact]' 12557`.isa [shmedia|shcompact]' 12558 Specify the ISA for the following instructions (the two directives 12559 are equivalent). Note that programs such as `objdump' rely on 12560 symbolic labels to determine when such mode switches occur (by 12561 checking the least significant bit of the label's address), so 12562 such mode/isa changes should always be followed by a label (in 12563 practice, this is true anyway). Note that you cannot use these 12564 directives if you didn't specify an ISA on the command line. 12565 12566`.abi [32|64]' 12567 Specify the ABI for the following instructions. Note that you 12568 cannot use this directive unless you specified an ABI on the 12569 command line, and the ABIs specified must match. 12570 12571`.uaquad' 12572 Like .uaword and .ualong, this allows you to specify an 12573 intentionally unaligned quadword (64 bit word). 12574 12575 12576 12577File: as.info, Node: SH64 Opcodes, Prev: SH64 Directives, Up: SH64-Dependent 12578 125798.27.4 Opcodes 12580-------------- 12581 12582For detailed information on the SH64 machine instruction set, see 12583`SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.). 12584 12585 `as' implements all the standard SH64 opcodes. In addition, the 12586following pseudo-opcodes may be expanded into one or more alternate 12587opcodes: 12588 12589`movi' 12590 If the value doesn't fit into a standard `movi' opcode, `as' will 12591 replace the `movi' with a sequence of `movi' and `shori' opcodes. 12592 12593`pt' 12594 This expands to a sequence of `movi' and `shori' opcode, followed 12595 by a `ptrel' opcode, or to a `pta' or `ptb' opcode, depending on 12596 the label referenced. 12597 12598 12599 12600File: as.info, Node: Sparc-Dependent, Next: TIC54X-Dependent, Prev: PPC-Dependent, Up: Machine Dependencies 12601 126028.28 SPARC Dependent Features 12603============================= 12604 12605* Menu: 12606 12607* Sparc-Opts:: Options 12608* Sparc-Aligned-Data:: Option to enforce aligned data 12609* Sparc-Float:: Floating Point 12610* Sparc-Directives:: Sparc Machine Directives 12611 12612 12613File: as.info, Node: Sparc-Opts, Next: Sparc-Aligned-Data, Up: Sparc-Dependent 12614 126158.28.1 Options 12616-------------- 12617 12618The SPARC chip family includes several successive levels, using the same 12619core instruction set, but including a few additional instructions at 12620each level. There are exceptions to this however. For details on what 12621instructions each variant supports, please see the chip's architecture 12622reference manual. 12623 12624 By default, `as' assumes the core instruction set (SPARC v6), but 12625"bumps" the architecture level as needed: it switches to successively 12626higher architectures as it encounters instructions that only exist in 12627the higher levels. 12628 12629 If not configured for SPARC v9 (`sparc64-*-*') GAS will not bump 12630passed sparclite by default, an option must be passed to enable the v9 12631instructions. 12632 12633 GAS treats sparclite as being compatible with v8, unless an 12634architecture is explicitly requested. SPARC v9 is always incompatible 12635with sparclite. 12636 12637`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite' 12638`-Av8plus | -Av8plusa | -Av9 | -Av9a' 12639 Use one of the `-A' options to select one of the SPARC 12640 architectures explicitly. If you select an architecture 12641 explicitly, `as' reports a fatal error if it encounters an 12642 instruction or feature requiring an incompatible or higher level. 12643 12644 `-Av8plus' and `-Av8plusa' select a 32 bit environment. 12645 12646 `-Av9' and `-Av9a' select a 64 bit environment and are not 12647 available unless GAS is explicitly configured with 64 bit 12648 environment support. 12649 12650 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with 12651 UltraSPARC extensions. 12652 12653`-xarch=v8plus | -xarch=v8plusa' 12654 For compatibility with the Solaris v9 assembler. These options are 12655 equivalent to -Av8plus and -Av8plusa, respectively. 12656 12657`-bump' 12658 Warn whenever it is necessary to switch to another level. If an 12659 architecture level is explicitly requested, GAS will not issue 12660 warnings until that level is reached, and will then bump the level 12661 as required (except between incompatible levels). 12662 12663`-32 | -64' 12664 Select the word size, either 32 bits or 64 bits. These options 12665 are only available with the ELF object file format, and require 12666 that the necessary BFD support has been included. 12667 12668 12669File: as.info, Node: Sparc-Aligned-Data, Next: Sparc-Float, Prev: Sparc-Opts, Up: Sparc-Dependent 12670 126718.28.2 Enforcing aligned data 12672----------------------------- 12673 12674SPARC GAS normally permits data to be misaligned. For example, it 12675permits the `.long' pseudo-op to be used on a byte boundary. However, 12676the native SunOS and Solaris assemblers issue an error when they see 12677misaligned data. 12678 12679 You can use the `--enforce-aligned-data' option to make SPARC GAS 12680also issue an error about misaligned data, just as the SunOS and Solaris 12681assemblers do. 12682 12683 The `--enforce-aligned-data' option is not the default because gcc 12684issues misaligned data pseudo-ops when it initializes certain packed 12685data structures (structures defined using the `packed' attribute). You 12686may have to assemble with GAS in order to initialize packed data 12687structures in your own code. 12688 12689 12690File: as.info, Node: Sparc-Float, Next: Sparc-Directives, Prev: Sparc-Aligned-Data, Up: Sparc-Dependent 12691 126928.28.3 Floating Point 12693--------------------- 12694 12695The Sparc uses IEEE floating-point numbers. 12696 12697 12698File: as.info, Node: Sparc-Directives, Prev: Sparc-Float, Up: Sparc-Dependent 12699 127008.28.4 Sparc Machine Directives 12701------------------------------- 12702 12703The Sparc version of `as' supports the following additional machine 12704directives: 12705 12706`.align' 12707 This must be followed by the desired alignment in bytes. 12708 12709`.common' 12710 This must be followed by a symbol name, a positive number, and 12711 `"bss"'. This behaves somewhat like `.comm', but the syntax is 12712 different. 12713 12714`.half' 12715 This is functionally identical to `.short'. 12716 12717`.nword' 12718 On the Sparc, the `.nword' directive produces native word sized 12719 value, ie. if assembling with -32 it is equivalent to `.word', if 12720 assembling with -64 it is equivalent to `.xword'. 12721 12722`.proc' 12723 This directive is ignored. Any text following it on the same line 12724 is also ignored. 12725 12726`.register' 12727 This directive declares use of a global application or system 12728 register. It must be followed by a register name %g2, %g3, %g6 or 12729 %g7, comma and the symbol name for that register. If symbol name 12730 is `#scratch', it is a scratch register, if it is `#ignore', it 12731 just suppresses any errors about using undeclared global register, 12732 but does not emit any information about it into the object file. 12733 This can be useful e.g. if you save the register before use and 12734 restore it after. 12735 12736`.reserve' 12737 This must be followed by a symbol name, a positive number, and 12738 `"bss"'. This behaves somewhat like `.lcomm', but the syntax is 12739 different. 12740 12741`.seg' 12742 This must be followed by `"text"', `"data"', or `"data1"'. It 12743 behaves like `.text', `.data', or `.data 1'. 12744 12745`.skip' 12746 This is functionally identical to the `.space' directive. 12747 12748`.word' 12749 On the Sparc, the `.word' directive produces 32 bit values, 12750 instead of the 16 bit values it produces on many other machines. 12751 12752`.xword' 12753 On the Sparc V9 processor, the `.xword' directive produces 64 bit 12754 values. 12755 12756 12757File: as.info, Node: TIC54X-Dependent, Next: V850-Dependent, Prev: Sparc-Dependent, Up: Machine Dependencies 12758 127598.29 TIC54X Dependent Features 12760============================== 12761 12762* Menu: 12763 12764* TIC54X-Opts:: Command-line Options 12765* TIC54X-Block:: Blocking 12766* TIC54X-Env:: Environment Settings 12767* TIC54X-Constants:: Constants Syntax 12768* TIC54X-Subsyms:: String Substitution 12769* TIC54X-Locals:: Local Label Syntax 12770* TIC54X-Builtins:: Builtin Assembler Math Functions 12771* TIC54X-Ext:: Extended Addressing Support 12772* TIC54X-Directives:: Directives 12773* TIC54X-Macros:: Macro Features 12774* TIC54X-MMRegs:: Memory-mapped Registers 12775 12776 12777File: as.info, Node: TIC54X-Opts, Next: TIC54X-Block, Up: TIC54X-Dependent 12778 127798.29.1 Options 12780-------------- 12781 12782The TMS320C54x version of `as' has a few machine-dependent options. 12783 12784 You can use the `-mfar-mode' option to enable extended addressing 12785mode. All addresses will be assumed to be > 16 bits, and the 12786appropriate relocation types will be used. This option is equivalent 12787to using the `.far_mode' directive in the assembly code. If you do not 12788use the `-mfar-mode' option, all references will be assumed to be 16 12789bits. This option may be abbreviated to `-mf'. 12790 12791 You can use the `-mcpu' option to specify a particular CPU. This 12792option is equivalent to using the `.version' directive in the assembly 12793code. For recognized CPU codes, see *Note `.version': 12794TIC54X-Directives. The default CPU version is `542'. 12795 12796 You can use the `-merrors-to-file' option to redirect error output 12797to a file (this provided for those deficient environments which don't 12798provide adequate output redirection). This option may be abbreviated to 12799`-me'. 12800 12801 12802File: as.info, Node: TIC54X-Block, Next: TIC54X-Env, Prev: TIC54X-Opts, Up: TIC54X-Dependent 12803 128048.29.2 Blocking 12805--------------- 12806 12807A blocked section or memory block is guaranteed not to cross the 12808blocking boundary (usually a page, or 128 words) if it is smaller than 12809the blocking size, or to start on a page boundary if it is larger than 12810the blocking size. 12811 12812 12813File: as.info, Node: TIC54X-Env, Next: TIC54X-Constants, Prev: TIC54X-Block, Up: TIC54X-Dependent 12814 128158.29.3 Environment Settings 12816--------------------------- 12817 12818`C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added 12819to the list of directories normally searched for source and include 12820files. `C54XDSP_DIR' will override `A_DIR'. 12821 12822 12823File: as.info, Node: TIC54X-Constants, Next: TIC54X-Subsyms, Prev: TIC54X-Env, Up: TIC54X-Dependent 12824 128258.29.4 Constants Syntax 12826----------------------- 12827 12828The TIC54X version of `as' allows the following additional constant 12829formats, using a suffix to indicate the radix: 12830 12831 Binary `000000B, 011000b' 12832 Octal `10Q, 224q' 12833 Hexadecimal `45h, 0FH' 12834 12835 12836File: as.info, Node: TIC54X-Subsyms, Next: TIC54X-Locals, Prev: TIC54X-Constants, Up: TIC54X-Dependent 12837 128388.29.5 String Substitution 12839-------------------------- 12840 12841A subset of allowable symbols (which we'll call subsyms) may be assigned 12842arbitrary string values. This is roughly equivalent to C preprocessor 12843#define macros. When `as' encounters one of these symbols, the symbol 12844is replaced in the input stream by its string value. Subsym names 12845*must* begin with a letter. 12846 12847 Subsyms may be defined using the `.asg' and `.eval' directives 12848(*Note `.asg': TIC54X-Directives, *Note `.eval': TIC54X-Directives. 12849 12850 Expansion is recursive until a previously encountered symbol is 12851seen, at which point substitution stops. 12852 12853 In this example, x is replaced with SYM2; SYM2 is replaced with 12854SYM1, and SYM1 is replaced with x. At this point, x has already been 12855encountered and the substitution stops. 12856 12857 .asg "x",SYM1 12858 .asg "SYM1",SYM2 12859 .asg "SYM2",x 12860 add x,a ; final code assembled is "add x, a" 12861 12862 Macro parameters are converted to subsyms; a side effect of this is 12863the normal `as' '\ARG' dereferencing syntax is unnecessary. Subsyms 12864defined within a macro will have global scope, unless the `.var' 12865directive is used to identify the subsym as a local macro variable 12866*note `.var': TIC54X-Directives. 12867 12868 Substitution may be forced in situations where replacement might be 12869ambiguous by placing colons on either side of the subsym. The following 12870code: 12871 12872 .eval "10",x 12873 LAB:X: add #x, a 12874 12875 When assembled becomes: 12876 12877 LAB10 add #10, a 12878 12879 Smaller parts of the string assigned to a subsym may be accessed with 12880the following syntax: 12881 12882``:SYMBOL(CHAR_INDEX):'' 12883 Evaluates to a single-character string, the character at 12884 CHAR_INDEX. 12885 12886``:SYMBOL(START,LENGTH):'' 12887 Evaluates to a substring of SYMBOL beginning at START with length 12888 LENGTH. 12889 12890 12891File: as.info, Node: TIC54X-Locals, Next: TIC54X-Builtins, Prev: TIC54X-Subsyms, Up: TIC54X-Dependent 12892 128938.29.6 Local Labels 12894------------------- 12895 12896Local labels may be defined in two ways: 12897 12898 * $N, where N is a decimal number between 0 and 9 12899 12900 * LABEL?, where LABEL is any legal symbol name. 12901 12902 Local labels thus defined may be redefined or automatically 12903generated. The scope of a local label is based on when it may be 12904undefined or reset. This happens when one of the following situations 12905is encountered: 12906 12907 * .newblock directive *note `.newblock': TIC54X-Directives. 12908 12909 * The current section is changed (.sect, .text, or .data) 12910 12911 * Entering or leaving an included file 12912 12913 * The macro scope where the label was defined is exited 12914 12915 12916File: as.info, Node: TIC54X-Builtins, Next: TIC54X-Ext, Prev: TIC54X-Locals, Up: TIC54X-Dependent 12917 129188.29.7 Math Builtins 12919-------------------- 12920 12921The following built-in functions may be used to generate a 12922floating-point value. All return a floating-point value except `$cvi', 12923`$int', and `$sgn', which return an integer value. 12924 12925``$acos(EXPR)'' 12926 Returns the floating point arccosine of EXPR. 12927 12928``$asin(EXPR)'' 12929 Returns the floating point arcsine of EXPR. 12930 12931``$atan(EXPR)'' 12932 Returns the floating point arctangent of EXPR. 12933 12934``$atan2(EXPR1,EXPR2)'' 12935 Returns the floating point arctangent of EXPR1 / EXPR2. 12936 12937``$ceil(EXPR)'' 12938 Returns the smallest integer not less than EXPR as floating point. 12939 12940``$cosh(EXPR)'' 12941 Returns the floating point hyperbolic cosine of EXPR. 12942 12943``$cos(EXPR)'' 12944 Returns the floating point cosine of EXPR. 12945 12946``$cvf(EXPR)'' 12947 Returns the integer value EXPR converted to floating-point. 12948 12949``$cvi(EXPR)'' 12950 Returns the floating point value EXPR converted to integer. 12951 12952``$exp(EXPR)'' 12953 Returns the floating point value e ^ EXPR. 12954 12955``$fabs(EXPR)'' 12956 Returns the floating point absolute value of EXPR. 12957 12958``$floor(EXPR)'' 12959 Returns the largest integer that is not greater than EXPR as 12960 floating point. 12961 12962``$fmod(EXPR1,EXPR2)'' 12963 Returns the floating point remainder of EXPR1 / EXPR2. 12964 12965``$int(EXPR)'' 12966 Returns 1 if EXPR evaluates to an integer, zero otherwise. 12967 12968``$ldexp(EXPR1,EXPR2)'' 12969 Returns the floating point value EXPR1 * 2 ^ EXPR2. 12970 12971``$log10(EXPR)'' 12972 Returns the base 10 logarithm of EXPR. 12973 12974``$log(EXPR)'' 12975 Returns the natural logarithm of EXPR. 12976 12977``$max(EXPR1,EXPR2)'' 12978 Returns the floating point maximum of EXPR1 and EXPR2. 12979 12980``$min(EXPR1,EXPR2)'' 12981 Returns the floating point minimum of EXPR1 and EXPR2. 12982 12983``$pow(EXPR1,EXPR2)'' 12984 Returns the floating point value EXPR1 ^ EXPR2. 12985 12986``$round(EXPR)'' 12987 Returns the nearest integer to EXPR as a floating point number. 12988 12989``$sgn(EXPR)'' 12990 Returns -1, 0, or 1 based on the sign of EXPR. 12991 12992``$sin(EXPR)'' 12993 Returns the floating point sine of EXPR. 12994 12995``$sinh(EXPR)'' 12996 Returns the floating point hyperbolic sine of EXPR. 12997 12998``$sqrt(EXPR)'' 12999 Returns the floating point square root of EXPR. 13000 13001``$tan(EXPR)'' 13002 Returns the floating point tangent of EXPR. 13003 13004``$tanh(EXPR)'' 13005 Returns the floating point hyperbolic tangent of EXPR. 13006 13007``$trunc(EXPR)'' 13008 Returns the integer value of EXPR truncated towards zero as 13009 floating point. 13010 13011 13012 13013File: as.info, Node: TIC54X-Ext, Next: TIC54X-Directives, Prev: TIC54X-Builtins, Up: TIC54X-Dependent 13014 130158.29.8 Extended Addressing 13016-------------------------- 13017 13018The `LDX' pseudo-op is provided for loading the extended addressing bits 13019of a label or address. For example, if an address `_label' resides in 13020extended program memory, the value of `_label' may be loaded as follows: 13021 ldx #_label,16,a ; loads extended bits of _label 13022 or #_label,a ; loads lower 16 bits of _label 13023 bacc a ; full address is in accumulator A 13024 13025 13026File: as.info, Node: TIC54X-Directives, Next: TIC54X-Macros, Prev: TIC54X-Ext, Up: TIC54X-Dependent 13027 130288.29.9 Directives 13029----------------- 13030 13031`.align [SIZE]' 13032`.even' 13033 Align the section program counter on the next boundary, based on 13034 SIZE. SIZE may be any power of 2. `.even' is equivalent to 13035 `.align' with a SIZE of 2. 13036 `1' 13037 Align SPC to word boundary 13038 13039 `2' 13040 Align SPC to longword boundary (same as .even) 13041 13042 `128' 13043 Align SPC to page boundary 13044 13045`.asg STRING, NAME' 13046 Assign NAME the string STRING. String replacement is performed on 13047 STRING before assignment. 13048 13049`.eval STRING, NAME' 13050 Evaluate the contents of string STRING and assign the result as a 13051 string to the subsym NAME. String replacement is performed on 13052 STRING before assignment. 13053 13054`.bss SYMBOL, SIZE [, [BLOCKING_FLAG] [,ALIGNMENT_FLAG]]' 13055 Reserve space for SYMBOL in the .bss section. SIZE is in words. 13056 If present, BLOCKING_FLAG indicates the allocated space should be 13057 aligned on a page boundary if it would otherwise cross a page 13058 boundary. If present, ALIGNMENT_FLAG causes the assembler to 13059 allocate SIZE on a long word boundary. 13060 13061`.byte VALUE [,...,VALUE_N]' 13062`.ubyte VALUE [,...,VALUE_N]' 13063`.char VALUE [,...,VALUE_N]' 13064`.uchar VALUE [,...,VALUE_N]' 13065 Place one or more bytes into consecutive words of the current 13066 section. The upper 8 bits of each word is zero-filled. If a 13067 label is used, it points to the word allocated for the first byte 13068 encountered. 13069 13070`.clink ["SECTION_NAME"]' 13071 Set STYP_CLINK flag for this section, which indicates to the 13072 linker that if no symbols from this section are referenced, the 13073 section should not be included in the link. If SECTION_NAME is 13074 omitted, the current section is used. 13075 13076`.c_mode' 13077 TBD. 13078 13079`.copy "FILENAME" | FILENAME' 13080`.include "FILENAME" | FILENAME' 13081 Read source statements from FILENAME. The normal include search 13082 path is used. Normally .copy will cause statements from the 13083 included file to be printed in the assembly listing and .include 13084 will not, but this distinction is not currently implemented. 13085 13086`.data' 13087 Begin assembling code into the .data section. 13088 13089`.double VALUE [,...,VALUE_N]' 13090`.ldouble VALUE [,...,VALUE_N]' 13091`.float VALUE [,...,VALUE_N]' 13092`.xfloat VALUE [,...,VALUE_N]' 13093 Place an IEEE single-precision floating-point representation of 13094 one or more floating-point values into the current section. All 13095 but `.xfloat' align the result on a longword boundary. Values are 13096 stored most-significant word first. 13097 13098`.drlist' 13099`.drnolist' 13100 Control printing of directives to the listing file. Ignored. 13101 13102`.emsg STRING' 13103`.mmsg STRING' 13104`.wmsg STRING' 13105 Emit a user-defined error, message, or warning, respectively. 13106 13107`.far_mode' 13108 Use extended addressing when assembling statements. This should 13109 appear only once per file, and is equivalent to the -mfar-mode 13110 option *note `-mfar-mode': TIC54X-Opts. 13111 13112`.fclist' 13113`.fcnolist' 13114 Control printing of false conditional blocks to the listing file. 13115 13116`.field VALUE [,SIZE]' 13117 Initialize a bitfield of SIZE bits in the current section. If 13118 VALUE is relocatable, then SIZE must be 16. SIZE defaults to 16 13119 bits. If VALUE does not fit into SIZE bits, the value will be 13120 truncated. Successive `.field' directives will pack starting at 13121 the current word, filling the most significant bits first, and 13122 aligning to the start of the next word if the field size does not 13123 fit into the space remaining in the current word. A `.align' 13124 directive with an operand of 1 will force the next `.field' 13125 directive to begin packing into a new word. If a label is used, it 13126 points to the word that contains the specified field. 13127 13128`.global SYMBOL [,...,SYMBOL_N]' 13129`.def SYMBOL [,...,SYMBOL_N]' 13130`.ref SYMBOL [,...,SYMBOL_N]' 13131 `.def' nominally identifies a symbol defined in the current file 13132 and availalbe to other files. `.ref' identifies a symbol used in 13133 the current file but defined elsewhere. Both map to the standard 13134 `.global' directive. 13135 13136`.half VALUE [,...,VALUE_N]' 13137`.uhalf VALUE [,...,VALUE_N]' 13138`.short VALUE [,...,VALUE_N]' 13139`.ushort VALUE [,...,VALUE_N]' 13140`.int VALUE [,...,VALUE_N]' 13141`.uint VALUE [,...,VALUE_N]' 13142`.word VALUE [,...,VALUE_N]' 13143`.uword VALUE [,...,VALUE_N]' 13144 Place one or more values into consecutive words of the current 13145 section. If a label is used, it points to the word allocated for 13146 the first value encountered. 13147 13148`.label SYMBOL' 13149 Define a special SYMBOL to refer to the load time address of the 13150 current section program counter. 13151 13152`.length' 13153`.width' 13154 Set the page length and width of the output listing file. Ignored. 13155 13156`.list' 13157`.nolist' 13158 Control whether the source listing is printed. Ignored. 13159 13160`.long VALUE [,...,VALUE_N]' 13161`.ulong VALUE [,...,VALUE_N]' 13162`.xlong VALUE [,...,VALUE_N]' 13163 Place one or more 32-bit values into consecutive words in the 13164 current section. The most significant word is stored first. 13165 `.long' and `.ulong' align the result on a longword boundary; 13166 `xlong' does not. 13167 13168`.loop [COUNT]' 13169`.break [CONDITION]' 13170`.endloop' 13171 Repeatedly assemble a block of code. `.loop' begins the block, and 13172 `.endloop' marks its termination. COUNT defaults to 1024, and 13173 indicates the number of times the block should be repeated. 13174 `.break' terminates the loop so that assembly begins after the 13175 `.endloop' directive. The optional CONDITION will cause the loop 13176 to terminate only if it evaluates to zero. 13177 13178`MACRO_NAME .macro [PARAM1][,...PARAM_N]' 13179`[.mexit]' 13180`.endm' 13181 See the section on macros for more explanation (*Note 13182 TIC54X-Macros::. 13183 13184`.mlib "FILENAME" | FILENAME' 13185 Load the macro library FILENAME. FILENAME must be an archived 13186 library (BFD ar-compatible) of text files, expected to contain 13187 only macro definitions. The standard include search path is used. 13188 13189`.mlist' 13190 13191`.mnolist' 13192 Control whether to include macro and loop block expansions in the 13193 listing output. Ignored. 13194 13195`.mmregs' 13196 Define global symbolic names for the 'c54x registers. Supposedly 13197 equivalent to executing `.set' directives for each register with 13198 its memory-mapped value, but in reality is provided only for 13199 compatibility and does nothing. 13200 13201`.newblock' 13202 This directive resets any TIC54X local labels currently defined. 13203 Normal `as' local labels are unaffected. 13204 13205`.option OPTION_LIST' 13206 Set listing options. Ignored. 13207 13208`.sblock "SECTION_NAME" | SECTION_NAME [,"NAME_N" | NAME_N]' 13209 Designate SECTION_NAME for blocking. Blocking guarantees that a 13210 section will start on a page boundary (128 words) if it would 13211 otherwise cross a page boundary. Only initialized sections may be 13212 designated with this directive. See also *Note TIC54X-Block::. 13213 13214`.sect "SECTION_NAME"' 13215 Define a named initialized section and make it the current section. 13216 13217`SYMBOL .set "VALUE"' 13218`SYMBOL .equ "VALUE"' 13219 Equate a constant VALUE to a SYMBOL, which is placed in the symbol 13220 table. SYMBOL may not be previously defined. 13221 13222`.space SIZE_IN_BITS' 13223`.bes SIZE_IN_BITS' 13224 Reserve the given number of bits in the current section and 13225 zero-fill them. If a label is used with `.space', it points to the 13226 *first* word reserved. With `.bes', the label points to the 13227 *last* word reserved. 13228 13229`.sslist' 13230`.ssnolist' 13231 Controls the inclusion of subsym replacement in the listing 13232 output. Ignored. 13233 13234`.string "STRING" [,...,"STRING_N"]' 13235`.pstring "STRING" [,...,"STRING_N"]' 13236 Place 8-bit characters from STRING into the current section. 13237 `.string' zero-fills the upper 8 bits of each word, while 13238 `.pstring' puts two characters into each word, filling the 13239 most-significant bits first. Unused space is zero-filled. If a 13240 label is used, it points to the first word initialized. 13241 13242`[STAG] .struct [OFFSET]' 13243`[NAME_1] element [COUNT_1]' 13244`[NAME_2] element [COUNT_2]' 13245`[TNAME] .tag STAGX [TCOUNT]' 13246`...' 13247`[NAME_N] element [COUNT_N]' 13248`[SSIZE] .endstruct' 13249`LABEL .tag [STAG]' 13250 Assign symbolic offsets to the elements of a structure. STAG 13251 defines a symbol to use to reference the structure. OFFSET 13252 indicates a starting value to use for the first element 13253 encountered; otherwise it defaults to zero. Each element can have 13254 a named offset, NAME, which is a symbol assigned the value of the 13255 element's offset into the structure. If STAG is missing, these 13256 become global symbols. COUNT adjusts the offset that many times, 13257 as if `element' were an array. `element' may be one of `.byte', 13258 `.word', `.long', `.float', or any equivalent of those, and the 13259 structure offset is adjusted accordingly. `.field' and `.string' 13260 are also allowed; the size of `.field' is one bit, and `.string' 13261 is considered to be one word in size. Only element descriptors, 13262 structure/union tags, `.align' and conditional assembly directives 13263 are allowed within `.struct'/`.endstruct'. `.align' aligns member 13264 offsets to word boundaries only. SSIZE, if provided, will always 13265 be assigned the size of the structure. 13266 13267 The `.tag' directive, in addition to being used to define a 13268 structure/union element within a structure, may be used to apply a 13269 structure to a symbol. Once applied to LABEL, the individual 13270 structure elements may be applied to LABEL to produce the desired 13271 offsets using LABEL as the structure base. 13272 13273`.tab' 13274 Set the tab size in the output listing. Ignored. 13275 13276`[UTAG] .union' 13277`[NAME_1] element [COUNT_1]' 13278`[NAME_2] element [COUNT_2]' 13279`[TNAME] .tag UTAGX[,TCOUNT]' 13280`...' 13281`[NAME_N] element [COUNT_N]' 13282`[USIZE] .endstruct' 13283`LABEL .tag [UTAG]' 13284 Similar to `.struct', but the offset after each element is reset to 13285 zero, and the USIZE is set to the maximum of all defined elements. 13286 Starting offset for the union is always zero. 13287 13288`[SYMBOL] .usect "SECTION_NAME", SIZE, [,[BLOCKING_FLAG] [,ALIGNMENT_FLAG]]' 13289 Reserve space for variables in a named, uninitialized section 13290 (similar to .bss). `.usect' allows definitions sections 13291 independent of .bss. SYMBOL points to the first location reserved 13292 by this allocation. The symbol may be used as a variable name. 13293 SIZE is the allocated size in words. BLOCKING_FLAG indicates 13294 whether to block this section on a page boundary (128 words) 13295 (*note TIC54X-Block::). ALIGNMENT FLAG indicates whether the 13296 section should be longword-aligned. 13297 13298`.var SYM[,..., SYM_N]' 13299 Define a subsym to be a local variable within a macro. See *Note 13300 TIC54X-Macros::. 13301 13302`.version VERSION' 13303 Set which processor to build instructions for. Though the 13304 following values are accepted, the op is ignored. 13305 `541' 13306 `542' 13307 `543' 13308 `545' 13309 `545LP' 13310 `546LP' 13311 `548' 13312 `549' 13313 13314 13315File: as.info, Node: TIC54X-Macros, Next: TIC54X-MMRegs, Prev: TIC54X-Directives, Up: TIC54X-Dependent 13316 133178.29.10 Macros 13318-------------- 13319 13320Macros do not require explicit dereferencing of arguments (i.e. \ARG). 13321 13322 During macro expansion, the macro parameters are converted to 13323subsyms. If the number of arguments passed the macro invocation 13324exceeds the number of parameters defined, the last parameter is 13325assigned the string equivalent of all remaining arguments. If fewer 13326arguments are given than parameters, the missing parameters are 13327assigned empty strings. To include a comma in an argument, you must 13328enclose the argument in quotes. 13329 13330 The following built-in subsym functions allow examination of the 13331string value of subsyms (or ordinary strings). The arguments are 13332strings unless otherwise indicated (subsyms passed as args will be 13333replaced by the strings they represent). 13334``$symlen(STR)'' 13335 Returns the length of STR. 13336 13337``$symcmp(STR1,STR2)'' 13338 Returns 0 if STR1 == STR2, non-zero otherwise. 13339 13340``$firstch(STR,CH)'' 13341 Returns index of the first occurrence of character constant CH in 13342 STR. 13343 13344``$lastch(STR,CH)'' 13345 Returns index of the last occurrence of character constant CH in 13346 STR. 13347 13348``$isdefed(SYMBOL)'' 13349 Returns zero if the symbol SYMBOL is not in the symbol table, 13350 non-zero otherwise. 13351 13352``$ismember(SYMBOL,LIST)'' 13353 Assign the first member of comma-separated string LIST to SYMBOL; 13354 LIST is reassigned the remainder of the list. Returns zero if 13355 LIST is a null string. Both arguments must be subsyms. 13356 13357``$iscons(EXPR)'' 13358 Returns 1 if string EXPR is binary, 2 if octal, 3 if hexadecimal, 13359 4 if a character, 5 if decimal, and zero if not an integer. 13360 13361``$isname(NAME)'' 13362 Returns 1 if NAME is a valid symbol name, zero otherwise. 13363 13364``$isreg(REG)'' 13365 Returns 1 if REG is a valid predefined register name (AR0-AR7 13366 only). 13367 13368``$structsz(STAG)'' 13369 Returns the size of the structure or union represented by STAG. 13370 13371``$structacc(STAG)'' 13372 Returns the reference point of the structure or union represented 13373 by STAG. Always returns zero. 13374 13375 13376 13377File: as.info, Node: TIC54X-MMRegs, Prev: TIC54X-Macros, Up: TIC54X-Dependent 13378 133798.29.11 Memory-mapped Registers 13380------------------------------- 13381 13382The following symbols are recognized as memory-mapped registers: 13383 13384 13385 13386File: as.info, Node: Z80-Dependent, Next: Z8000-Dependent, Prev: Xtensa-Dependent, Up: Machine Dependencies 13387 133888.30 Z80 Dependent Features 13389=========================== 13390 13391* Menu: 13392 13393* Z80 Options:: Options 13394* Z80 Syntax:: Syntax 13395* Z80 Floating Point:: Floating Point 13396* Z80 Directives:: Z80 Machine Directives 13397* Z80 Opcodes:: Opcodes 13398 13399 13400File: as.info, Node: Z80 Options, Next: Z80 Syntax, Up: Z80-Dependent 13401 134028.30.1 Options 13403-------------- 13404 13405The Zilog Z80 and Ascii R800 version of `as' have a few machine 13406dependent options. 13407`-z80' 13408 Produce code for the Z80 processor. There are additional options to 13409 request warnings and error messages for undocumented instructions. 13410 13411`-ignore-undocumented-instructions' 13412`-Wnud' 13413 Silently assemble undocumented Z80-instructions that have been 13414 adopted as documented R800-instructions. 13415 13416`-ignore-unportable-instructions' 13417`-Wnup' 13418 Silently assemble all undocumented Z80-instructions. 13419 13420`-warn-undocumented-instructions' 13421`-Wud' 13422 Issue warnings for undocumented Z80-instructions that work on 13423 R800, do not assemble other undocumented instructions without 13424 warning. 13425 13426`-warn-unportable-instructions' 13427`-Wup' 13428 Issue warnings for other undocumented Z80-instructions, do not 13429 treat any undocumented instructions as errors. 13430 13431`-forbid-undocumented-instructions' 13432`-Fud' 13433 Treat all undocumented z80-instructions as errors. 13434 13435`-forbid-unportable-instructions' 13436`-Fup' 13437 Treat undocumented z80-instructions that do not work on R800 as 13438 errors. 13439 13440`-r800' 13441 Produce code for the R800 processor. The assembler does not support 13442 undocumented instructions for the R800. In line with common 13443 practice, `as' uses Z80 instriction names for the R800 processor, 13444 as far as they exist. 13445 13446 13447File: as.info, Node: Z80 Syntax, Next: Z80 Floating Point, Prev: Z80 Options, Up: Z80-Dependent 13448 134498.30.2 Syntax 13450------------- 13451 13452The assembler syntax closely follows the 'Z80 family CPU User Manual' by 13453Zilog. In expressions a single `=' may be used as "is equal to" 13454comparison operator. 13455 13456 Suffices can be used to indicate the radix of integer constants; `H' 13457or `h' for hexadecimal, `D' or `d' for decimal, `Q', `O', `q' or `o' 13458for octal, and `B' for binary. 13459 13460 The suffix `b' denotes a backreference to local label. 13461 13462* Menu: 13463 13464* Z80-Chars:: Special Characters 13465* Z80-Regs:: Register Names 13466* Z80-Case:: Case Sensitivity 13467 13468 13469File: as.info, Node: Z80-Chars, Next: Z80-Regs, Up: Z80 Syntax 13470 134718.30.2.1 Special Characters 13472........................... 13473 13474The semicolon `;' is the line comment character; 13475 13476 The dollar sign `$' can be used as a prefix for hexadecimal numbers 13477and as a symbol denoting the current location counter. 13478 13479 A backslash `\' is an ordinary character for the Z80 assembler. 13480 13481 The single quote `'' must be followed by a closing quote. If there 13482is one character inbetween, it is a character constant, otherwise it is 13483a string constant. 13484 13485 13486File: as.info, Node: Z80-Regs, Next: Z80-Case, Prev: Z80-Chars, Up: Z80 Syntax 13487 134888.30.2.2 Register Names 13489....................... 13490 13491The registers are referred to with the letters assigned to them by 13492Zilog. In addition `as' recognises `ixl' and `ixh' as the least and 13493most significant octet in `ix', and similarly `iyl' and `iyh' as parts 13494of `iy'. 13495 13496 13497File: as.info, Node: Z80-Case, Prev: Z80-Regs, Up: Z80 Syntax 13498 134998.30.2.3 Case Sensitivity 13500......................... 13501 13502Upper and lower case are equivalent in register names, opcodes, 13503condition codes and assembler directives. The case of letters is 13504significant in labels and symbol names. The case is also important to 13505distinguish the suffix `b' for a backward reference to a local label 13506from the suffix `B' for a number in binary notation. 13507 13508 13509File: as.info, Node: Z80 Floating Point, Next: Z80 Directives, Prev: Z80 Syntax, Up: Z80-Dependent 13510 135118.30.3 Floating Point 13512--------------------- 13513 13514Floating-point numbers are not supported. 13515 13516 13517File: as.info, Node: Z80 Directives, Next: Z80 Opcodes, Prev: Z80 Floating Point, Up: Z80-Dependent 13518 135198.30.4 Z80 Assembler Directives 13520------------------------------- 13521 13522`as' for the Z80 supports some additional directives for compatibility 13523with other assemblers. 13524 13525 These are the additional directives in `as' for the Z80: 13526 13527`db EXPRESSION|STRING[,EXPRESSION|STRING...]' 13528`defb EXPRESSION|STRING[,EXPRESSION|STRING...]' 13529 For each STRING the characters are copied to the object file, for 13530 each other EXPRESSION the value is stored in one byte. A warning 13531 is issued in case of an overflow. 13532 13533`dw EXPRESSION[,EXPRESSION...]' 13534`defw EXPRESSION[,EXPRESSION...]' 13535 For each EXPRESSION the value is stored in two bytes, ignoring 13536 overflow. 13537 13538`d24 EXPRESSION[,EXPRESSION...]' 13539`def24 EXPRESSION[,EXPRESSION...]' 13540 For each EXPRESSION the value is stored in three bytes, ignoring 13541 overflow. 13542 13543`d32 EXPRESSION[,EXPRESSION...]' 13544`def32 EXPRESSION[,EXPRESSION...]' 13545 For each EXPRESSION the value is stored in four bytes, ignoring 13546 overflow. 13547 13548`ds COUNT[, VALUE]' 13549`defs COUNT[, VALUE]' 13550 Fill COUNT bytes in the object file with VALUE, if VALUE is 13551 omitted it defaults to zero. 13552 13553`SYMBOL equ EXPRESSION' 13554`SYMBOL defl EXPRESSION' 13555 These directives set the value of SYMBOL to EXPRESSION. If `equ' 13556 is used, it is an error if SYMBOL is already defined. Symbols 13557 defined with `equ' are not protected from redefinition. 13558 13559`set' 13560 This is a normal instruction on Z80, and not an assembler 13561 directive. 13562 13563`psect NAME' 13564 A synonym for *Note Section::, no second argument should be given. 13565 13566 13567 13568File: as.info, Node: Z80 Opcodes, Prev: Z80 Directives, Up: Z80-Dependent 13569 135708.30.5 Opcodes 13571-------------- 13572 13573In line with commmon practice Z80 mnonics are used for both the Z80 and 13574the R800. 13575 13576 In many instructions it is possible to use one of the half index 13577registers (`ixl',`ixh',`iyl',`iyh') in stead of an 8-bit general 13578purpose register. This yields instructions that are documented on the 13579R800 and undocumented on the Z80. Similarly `in f,(c)' is documented 13580on the R800 and undocumented on the Z80. 13581 13582 The assembler also supports the following undocumented 13583Z80-instructions, that have not been adopted in the R800 instruction 13584set: 13585`out (c),0' 13586 Sends zero to the port pointed to by register c. 13587 13588`sli M' 13589 Equivalent to `M = (M<<1)+1', the operand M can be any operand 13590 that is valid for `sla'. One can use `sll' as a synonym for `sli'. 13591 13592`OP (ix+D), R' 13593 This is equivalent to 13594 13595 ld R, (ix+D) 13596 OPC R 13597 ld (ix+D), R 13598 13599 The operation `OPC' may be any of `res B,', `set B,', `rl', `rlc', 13600 `rr', `rrc', `sla', `sli', `sra' and `srl', and the register `R' 13601 may be any of `a', `b', `c', `d', `e', `h' and `l'. 13602 13603`OPC (iy+D), R' 13604 As above, but with `iy' instead of `ix'. 13605 13606 The web site at `http://www.z80.info' is a good starting place to 13607find more information on programming the Z80. 13608 13609 13610File: as.info, Node: Z8000-Dependent, Next: Vax-Dependent, Prev: Z80-Dependent, Up: Machine Dependencies 13611 136128.31 Z8000 Dependent Features 13613============================= 13614 13615 The Z8000 as supports both members of the Z8000 family: the 13616unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with 1361724 bit addresses. 13618 13619 When the assembler is in unsegmented mode (specified with the 13620`unsegm' directive), an address takes up one word (16 bit) sized 13621register. When the assembler is in segmented mode (specified with the 13622`segm' directive), a 24-bit address takes up a long (32 bit) register. 13623*Note Assembler Directives for the Z8000: Z8000 Directives, for a list 13624of other Z8000 specific assembler directives. 13625 13626* Menu: 13627 13628* Z8000 Options:: Command-line options for the Z8000 13629* Z8000 Syntax:: Assembler syntax for the Z8000 13630* Z8000 Directives:: Special directives for the Z8000 13631* Z8000 Opcodes:: Opcodes 13632 13633 13634File: as.info, Node: Z8000 Options, Next: Z8000 Syntax, Up: Z8000-Dependent 13635 136368.31.1 Options 13637-------------- 13638 13639`-z8001' 13640 Generate segmented code by default. 13641 13642`-z8002' 13643 Generate unsegmented code by default. 13644 13645 13646File: as.info, Node: Z8000 Syntax, Next: Z8000 Directives, Prev: Z8000 Options, Up: Z8000-Dependent 13647 136488.31.2 Syntax 13649------------- 13650 13651* Menu: 13652 13653* Z8000-Chars:: Special Characters 13654* Z8000-Regs:: Register Names 13655* Z8000-Addressing:: Addressing Modes 13656 13657 13658File: as.info, Node: Z8000-Chars, Next: Z8000-Regs, Up: Z8000 Syntax 13659 136608.31.2.1 Special Characters 13661........................... 13662 13663`!' is the line comment character. 13664 13665 You can use `;' instead of a newline to separate statements. 13666 13667 13668File: as.info, Node: Z8000-Regs, Next: Z8000-Addressing, Prev: Z8000-Chars, Up: Z8000 Syntax 13669 136708.31.2.2 Register Names 13671....................... 13672 13673The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer 13674to different sized groups of registers by register number, with the 13675prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for 1367664 bit registers. You can also refer to the contents of the first 13677eight (of the sixteen 16 bit registers) by bytes. They are named `rlN' 13678and `rhN'. 13679 13680_byte registers_ 13681 rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3 13682 rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7 13683 13684_word registers_ 13685 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 13686 13687_long word registers_ 13688 rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14 13689 13690_quad word registers_ 13691 rq0 rq4 rq8 rq12 13692 13693 13694File: as.info, Node: Z8000-Addressing, Prev: Z8000-Regs, Up: Z8000 Syntax 13695 136968.31.2.3 Addressing Modes 13697......................... 13698 13699as understands the following addressing modes for the Z8000: 13700 13701`rlN' 13702`rhN' 13703`rN' 13704`rrN' 13705`rqN' 13706 Register direct: 8bit, 16bit, 32bit, and 64bit registers. 13707 13708`@rN' 13709`@rrN' 13710 Indirect register: @rrN in segmented mode, @rN in unsegmented 13711 mode. 13712 13713`ADDR' 13714 Direct: the 16 bit or 24 bit address (depending on whether the 13715 assembler is in segmented or unsegmented mode) of the operand is 13716 in the instruction. 13717 13718`address(rN)' 13719 Indexed: the 16 or 24 bit address is added to the 16 bit register 13720 to produce the final address in memory of the operand. 13721 13722`rN(#IMM)' 13723`rrN(#IMM)' 13724 Base Address: the 16 or 24 bit register is added to the 16 bit sign 13725 extended immediate displacement to produce the final address in 13726 memory of the operand. 13727 13728`rN(rM)' 13729`rrN(rM)' 13730 Base Index: the 16 or 24 bit register rN or rrN is added to the 13731 sign extended 16 bit index register rM to produce the final 13732 address in memory of the operand. 13733 13734`#XX' 13735 Immediate data XX. 13736 13737 13738File: as.info, Node: Z8000 Directives, Next: Z8000 Opcodes, Prev: Z8000 Syntax, Up: Z8000-Dependent 13739 137408.31.3 Assembler Directives for the Z8000 13741----------------------------------------- 13742 13743The Z8000 port of as includes additional assembler directives, for 13744compatibility with other Z8000 assemblers. These do not begin with `.' 13745(unlike the ordinary as directives). 13746 13747`segm' 13748`.z8001' 13749 Generate code for the segmented Z8001. 13750 13751`unsegm' 13752`.z8002' 13753 Generate code for the unsegmented Z8002. 13754 13755`name' 13756 Synonym for `.file' 13757 13758`global' 13759 Synonym for `.global' 13760 13761`wval' 13762 Synonym for `.word' 13763 13764`lval' 13765 Synonym for `.long' 13766 13767`bval' 13768 Synonym for `.byte' 13769 13770`sval' 13771 Assemble a string. `sval' expects one string literal, delimited by 13772 single quotes. It assembles each byte of the string into 13773 consecutive addresses. You can use the escape sequence `%XX' 13774 (where XX represents a two-digit hexadecimal number) to represent 13775 the character whose ASCII value is XX. Use this feature to 13776 describe single quote and other characters that may not appear in 13777 string literals as themselves. For example, the C statement 13778 `char *a = "he said \"it's 50% off\"";' is represented in Z8000 13779 assembly language (shown with the assembler output in hex at the 13780 left) as 13781 13782 68652073 sval 'he said %22it%27s 50%25 off%22%00' 13783 61696420 13784 22697427 13785 73203530 13786 25206F66 13787 662200 13788 13789`rsect' 13790 synonym for `.section' 13791 13792`block' 13793 synonym for `.space' 13794 13795`even' 13796 special case of `.align'; aligns output to even byte boundary. 13797 13798 13799File: as.info, Node: Z8000 Opcodes, Prev: Z8000 Directives, Up: Z8000-Dependent 13800 138018.31.4 Opcodes 13802-------------- 13803 13804For detailed information on the Z8000 machine instruction set, see 13805`Z8000 Technical Manual'. 13806 13807 The following table summarizes the opcodes and their arguments: 13808 13809 rs 16 bit source register 13810 rd 16 bit destination register 13811 rbs 8 bit source register 13812 rbd 8 bit destination register 13813 rrs 32 bit source register 13814 rrd 32 bit destination register 13815 rqs 64 bit source register 13816 rqd 64 bit destination register 13817 addr 16/24 bit address 13818 imm immediate data 13819 13820 adc rd,rs clrb addr cpsir @rd,@rs,rr,cc 13821 adcb rbd,rbs clrb addr(rd) cpsirb @rd,@rs,rr,cc 13822 add rd,@rs clrb rbd dab rbd 13823 add rd,addr com @rd dbjnz rbd,disp7 13824 add rd,addr(rs) com addr dec @rd,imm4m1 13825 add rd,imm16 com addr(rd) dec addr(rd),imm4m1 13826 add rd,rs com rd dec addr,imm4m1 13827 addb rbd,@rs comb @rd dec rd,imm4m1 13828 addb rbd,addr comb addr decb @rd,imm4m1 13829 addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1 13830 addb rbd,imm8 comb rbd decb addr,imm4m1 13831 addb rbd,rbs comflg flags decb rbd,imm4m1 13832 addl rrd,@rs cp @rd,imm16 di i2 13833 addl rrd,addr cp addr(rd),imm16 div rrd,@rs 13834 addl rrd,addr(rs) cp addr,imm16 div rrd,addr 13835 addl rrd,imm32 cp rd,@rs div rrd,addr(rs) 13836 addl rrd,rrs cp rd,addr div rrd,imm16 13837 and rd,@rs cp rd,addr(rs) div rrd,rs 13838 and rd,addr cp rd,imm16 divl rqd,@rs 13839 and rd,addr(rs) cp rd,rs divl rqd,addr 13840 and rd,imm16 cpb @rd,imm8 divl rqd,addr(rs) 13841 and rd,rs cpb addr(rd),imm8 divl rqd,imm32 13842 andb rbd,@rs cpb addr,imm8 divl rqd,rrs 13843 andb rbd,addr cpb rbd,@rs djnz rd,disp7 13844 andb rbd,addr(rs) cpb rbd,addr ei i2 13845 andb rbd,imm8 cpb rbd,addr(rs) ex rd,@rs 13846 andb rbd,rbs cpb rbd,imm8 ex rd,addr 13847 bit @rd,imm4 cpb rbd,rbs ex rd,addr(rs) 13848 bit addr(rd),imm4 cpd rd,@rs,rr,cc ex rd,rs 13849 bit addr,imm4 cpdb rbd,@rs,rr,cc exb rbd,@rs 13850 bit rd,imm4 cpdr rd,@rs,rr,cc exb rbd,addr 13851 bit rd,rs cpdrb rbd,@rs,rr,cc exb rbd,addr(rs) 13852 bitb @rd,imm4 cpi rd,@rs,rr,cc exb rbd,rbs 13853 bitb addr(rd),imm4 cpib rbd,@rs,rr,cc ext0e imm8 13854 bitb addr,imm4 cpir rd,@rs,rr,cc ext0f imm8 13855 bitb rbd,imm4 cpirb rbd,@rs,rr,cc ext8e imm8 13856 bitb rbd,rs cpl rrd,@rs ext8f imm8 13857 bpt cpl rrd,addr exts rrd 13858 call @rd cpl rrd,addr(rs) extsb rd 13859 call addr cpl rrd,imm32 extsl rqd 13860 call addr(rd) cpl rrd,rrs halt 13861 calr disp12 cpsd @rd,@rs,rr,cc in rd,@rs 13862 clr @rd cpsdb @rd,@rs,rr,cc in rd,imm16 13863 clr addr cpsdr @rd,@rs,rr,cc inb rbd,@rs 13864 clr addr(rd) cpsdrb @rd,@rs,rr,cc inb rbd,imm16 13865 clr rd cpsi @rd,@rs,rr,cc inc @rd,imm4m1 13866 clrb @rd cpsib @rd,@rs,rr,cc inc addr(rd),imm4m1 13867 inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs) 13868 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16 13869 incb @rd,imm4m1 ldb rd(rx),rbs mult rrd,rs 13870 incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@rs 13871 incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr 13872 incb rbd,imm4m1 ldd @rs,@rd,rr multl rqd,addr(rs) 13873 ind @rd,@rs,ra lddb @rs,@rd,rr multl rqd,imm32 13874 indb @rd,@rs,rba lddr @rs,@rd,rr multl rqd,rrs 13875 inib @rd,@rs,ra lddrb @rs,@rd,rr neg @rd 13876 inibr @rd,@rs,ra ldi @rd,@rs,rr neg addr 13877 iret ldib @rd,@rs,rr neg addr(rd) 13878 jp cc,@rd ldir @rd,@rs,rr neg rd 13879 jp cc,addr ldirb @rd,@rs,rr negb @rd 13880 jp cc,addr(rd) ldk rd,imm4 negb addr 13881 jr cc,disp8 ldl @rd,rrs negb addr(rd) 13882 ld @rd,imm16 ldl addr(rd),rrs negb rbd 13883 ld @rd,rs ldl addr,rrs nop 13884 ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@rs 13885 ld addr(rd),rs ldl rd(rx),rrs or rd,addr 13886 ld addr,imm16 ldl rrd,@rs or rd,addr(rs) 13887 ld addr,rs ldl rrd,addr or rd,imm16 13888 ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs 13889 ld rd(rx),rs ldl rrd,imm32 orb rbd,@rs 13890 ld rd,@rs ldl rrd,rrs orb rbd,addr 13891 ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs) 13892 ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8 13893 ld rd,imm16 ldm @rd,rs,n orb rbd,rbs 13894 ld rd,rs ldm addr(rd),rs,n out @rd,rs 13895 ld rd,rs(imm16) ldm addr,rs,n out imm16,rs 13896 ld rd,rs(rx) ldm rd,@rs,n outb @rd,rbs 13897 lda rd,addr ldm rd,addr(rs),n outb imm16,rbs 13898 lda rd,addr(rs) ldm rd,addr,n outd @rd,@rs,ra 13899 lda rd,rs(imm16) ldps @rs outdb @rd,@rs,rba 13900 lda rd,rs(rx) ldps addr outib @rd,@rs,ra 13901 ldar rd,disp16 ldps addr(rs) outibr @rd,@rs,ra 13902 ldb @rd,imm8 ldr disp16,rs pop @rd,@rs 13903 ldb @rd,rbs ldr rd,disp16 pop addr(rd),@rs 13904 ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@rs 13905 ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@rs 13906 ldb addr,imm8 ldrl disp16,rrs popl @rd,@rs 13907 ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@rs 13908 ldb rbd,@rs mbit popl addr,@rs 13909 ldb rbd,addr mreq rd popl rrd,@rs 13910 ldb rbd,addr(rs) mres push @rd,@rs 13911 ldb rbd,imm8 mset push @rd,addr 13912 ldb rbd,rbs mult rrd,@rs push @rd,addr(rs) 13913 ldb rbd,rs(imm16) mult rrd,addr push @rd,imm16 13914 push @rd,rs set addr,imm4 subl rrd,imm32 13915 pushl @rd,@rs set rd,imm4 subl rrd,rrs 13916 pushl @rd,addr set rd,rs tcc cc,rd 13917 pushl @rd,addr(rs) setb @rd,imm4 tccb cc,rbd 13918 pushl @rd,rrs setb addr(rd),imm4 test @rd 13919 res @rd,imm4 setb addr,imm4 test addr 13920 res addr(rd),imm4 setb rbd,imm4 test addr(rd) 13921 res addr,imm4 setb rbd,rs test rd 13922 res rd,imm4 setflg imm4 testb @rd 13923 res rd,rs sinb rbd,imm16 testb addr 13924 resb @rd,imm4 sinb rd,imm16 testb addr(rd) 13925 resb addr(rd),imm4 sind @rd,@rs,ra testb rbd 13926 resb addr,imm4 sindb @rd,@rs,rba testl @rd 13927 resb rbd,imm4 sinib @rd,@rs,ra testl addr 13928 resb rbd,rs sinibr @rd,@rs,ra testl addr(rd) 13929 resflg imm4 sla rd,imm8 testl rrd 13930 ret cc slab rbd,imm8 trdb @rd,@rs,rba 13931 rl rd,imm1or2 slal rrd,imm8 trdrb @rd,@rs,rba 13932 rlb rbd,imm1or2 sll rd,imm8 trib @rd,@rs,rbr 13933 rlc rd,imm1or2 sllb rbd,imm8 trirb @rd,@rs,rbr 13934 rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @ra,@rb,rbr 13935 rldb rbb,rba sout imm16,rs trtib @ra,@rb,rr 13936 rr rd,imm1or2 soutb imm16,rbs trtirb @ra,@rb,rbr 13937 rrb rbd,imm1or2 soutd @rd,@rs,ra trtrb @ra,@rb,rbr 13938 rrc rd,imm1or2 soutdb @rd,@rs,rba tset @rd 13939 rrcb rbd,imm1or2 soutib @rd,@rs,ra tset addr 13940 rrdb rbb,rba soutibr @rd,@rs,ra tset addr(rd) 13941 rsvd36 sra rd,imm8 tset rd 13942 rsvd38 srab rbd,imm8 tsetb @rd 13943 rsvd78 sral rrd,imm8 tsetb addr 13944 rsvd7e srl rd,imm8 tsetb addr(rd) 13945 rsvd9d srlb rbd,imm8 tsetb rbd 13946 rsvd9f srll rrd,imm8 xor rd,@rs 13947 rsvdb9 sub rd,@rs xor rd,addr 13948 rsvdbf sub rd,addr xor rd,addr(rs) 13949 sbc rd,rs sub rd,addr(rs) xor rd,imm16 13950 sbcb rbd,rbs sub rd,imm16 xor rd,rs 13951 sc imm8 sub rd,rs xorb rbd,@rs 13952 sda rd,rs subb rbd,@rs xorb rbd,addr 13953 sdab rbd,rs subb rbd,addr xorb rbd,addr(rs) 13954 sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8 13955 sdl rd,rs subb rbd,imm8 xorb rbd,rbs 13956 sdlb rbd,rs subb rbd,rbs xorb rbd,rbs 13957 sdll rrd,rs subl rrd,@rs 13958 set @rd,imm4 subl rrd,addr 13959 set addr(rd),imm4 subl rrd,addr(rs) 13960 13961 13962File: as.info, Node: Vax-Dependent, Prev: Z8000-Dependent, Up: Machine Dependencies 13963 139648.32 VAX Dependent Features 13965=========================== 13966 13967* Menu: 13968 13969* VAX-Opts:: VAX Command-Line Options 13970* VAX-float:: VAX Floating Point 13971* VAX-directives:: Vax Machine Directives 13972* VAX-opcodes:: VAX Opcodes 13973* VAX-branch:: VAX Branch Improvement 13974* VAX-operands:: VAX Operands 13975* VAX-no:: Not Supported on VAX 13976 13977 13978File: as.info, Node: VAX-Opts, Next: VAX-float, Up: Vax-Dependent 13979 139808.32.1 VAX Command-Line Options 13981------------------------------- 13982 13983The Vax version of `as' accepts any of the following options, gives a 13984warning message that the option was ignored and proceeds. These 13985options are for compatibility with scripts designed for other people's 13986assemblers. 13987 13988``-D' (Debug)' 13989``-S' (Symbol Table)' 13990``-T' (Token Trace)' 13991 These are obsolete options used to debug old assemblers. 13992 13993``-d' (Displacement size for JUMPs)' 13994 This option expects a number following the `-d'. Like options 13995 that expect filenames, the number may immediately follow the `-d' 13996 (old standard) or constitute the whole of the command line 13997 argument that follows `-d' (GNU standard). 13998 13999``-V' (Virtualize Interpass Temporary File)' 14000 Some other assemblers use a temporary file. This option commanded 14001 them to keep the information in active memory rather than in a 14002 disk file. `as' always does this, so this option is redundant. 14003 14004``-J' (JUMPify Longer Branches)' 14005 Many 32-bit computers permit a variety of branch instructions to 14006 do the same job. Some of these instructions are short (and fast) 14007 but have a limited range; others are long (and slow) but can 14008 branch anywhere in virtual memory. Often there are 3 flavors of 14009 branch: short, medium and long. Some other assemblers would emit 14010 short and medium branches, unless told by this option to emit 14011 short and long branches. 14012 14013``-t' (Temporary File Directory)' 14014 Some other assemblers may use a temporary file, and this option 14015 takes a filename being the directory to site the temporary file. 14016 Since `as' does not use a temporary disk file, this option makes 14017 no difference. `-t' needs exactly one filename. 14018 14019 The Vax version of the assembler accepts additional options when 14020compiled for VMS: 14021 14022`-h N' 14023 External symbol or section (used for global variables) names are 14024 not case sensitive on VAX/VMS and always mapped to upper case. 14025 This is contrary to the C language definition which explicitly 14026 distinguishes upper and lower case. To implement a standard 14027 conforming C compiler, names must be changed (mapped) to preserve 14028 the case information. The default mapping is to convert all lower 14029 case characters to uppercase and adding an underscore followed by 14030 a 6 digit hex value, representing a 24 digit binary value. The 14031 one digits in the binary value represent which characters are 14032 uppercase in the original symbol name. 14033 14034 The `-h N' option determines how we map names. This takes several 14035 values. No `-h' switch at all allows case hacking as described 14036 above. A value of zero (`-h0') implies names should be upper 14037 case, and inhibits the case hack. A value of 2 (`-h2') implies 14038 names should be all lower case, with no case hack. A value of 3 14039 (`-h3') implies that case should be preserved. The value 1 is 14040 unused. The `-H' option directs `as' to display every mapped 14041 symbol during assembly. 14042 14043 Symbols whose names include a dollar sign `$' are exceptions to the 14044 general name mapping. These symbols are normally only used to 14045 reference VMS library names. Such symbols are always mapped to 14046 upper case. 14047 14048`-+' 14049 The `-+' option causes `as' to truncate any symbol name larger 14050 than 31 characters. The `-+' option also prevents some code 14051 following the `_main' symbol normally added to make the object 14052 file compatible with Vax-11 "C". 14053 14054`-1' 14055 This option is ignored for backward compatibility with `as' 14056 version 1.x. 14057 14058`-H' 14059 The `-H' option causes `as' to print every symbol which was 14060 changed by case mapping. 14061 14062 14063File: as.info, Node: VAX-float, Next: VAX-directives, Prev: VAX-Opts, Up: Vax-Dependent 14064 140658.32.2 VAX Floating Point 14066------------------------- 14067 14068Conversion of flonums to floating point is correct, and compatible with 14069previous assemblers. Rounding is towards zero if the remainder is 14070exactly half the least significant bit. 14071 14072 `D', `F', `G' and `H' floating point formats are understood. 14073 14074 Immediate floating literals (_e.g._ `S`$6.9') are rendered 14075correctly. Again, rounding is towards zero in the boundary case. 14076 14077 The `.float' directive produces `f' format numbers. The `.double' 14078directive produces `d' format numbers. 14079 14080 14081File: as.info, Node: VAX-directives, Next: VAX-opcodes, Prev: VAX-float, Up: Vax-Dependent 14082 140838.32.3 Vax Machine Directives 14084----------------------------- 14085 14086The Vax version of the assembler supports four directives for 14087generating Vax floating point constants. They are described in the 14088table below. 14089 14090`.dfloat' 14091 This expects zero or more flonums, separated by commas, and 14092 assembles Vax `d' format 64-bit floating point constants. 14093 14094`.ffloat' 14095 This expects zero or more flonums, separated by commas, and 14096 assembles Vax `f' format 32-bit floating point constants. 14097 14098`.gfloat' 14099 This expects zero or more flonums, separated by commas, and 14100 assembles Vax `g' format 64-bit floating point constants. 14101 14102`.hfloat' 14103 This expects zero or more flonums, separated by commas, and 14104 assembles Vax `h' format 128-bit floating point constants. 14105 14106 14107 14108File: as.info, Node: VAX-opcodes, Next: VAX-branch, Prev: VAX-directives, Up: Vax-Dependent 14109 141108.32.4 VAX Opcodes 14111------------------ 14112 14113All DEC mnemonics are supported. Beware that `case...' instructions 14114have exactly 3 operands. The dispatch table that follows the `case...' 14115instruction should be made with `.word' statements. This is compatible 14116with all unix assemblers we know of. 14117 14118 14119File: as.info, Node: VAX-branch, Next: VAX-operands, Prev: VAX-opcodes, Up: Vax-Dependent 14120 141218.32.5 VAX Branch Improvement 14122----------------------------- 14123 14124Certain pseudo opcodes are permitted. They are for branch 14125instructions. They expand to the shortest branch instruction that 14126reaches the target. Generally these mnemonics are made by substituting 14127`j' for `b' at the start of a DEC mnemonic. This feature is included 14128both for compatibility and to help compilers. If you do not need this 14129feature, avoid these opcodes. Here are the mnemonics, and the code 14130they can expand into. 14131 14132`jbsb' 14133 `Jsb' is already an instruction mnemonic, so we chose `jbsb'. 14134 (byte displacement) 14135 `bsbb ...' 14136 14137 (word displacement) 14138 `bsbw ...' 14139 14140 (long displacement) 14141 `jsb ...' 14142 14143`jbr' 14144`jr' 14145 Unconditional branch. 14146 (byte displacement) 14147 `brb ...' 14148 14149 (word displacement) 14150 `brw ...' 14151 14152 (long displacement) 14153 `jmp ...' 14154 14155`jCOND' 14156 COND may be any one of the conditional branches `neq', `nequ', 14157 `eql', `eqlu', `gtr', `geq', `lss', `gtru', `lequ', `vc', `vs', 14158 `gequ', `cc', `lssu', `cs'. COND may also be one of the bit tests 14159 `bs', `bc', `bss', `bcs', `bsc', `bcc', `bssi', `bcci', `lbs', 14160 `lbc'. NOTCOND is the opposite condition to COND. 14161 (byte displacement) 14162 `bCOND ...' 14163 14164 (word displacement) 14165 `bNOTCOND foo ; brw ... ; foo:' 14166 14167 (long displacement) 14168 `bNOTCOND foo ; jmp ... ; foo:' 14169 14170`jacbX' 14171 X may be one of `b d f g h l w'. 14172 (word displacement) 14173 `OPCODE ...' 14174 14175 (long displacement) 14176 OPCODE ..., foo ; 14177 brb bar ; 14178 foo: jmp ... ; 14179 bar: 14180 14181`jaobYYY' 14182 YYY may be one of `lss leq'. 14183 14184`jsobZZZ' 14185 ZZZ may be one of `geq gtr'. 14186 (byte displacement) 14187 `OPCODE ...' 14188 14189 (word displacement) 14190 OPCODE ..., foo ; 14191 brb bar ; 14192 foo: brw DESTINATION ; 14193 bar: 14194 14195 (long displacement) 14196 OPCODE ..., foo ; 14197 brb bar ; 14198 foo: jmp DESTINATION ; 14199 bar: 14200 14201`aobleq' 14202`aoblss' 14203`sobgeq' 14204`sobgtr' 14205 14206 (byte displacement) 14207 `OPCODE ...' 14208 14209 (word displacement) 14210 OPCODE ..., foo ; 14211 brb bar ; 14212 foo: brw DESTINATION ; 14213 bar: 14214 14215 (long displacement) 14216 OPCODE ..., foo ; 14217 brb bar ; 14218 foo: jmp DESTINATION ; 14219 bar: 14220 14221 14222File: as.info, Node: VAX-operands, Next: VAX-no, Prev: VAX-branch, Up: Vax-Dependent 14223 142248.32.6 VAX Operands 14225------------------- 14226 14227The immediate character is `$' for Unix compatibility, not `#' as DEC 14228writes it. 14229 14230 The indirect character is `*' for Unix compatibility, not `@' as DEC 14231writes it. 14232 14233 The displacement sizing character is ``' (an accent grave) for Unix 14234compatibility, not `^' as DEC writes it. The letter preceding ``' may 14235have either case. `G' is not understood, but all other letters (`b i l 14236s w') are understood. 14237 14238 Register names understood are `r0 r1 r2 ... r15 ap fp sp pc'. Upper 14239and lower case letters are equivalent. 14240 14241 For instance 14242 tstb *w`$4(r5) 14243 14244 Any expression is permitted in an operand. Operands are comma 14245separated. 14246 14247 14248File: as.info, Node: VAX-no, Prev: VAX-operands, Up: Vax-Dependent 14249 142508.32.7 Not Supported on VAX 14251--------------------------- 14252 14253Vax bit fields can not be assembled with `as'. Someone can add the 14254required code if they really need it. 14255 14256 14257File: as.info, Node: V850-Dependent, Next: Xtensa-Dependent, Prev: TIC54X-Dependent, Up: Machine Dependencies 14258 142598.33 v850 Dependent Features 14260============================ 14261 14262* Menu: 14263 14264* V850 Options:: Options 14265* V850 Syntax:: Syntax 14266* V850 Floating Point:: Floating Point 14267* V850 Directives:: V850 Machine Directives 14268* V850 Opcodes:: Opcodes 14269 14270 14271File: as.info, Node: V850 Options, Next: V850 Syntax, Up: V850-Dependent 14272 142738.33.1 Options 14274-------------- 14275 14276`as' supports the following additional command-line options for the 14277V850 processor family: 14278 14279`-wsigned_overflow' 14280 Causes warnings to be produced when signed immediate values 14281 overflow the space available for then within their opcodes. By 14282 default this option is disabled as it is possible to receive 14283 spurious warnings due to using exact bit patterns as immediate 14284 constants. 14285 14286`-wunsigned_overflow' 14287 Causes warnings to be produced when unsigned immediate values 14288 overflow the space available for then within their opcodes. By 14289 default this option is disabled as it is possible to receive 14290 spurious warnings due to using exact bit patterns as immediate 14291 constants. 14292 14293`-mv850' 14294 Specifies that the assembled code should be marked as being 14295 targeted at the V850 processor. This allows the linker to detect 14296 attempts to link such code with code assembled for other 14297 processors. 14298 14299`-mv850e' 14300 Specifies that the assembled code should be marked as being 14301 targeted at the V850E processor. This allows the linker to detect 14302 attempts to link such code with code assembled for other 14303 processors. 14304 14305`-mv850e1' 14306 Specifies that the assembled code should be marked as being 14307 targeted at the V850E1 processor. This allows the linker to 14308 detect attempts to link such code with code assembled for other 14309 processors. 14310 14311`-mv850any' 14312 Specifies that the assembled code should be marked as being 14313 targeted at the V850 processor but support instructions that are 14314 specific to the extended variants of the process. This allows the 14315 production of binaries that contain target specific code, but 14316 which are also intended to be used in a generic fashion. For 14317 example libgcc.a contains generic routines used by the code 14318 produced by GCC for all versions of the v850 architecture, 14319 together with support routines only used by the V850E architecture. 14320 14321`-mrelax' 14322 Enables relaxation. This allows the .longcall and .longjump pseudo 14323 ops to be used in the assembler source code. These ops label 14324 sections of code which are either a long function call or a long 14325 branch. The assembler will then flag these sections of code and 14326 the linker will attempt to relax them. 14327 14328 14329 14330File: as.info, Node: V850 Syntax, Next: V850 Floating Point, Prev: V850 Options, Up: V850-Dependent 14331 143328.33.2 Syntax 14333------------- 14334 14335* Menu: 14336 14337* V850-Chars:: Special Characters 14338* V850-Regs:: Register Names 14339 14340 14341File: as.info, Node: V850-Chars, Next: V850-Regs, Up: V850 Syntax 14342 143438.33.2.1 Special Characters 14344........................... 14345 14346`#' is the line comment character. 14347 14348 14349File: as.info, Node: V850-Regs, Prev: V850-Chars, Up: V850 Syntax 14350 143518.33.2.2 Register Names 14352....................... 14353 14354`as' supports the following names for registers: 14355`general register 0' 14356 r0, zero 14357 14358`general register 1' 14359 r1 14360 14361`general register 2' 14362 r2, hp 14363 14364`general register 3' 14365 r3, sp 14366 14367`general register 4' 14368 r4, gp 14369 14370`general register 5' 14371 r5, tp 14372 14373`general register 6' 14374 r6 14375 14376`general register 7' 14377 r7 14378 14379`general register 8' 14380 r8 14381 14382`general register 9' 14383 r9 14384 14385`general register 10' 14386 r10 14387 14388`general register 11' 14389 r11 14390 14391`general register 12' 14392 r12 14393 14394`general register 13' 14395 r13 14396 14397`general register 14' 14398 r14 14399 14400`general register 15' 14401 r15 14402 14403`general register 16' 14404 r16 14405 14406`general register 17' 14407 r17 14408 14409`general register 18' 14410 r18 14411 14412`general register 19' 14413 r19 14414 14415`general register 20' 14416 r20 14417 14418`general register 21' 14419 r21 14420 14421`general register 22' 14422 r22 14423 14424`general register 23' 14425 r23 14426 14427`general register 24' 14428 r24 14429 14430`general register 25' 14431 r25 14432 14433`general register 26' 14434 r26 14435 14436`general register 27' 14437 r27 14438 14439`general register 28' 14440 r28 14441 14442`general register 29' 14443 r29 14444 14445`general register 30' 14446 r30, ep 14447 14448`general register 31' 14449 r31, lp 14450 14451`system register 0' 14452 eipc 14453 14454`system register 1' 14455 eipsw 14456 14457`system register 2' 14458 fepc 14459 14460`system register 3' 14461 fepsw 14462 14463`system register 4' 14464 ecr 14465 14466`system register 5' 14467 psw 14468 14469`system register 16' 14470 ctpc 14471 14472`system register 17' 14473 ctpsw 14474 14475`system register 18' 14476 dbpc 14477 14478`system register 19' 14479 dbpsw 14480 14481`system register 20' 14482 ctbp 14483 14484 14485File: as.info, Node: V850 Floating Point, Next: V850 Directives, Prev: V850 Syntax, Up: V850-Dependent 14486 144878.33.3 Floating Point 14488--------------------- 14489 14490The V850 family uses IEEE floating-point numbers. 14491 14492 14493File: as.info, Node: V850 Directives, Next: V850 Opcodes, Prev: V850 Floating Point, Up: V850-Dependent 14494 144958.33.4 V850 Machine Directives 14496------------------------------ 14497 14498`.offset <EXPRESSION>' 14499 Moves the offset into the current section to the specified amount. 14500 14501`.section "name", <type>' 14502 This is an extension to the standard .section directive. It sets 14503 the current section to be <type> and creates an alias for this 14504 section called "name". 14505 14506`.v850' 14507 Specifies that the assembled code should be marked as being 14508 targeted at the V850 processor. This allows the linker to detect 14509 attempts to link such code with code assembled for other 14510 processors. 14511 14512`.v850e' 14513 Specifies that the assembled code should be marked as being 14514 targeted at the V850E processor. This allows the linker to detect 14515 attempts to link such code with code assembled for other 14516 processors. 14517 14518`.v850e1' 14519 Specifies that the assembled code should be marked as being 14520 targeted at the V850E1 processor. This allows the linker to 14521 detect attempts to link such code with code assembled for other 14522 processors. 14523 14524 14525 14526File: as.info, Node: V850 Opcodes, Prev: V850 Directives, Up: V850-Dependent 14527 145288.33.5 Opcodes 14529-------------- 14530 14531`as' implements all the standard V850 opcodes. 14532 14533 `as' also implements the following pseudo ops: 14534 14535`hi0()' 14536 Computes the higher 16 bits of the given expression and stores it 14537 into the immediate operand field of the given instruction. For 14538 example: 14539 14540 `mulhi hi0(here - there), r5, r6' 14541 14542 computes the difference between the address of labels 'here' and 14543 'there', takes the upper 16 bits of this difference, shifts it 14544 down 16 bits and then mutliplies it by the lower 16 bits in 14545 register 5, putting the result into register 6. 14546 14547`lo()' 14548 Computes the lower 16 bits of the given expression and stores it 14549 into the immediate operand field of the given instruction. For 14550 example: 14551 14552 `addi lo(here - there), r5, r6' 14553 14554 computes the difference between the address of labels 'here' and 14555 'there', takes the lower 16 bits of this difference and adds it to 14556 register 5, putting the result into register 6. 14557 14558`hi()' 14559 Computes the higher 16 bits of the given expression and then adds 14560 the value of the most significant bit of the lower 16 bits of the 14561 expression and stores the result into the immediate operand field 14562 of the given instruction. For example the following code can be 14563 used to compute the address of the label 'here' and store it into 14564 register 6: 14565 14566 `movhi hi(here), r0, r6' `movea lo(here), r6, r6' 14567 14568 The reason for this special behaviour is that movea performs a sign 14569 extension on its immediate operand. So for example if the address 14570 of 'here' was 0xFFFFFFFF then without the special behaviour of the 14571 hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6, 14572 then the movea instruction would takes its immediate operand, 14573 0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it 14574 into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E). 14575 With the hi() pseudo op adding in the top bit of the lo() pseudo 14576 op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 = 14577 0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 - 14578 the right value. 14579 14580`hilo()' 14581 Computes the 32 bit value of the given expression and stores it 14582 into the immediate operand field of the given instruction (which 14583 must be a mov instruction). For example: 14584 14585 `mov hilo(here), r6' 14586 14587 computes the absolute address of label 'here' and puts the result 14588 into register 6. 14589 14590`sdaoff()' 14591 Computes the offset of the named variable from the start of the 14592 Small Data Area (whoes address is held in register 4, the GP 14593 register) and stores the result as a 16 bit signed value in the 14594 immediate operand field of the given instruction. For example: 14595 14596 `ld.w sdaoff(_a_variable)[gp],r6' 14597 14598 loads the contents of the location pointed to by the label 14599 '_a_variable' into register 6, provided that the label is located 14600 somewhere within +/- 32K of the address held in the GP register. 14601 [Note the linker assumes that the GP register contains a fixed 14602 address set to the address of the label called '__gp'. This can 14603 either be set up automatically by the linker, or specifically set 14604 by using the `--defsym __gp=<value>' command line option]. 14605 14606`tdaoff()' 14607 Computes the offset of the named variable from the start of the 14608 Tiny Data Area (whoes address is held in register 30, the EP 14609 register) and stores the result as a 4,5, 7 or 8 bit unsigned 14610 value in the immediate operand field of the given instruction. 14611 For example: 14612 14613 `sld.w tdaoff(_a_variable)[ep],r6' 14614 14615 loads the contents of the location pointed to by the label 14616 '_a_variable' into register 6, provided that the label is located 14617 somewhere within +256 bytes of the address held in the EP 14618 register. [Note the linker assumes that the EP register contains 14619 a fixed address set to the address of the label called '__ep'. 14620 This can either be set up automatically by the linker, or 14621 specifically set by using the `--defsym __ep=<value>' command line 14622 option]. 14623 14624`zdaoff()' 14625 Computes the offset of the named variable from address 0 and 14626 stores the result as a 16 bit signed value in the immediate 14627 operand field of the given instruction. For example: 14628 14629 `movea zdaoff(_a_variable),zero,r6' 14630 14631 puts the address of the label '_a_variable' into register 6, 14632 assuming that the label is somewhere within the first 32K of 14633 memory. (Strictly speaking it also possible to access the last 14634 32K of memory as well, as the offsets are signed). 14635 14636`ctoff()' 14637 Computes the offset of the named variable from the start of the 14638 Call Table Area (whoes address is helg in system register 20, the 14639 CTBP register) and stores the result a 6 or 16 bit unsigned value 14640 in the immediate field of then given instruction or piece of data. 14641 For example: 14642 14643 `callt ctoff(table_func1)' 14644 14645 will put the call the function whoes address is held in the call 14646 table at the location labeled 'table_func1'. 14647 14648`.longcall `name'' 14649 Indicates that the following sequence of instructions is a long 14650 call to function `name'. The linker will attempt to shorten this 14651 call sequence if `name' is within a 22bit offset of the call. Only 14652 valid if the `-mrelax' command line switch has been enabled. 14653 14654`.longjump `name'' 14655 Indicates that the following sequence of instructions is a long 14656 jump to label `name'. The linker will attempt to shorten this code 14657 sequence if `name' is within a 22bit offset of the jump. Only 14658 valid if the `-mrelax' command line switch has been enabled. 14659 14660 14661 For information on the V850 instruction set, see `V850 Family 1466232-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC. 14663Ltd. 14664 14665 14666File: as.info, Node: Xtensa-Dependent, Next: Z80-Dependent, Prev: V850-Dependent, Up: Machine Dependencies 14667 146688.34 Xtensa Dependent Features 14669============================== 14670 14671 This chapter covers features of the GNU assembler that are specific 14672to the Xtensa architecture. For details about the Xtensa instruction 14673set, please consult the `Xtensa Instruction Set Architecture (ISA) 14674Reference Manual'. 14675 14676* Menu: 14677 14678* Xtensa Options:: Command-line Options. 14679* Xtensa Syntax:: Assembler Syntax for Xtensa Processors. 14680* Xtensa Optimizations:: Assembler Optimizations. 14681* Xtensa Relaxation:: Other Automatic Transformations. 14682* Xtensa Directives:: Directives for Xtensa Processors. 14683 14684 14685File: as.info, Node: Xtensa Options, Next: Xtensa Syntax, Up: Xtensa-Dependent 14686 146878.34.1 Command Line Options 14688--------------------------- 14689 14690The Xtensa version of the GNU assembler supports these special options: 14691 14692`--text-section-literals | --no-text-section-literals' 14693 Control the treatment of literal pools. The default is 14694 `--no-text-section-literals', which places literals in a separate 14695 section in the output file. This allows the literal pool to be 14696 placed in a data RAM/ROM. With `--text-section-literals', the 14697 literals are interspersed in the text section in order to keep 14698 them as close as possible to their references. This may be 14699 necessary for large assembly files, where the literals would 14700 otherwise be out of range of the `L32R' instructions in the text 14701 section. These options only affect literals referenced via 14702 PC-relative `L32R' instructions; literals for absolute mode `L32R' 14703 instructions are handled separately. 14704 14705`--absolute-literals | --no-absolute-literals' 14706 Indicate to the assembler whether `L32R' instructions use absolute 14707 or PC-relative addressing. If the processor includes the absolute 14708 addressing option, the default is to use absolute `L32R' 14709 relocations. Otherwise, only the PC-relative `L32R' relocations 14710 can be used. 14711 14712`--target-align | --no-target-align' 14713 Enable or disable automatic alignment to reduce branch penalties 14714 at some expense in code size. *Note Automatic Instruction 14715 Alignment: Xtensa Automatic Alignment. This optimization is 14716 enabled by default. Note that the assembler will always align 14717 instructions like `LOOP' that have fixed alignment requirements. 14718 14719`--longcalls | --no-longcalls' 14720 Enable or disable transformation of call instructions to allow 14721 calls across a greater range of addresses. *Note Function Call 14722 Relaxation: Xtensa Call Relaxation. This option should be used 14723 when call targets can potentially be out of range. It may degrade 14724 both code size and performance, but the linker can generally 14725 optimize away the unnecessary overhead when a call ends up within 14726 range. The default is `--no-longcalls'. 14727 14728`--transform | --no-transform' 14729 Enable or disable all assembler transformations of Xtensa 14730 instructions, including both relaxation and optimization. The 14731 default is `--transform'; `--no-transform' should only be used in 14732 the rare cases when the instructions must be exactly as specified 14733 in the assembly source. Using `--no-transform' causes out of range 14734 instruction operands to be errors. 14735 14736`--rename-section OLDNAME=NEWNAME' 14737 Rename the OLDNAME section to NEWNAME. This option can be used 14738 multiple times to rename multiple sections. 14739 14740 14741File: as.info, Node: Xtensa Syntax, Next: Xtensa Optimizations, Prev: Xtensa Options, Up: Xtensa-Dependent 14742 147438.34.2 Assembler Syntax 14744----------------------- 14745 14746Block comments are delimited by `/*' and `*/'. End of line comments 14747may be introduced with either `#' or `//'. 14748 14749 Instructions consist of a leading opcode or macro name followed by 14750whitespace and an optional comma-separated list of operands: 14751 14752 OPCODE [OPERAND, ...] 14753 14754 Instructions must be separated by a newline or semicolon. 14755 14756 FLIX instructions, which bundle multiple opcodes together in a single 14757instruction, are specified by enclosing the bundled opcodes inside 14758braces: 14759 14760 { 14761 [FORMAT] 14762 OPCODE0 [OPERANDS] 14763 OPCODE1 [OPERANDS] 14764 OPCODE2 [OPERANDS] 14765 ... 14766 } 14767 14768 The opcodes in a FLIX instruction are listed in the same order as the 14769corresponding instruction slots in the TIE format declaration. 14770Directives and labels are not allowed inside the braces of a FLIX 14771instruction. A particular TIE format name can optionally be specified 14772immediately after the opening brace, but this is usually unnecessary. 14773The assembler will automatically search for a format that can encode the 14774specified opcodes, so the format name need only be specified in rare 14775cases where there is more than one applicable format and where it 14776matters which of those formats is used. A FLIX instruction can also be 14777specified on a single line by separating the opcodes with semicolons: 14778 14779 { [FORMAT;] OPCODE0 [OPERANDS]; OPCODE1 [OPERANDS]; OPCODE2 [OPERANDS]; ... } 14780 14781 The assembler can automatically bundle opcodes into FLIX 14782instructions. It encodes the opcodes in order, one at a time, choosing 14783the smallest format where each opcode can be encoded and filling unused 14784instruction slots with no-ops. 14785 14786* Menu: 14787 14788* Xtensa Opcodes:: Opcode Naming Conventions. 14789* Xtensa Registers:: Register Naming. 14790 14791 14792File: as.info, Node: Xtensa Opcodes, Next: Xtensa Registers, Up: Xtensa Syntax 14793 147948.34.2.1 Opcode Names 14795..................... 14796 14797See the `Xtensa Instruction Set Architecture (ISA) Reference Manual' 14798for a complete list of opcodes and descriptions of their semantics. 14799 14800 If an opcode name is prefixed with an underscore character (`_'), 14801`as' will not transform that instruction in any way. The underscore 14802prefix disables both optimization (*note Xtensa Optimizations: Xtensa 14803Optimizations.) and relaxation (*note Xtensa Relaxation: Xtensa 14804Relaxation.) for that particular instruction. Only use the underscore 14805prefix when it is essential to select the exact opcode produced by the 14806assembler. Using this feature unnecessarily makes the code less 14807efficient by disabling assembler optimization and less flexible by 14808disabling relaxation. 14809 14810 Note that this special handling of underscore prefixes only applies 14811to Xtensa opcodes, not to either built-in macros or user-defined macros. 14812When an underscore prefix is used with a macro (e.g., `_MOV'), it 14813refers to a different macro. The assembler generally provides built-in 14814macros both with and without the underscore prefix, where the underscore 14815versions behave as if the underscore carries through to the instructions 14816in the macros. For example, `_MOV' may expand to `_MOV.N'. 14817 14818 The underscore prefix only applies to individual instructions, not to 14819series of instructions. For example, if a series of instructions have 14820underscore prefixes, the assembler will not transform the individual 14821instructions, but it may insert other instructions between them (e.g., 14822to align a `LOOP' instruction). To prevent the assembler from 14823modifying a series of instructions as a whole, use the `no-transform' 14824directive. *Note transform: Transform Directive. 14825 14826 14827File: as.info, Node: Xtensa Registers, Prev: Xtensa Opcodes, Up: Xtensa Syntax 14828 148298.34.2.2 Register Names 14830....................... 14831 14832The assembly syntax for a register file entry is the "short" name for a 14833TIE register file followed by the index into that register file. For 14834example, the general-purpose `AR' register file has a short name of 14835`a', so these registers are named `a0'...`a15'. As a special feature, 14836`sp' is also supported as a synonym for `a1'. Additional registers may 14837be added by processor configuration options and by designer-defined TIE 14838extensions. An initial `$' character is optional in all register names. 14839 14840 14841File: as.info, Node: Xtensa Optimizations, Next: Xtensa Relaxation, Prev: Xtensa Syntax, Up: Xtensa-Dependent 14842 148438.34.3 Xtensa Optimizations 14844--------------------------- 14845 14846The optimizations currently supported by `as' are generation of density 14847instructions where appropriate and automatic branch target alignment. 14848 14849* Menu: 14850 14851* Density Instructions:: Using Density Instructions. 14852* Xtensa Automatic Alignment:: Automatic Instruction Alignment. 14853 14854 14855File: as.info, Node: Density Instructions, Next: Xtensa Automatic Alignment, Up: Xtensa Optimizations 14856 148578.34.3.1 Using Density Instructions 14858................................... 14859 14860The Xtensa instruction set has a code density option that provides 1486116-bit versions of some of the most commonly used opcodes. Use of these 14862opcodes can significantly reduce code size. When possible, the 14863assembler automatically translates instructions from the core Xtensa 14864instruction set into equivalent instructions from the Xtensa code 14865density option. This translation can be disabled by using underscore 14866prefixes (*note Opcode Names: Xtensa Opcodes.), by using the 14867`--no-transform' command-line option (*note Command Line Options: 14868Xtensa Options.), or by using the `no-transform' directive (*note 14869transform: Transform Directive.). 14870 14871 It is a good idea _not_ to use the density instructions directly. 14872The assembler will automatically select dense instructions where 14873possible. If you later need to use an Xtensa processor without the code 14874density option, the same assembly code will then work without 14875modification. 14876 14877 14878File: as.info, Node: Xtensa Automatic Alignment, Prev: Density Instructions, Up: Xtensa Optimizations 14879 148808.34.3.2 Automatic Instruction Alignment 14881........................................ 14882 14883The Xtensa assembler will automatically align certain instructions, both 14884to optimize performance and to satisfy architectural requirements. 14885 14886 As an optimization to improve performance, the assembler attempts to 14887align branch targets so they do not cross instruction fetch boundaries. 14888(Xtensa processors can be configured with either 32-bit or 64-bit 14889instruction fetch widths.) An instruction immediately following a call 14890is treated as a branch target in this context, because it will be the 14891target of a return from the call. This alignment has the potential to 14892reduce branch penalties at some expense in code size. The assembler 14893will not attempt to align labels with the prefixes `.Ln' and `.LM', 14894since these labels are used for debugging information and are not 14895typically branch targets. This optimization is enabled by default. 14896You can disable it with the `--no-target-align' command-line option 14897(*note Command Line Options: Xtensa Options.). 14898 14899 The target alignment optimization is done without adding instructions 14900that could increase the execution time of the program. If there are 14901density instructions in the code preceding a target, the assembler can 14902change the target alignment by widening some of those instructions to 14903the equivalent 24-bit instructions. Extra bytes of padding can be 14904inserted immediately following unconditional jump and return 14905instructions. This approach is usually successful in aligning many, 14906but not all, branch targets. 14907 14908 The `LOOP' family of instructions must be aligned such that the 14909first instruction in the loop body does not cross an instruction fetch 14910boundary (e.g., with a 32-bit fetch width, a `LOOP' instruction must be 14911on either a 1 or 2 mod 4 byte boundary). The assembler knows about 14912this restriction and inserts the minimal number of 2 or 3 byte no-op 14913instructions to satisfy it. When no-op instructions are added, any 14914label immediately preceding the original loop will be moved in order to 14915refer to the loop instruction, not the newly generated no-op 14916instruction. To preserve binary compatibility across processors with 14917different fetch widths, the assembler conservatively assumes a 32-bit 14918fetch width when aligning `LOOP' instructions (except if the first 14919instruction in the loop is a 64-bit instruction). 14920 14921 Similarly, the `ENTRY' instruction must be aligned on a 0 mod 4 byte 14922boundary. The assembler satisfies this requirement by inserting zero 14923bytes when required. In addition, labels immediately preceding the 14924`ENTRY' instruction will be moved to the newly aligned instruction 14925location. 14926 14927 14928File: as.info, Node: Xtensa Relaxation, Next: Xtensa Directives, Prev: Xtensa Optimizations, Up: Xtensa-Dependent 14929 149308.34.4 Xtensa Relaxation 14931------------------------ 14932 14933When an instruction operand is outside the range allowed for that 14934particular instruction field, `as' can transform the code to use a 14935functionally-equivalent instruction or sequence of instructions. This 14936process is known as "relaxation". This is typically done for branch 14937instructions because the distance of the branch targets is not known 14938until assembly-time. The Xtensa assembler offers branch relaxation and 14939also extends this concept to function calls, `MOVI' instructions and 14940other instructions with immediate fields. 14941 14942* Menu: 14943 14944* Xtensa Branch Relaxation:: Relaxation of Branches. 14945* Xtensa Call Relaxation:: Relaxation of Function Calls. 14946* Xtensa Immediate Relaxation:: Relaxation of other Immediate Fields. 14947 14948 14949File: as.info, Node: Xtensa Branch Relaxation, Next: Xtensa Call Relaxation, Up: Xtensa Relaxation 14950 149518.34.4.1 Conditional Branch Relaxation 14952...................................... 14953 14954When the target of a branch is too far away from the branch itself, 14955i.e., when the offset from the branch to the target is too large to fit 14956in the immediate field of the branch instruction, it may be necessary to 14957replace the branch with a branch around a jump. For example, 14958 14959 beqz a2, L 14960 14961 may result in: 14962 14963 bnez.n a2, M 14964 j L 14965 M: 14966 14967 (The `BNEZ.N' instruction would be used in this example only if the 14968density option is available. Otherwise, `BNEZ' would be used.) 14969 14970 This relaxation works well because the unconditional jump instruction 14971has a much larger offset range than the various conditional branches. 14972However, an error will occur if a branch target is beyond the range of a 14973jump instruction. `as' cannot relax unconditional jumps. Similarly, 14974an error will occur if the original input contains an unconditional 14975jump to a target that is out of range. 14976 14977 Branch relaxation is enabled by default. It can be disabled by using 14978underscore prefixes (*note Opcode Names: Xtensa Opcodes.), the 14979`--no-transform' command-line option (*note Command Line Options: 14980Xtensa Options.), or the `no-transform' directive (*note transform: 14981Transform Directive.). 14982 14983 14984File: as.info, Node: Xtensa Call Relaxation, Next: Xtensa Immediate Relaxation, Prev: Xtensa Branch Relaxation, Up: Xtensa Relaxation 14985 149868.34.4.2 Function Call Relaxation 14987................................. 14988 14989Function calls may require relaxation because the Xtensa immediate call 14990instructions (`CALL0', `CALL4', `CALL8' and `CALL12') provide a 14991PC-relative offset of only 512 Kbytes in either direction. For larger 14992programs, it may be necessary to use indirect calls (`CALLX0', 14993`CALLX4', `CALLX8' and `CALLX12') where the target address is specified 14994in a register. The Xtensa assembler can automatically relax immediate 14995call instructions into indirect call instructions. This relaxation is 14996done by loading the address of the called function into the callee's 14997return address register and then using a `CALLX' instruction. So, for 14998example: 14999 15000 call8 func 15001 15002 might be relaxed to: 15003 15004 .literal .L1, func 15005 l32r a8, .L1 15006 callx8 a8 15007 15008 Because the addresses of targets of function calls are not generally 15009known until link-time, the assembler must assume the worst and relax all 15010the calls to functions in other source files, not just those that really 15011will be out of range. The linker can recognize calls that were 15012unnecessarily relaxed, and it will remove the overhead introduced by the 15013assembler for those cases where direct calls are sufficient. 15014 15015 Call relaxation is disabled by default because it can have a negative 15016effect on both code size and performance, although the linker can 15017usually eliminate the unnecessary overhead. If a program is too large 15018and some of the calls are out of range, function call relaxation can be 15019enabled using the `--longcalls' command-line option or the `longcalls' 15020directive (*note longcalls: Longcalls Directive.). 15021 15022 15023File: as.info, Node: Xtensa Immediate Relaxation, Prev: Xtensa Call Relaxation, Up: Xtensa Relaxation 15024 150258.34.4.3 Other Immediate Field Relaxation 15026......................................... 15027 15028The assembler normally performs the following other relaxations. They 15029can be disabled by using underscore prefixes (*note Opcode Names: 15030Xtensa Opcodes.), the `--no-transform' command-line option (*note 15031Command Line Options: Xtensa Options.), or the `no-transform' directive 15032(*note transform: Transform Directive.). 15033 15034 The `MOVI' machine instruction can only materialize values in the 15035range from -2048 to 2047. Values outside this range are best 15036materialized with `L32R' instructions. Thus: 15037 15038 movi a0, 100000 15039 15040 is assembled into the following machine code: 15041 15042 .literal .L1, 100000 15043 l32r a0, .L1 15044 15045 The `L8UI' machine instruction can only be used with immediate 15046offsets in the range from 0 to 255. The `L16SI' and `L16UI' machine 15047instructions can only be used with offsets from 0 to 510. The `L32I' 15048machine instruction can only be used with offsets from 0 to 1020. A 15049load offset outside these ranges can be materalized with an `L32R' 15050instruction if the destination register of the load is different than 15051the source address register. For example: 15052 15053 l32i a1, a0, 2040 15054 15055 is translated to: 15056 15057 .literal .L1, 2040 15058 l32r a1, .L1 15059 addi a1, a0, a1 15060 l32i a1, a1, 0 15061 15062If the load destination and source address register are the same, an 15063out-of-range offset causes an error. 15064 15065 The Xtensa `ADDI' instruction only allows immediate operands in the 15066range from -128 to 127. There are a number of alternate instruction 15067sequences for the `ADDI' operation. First, if the immediate is 0, the 15068`ADDI' will be turned into a `MOV.N' instruction (or the equivalent 15069`OR' instruction if the code density option is not available). If the 15070`ADDI' immediate is outside of the range -128 to 127, but inside the 15071range -32896 to 32639, an `ADDMI' instruction or `ADDMI'/`ADDI' 15072sequence will be used. Finally, if the immediate is outside of this 15073range and a free register is available, an `L32R'/`ADD' sequence will 15074be used with a literal allocated from the literal pool. 15075 15076 For example: 15077 15078 addi a5, a6, 0 15079 addi a5, a6, 512 15080 addi a5, a6, 513 15081 addi a5, a6, 50000 15082 15083 is assembled into the following: 15084 15085 .literal .L1, 50000 15086 mov.n a5, a6 15087 addmi a5, a6, 0x200 15088 addmi a5, a6, 0x200 15089 addi a5, a5, 1 15090 l32r a5, .L1 15091 add a5, a6, a5 15092 15093 15094File: as.info, Node: Xtensa Directives, Prev: Xtensa Relaxation, Up: Xtensa-Dependent 15095 150968.34.5 Directives 15097----------------- 15098 15099The Xtensa assember supports a region-based directive syntax: 15100 15101 .begin DIRECTIVE [OPTIONS] 15102 ... 15103 .end DIRECTIVE 15104 15105 All the Xtensa-specific directives that apply to a region of code use 15106this syntax. 15107 15108 The directive applies to code between the `.begin' and the `.end'. 15109The state of the option after the `.end' reverts to what it was before 15110the `.begin'. A nested `.begin'/`.end' region can further change the 15111state of the directive without having to be aware of its outer state. 15112For example, consider: 15113 15114 .begin no-transform 15115 L: add a0, a1, a2 15116 .begin transform 15117 M: add a0, a1, a2 15118 .end transform 15119 N: add a0, a1, a2 15120 .end no-transform 15121 15122 The `ADD' opcodes at `L' and `N' in the outer `no-transform' region 15123both result in `ADD' machine instructions, but the assembler selects an 15124`ADD.N' instruction for the `ADD' at `M' in the inner `transform' 15125region. 15126 15127 The advantage of this style is that it works well inside macros 15128which can preserve the context of their callers. 15129 15130 The following directives are available: 15131 15132* Menu: 15133 15134* Schedule Directive:: Enable instruction scheduling. 15135* Longcalls Directive:: Use Indirect Calls for Greater Range. 15136* Transform Directive:: Disable All Assembler Transformations. 15137* Literal Directive:: Intermix Literals with Instructions. 15138* Literal Position Directive:: Specify Inline Literal Pool Locations. 15139* Literal Prefix Directive:: Specify Literal Section Name Prefix. 15140* Absolute Literals Directive:: Control PC-Relative vs. Absolute Literals. 15141 15142 15143File: as.info, Node: Schedule Directive, Next: Longcalls Directive, Up: Xtensa Directives 15144 151458.34.5.1 schedule 15146................. 15147 15148The `schedule' directive is recognized only for compatibility with 15149Tensilica's assembler. 15150 15151 .begin [no-]schedule 15152 .end [no-]schedule 15153 15154 This directive is ignored and has no effect on `as'. 15155 15156 15157File: as.info, Node: Longcalls Directive, Next: Transform Directive, Prev: Schedule Directive, Up: Xtensa Directives 15158 151598.34.5.2 longcalls 15160.................. 15161 15162The `longcalls' directive enables or disables function call relaxation. 15163*Note Function Call Relaxation: Xtensa Call Relaxation. 15164 15165 .begin [no-]longcalls 15166 .end [no-]longcalls 15167 15168 Call relaxation is disabled by default unless the `--longcalls' 15169command-line option is specified. The `longcalls' directive overrides 15170the default determined by the command-line options. 15171 15172 15173File: as.info, Node: Transform Directive, Next: Literal Directive, Prev: Longcalls Directive, Up: Xtensa Directives 15174 151758.34.5.3 transform 15176.................. 15177 15178This directive enables or disables all assembler transformation, 15179including relaxation (*note Xtensa Relaxation: Xtensa Relaxation.) and 15180optimization (*note Xtensa Optimizations: Xtensa Optimizations.). 15181 15182 .begin [no-]transform 15183 .end [no-]transform 15184 15185 Transformations are enabled by default unless the `--no-transform' 15186option is used. The `transform' directive overrides the default 15187determined by the command-line options. An underscore opcode prefix, 15188disabling transformation of that opcode, always takes precedence over 15189both directives and command-line flags. 15190 15191 15192File: as.info, Node: Literal Directive, Next: Literal Position Directive, Prev: Transform Directive, Up: Xtensa Directives 15193 151948.34.5.4 literal 15195................ 15196 15197The `.literal' directive is used to define literal pool data, i.e., 15198read-only 32-bit data accessed via `L32R' instructions. 15199 15200 .literal LABEL, VALUE[, VALUE...] 15201 15202 This directive is similar to the standard `.word' directive, except 15203that the actual location of the literal data is determined by the 15204assembler and linker, not by the position of the `.literal' directive. 15205Using this directive gives the assembler freedom to locate the literal 15206data in the most appropriate place and possibly to combine identical 15207literals. For example, the code: 15208 15209 entry sp, 40 15210 .literal .L1, sym 15211 l32r a4, .L1 15212 15213 can be used to load a pointer to the symbol `sym' into register 15214`a4'. The value of `sym' will not be placed between the `ENTRY' and 15215`L32R' instructions; instead, the assembler puts the data in a literal 15216pool. 15217 15218 Literal pools for absolute mode `L32R' instructions (*note Absolute 15219Literals Directive::) are placed in a separate `.lit4' section. By 15220default literal pools for PC-relative mode `L32R' instructions are 15221placed in a separate `.literal' section; however, when using the 15222`--text-section-literals' option (*note Command Line Options: Xtensa 15223Options.), the literal pools are placed in the current section. These 15224text section literal pools are created automatically before `ENTRY' 15225instructions and manually after `.literal_position' directives (*note 15226literal_position: Literal Position Directive.). If there are no 15227preceding `ENTRY' instructions, explicit `.literal_position' directives 15228must be used to place the text section literal pools; otherwise, `as' 15229will report an error. 15230 15231 15232File: as.info, Node: Literal Position Directive, Next: Literal Prefix Directive, Prev: Literal Directive, Up: Xtensa Directives 15233 152348.34.5.5 literal_position 15235......................... 15236 15237When using `--text-section-literals' to place literals inline in the 15238section being assembled, the `.literal_position' directive can be used 15239to mark a potential location for a literal pool. 15240 15241 .literal_position 15242 15243 The `.literal_position' directive is ignored when the 15244`--text-section-literals' option is not used or when `L32R' 15245instructions use the absolute addressing mode. 15246 15247 The assembler will automatically place text section literal pools 15248before `ENTRY' instructions, so the `.literal_position' directive is 15249only needed to specify some other location for a literal pool. You may 15250need to add an explicit jump instruction to skip over an inline literal 15251pool. 15252 15253 For example, an interrupt vector does not begin with an `ENTRY' 15254instruction so the assembler will be unable to automatically find a good 15255place to put a literal pool. Moreover, the code for the interrupt 15256vector must be at a specific starting address, so the literal pool 15257cannot come before the start of the code. The literal pool for the 15258vector must be explicitly positioned in the middle of the vector (before 15259any uses of the literals, due to the negative offsets used by 15260PC-relative `L32R' instructions). The `.literal_position' directive 15261can be used to do this. In the following code, the literal for `M' 15262will automatically be aligned correctly and is placed after the 15263unconditional jump. 15264 15265 .global M 15266 code_start: 15267 j continue 15268 .literal_position 15269 .align 4 15270 continue: 15271 movi a4, M 15272 15273 15274File: as.info, Node: Literal Prefix Directive, Next: Absolute Literals Directive, Prev: Literal Position Directive, Up: Xtensa Directives 15275 152768.34.5.6 literal_prefix 15277....................... 15278 15279The `literal_prefix' directive allows you to specify different sections 15280to hold literals from different portions of an assembly file. With 15281this directive, a single assembly file can be used to generate code 15282into multiple sections, including literals generated by the assembler. 15283 15284 .begin literal_prefix [NAME] 15285 .end literal_prefix 15286 15287 By default the assembler places literal pools in sections separate 15288from the instructions, using the default literal section names of 15289`.literal' for PC-relative mode `L32R' instructions and `.lit4' for 15290absolute mode `L32R' instructions (*note Absolute Literals 15291Directive::). The `literal_prefix' directive causes different literal 15292sections to be used for the code inside the delimited region. The new 15293literal sections are determined by including NAME as a prefix to the 15294default literal section names. If the NAME argument is omitted, the 15295literal sections revert to the defaults. This directive has no effect 15296when using the `--text-section-literals' option (*note Command Line 15297Options: Xtensa Options.). 15298 15299 Except for two special cases, the assembler determines the new 15300literal sections by simply prepending NAME to the default section names, 15301resulting in `NAME.literal' and `NAME.lit4' sections. The 15302`literal_prefix' directive is often used with the name of the current 15303text section as the prefix argument. To facilitate this usage, the 15304assembler uses special case rules when it recognizes NAME as a text 15305section name. First, if NAME ends with `.text', that suffix is not 15306included in the literal section name. For example, if NAME is 15307`.iram0.text', then the literal sections will be `.iram0.literal' and 15308`.iram0.lit4'. Second, if NAME begins with `.gnu.linkonce.t.', then 15309the literal section names are formed by replacing the `.t' substring 15310with `.literal' and `.lit4'. For example, if NAME is 15311`.gnu.linkonce.t.func', the literal sections will be 15312`.gnu.linkonce.literal.func' and `.gnu.linkonce.lit4.func'. 15313 15314 15315File: as.info, Node: Absolute Literals Directive, Prev: Literal Prefix Directive, Up: Xtensa Directives 15316 153178.34.5.7 absolute-literals 15318.......................... 15319 15320The `absolute-literals' and `no-absolute-literals' directives control 15321the absolute vs. PC-relative mode for `L32R' instructions. These are 15322relevant only for Xtensa configurations that include the absolute 15323addressing option for `L32R' instructions. 15324 15325 .begin [no-]absolute-literals 15326 .end [no-]absolute-literals 15327 15328 These directives do not change the `L32R' mode--they only cause the 15329assembler to emit the appropriate kind of relocation for `L32R' 15330instructions and to place the literal values in the appropriate section. 15331To change the `L32R' mode, the program must write the `LITBASE' special 15332register. It is the programmer's responsibility to keep track of the 15333mode and indicate to the assembler which mode is used in each region of 15334code. 15335 15336 If the Xtensa configuration includes the absolute `L32R' addressing 15337option, the default is to assume absolute `L32R' addressing unless the 15338`--no-absolute-literals' command-line option is specified. Otherwise, 15339the default is to assume PC-relative `L32R' addressing. The 15340`absolute-literals' directive can then be used to override the default 15341determined by the command-line options. 15342 15343 15344File: as.info, Node: Reporting Bugs, Next: Acknowledgements, Prev: Machine Dependencies, Up: Top 15345 153469 Reporting Bugs 15347**************** 15348 15349Your bug reports play an essential role in making `as' reliable. 15350 15351 Reporting a bug may help you by bringing a solution to your problem, 15352or it may not. But in any case the principal function of a bug report 15353is to help the entire community by making the next version of `as' work 15354better. Bug reports are your contribution to the maintenance of `as'. 15355 15356 In order for a bug report to serve its purpose, you must include the 15357information that enables us to fix the bug. 15358 15359* Menu: 15360 15361* Bug Criteria:: Have you found a bug? 15362* Bug Reporting:: How to report bugs 15363 15364 15365File: as.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs 15366 153679.1 Have You Found a Bug? 15368========================= 15369 15370If you are not sure whether you have found a bug, here are some 15371guidelines: 15372 15373 * If the assembler gets a fatal signal, for any input whatever, that 15374 is a `as' bug. Reliable assemblers never crash. 15375 15376 * If `as' produces an error message for valid input, that is a bug. 15377 15378 * If `as' does not produce an error message for invalid input, that 15379 is a bug. However, you should note that your idea of "invalid 15380 input" might be our idea of "an extension" or "support for 15381 traditional practice". 15382 15383 * If you are an experienced user of assemblers, your suggestions for 15384 improvement of `as' are welcome in any case. 15385 15386 15387File: as.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs 15388 153899.2 How to Report Bugs 15390====================== 15391 15392A number of companies and individuals offer support for GNU products. 15393If you obtained `as' from a support organization, we recommend you 15394contact that organization first. 15395 15396 You can find contact information for many support companies and 15397individuals in the file `etc/SERVICE' in the GNU Emacs distribution. 15398 15399 In any event, we also recommend that you send bug reports for `as' 15400to `bug-binutils@gnu.org'. 15401 15402 The fundamental principle of reporting bugs usefully is this: 15403*report all the facts*. If you are not sure whether to state a fact or 15404leave it out, state it! 15405 15406 Often people omit facts because they think they know what causes the 15407problem and assume that some details do not matter. Thus, you might 15408assume that the name of a symbol you use in an example does not matter. 15409Well, probably it does not, but one cannot be sure. Perhaps the bug is 15410a stray memory reference which happens to fetch from the location where 15411that name is stored in memory; perhaps, if the name were different, the 15412contents of that location would fool the assembler into doing the right 15413thing despite the bug. Play it safe and give a specific, complete 15414example. That is the easiest thing for you to do, and the most helpful. 15415 15416 Keep in mind that the purpose of a bug report is to enable us to fix 15417the bug if it is new to us. Therefore, always write your bug reports 15418on the assumption that the bug has not been reported previously. 15419 15420 Sometimes people give a few sketchy facts and ask, "Does this ring a 15421bell?" This cannot help us fix a bug, so it is basically useless. We 15422respond by asking for enough details to enable us to investigate. You 15423might as well expedite matters by sending them to begin with. 15424 15425 To enable us to fix the bug, you should include all these things: 15426 15427 * The version of `as'. `as' announces it if you start it with the 15428 `--version' argument. 15429 15430 Without this, we will not know whether there is any point in 15431 looking for the bug in the current version of `as'. 15432 15433 * Any patches you may have applied to the `as' source. 15434 15435 * The type of machine you are using, and the operating system name 15436 and version number. 15437 15438 * What compiler (and its version) was used to compile `as'--e.g. 15439 "`gcc-2.7'". 15440 15441 * The command arguments you gave the assembler to assemble your 15442 example and observe the bug. To guarantee you will not omit 15443 something important, list them all. A copy of the Makefile (or 15444 the output from make) is sufficient. 15445 15446 If we were to try to guess the arguments, we would probably guess 15447 wrong and then we might not encounter the bug. 15448 15449 * A complete input file that will reproduce the bug. If the bug is 15450 observed when the assembler is invoked via a compiler, send the 15451 assembler source, not the high level language source. Most 15452 compilers will produce the assembler source when run with the `-S' 15453 option. If you are using `gcc', use the options `-v 15454 --save-temps'; this will save the assembler source in a file with 15455 an extension of `.s', and also show you exactly how `as' is being 15456 run. 15457 15458 * A description of what behavior you observe that you believe is 15459 incorrect. For example, "It gets a fatal signal." 15460 15461 Of course, if the bug is that `as' gets a fatal signal, then we 15462 will certainly notice it. But if the bug is incorrect output, we 15463 might not notice unless it is glaringly wrong. You might as well 15464 not give us a chance to make a mistake. 15465 15466 Even if the problem you experience is a fatal signal, you should 15467 still say so explicitly. Suppose something strange is going on, 15468 such as, your copy of `as' is out of synch, or you have 15469 encountered a bug in the C library on your system. (This has 15470 happened!) Your copy might crash and ours would not. If you told 15471 us to expect a crash, then when ours fails to crash, we would know 15472 that the bug was not happening for us. If you had not told us to 15473 expect a crash, then we would not be able to draw any conclusion 15474 from our observations. 15475 15476 * If you wish to suggest changes to the `as' source, send us context 15477 diffs, as generated by `diff' with the `-u', `-c', or `-p' option. 15478 Always send diffs from the old file to the new file. If you even 15479 discuss something in the `as' source, refer to it by context, not 15480 by line number. 15481 15482 The line numbers in our development sources will not match those 15483 in your sources. Your line numbers would convey no useful 15484 information to us. 15485 15486 Here are some things that are not necessary: 15487 15488 * A description of the envelope of the bug. 15489 15490 Often people who encounter a bug spend a lot of time investigating 15491 which changes to the input file will make the bug go away and which 15492 changes will not affect it. 15493 15494 This is often time consuming and not very useful, because the way 15495 we will find the bug is by running a single example under the 15496 debugger with breakpoints, not by pure deduction from a series of 15497 examples. We recommend that you save your time for something else. 15498 15499 Of course, if you can find a simpler example to report _instead_ 15500 of the original one, that is a convenience for us. Errors in the 15501 output will be easier to spot, running under the debugger will take 15502 less time, and so on. 15503 15504 However, simplification is not vital; if you do not want to do 15505 this, report the bug anyway and send us the entire test case you 15506 used. 15507 15508 * A patch for the bug. 15509 15510 A patch for the bug does help us if it is a good one. But do not 15511 omit the necessary information, such as the test case, on the 15512 assumption that a patch is all we need. We might see problems 15513 with your patch and decide to fix the problem another way, or we 15514 might not understand it at all. 15515 15516 Sometimes with a program as complicated as `as' it is very hard to 15517 construct an example that will make the program follow a certain 15518 path through the code. If you do not send us the example, we will 15519 not be able to construct one, so we will not be able to verify 15520 that the bug is fixed. 15521 15522 And if we cannot understand what bug you are trying to fix, or why 15523 your patch should be an improvement, we will not install it. A 15524 test case will help us to understand. 15525 15526 * A guess about what the bug is or what it depends on. 15527 15528 Such guesses are usually wrong. Even we cannot guess right about 15529 such things without first using the debugger to find the facts. 15530 15531 15532File: as.info, Node: Acknowledgements, Next: GNU Free Documentation License, Prev: Reporting Bugs, Up: Top 15533 1553410 Acknowledgements 15535******************* 15536 15537If you have contributed to GAS and your name isn't listed here, it is 15538not meant as a slight. We just don't know about it. Send mail to the 15539maintainer, and we'll correct the situation. Currently the maintainer 15540is Ken Raeburn (email address `raeburn@cygnus.com'). 15541 15542 Dean Elsner wrote the original GNU assembler for the VAX.(1) 15543 15544 Jay Fenlason maintained GAS for a while, adding support for 15545GDB-specific debug information and the 68k series machines, most of the 15546preprocessing pass, and extensive changes in `messages.c', 15547`input-file.c', `write.c'. 15548 15549 K. Richard Pixley maintained GAS for a while, adding various 15550enhancements and many bug fixes, including merging support for several 15551processors, breaking GAS up to handle multiple object file format back 15552ends (including heavy rewrite, testing, an integration of the coff and 15553b.out back ends), adding configuration including heavy testing and 15554verification of cross assemblers and file splits and renaming, 15555converted GAS to strictly ANSI C including full prototypes, added 15556support for m680[34]0 and cpu32, did considerable work on i960 15557including a COFF port (including considerable amounts of reverse 15558engineering), a SPARC opcode file rewrite, DECstation, rs6000, and 15559hp300hpux host ports, updated "know" assertions and made them work, 15560much other reorganization, cleanup, and lint. 15561 15562 Ken Raeburn wrote the high-level BFD interface code to replace most 15563of the code in format-specific I/O modules. 15564 15565 The original VMS support was contributed by David L. Kashtan. Eric 15566Youngdale has done much work with it since. 15567 15568 The Intel 80386 machine description was written by Eliot Dresselhaus. 15569 15570 Minh Tran-Le at IntelliCorp contributed some AIX 386 support. 15571 15572 The Motorola 88k machine description was contributed by Devon Bowen 15573of Buffalo University and Torbjorn Granlund of the Swedish Institute of 15574Computer Science. 15575 15576 Keith Knowles at the Open Software Foundation wrote the original 15577MIPS back end (`tc-mips.c', `tc-mips.h'), and contributed Rose format 15578support (which hasn't been merged in yet). Ralph Campbell worked with 15579the MIPS code to support a.out format. 15580 15581 Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k, 15582tc-h8300), and IEEE 695 object file format (obj-ieee), was written by 15583Steve Chamberlain of Cygnus Support. Steve also modified the COFF back 15584end to use BFD for some low-level operations, for use with the H8/300 15585and AMD 29k targets. 15586 15587 John Gilmore built the AMD 29000 support, added `.include' support, 15588and simplified the configuration of which versions accept which 15589directives. He updated the 68k machine description so that Motorola's 15590opcodes always produced fixed-size instructions (e.g., `jsr'), while 15591synthetic instructions remained shrinkable (`jbsr'). John fixed many 15592bugs, including true tested cross-compilation support, and one bug in 15593relaxation that took a week and required the proverbial one-bit fix. 15594 15595 Ian Lance Taylor of Cygnus Support merged the Motorola and MIT 15596syntax for the 68k, completed support for some COFF targets (68k, i386 15597SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets, 15598wrote the initial RS/6000 and PowerPC assembler, and made a few other 15599minor patches. 15600 15601 Steve Chamberlain made GAS able to generate listings. 15602 15603 Hewlett-Packard contributed support for the HP9000/300. 15604 15605 Jeff Law wrote GAS and BFD support for the native HPPA object format 15606(SOM) along with a fairly extensive HPPA testsuite (for both SOM and 15607ELF object formats). This work was supported by both the Center for 15608Software Science at the University of Utah and Cygnus Support. 15609 15610 Support for ELF format files has been worked on by Mark Eichin of 15611Cygnus Support (original, incomplete implementation for SPARC), Pete 15612Hoogenboom and Jeff Law at the University of Utah (HPPA mainly), 15613Michael Meissner of the Open Software Foundation (i386 mainly), and Ken 15614Raeburn of Cygnus Support (sparc, and some initial 64-bit support). 15615 15616 Linas Vepstas added GAS support for the ESA/390 "IBM 370" 15617architecture. 15618 15619 Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote 15620GAS and BFD support for openVMS/Alpha. 15621 15622 Timothy Wall, Michael Hayes, and Greg Smart contributed to the 15623various tic* flavors. 15624 15625 David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from 15626Tensilica, Inc. added support for Xtensa processors. 15627 15628 Several engineers at Cygnus Support have also provided many small 15629bug fixes and configuration enhancements. 15630 15631 Many others have contributed large or small bugfixes and 15632enhancements. If you have contributed significant work and are not 15633mentioned on this list, and want to be, let us know. Some of the 15634history has been lost; we are not intentionally leaving anyone out. 15635 15636 ---------- Footnotes ---------- 15637 15638 (1) Any more details? 15639 15640 15641File: as.info, Node: GNU Free Documentation License, Next: Index, Prev: Acknowledgements, Up: Top 15642 15643Appendix A GNU Free Documentation License 15644***************************************** 15645 15646 Version 1.1, March 2000 15647 15648 Copyright (C) 2000, 2003 Free Software Foundation, Inc. 15649 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 15650 15651 Everyone is permitted to copy and distribute verbatim copies 15652 of this license document, but changing it is not allowed. 15653 15654 15655 0. PREAMBLE 15656 15657 The purpose of this License is to make a manual, textbook, or other 15658 written document "free" in the sense of freedom: to assure everyone 15659 the effective freedom to copy and redistribute it, with or without 15660 modifying it, either commercially or noncommercially. Secondarily, 15661 this License preserves for the author and publisher a way to get 15662 credit for their work, while not being considered responsible for 15663 modifications made by others. 15664 15665 This License is a kind of "copyleft", which means that derivative 15666 works of the document must themselves be free in the same sense. 15667 It complements the GNU General Public License, which is a copyleft 15668 license designed for free software. 15669 15670 We have designed this License in order to use it for manuals for 15671 free software, because free software needs free documentation: a 15672 free program should come with manuals providing the same freedoms 15673 that the software does. But this License is not limited to 15674 software manuals; it can be used for any textual work, regardless 15675 of subject matter or whether it is published as a printed book. 15676 We recommend this License principally for works whose purpose is 15677 instruction or reference. 15678 15679 15680 1. APPLICABILITY AND DEFINITIONS 15681 15682 This License applies to any manual or other work that contains a 15683 notice placed by the copyright holder saying it can be distributed 15684 under the terms of this License. The "Document", below, refers to 15685 any such manual or work. Any member of the public is a licensee, 15686 and is addressed as "you." 15687 15688 A "Modified Version" of the Document means any work containing the 15689 Document or a portion of it, either copied verbatim, or with 15690 modifications and/or translated into another language. 15691 15692 A "Secondary Section" is a named appendix or a front-matter 15693 section of the Document that deals exclusively with the 15694 relationship of the publishers or authors of the Document to the 15695 Document's overall subject (or to related matters) and contains 15696 nothing that could fall directly within that overall subject. 15697 (For example, if the Document is in part a textbook of 15698 mathematics, a Secondary Section may not explain any mathematics.) 15699 The relationship could be a matter of historical connection with 15700 the subject or with related matters, or of legal, commercial, 15701 philosophical, ethical or political position regarding them. 15702 15703 The "Invariant Sections" are certain Secondary Sections whose 15704 titles are designated, as being those of Invariant Sections, in 15705 the notice that says that the Document is released under this 15706 License. 15707 15708 The "Cover Texts" are certain short passages of text that are 15709 listed, as Front-Cover Texts or Back-Cover Texts, in the notice 15710 that says that the Document is released under this License. 15711 15712 A "Transparent" copy of the Document means a machine-readable copy, 15713 represented in a format whose specification is available to the 15714 general public, whose contents can be viewed and edited directly 15715 and straightforwardly with generic text editors or (for images 15716 composed of pixels) generic paint programs or (for drawings) some 15717 widely available drawing editor, and that is suitable for input to 15718 text formatters or for automatic translation to a variety of 15719 formats suitable for input to text formatters. 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For 15737 works in formats which do not have any title page as such, "Title 15738 Page" means the text near the most prominent appearance of the 15739 work's title, preceding the beginning of the body of the text. 15740 15741 2. VERBATIM COPYING 15742 15743 You may copy and distribute the Document in any medium, either 15744 commercially or noncommercially, provided that this License, the 15745 copyright notices, and the license notice saying this License 15746 applies to the Document are reproduced in all copies, and that you 15747 add no other conditions whatsoever to those of this License. You 15748 may not use technical measures to obstruct or control the reading 15749 or further copying of the copies you make or distribute. However, 15750 you may accept compensation in exchange for copies. If you 15751 distribute a large enough number of copies you must also follow 15752 the conditions in section 3. 15753 15754 You may also lend copies, under the same conditions stated above, 15755 and you may publicly display copies. 15756 15757 3. COPYING IN QUANTITY 15758 15759 If you publish printed copies of the Document numbering more than 15760 100, and the Document's license notice requires Cover Texts, you 15761 must enclose the copies in covers that carry, clearly and legibly, 15762 all these Cover Texts: Front-Cover Texts on the front cover, and 15763 Back-Cover Texts on the back cover. Both covers must also clearly 15764 and legibly identify you as the publisher of these copies. The 15765 front cover must present the full title with all words of the 15766 title equally prominent and visible. You may add other material 15767 on the covers in addition. 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If you use the 15785 latter option, you must take reasonably prudent steps, when you 15786 begin distribution of Opaque copies in quantity, to ensure that 15787 this Transparent copy will remain thus accessible at the stated 15788 location until at least one year after the last time you 15789 distribute an Opaque copy (directly or through your agents or 15790 retailers) of that edition to the public. 15791 15792 It is requested, but not required, that you contact the authors of 15793 the Document well before redistributing any large number of 15794 copies, to give them a chance to provide you with an updated 15795 version of the Document. 15796 15797 4. MODIFICATIONS 15798 15799 You may copy and distribute a Modified Version of the Document 15800 under the conditions of sections 2 and 3 above, provided that you 15801 release the Modified Version under precisely this License, with 15802 the Modified Version filling the role of the Document, thus 15803 licensing distribution and modification of the Modified Version to 15804 whoever possesses a copy of it. In addition, you must do these 15805 things in the Modified Version: 15806 15807 A. Use in the Title Page (and on the covers, if any) a title 15808 distinct from that of the Document, and from those of previous 15809 versions (which should, if there were any, be listed in the 15810 History section of the Document). You may use the same title 15811 as a previous version if the original publisher of that version 15812 gives permission. 15813 B. List on the Title Page, as authors, one or more persons or 15814 entities responsible for authorship of the modifications in the 15815 Modified Version, together with at least five of the principal 15816 authors of the Document (all of its principal authors, if it 15817 has less than five). 15818 C. State on the Title page the name of the publisher of the 15819 Modified Version, as the publisher. 15820 D. Preserve all the copyright notices of the Document. 15821 E. Add an appropriate copyright notice for your modifications 15822 adjacent to the other copyright notices. 15823 F. Include, immediately after the copyright notices, a license 15824 notice giving the public permission to use the Modified Version 15825 under the terms of this License, in the form shown in the 15826 Addendum below. 15827 G. Preserve in that license notice the full lists of Invariant 15828 Sections and required Cover Texts given in the Document's 15829 license notice. 15830 H. Include an unaltered copy of this License. 15831 I. Preserve the section entitled "History", and its title, and add 15832 to it an item stating at least the title, year, new authors, and 15833 publisher of the Modified Version as given on the Title Page. If 15834 there is no section entitled "History" in the Document, create 15835 one stating the title, year, authors, and publisher of the 15836 Document as given on its Title Page, then add an item 15837 describing the Modified Version as stated in the previous 15838 sentence. 15839 J. Preserve the network location, if any, given in the Document for 15840 public access to a Transparent copy of the Document, and likewise 15841 the network locations given in the Document for previous versions 15842 it was based on. These may be placed in the "History" section. 15843 You may omit a network location for a work that was published at 15844 least four years before the Document itself, or if the original 15845 publisher of the version it refers to gives permission. 15846 K. In any section entitled "Acknowledgements" or "Dedications", 15847 preserve the section's title, and preserve in the section all the 15848 substance and tone of each of the contributor acknowledgements 15849 and/or dedications given therein. 15850 L. Preserve all the Invariant Sections of the Document, 15851 unaltered in their text and in their titles. Section numbers 15852 or the equivalent are not considered part of the section titles. 15853 M. Delete any section entitled "Endorsements." Such a section 15854 may not be included in the Modified Version. 15855 N. Do not retitle any existing section as "Endorsements" or to 15856 conflict in title with any Invariant Section. 15857 15858 If the Modified Version includes new front-matter sections or 15859 appendices that qualify as Secondary Sections and contain no 15860 material copied from the Document, you may at your option 15861 designate some or all of these sections as invariant. To do this, 15862 add their titles to the list of Invariant Sections in the Modified 15863 Version's license notice. These titles must be distinct from any 15864 other section titles. 15865 15866 You may add a section entitled "Endorsements", provided it contains 15867 nothing but endorsements of your Modified Version by various 15868 parties-for example, statements of peer review or that the text has 15869 been approved by an organization as the authoritative definition 15870 of a standard. 15871 15872 You may add a passage of up to five words as a Front-Cover Text, 15873 and a passage of up to 25 words as a Back-Cover Text, to the end 15874 of the list of Cover Texts in the Modified Version. Only one 15875 passage of Front-Cover Text and one of Back-Cover Text may be 15876 added by (or through arrangements made by) any one entity. If the 15877 Document already includes a cover text for the same cover, 15878 previously added by you or by arrangement made by the same entity 15879 you are acting on behalf of, you may not add another; but you may 15880 replace the old one, on explicit permission from the previous 15881 publisher that added the old one. 15882 15883 The author(s) and publisher(s) of the Document do not by this 15884 License give permission to use their names for publicity for or to 15885 assert or imply endorsement of any Modified Version. 15886 15887 5. COMBINING DOCUMENTS 15888 15889 You may combine the Document with other documents released under 15890 this License, under the terms defined in section 4 above for 15891 modified versions, provided that you include in the combination 15892 all of the Invariant Sections of all of the original documents, 15893 unmodified, and list them all as Invariant Sections of your 15894 combined work in its license notice. 15895 15896 The combined work need only contain one copy of this License, and 15897 multiple identical Invariant Sections may be replaced with a single 15898 copy. If there are multiple Invariant Sections with the same name 15899 but different contents, make the title of each such section unique 15900 by adding at the end of it, in parentheses, the name of the 15901 original author or publisher of that section if known, or else a 15902 unique number. Make the same adjustment to the section titles in 15903 the list of Invariant Sections in the license notice of the 15904 combined work. 15905 15906 In the combination, you must combine any sections entitled 15907 "History" in the various original documents, forming one section 15908 entitled "History"; likewise combine any sections entitled 15909 "Acknowledgements", and any sections entitled "Dedications." You 15910 must delete all sections entitled "Endorsements." 15911 15912 6. COLLECTIONS OF DOCUMENTS 15913 15914 You may make a collection consisting of the Document and other 15915 documents released under this License, and replace the individual 15916 copies of this License in the various documents with a single copy 15917 that is included in the collection, provided that you follow the 15918 rules of this License for verbatim copying of each of the 15919 documents in all other respects. 15920 15921 You may extract a single document from such a collection, and 15922 distribute it individually under this License, provided you insert 15923 a copy of this License into the extracted document, and follow 15924 this License in all other respects regarding verbatim copying of 15925 that document. 15926 15927 7. AGGREGATION WITH INDEPENDENT WORKS 15928 15929 A compilation of the Document or its derivatives with other 15930 separate and independent documents or works, in or on a volume of 15931 a storage or distribution medium, does not as a whole count as a 15932 Modified Version of the Document, provided no compilation 15933 copyright is claimed for the compilation. Such a compilation is 15934 called an "aggregate", and this License does not apply to the 15935 other self-contained works thus compiled with the Document, on 15936 account of their being thus compiled, if they are not themselves 15937 derivative works of the Document. 15938 15939 If the Cover Text requirement of section 3 is applicable to these 15940 copies of the Document, then if the Document is less than one 15941 quarter of the entire aggregate, the Document's Cover Texts may be 15942 placed on covers that surround only the Document within the 15943 aggregate. Otherwise they must appear on covers around the whole 15944 aggregate. 15945 15946 8. TRANSLATION 15947 15948 Translation is considered a kind of modification, so you may 15949 distribute translations of the Document under the terms of section 15950 4. Replacing Invariant Sections with translations requires special 15951 permission from their copyright holders, but you may include 15952 translations of some or all Invariant Sections in addition to the 15953 original versions of these Invariant Sections. You may include a 15954 translation of this License provided that you also include the 15955 original English version of this License. In case of a 15956 disagreement between the translation and the original English 15957 version of this License, the original English version will prevail. 15958 15959 9. TERMINATION 15960 15961 You may not copy, modify, sublicense, or distribute the Document 15962 except as expressly provided for under this License. Any other 15963 attempt to copy, modify, sublicense or distribute the Document is 15964 void, and will automatically terminate your rights under this 15965 License. However, parties who have received copies, or rights, 15966 from you under this License will not have their licenses 15967 terminated so long as such parties remain in full compliance. 15968 15969 10. FUTURE REVISIONS OF THIS LICENSE 15970 15971 The Free Software Foundation may publish new, revised versions of 15972 the GNU Free Documentation License from time to time. Such new 15973 versions will be similar in spirit to the present version, but may 15974 differ in detail to address new problems or concerns. See 15975 http://www.gnu.org/copyleft/. 15976 15977 Each version of the License is given a distinguishing version 15978 number. If the Document specifies that a particular numbered 15979 version of this License "or any later version" applies to it, you 15980 have the option of following the terms and conditions either of 15981 that specified version or of any later version that has been 15982 published (not as a draft) by the Free Software Foundation. If 15983 the Document does not specify a version number of this License, 15984 you may choose any version ever published (not as a draft) by the 15985 Free Software Foundation. 15986 15987 15988ADDENDUM: How to use this License for your documents 15989==================================================== 15990 15991To use this License in a document you have written, include a copy of 15992the License in the document and put the following copyright and license 15993notices just after the title page: 15994 15995 Copyright (C) YEAR YOUR NAME. 15996 Permission is granted to copy, distribute and/or modify this document 15997 under the terms of the GNU Free Documentation License, Version 1.1 15998 or any later version published by the Free Software Foundation; 15999 with the Invariant Sections being LIST THEIR TITLES, with the 16000 Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST. 16001 A copy of the license is included in the section entitled "GNU 16002 Free Documentation License." 16003 16004 If you have no Invariant Sections, write "with no Invariant Sections" 16005instead of saying which ones are invariant. If you have no Front-Cover 16006Texts, write "no Front-Cover Texts" instead of "Front-Cover Texts being 16007LIST"; likewise for Back-Cover Texts. 16008 16009 If your document contains nontrivial examples of program code, we 16010recommend releasing these examples in parallel under your choice of 16011free software license, such as the GNU General Public License, to 16012permit their use in free software. 16013 16014 16015File: as.info, Node: Index, Prev: GNU Free Documentation License, Up: Top 16016 16017Index 16018***** 16019 16020[index] 16021* Menu: 16022 16023* #: Comments. (line 38) 16024* #APP: Preprocessing. (line 26) 16025* #NO_APP: Preprocessing. (line 26) 16026* $ in symbol names <1>: SH64-Chars. (line 10) 16027* $ in symbol names <2>: SH-Chars. (line 10) 16028* $ in symbol names <3>: D30V-Chars. (line 63) 16029* $ in symbol names: D10V-Chars. (line 46) 16030* $a: ARM Mapping Symbols. (line 9) 16031* $acos math builtin, TIC54X: TIC54X-Builtins. (line 10) 16032* $asin math builtin, TIC54X: TIC54X-Builtins. (line 13) 16033* $atan math builtin, TIC54X: TIC54X-Builtins. (line 16) 16034* $atan2 math builtin, TIC54X: TIC54X-Builtins. (line 19) 16035* $ceil math builtin, TIC54X: TIC54X-Builtins. (line 22) 16036* $cos math builtin, TIC54X: TIC54X-Builtins. (line 28) 16037* $cosh math builtin, TIC54X: TIC54X-Builtins. (line 25) 16038* $cvf math builtin, TIC54X: TIC54X-Builtins. (line 31) 16039* $cvi math builtin, TIC54X: TIC54X-Builtins. (line 34) 16040* $d: ARM Mapping Symbols. (line 15) 16041* $exp math builtin, TIC54X: TIC54X-Builtins. (line 37) 16042* $fabs math builtin, TIC54X: TIC54X-Builtins. (line 40) 16043* $firstch subsym builtin, TIC54X: TIC54X-Macros. (line 26) 16044* $floor math builtin, TIC54X: TIC54X-Builtins. (line 43) 16045* $fmod math builtin, TIC54X: TIC54X-Builtins. (line 47) 16046* $int math builtin, TIC54X: TIC54X-Builtins. (line 50) 16047* $iscons subsym builtin, TIC54X: TIC54X-Macros. (line 43) 16048* $isdefed subsym builtin, TIC54X: TIC54X-Macros. (line 34) 16049* $ismember subsym builtin, TIC54X: TIC54X-Macros. (line 38) 16050* $isname subsym builtin, TIC54X: TIC54X-Macros. (line 47) 16051* $isreg subsym builtin, TIC54X: TIC54X-Macros. (line 50) 16052* $lastch subsym builtin, TIC54X: TIC54X-Macros. (line 30) 16053* $ldexp math builtin, TIC54X: TIC54X-Builtins. (line 53) 16054* $log math builtin, TIC54X: TIC54X-Builtins. (line 59) 16055* $log10 math builtin, TIC54X: TIC54X-Builtins. (line 56) 16056* $max math builtin, TIC54X: TIC54X-Builtins. (line 62) 16057* $min math builtin, TIC54X: TIC54X-Builtins. (line 65) 16058* $pow math builtin, TIC54X: TIC54X-Builtins. (line 68) 16059* $round math builtin, TIC54X: TIC54X-Builtins. (line 71) 16060* $sgn math builtin, TIC54X: TIC54X-Builtins. (line 74) 16061* $sin math builtin, TIC54X: TIC54X-Builtins. (line 77) 16062* $sinh math builtin, TIC54X: TIC54X-Builtins. (line 80) 16063* $sqrt math builtin, TIC54X: TIC54X-Builtins. (line 83) 16064* $structacc subsym builtin, TIC54X: TIC54X-Macros. (line 57) 16065* $structsz subsym builtin, TIC54X: TIC54X-Macros. (line 54) 16066* $symcmp subsym builtin, TIC54X: TIC54X-Macros. (line 23) 16067* $symlen subsym builtin, TIC54X: TIC54X-Macros. (line 20) 16068* $t: ARM Mapping Symbols. (line 12) 16069* $tan math builtin, TIC54X: TIC54X-Builtins. (line 86) 16070* $tanh math builtin, TIC54X: TIC54X-Builtins. (line 89) 16071* $trunc math builtin, TIC54X: TIC54X-Builtins. (line 92) 16072* -+ option, VAX/VMS: VAX-Opts. (line 71) 16073* --: Command Line. (line 10) 16074* --32 option, i386: i386-Options. (line 8) 16075* --32 option, x86-64: i386-Options. (line 8) 16076* --64 option, i386: i386-Options. (line 8) 16077* --64 option, x86-64: i386-Options. (line 8) 16078* --absolute-literals: Xtensa Options. (line 22) 16079* --allow-reg-prefix: SH Options. (line 9) 16080* --alternate: alternate. (line 6) 16081* --base-size-default-16: M68K-Opts. (line 70) 16082* --base-size-default-32: M68K-Opts. (line 70) 16083* --big: SH Options. (line 9) 16084* --bitwise-or option, M680x0: M68K-Opts. (line 63) 16085* --disp-size-default-16: M68K-Opts. (line 79) 16086* --disp-size-default-32: M68K-Opts. (line 79) 16087* --divide option, i386: i386-Options. (line 24) 16088* --dsp: SH Options. (line 9) 16089* --emulation=crisaout command line option, CRIS: CRIS-Opts. (line 9) 16090* --emulation=criself command line option, CRIS: CRIS-Opts. (line 9) 16091* --enforce-aligned-data: Sparc-Aligned-Data. (line 11) 16092* --fatal-warnings: W. (line 16) 16093* --fixed-special-register-names command line option, MMIX: MMIX-Opts. 16094 (line 8) 16095* --force-long-branchs: M68HC11-Opts. (line 69) 16096* --generate-example: M68HC11-Opts. (line 86) 16097* --globalize-symbols command line option, MMIX: MMIX-Opts. (line 12) 16098* --gnu-syntax command line option, MMIX: MMIX-Opts. (line 16) 16099* --hash-size=NUMBER: Overview. (line 297) 16100* --linker-allocated-gregs command line option, MMIX: MMIX-Opts. 16101 (line 67) 16102* --listing-cont-lines: listing. (line 33) 16103* --listing-lhs-width: listing. (line 15) 16104* --listing-lhs-width2: listing. (line 20) 16105* --listing-rhs-width: listing. (line 27) 16106* --little: SH Options. (line 9) 16107* --longcalls: Xtensa Options. (line 36) 16108* --march=ARCHITECTURE command line option, CRIS: CRIS-Opts. (line 33) 16109* --MD: MD. (line 6) 16110* --mul-bug-abort command line option, CRIS: CRIS-Opts. (line 61) 16111* --no-absolute-literals: Xtensa Options. (line 22) 16112* --no-expand command line option, MMIX: MMIX-Opts. (line 31) 16113* --no-longcalls: Xtensa Options. (line 36) 16114* --no-merge-gregs command line option, MMIX: MMIX-Opts. (line 36) 16115* --no-mul-bug-abort command line option, CRIS: CRIS-Opts. (line 61) 16116* --no-predefined-syms command line option, MMIX: MMIX-Opts. (line 22) 16117* --no-pushj-stubs command line option, MMIX: MMIX-Opts. (line 54) 16118* --no-stubs command line option, MMIX: MMIX-Opts. (line 54) 16119* --no-target-align: Xtensa Options. (line 29) 16120* --no-text-section-literals: Xtensa Options. (line 9) 16121* --no-transform: Xtensa Options. (line 45) 16122* --no-underscore command line option, CRIS: CRIS-Opts. (line 15) 16123* --no-warn: W. (line 11) 16124* --pcrel: M68K-Opts. (line 91) 16125* --pic command line option, CRIS: CRIS-Opts. (line 27) 16126* --print-insn-syntax: M68HC11-Opts. (line 75) 16127* --print-opcodes: M68HC11-Opts. (line 79) 16128* --register-prefix-optional option, M680x0: M68K-Opts. (line 50) 16129* --relax: SH Options. (line 9) 16130* --relax command line option, MMIX: MMIX-Opts. (line 19) 16131* --rename-section: Xtensa Options. (line 53) 16132* --renesas: SH Options. (line 9) 16133* --short-branchs: M68HC11-Opts. (line 54) 16134* --small: SH Options. (line 9) 16135* --statistics: statistics. (line 6) 16136* --strict-direct-mode: M68HC11-Opts. (line 44) 16137* --target-align: Xtensa Options. (line 29) 16138* --text-section-literals: Xtensa Options. (line 9) 16139* --traditional-format: traditional-format. (line 6) 16140* --transform: Xtensa Options. (line 45) 16141* --underscore command line option, CRIS: CRIS-Opts. (line 15) 16142* --warn: W. (line 19) 16143* -1 option, VAX/VMS: VAX-Opts. (line 77) 16144* -32addr command line option, Alpha: Alpha Options. (line 50) 16145* -a: a. (line 6) 16146* -A options, i960: Options-i960. (line 6) 16147* -ac: a. (line 6) 16148* -ad: a. (line 6) 16149* -ah: a. (line 6) 16150* -al: a. (line 6) 16151* -an: a. (line 6) 16152* -as: a. (line 6) 16153* -Asparclet: Sparc-Opts. (line 25) 16154* -Asparclite: Sparc-Opts. (line 25) 16155* -Av6: Sparc-Opts. (line 25) 16156* -Av8: Sparc-Opts. (line 25) 16157* -Av9: Sparc-Opts. (line 25) 16158* -Av9a: Sparc-Opts. (line 25) 16159* -b option, i960: Options-i960. (line 22) 16160* -big option, M32R: M32R-Opts. (line 35) 16161* -construct-floats: MIPS Opts. (line 157) 16162* -D: D. (line 6) 16163* -D, ignored on VAX: VAX-Opts. (line 11) 16164* -d, VAX option: VAX-Opts. (line 16) 16165* -eabi= command line option, ARM: ARM Options. (line 107) 16166* -EB command line option, ARC: ARC Options. (line 31) 16167* -EB command line option, ARM: ARM Options. (line 112) 16168* -EB option (MIPS): MIPS Opts. (line 13) 16169* -EB option, M32R: M32R-Opts. (line 39) 16170* -EL command line option, ARC: ARC Options. (line 35) 16171* -EL command line option, ARM: ARM Options. (line 116) 16172* -EL option (MIPS): MIPS Opts. (line 13) 16173* -EL option, M32R: M32R-Opts. (line 32) 16174* -f: f. (line 6) 16175* -F command line option, Alpha: Alpha Options. (line 50) 16176* -G command line option, Alpha: Alpha Options. (line 46) 16177* -g command line option, Alpha: Alpha Options. (line 40) 16178* -G option (MIPS): MIPS Opts. (line 8) 16179* -H option, VAX/VMS: VAX-Opts. (line 81) 16180* -h option, VAX/VMS: VAX-Opts. (line 45) 16181* -I PATH: I. (line 6) 16182* -ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 87) 16183* -Ip option, M32RX: M32R-Opts. (line 97) 16184* -J, ignored on VAX: VAX-Opts. (line 27) 16185* -K: K. (line 6) 16186* -k command line option, ARM: ARM Options. (line 120) 16187* -KPIC option, M32R: M32R-Opts. (line 42) 16188* -L: L. (line 6) 16189* -l option, M680x0: M68K-Opts. (line 38) 16190* -little option, M32R: M32R-Opts. (line 27) 16191* -M: M. (line 6) 16192* -m11/03: PDP-11-Options. (line 140) 16193* -m11/04: PDP-11-Options. (line 143) 16194* -m11/05: PDP-11-Options. (line 146) 16195* -m11/10: PDP-11-Options. (line 146) 16196* -m11/15: PDP-11-Options. (line 149) 16197* -m11/20: PDP-11-Options. (line 149) 16198* -m11/21: PDP-11-Options. (line 152) 16199* -m11/23: PDP-11-Options. (line 155) 16200* -m11/24: PDP-11-Options. (line 155) 16201* -m11/34: PDP-11-Options. (line 158) 16202* -m11/34a: PDP-11-Options. (line 161) 16203* -m11/35: PDP-11-Options. (line 164) 16204* -m11/40: PDP-11-Options. (line 164) 16205* -m11/44: PDP-11-Options. (line 167) 16206* -m11/45: PDP-11-Options. (line 170) 16207* -m11/50: PDP-11-Options. (line 170) 16208* -m11/53: PDP-11-Options. (line 173) 16209* -m11/55: PDP-11-Options. (line 170) 16210* -m11/60: PDP-11-Options. (line 176) 16211* -m11/70: PDP-11-Options. (line 170) 16212* -m11/73: PDP-11-Options. (line 173) 16213* -m11/83: PDP-11-Options. (line 173) 16214* -m11/84: PDP-11-Options. (line 173) 16215* -m11/93: PDP-11-Options. (line 173) 16216* -m11/94: PDP-11-Options. (line 173) 16217* -m16c option, M16C: M32C-Opts. (line 12) 16218* -m32c option, M32C: M32C-Opts. (line 9) 16219* -m32r option, M32R: M32R-Opts. (line 21) 16220* -m32rx option, M32R2: M32R-Opts. (line 17) 16221* -m32rx option, M32RX: M32R-Opts. (line 9) 16222* -m68000 and related options: M68K-Opts. (line 103) 16223* -m68hc11: M68HC11-Opts. (line 9) 16224* -m68hc12: M68HC11-Opts. (line 14) 16225* -m68hcs12: M68HC11-Opts. (line 21) 16226* -m[no-]68851 command line option, M680x0: M68K-Opts. (line 20) 16227* -m[no-]68881 command line option, M680x0: M68K-Opts. (line 20) 16228* -m[no-]div command line option, M680x0: M68K-Opts. (line 20) 16229* -m[no-]emac command line option, M680x0: M68K-Opts. (line 20) 16230* -m[no-]float command line option, M680x0: M68K-Opts. (line 20) 16231* -m[no-]mac command line option, M680x0: M68K-Opts. (line 20) 16232* -m[no-]usp command line option, M680x0: M68K-Opts. (line 20) 16233* -mall: PDP-11-Options. (line 26) 16234* -mall-extensions: PDP-11-Options. (line 26) 16235* -mapcs command line option, ARM: ARM Options. (line 80) 16236* -mapcs-float command line option, ARM: ARM Options. (line 93) 16237* -mapcs-reentrant command line option, ARM: ARM Options. (line 98) 16238* -marc[5|6|7|8] command line option, ARC: ARC Options. (line 6) 16239* -march= command line option, ARM: ARM Options. (line 37) 16240* -march= command line option, M680x0: M68K-Opts. (line 8) 16241* -matpcs command line option, ARM: ARM Options. (line 85) 16242* -mcis: PDP-11-Options. (line 32) 16243* -mconstant-gp command line option, IA-64: IA-64 Options. (line 6) 16244* -mCPU command line option, Alpha: Alpha Options. (line 6) 16245* -mcpu option, cpu: TIC54X-Opts. (line 15) 16246* -mcpu= command line option, ARM: ARM Options. (line 6) 16247* -mcpu= command line option, M680x0: M68K-Opts. (line 13) 16248* -mcsm: PDP-11-Options. (line 43) 16249* -mdebug command line option, Alpha: Alpha Options. (line 25) 16250* -me option, stderr redirect: TIC54X-Opts. (line 20) 16251* -meis: PDP-11-Options. (line 46) 16252* -merrors-to-file option, stderr redirect: TIC54X-Opts. (line 20) 16253* -mf option, far-mode: TIC54X-Opts. (line 8) 16254* -mf11: PDP-11-Options. (line 122) 16255* -mfar-mode option, far-mode: TIC54X-Opts. (line 8) 16256* -mfis: PDP-11-Options. (line 51) 16257* -mfloat-abi= command line option, ARM: ARM Options. (line 102) 16258* -mfp-11: PDP-11-Options. (line 56) 16259* -mfpp: PDP-11-Options. (line 56) 16260* -mfpu: PDP-11-Options. (line 56) 16261* -mfpu= command line option, ARM: ARM Options. (line 52) 16262* -mip2022 option, IP2K: IP2K-Opts. (line 14) 16263* -mip2022ext option, IP2022: IP2K-Opts. (line 9) 16264* -mj11: PDP-11-Options. (line 126) 16265* -mka11: PDP-11-Options. (line 92) 16266* -mkb11: PDP-11-Options. (line 95) 16267* -mkd11a: PDP-11-Options. (line 98) 16268* -mkd11b: PDP-11-Options. (line 101) 16269* -mkd11d: PDP-11-Options. (line 104) 16270* -mkd11e: PDP-11-Options. (line 107) 16271* -mkd11f: PDP-11-Options. (line 110) 16272* -mkd11h: PDP-11-Options. (line 110) 16273* -mkd11k: PDP-11-Options. (line 114) 16274* -mkd11q: PDP-11-Options. (line 110) 16275* -mkd11z: PDP-11-Options. (line 118) 16276* -mkev11: PDP-11-Options. (line 51) 16277* -mlimited-eis: PDP-11-Options. (line 64) 16278* -mlong: M68HC11-Opts. (line 32) 16279* -mlong-double: M68HC11-Opts. (line 40) 16280* -mmfpt: PDP-11-Options. (line 70) 16281* -mmicrocode: PDP-11-Options. (line 83) 16282* -mmutiproc: PDP-11-Options. (line 73) 16283* -mmxps: PDP-11-Options. (line 77) 16284* -mno-cis: PDP-11-Options. (line 32) 16285* -mno-csm: PDP-11-Options. (line 43) 16286* -mno-eis: PDP-11-Options. (line 46) 16287* -mno-extensions: PDP-11-Options. (line 29) 16288* -mno-fis: PDP-11-Options. (line 51) 16289* -mno-fp-11: PDP-11-Options. (line 56) 16290* -mno-fpp: PDP-11-Options. (line 56) 16291* -mno-fpu: PDP-11-Options. (line 56) 16292* -mno-kev11: PDP-11-Options. (line 51) 16293* -mno-limited-eis: PDP-11-Options. (line 64) 16294* -mno-mfpt: PDP-11-Options. (line 70) 16295* -mno-microcode: PDP-11-Options. (line 83) 16296* -mno-mutiproc: PDP-11-Options. (line 73) 16297* -mno-mxps: PDP-11-Options. (line 77) 16298* -mno-pic: PDP-11-Options. (line 11) 16299* -mno-spl: PDP-11-Options. (line 80) 16300* -mno-sym32: MIPS Opts. (line 145) 16301* -mpic: PDP-11-Options. (line 11) 16302* -mrelax command line option, V850: V850 Options. (line 51) 16303* -mshort: M68HC11-Opts. (line 27) 16304* -mshort-double: M68HC11-Opts. (line 36) 16305* -mspl: PDP-11-Options. (line 80) 16306* -msym32: MIPS Opts. (line 145) 16307* -mt11: PDP-11-Options. (line 130) 16308* -mthumb command line option, ARM: ARM Options. (line 71) 16309* -mthumb-interwork command line option, ARM: ARM Options. (line 76) 16310* -mv850 command line option, V850: V850 Options. (line 23) 16311* -mv850any command line option, V850: V850 Options. (line 41) 16312* -mv850e command line option, V850: V850 Options. (line 29) 16313* -mv850e1 command line option, V850: V850 Options. (line 35) 16314* -N command line option, CRIS: CRIS-Opts. (line 57) 16315* -nIp option, M32RX: M32R-Opts. (line 101) 16316* -no-bitinst, M32R2: M32R-Opts. (line 54) 16317* -no-construct-floats: MIPS Opts. (line 157) 16318* -no-ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 93) 16319* -no-mdebug command line option, Alpha: Alpha Options. (line 25) 16320* -no-parallel option, M32RX: M32R-Opts. (line 51) 16321* -no-relax option, i960: Options-i960. (line 66) 16322* -no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. 16323 (line 79) 16324* -no-warn-unmatched-high option, M32R: M32R-Opts. (line 111) 16325* -nocpp ignored (MIPS): MIPS Opts. (line 148) 16326* -o: o. (line 6) 16327* -O option, M32RX: M32R-Opts. (line 59) 16328* -parallel option, M32RX: M32R-Opts. (line 46) 16329* -R: R. (line 6) 16330* -r800 command line option, Z80: Z80 Options. (line 41) 16331* -relax command line option, Alpha: Alpha Options. (line 32) 16332* -S, ignored on VAX: VAX-Opts. (line 11) 16333* -t, ignored on VAX: VAX-Opts. (line 36) 16334* -T, ignored on VAX: VAX-Opts. (line 11) 16335* -v: v. (line 6) 16336* -V, redundant on VAX: VAX-Opts. (line 22) 16337* -version: v. (line 6) 16338* -W: W. (line 11) 16339* -warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. (line 65) 16340* -warn-unmatched-high option, M32R: M32R-Opts. (line 105) 16341* -Wnp option, M32RX: M32R-Opts. (line 83) 16342* -Wnuh option, M32RX: M32R-Opts. (line 117) 16343* -Wp option, M32RX: M32R-Opts. (line 75) 16344* -wsigned_overflow command line option, V850: V850 Options. (line 9) 16345* -Wuh option, M32RX: M32R-Opts. (line 114) 16346* -wunsigned_overflow command line option, V850: V850 Options. 16347 (line 16) 16348* -x command line option, MMIX: MMIX-Opts. (line 44) 16349* -z80 command line option, Z80: Z80 Options. (line 8) 16350* -z8001 command line option, Z8000: Z8000 Options. (line 6) 16351* -z8002 command line option, Z8000: Z8000 Options. (line 9) 16352* . (symbol): Dot. (line 6) 16353* .arch directive, ARM: ARM Directives. (line 164) 16354* .big directive, M32RX: M32R-Directives. (line 88) 16355* .cantunwind directive, ARM: ARM Directives. (line 87) 16356* .cpu directive, ARM: ARM Directives. (line 160) 16357* .eabi_attribute directive, ARM: ARM Directives. (line 172) 16358* .fnend directive, ARM: ARM Directives. (line 78) 16359* .fnstart directive, ARM: ARM Directives. (line 75) 16360* .fpu directive, ARM: ARM Directives. (line 168) 16361* .handlerdata directive, ARM: ARM Directives. (line 98) 16362* .insn: MIPS insn. (line 6) 16363* .little directive, M32RX: M32R-Directives. (line 82) 16364* .ltorg directive, ARM: ARM Directives. (line 58) 16365* .m32r directive, M32R: M32R-Directives. (line 66) 16366* .m32r2 directive, M32R2: M32R-Directives. (line 77) 16367* .m32rx directive, M32RX: M32R-Directives. (line 72) 16368* .movsp directive, ARM: ARM Directives. (line 136) 16369* .o: Object. (line 6) 16370* .pad directive, ARM: ARM Directives. (line 131) 16371* .param on HPPA: HPPA Directives. (line 19) 16372* .personality directive, ARM: ARM Directives. (line 91) 16373* .personalityindex directive, ARM: ARM Directives. (line 94) 16374* .pool directive, ARM: ARM Directives. (line 72) 16375* .save directive, ARM: ARM Directives. (line 107) 16376* .set autoextend: MIPS autoextend. (line 6) 16377* .set dsp: MIPS ASE instruction generation overrides. 16378 (line 16) 16379* .set mdmx: MIPS ASE instruction generation overrides. 16380 (line 11) 16381* .set mips3d: MIPS ASE instruction generation overrides. 16382 (line 6) 16383* .set mipsN: MIPS ISA. (line 6) 16384* .set mt: MIPS ASE instruction generation overrides. 16385 (line 21) 16386* .set noautoextend: MIPS autoextend. (line 6) 16387* .set nodsp: MIPS ASE instruction generation overrides. 16388 (line 16) 16389* .set nomdmx: MIPS ASE instruction generation overrides. 16390 (line 11) 16391* .set nomips3d: MIPS ASE instruction generation overrides. 16392 (line 6) 16393* .set nomt: MIPS ASE instruction generation overrides. 16394 (line 21) 16395* .set nosym32: MIPS symbol sizes. (line 6) 16396* .set pop: MIPS option stack. (line 6) 16397* .set push: MIPS option stack. (line 6) 16398* .set sym32: MIPS symbol sizes. (line 6) 16399* .setfp directive, ARM: ARM Directives. (line 139) 16400* .unwind_raw directive, ARM: ARM Directives. (line 153) 16401* .v850 directive, V850: V850 Directives. (line 14) 16402* .v850e directive, V850: V850 Directives. (line 20) 16403* .v850e1 directive, V850: V850 Directives. (line 26) 16404* .z8001: Z8000 Directives. (line 11) 16405* .z8002: Z8000 Directives. (line 15) 16406* 16-bit code, i386: i386-16bit. (line 6) 16407* 2byte directive, ARC: ARC Directives. (line 9) 16408* 3byte directive, ARC: ARC Directives. (line 12) 16409* 3DNow!, i386: i386-SIMD. (line 6) 16410* 3DNow!, x86-64: i386-SIMD. (line 6) 16411* 430 support: MSP430-Dependent. (line 6) 16412* 4byte directive, ARC: ARC Directives. (line 15) 16413* : (label): Statements. (line 30) 16414* @word modifier, D10V: D10V-Word. (line 6) 16415* \" (doublequote character): Strings. (line 43) 16416* \\ (\ character): Strings. (line 40) 16417* \b (backspace character): Strings. (line 15) 16418* \DDD (octal character code): Strings. (line 30) 16419* \f (formfeed character): Strings. (line 18) 16420* \n (newline character): Strings. (line 21) 16421* \r (carriage return character): Strings. (line 24) 16422* \t (tab): Strings. (line 27) 16423* \XD... (hex character code): Strings. (line 36) 16424* _ opcode prefix: Xtensa Opcodes. (line 9) 16425* a.out: Object. (line 6) 16426* a.out symbol attributes: a.out Symbols. (line 6) 16427* A_DIR environment variable, TIC54X: TIC54X-Env. (line 6) 16428* ABI options, SH64: SH64 Options. (line 29) 16429* ABORT directive: ABORT. (line 6) 16430* abort directive: Abort. (line 6) 16431* absolute section: Ld Sections. (line 29) 16432* absolute-literals directive: Absolute Literals Directive. 16433 (line 6) 16434* ADDI instructions, relaxation: Xtensa Immediate Relaxation. 16435 (line 43) 16436* addition, permitted arguments: Infix Ops. (line 44) 16437* addresses: Expressions. (line 6) 16438* addresses, format of: Secs Background. (line 68) 16439* addressing modes, D10V: D10V-Addressing. (line 6) 16440* addressing modes, D30V: D30V-Addressing. (line 6) 16441* addressing modes, H8/300: H8/300-Addressing. (line 6) 16442* addressing modes, M680x0: M68K-Syntax. (line 21) 16443* addressing modes, M68HC11: M68HC11-Syntax. (line 17) 16444* addressing modes, SH: SH-Addressing. (line 6) 16445* addressing modes, SH64: SH64-Addressing. (line 6) 16446* addressing modes, Z8000: Z8000-Addressing. (line 6) 16447* ADR reg,<label> pseudo op, ARM: ARM Opcodes. (line 25) 16448* ADRL reg,<label> pseudo op, ARM: ARM Opcodes. (line 35) 16449* advancing location counter: Org. (line 6) 16450* align directive: Align. (line 6) 16451* align directive, ARM: ARM Directives. (line 6) 16452* align directive, SPARC: Sparc-Directives. (line 9) 16453* align directive, TIC54X: TIC54X-Directives. (line 6) 16454* alignment of branch targets: Xtensa Automatic Alignment. 16455 (line 6) 16456* alignment of ENTRY instructions: Xtensa Automatic Alignment. 16457 (line 6) 16458* alignment of LOOP instructions: Xtensa Automatic Alignment. 16459 (line 6) 16460* Alpha floating point (IEEE): Alpha Floating Point. 16461 (line 6) 16462* Alpha line comment character: Alpha-Chars. (line 6) 16463* Alpha line separator: Alpha-Chars. (line 8) 16464* Alpha notes: Alpha Notes. (line 6) 16465* Alpha options: Alpha Options. (line 6) 16466* Alpha registers: Alpha-Regs. (line 6) 16467* Alpha relocations: Alpha-Relocs. (line 6) 16468* Alpha support: Alpha-Dependent. (line 6) 16469* Alpha Syntax: Alpha Options. (line 54) 16470* Alpha-only directives: Alpha Directives. (line 10) 16471* altered difference tables: Word. (line 12) 16472* alternate syntax for the 680x0: M68K-Moto-Syntax. (line 6) 16473* ARC floating point (IEEE): ARC Floating Point. (line 6) 16474* ARC machine directives: ARC Directives. (line 6) 16475* ARC opcodes: ARC Opcodes. (line 6) 16476* ARC options (none): ARC Options. (line 6) 16477* ARC register names: ARC-Regs. (line 6) 16478* ARC special characters: ARC-Chars. (line 6) 16479* ARC support: ARC-Dependent. (line 6) 16480* arc5 arc5, ARC: ARC Options. (line 10) 16481* arc6 arc6, ARC: ARC Options. (line 13) 16482* arc7 arc7, ARC: ARC Options. (line 21) 16483* arc8 arc8, ARC: ARC Options. (line 24) 16484* arch directive, i386: i386-Arch. (line 6) 16485* arch directive, M680x0: M68K-Directives. (line 22) 16486* arch directive, x86-64: i386-Arch. (line 6) 16487* architecture options, i960: Options-i960. (line 6) 16488* architecture options, IP2022: IP2K-Opts. (line 9) 16489* architecture options, IP2K: IP2K-Opts. (line 14) 16490* architecture options, M16C: M32C-Opts. (line 12) 16491* architecture options, M32C: M32C-Opts. (line 9) 16492* architecture options, M32R: M32R-Opts. (line 21) 16493* architecture options, M32R2: M32R-Opts. (line 17) 16494* architecture options, M32RX: M32R-Opts. (line 9) 16495* architecture options, M680x0: M68K-Opts. (line 103) 16496* Architecture variant option, CRIS: CRIS-Opts. (line 33) 16497* architectures, PowerPC: PowerPC-Opts. (line 6) 16498* architectures, SPARC: Sparc-Opts. (line 6) 16499* arguments for addition: Infix Ops. (line 44) 16500* arguments for subtraction: Infix Ops. (line 49) 16501* arguments in expressions: Arguments. (line 6) 16502* arithmetic functions: Operators. (line 6) 16503* arithmetic operands: Arguments. (line 6) 16504* arm directive, ARM: ARM Directives. (line 36) 16505* ARM floating point (IEEE): ARM Floating Point. (line 6) 16506* ARM identifiers: ARM-Chars. (line 15) 16507* ARM immediate character: ARM-Chars. (line 13) 16508* ARM line comment character: ARM-Chars. (line 6) 16509* ARM line separator: ARM-Chars. (line 10) 16510* ARM machine directives: ARM Directives. (line 6) 16511* ARM opcodes: ARM Opcodes. (line 6) 16512* ARM options (none): ARM Options. (line 6) 16513* ARM register names: ARM-Regs. (line 6) 16514* ARM support: ARM-Dependent. (line 6) 16515* ascii directive: Ascii. (line 6) 16516* asciz directive: Asciz. (line 6) 16517* asg directive, TIC54X: TIC54X-Directives. (line 20) 16518* assembler bugs, reporting: Bug Reporting. (line 6) 16519* assembler crash: Bug Criteria. (line 9) 16520* assembler directive .arch, CRIS: CRIS-Pseudos. (line 45) 16521* assembler directive .dword, CRIS: CRIS-Pseudos. (line 12) 16522* assembler directive .far, M68HC11: M68HC11-Directives. (line 20) 16523* assembler directive .interrupt, M68HC11: M68HC11-Directives. 16524 (line 26) 16525* assembler directive .mode, M68HC11: M68HC11-Directives. (line 16) 16526* assembler directive .relax, M68HC11: M68HC11-Directives. (line 10) 16527* assembler directive .syntax, CRIS: CRIS-Pseudos. (line 17) 16528* assembler directive .xrefb, M68HC11: M68HC11-Directives. (line 31) 16529* assembler directive BSPEC, MMIX: MMIX-Pseudos. (line 131) 16530* assembler directive BYTE, MMIX: MMIX-Pseudos. (line 97) 16531* assembler directive ESPEC, MMIX: MMIX-Pseudos. (line 131) 16532* assembler directive GREG, MMIX: MMIX-Pseudos. (line 50) 16533* assembler directive IS, MMIX: MMIX-Pseudos. (line 42) 16534* assembler directive LOC, MMIX: MMIX-Pseudos. (line 7) 16535* assembler directive LOCAL, MMIX: MMIX-Pseudos. (line 28) 16536* assembler directive OCTA, MMIX: MMIX-Pseudos. (line 108) 16537* assembler directive PREFIX, MMIX: MMIX-Pseudos. (line 120) 16538* assembler directive TETRA, MMIX: MMIX-Pseudos. (line 108) 16539* assembler directive WYDE, MMIX: MMIX-Pseudos. (line 108) 16540* assembler directives, CRIS: CRIS-Pseudos. (line 6) 16541* assembler directives, M68HC11: M68HC11-Directives. (line 6) 16542* assembler directives, M68HC12: M68HC11-Directives. (line 6) 16543* assembler directives, MMIX: MMIX-Pseudos. (line 6) 16544* assembler internal logic error: As Sections. (line 13) 16545* assembler version: v. (line 6) 16546* assembler, and linker: Secs Background. (line 10) 16547* assembly listings, enabling: a. (line 6) 16548* assigning values to symbols <1>: Equ. (line 6) 16549* assigning values to symbols: Setting Symbols. (line 6) 16550* atmp directive, i860: Directives-i860. (line 16) 16551* att_syntax pseudo op, i386: i386-Syntax. (line 6) 16552* att_syntax pseudo op, x86-64: i386-Syntax. (line 6) 16553* attributes, symbol: Symbol Attributes. (line 6) 16554* auxiliary attributes, COFF symbols: COFF Symbols. (line 19) 16555* auxiliary symbol information, COFF: Dim. (line 6) 16556* Av7: Sparc-Opts. (line 25) 16557* backslash (\\): Strings. (line 40) 16558* backspace (\b): Strings. (line 15) 16559* balign directive: Balign. (line 6) 16560* balignl directive: Balign. (line 27) 16561* balignw directive: Balign. (line 27) 16562* bes directive, TIC54X: TIC54X-Directives. (line 197) 16563* BFIN directives: BFIN Directives. (line 6) 16564* BFIN syntax: BFIN Syntax. (line 6) 16565* big endian output, MIPS: Overview. (line 606) 16566* big endian output, PJ: Overview. (line 513) 16567* big-endian output, MIPS: MIPS Opts. (line 13) 16568* bignums: Bignums. (line 6) 16569* binary constants, TIC54X: TIC54X-Constants. (line 8) 16570* binary files, including: Incbin. (line 6) 16571* binary integers: Integers. (line 6) 16572* bit names, IA-64: IA-64-Bits. (line 6) 16573* bitfields, not supported on VAX: VAX-no. (line 6) 16574* Blackfin support: BFIN-Dependent. (line 6) 16575* block: Z8000 Directives. (line 55) 16576* branch improvement, M680x0: M68K-Branch. (line 6) 16577* branch improvement, M68HC11: M68HC11-Branch. (line 6) 16578* branch improvement, VAX: VAX-branch. (line 6) 16579* branch instructions, relaxation: Xtensa Branch Relaxation. 16580 (line 6) 16581* branch recording, i960: Options-i960. (line 22) 16582* branch statistics table, i960: Options-i960. (line 40) 16583* branch target alignment: Xtensa Automatic Alignment. 16584 (line 6) 16585* break directive, TIC54X: TIC54X-Directives. (line 143) 16586* BSD syntax: PDP-11-Syntax. (line 6) 16587* bss directive, i960: Directives-i960. (line 6) 16588* bss directive, TIC54X: TIC54X-Directives. (line 29) 16589* bss section <1>: bss. (line 6) 16590* bss section: Ld Sections. (line 20) 16591* bug criteria: Bug Criteria. (line 6) 16592* bug reports: Bug Reporting. (line 6) 16593* bugs in assembler: Reporting Bugs. (line 6) 16594* Built-in symbols, CRIS: CRIS-Symbols. (line 6) 16595* builtin math functions, TIC54X: TIC54X-Builtins. (line 6) 16596* builtin subsym functions, TIC54X: TIC54X-Macros. (line 16) 16597* bus lock prefixes, i386: i386-Prefixes. (line 36) 16598* bval: Z8000 Directives. (line 30) 16599* byte directive: Byte. (line 6) 16600* byte directive, TIC54X: TIC54X-Directives. (line 36) 16601* C54XDSP_DIR environment variable, TIC54X: TIC54X-Env. (line 6) 16602* c_mode directive, TIC54X: TIC54X-Directives. (line 51) 16603* call instructions, i386: i386-Mnemonics. (line 51) 16604* call instructions, relaxation: Xtensa Call Relaxation. 16605 (line 6) 16606* call instructions, x86-64: i386-Mnemonics. (line 51) 16607* callj, i960 pseudo-opcode: callj-i960. (line 6) 16608* carriage return (\r): Strings. (line 24) 16609* case sensitivity, Z80: Z80-Case. (line 6) 16610* cfi_endproc directive: CFI directives. (line 14) 16611* cfi_startproc directive: CFI directives. (line 6) 16612* char directive, TIC54X: TIC54X-Directives. (line 36) 16613* character constant, Z80: Z80-Chars. (line 13) 16614* character constants: Characters. (line 6) 16615* character escape codes: Strings. (line 15) 16616* character escapes, Z80: Z80-Chars. (line 11) 16617* character, single: Chars. (line 6) 16618* characters used in symbols: Symbol Intro. (line 6) 16619* clink directive, TIC54X: TIC54X-Directives. (line 45) 16620* code directive, ARM: ARM Directives. (line 29) 16621* code16 directive, i386: i386-16bit. (line 6) 16622* code16gcc directive, i386: i386-16bit. (line 6) 16623* code32 directive, i386: i386-16bit. (line 6) 16624* code64 directive, i386: i386-16bit. (line 6) 16625* code64 directive, x86-64: i386-16bit. (line 6) 16626* COFF auxiliary symbol information: Dim. (line 6) 16627* COFF structure debugging: Tag. (line 6) 16628* COFF symbol attributes: COFF Symbols. (line 6) 16629* COFF symbol descriptor: Desc. (line 6) 16630* COFF symbol storage class: Scl. (line 6) 16631* COFF symbol type: Type. (line 11) 16632* COFF symbols, debugging: Def. (line 6) 16633* COFF value attribute: Val. (line 6) 16634* COMDAT: Linkonce. (line 6) 16635* comm directive: Comm. (line 6) 16636* command line conventions: Command Line. (line 6) 16637* command line options, V850: V850 Options. (line 9) 16638* command-line options ignored, VAX: VAX-Opts. (line 6) 16639* comments: Comments. (line 6) 16640* comments, M680x0: M68K-Chars. (line 6) 16641* comments, removed by preprocessor: Preprocessing. (line 11) 16642* common directive, SPARC: Sparc-Directives. (line 12) 16643* common sections: Linkonce. (line 6) 16644* common variable storage: bss. (line 6) 16645* compare and jump expansions, i960: Compare-and-branch-i960. 16646 (line 13) 16647* compare/branch instructions, i960: Compare-and-branch-i960. 16648 (line 6) 16649* comparison expressions: Infix Ops. (line 55) 16650* conditional assembly: If. (line 6) 16651* constant, single character: Chars. (line 6) 16652* constants: Constants. (line 6) 16653* constants, bignum: Bignums. (line 6) 16654* constants, character: Characters. (line 6) 16655* constants, converted by preprocessor: Preprocessing. (line 14) 16656* constants, floating point: Flonums. (line 6) 16657* constants, integer: Integers. (line 6) 16658* constants, number: Numbers. (line 6) 16659* constants, string: Strings. (line 6) 16660* constants, TIC54X: TIC54X-Constants. (line 6) 16661* conversion instructions, i386: i386-Mnemonics. (line 32) 16662* conversion instructions, x86-64: i386-Mnemonics. (line 32) 16663* coprocessor wait, i386: i386-Prefixes. (line 40) 16664* copy directive, TIC54X: TIC54X-Directives. (line 54) 16665* cpu directive, M680x0: M68K-Directives. (line 30) 16666* crash of assembler: Bug Criteria. (line 9) 16667* CRIS --emulation=crisaout command line option: CRIS-Opts. (line 9) 16668* CRIS --emulation=criself command line option: CRIS-Opts. (line 9) 16669* CRIS --march=ARCHITECTURE command line option: CRIS-Opts. (line 33) 16670* CRIS --mul-bug-abort command line option: CRIS-Opts. (line 61) 16671* CRIS --no-mul-bug-abort command line option: CRIS-Opts. (line 61) 16672* CRIS --no-underscore command line option: CRIS-Opts. (line 15) 16673* CRIS --pic command line option: CRIS-Opts. (line 27) 16674* CRIS --underscore command line option: CRIS-Opts. (line 15) 16675* CRIS -N command line option: CRIS-Opts. (line 57) 16676* CRIS architecture variant option: CRIS-Opts. (line 33) 16677* CRIS assembler directive .arch: CRIS-Pseudos. (line 45) 16678* CRIS assembler directive .dword: CRIS-Pseudos. (line 12) 16679* CRIS assembler directive .syntax: CRIS-Pseudos. (line 17) 16680* CRIS assembler directives: CRIS-Pseudos. (line 6) 16681* CRIS built-in symbols: CRIS-Symbols. (line 6) 16682* CRIS instruction expansion: CRIS-Expand. (line 6) 16683* CRIS line comment characters: CRIS-Chars. (line 6) 16684* CRIS options: CRIS-Opts. (line 6) 16685* CRIS position-independent code: CRIS-Opts. (line 27) 16686* CRIS pseudo-op .arch: CRIS-Pseudos. (line 45) 16687* CRIS pseudo-op .dword: CRIS-Pseudos. (line 12) 16688* CRIS pseudo-op .syntax: CRIS-Pseudos. (line 17) 16689* CRIS pseudo-ops: CRIS-Pseudos. (line 6) 16690* CRIS register names: CRIS-Regs. (line 6) 16691* CRIS support: CRIS-Dependent. (line 6) 16692* CRIS symbols in position-independent code: CRIS-Pic. (line 6) 16693* ctbp register, V850: V850-Regs. (line 131) 16694* ctoff pseudo-op, V850: V850 Opcodes. (line 111) 16695* ctpc register, V850: V850-Regs. (line 119) 16696* ctpsw register, V850: V850-Regs. (line 122) 16697* current address: Dot. (line 6) 16698* current address, advancing: Org. (line 6) 16699* D10V @word modifier: D10V-Word. (line 6) 16700* D10V addressing modes: D10V-Addressing. (line 6) 16701* D10V floating point: D10V-Float. (line 6) 16702* D10V line comment character: D10V-Chars. (line 6) 16703* D10V opcode summary: D10V-Opcodes. (line 6) 16704* D10V optimization: Overview. (line 391) 16705* D10V options: D10V-Opts. (line 6) 16706* D10V registers: D10V-Regs. (line 6) 16707* D10V size modifiers: D10V-Size. (line 6) 16708* D10V sub-instruction ordering: D10V-Chars. (line 6) 16709* D10V sub-instructions: D10V-Subs. (line 6) 16710* D10V support: D10V-Dependent. (line 6) 16711* D10V syntax: D10V-Syntax. (line 6) 16712* D30V addressing modes: D30V-Addressing. (line 6) 16713* D30V floating point: D30V-Float. (line 6) 16714* D30V Guarded Execution: D30V-Guarded. (line 6) 16715* D30V line comment character: D30V-Chars. (line 6) 16716* D30V nops: Overview. (line 399) 16717* D30V nops after 32-bit multiply: Overview. (line 402) 16718* D30V opcode summary: D30V-Opcodes. (line 6) 16719* D30V optimization: Overview. (line 396) 16720* D30V options: D30V-Opts. (line 6) 16721* D30V registers: D30V-Regs. (line 6) 16722* D30V size modifiers: D30V-Size. (line 6) 16723* D30V sub-instruction ordering: D30V-Chars. (line 6) 16724* D30V sub-instructions: D30V-Subs. (line 6) 16725* D30V support: D30V-Dependent. (line 6) 16726* D30V syntax: D30V-Syntax. (line 6) 16727* data alignment on SPARC: Sparc-Aligned-Data. (line 6) 16728* data and text sections, joining: R. (line 6) 16729* data directive: Data. (line 6) 16730* data directive, TIC54X: TIC54X-Directives. (line 61) 16731* data section: Ld Sections. (line 9) 16732* data1 directive, M680x0: M68K-Directives. (line 9) 16733* data2 directive, M680x0: M68K-Directives. (line 12) 16734* datalabel, SH64: SH64-Addressing. (line 16) 16735* dbpc register, V850: V850-Regs. (line 125) 16736* dbpsw register, V850: V850-Regs. (line 128) 16737* debuggers, and symbol order: Symbols. (line 10) 16738* debugging COFF symbols: Def. (line 6) 16739* DEC syntax: PDP-11-Syntax. (line 6) 16740* decimal integers: Integers. (line 12) 16741* def directive: Def. (line 6) 16742* def directive, TIC54X: TIC54X-Directives. (line 103) 16743* density instructions: Density Instructions. 16744 (line 6) 16745* dependency tracking: MD. (line 6) 16746* deprecated directives: Deprecated. (line 6) 16747* desc directive: Desc. (line 6) 16748* descriptor, of a.out symbol: Symbol Desc. (line 6) 16749* dfloat directive, VAX: VAX-directives. (line 10) 16750* difference tables altered: Word. (line 12) 16751* difference tables, warning: K. (line 6) 16752* differences, mmixal: MMIX-mmixal. (line 6) 16753* dim directive: Dim. (line 6) 16754* directives and instructions: Statements. (line 19) 16755* directives for PowerPC: PowerPC-Pseudo. (line 6) 16756* directives, BFIN: BFIN Directives. (line 6) 16757* directives, M32R: M32R-Directives. (line 6) 16758* directives, M680x0: M68K-Directives. (line 6) 16759* directives, machine independent: Pseudo Ops. (line 6) 16760* directives, Xtensa: Xtensa Directives. (line 6) 16761* directives, Z8000: Z8000 Directives. (line 6) 16762* displacement sizing character, VAX: VAX-operands. (line 12) 16763* dollar local symbols: Symbol Names. (line 91) 16764* dot (symbol): Dot. (line 6) 16765* double directive: Double. (line 6) 16766* double directive, i386: i386-Float. (line 14) 16767* double directive, M680x0: M68K-Float. (line 14) 16768* double directive, M68HC11: M68HC11-Float. (line 14) 16769* double directive, TIC54X: TIC54X-Directives. (line 64) 16770* double directive, VAX: VAX-float. (line 15) 16771* double directive, x86-64: i386-Float. (line 14) 16772* doublequote (\"): Strings. (line 43) 16773* drlist directive, TIC54X: TIC54X-Directives. (line 73) 16774* drnolist directive, TIC54X: TIC54X-Directives. (line 73) 16775* dual directive, i860: Directives-i860. (line 6) 16776* ECOFF sections: MIPS Object. (line 6) 16777* ecr register, V850: V850-Regs. (line 113) 16778* eight-byte integer: Quad. (line 9) 16779* eipc register, V850: V850-Regs. (line 101) 16780* eipsw register, V850: V850-Regs. (line 104) 16781* eject directive: Eject. (line 6) 16782* ELF symbol type: Type. (line 22) 16783* else directive: Else. (line 6) 16784* elseif directive: Elseif. (line 6) 16785* empty expressions: Empty Exprs. (line 6) 16786* emsg directive, TIC54X: TIC54X-Directives. (line 77) 16787* emulation: Overview. (line 697) 16788* end directive: End. (line 6) 16789* enddual directive, i860: Directives-i860. (line 11) 16790* endef directive: Endef. (line 6) 16791* endfunc directive: Endfunc. (line 6) 16792* endianness, MIPS: Overview. (line 606) 16793* endianness, PJ: Overview. (line 513) 16794* endif directive: Endif. (line 6) 16795* endloop directive, TIC54X: TIC54X-Directives. (line 143) 16796* endm directive: Macro. (line 96) 16797* endm directive, TIC54X: TIC54X-Directives. (line 153) 16798* endstruct directive, TIC54X: TIC54X-Directives. (line 217) 16799* endunion directive, TIC54X: TIC54X-Directives. (line 251) 16800* ENTRY instructions, alignment: Xtensa Automatic Alignment. 16801 (line 6) 16802* environment settings, TIC54X: TIC54X-Env. (line 6) 16803* EOF, newline must precede: Statements. (line 13) 16804* ep register, V850: V850-Regs. (line 95) 16805* equ directive: Equ. (line 6) 16806* equ directive, TIC54X: TIC54X-Directives. (line 192) 16807* equiv directive: Equiv. (line 6) 16808* eqv directive: Eqv. (line 6) 16809* err directive: Err. (line 6) 16810* error directive: Error. (line 6) 16811* error messages: Errors. (line 6) 16812* error on valid input: Bug Criteria. (line 12) 16813* errors, caused by warnings: W. (line 16) 16814* errors, continuing after: Z. (line 6) 16815* ESA/390 floating point (IEEE): ESA/390 Floating Point. 16816 (line 6) 16817* ESA/390 support: ESA/390-Dependent. (line 6) 16818* ESA/390 Syntax: ESA/390 Options. (line 8) 16819* ESA/390-only directives: ESA/390 Directives. (line 12) 16820* escape codes, character: Strings. (line 15) 16821* eval directive, TIC54X: TIC54X-Directives. (line 24) 16822* even: Z8000 Directives. (line 58) 16823* even directive, M680x0: M68K-Directives. (line 15) 16824* even directive, TIC54X: TIC54X-Directives. (line 6) 16825* exitm directive: Macro. (line 99) 16826* expr (internal section): As Sections. (line 17) 16827* expression arguments: Arguments. (line 6) 16828* expressions: Expressions. (line 6) 16829* expressions, comparison: Infix Ops. (line 55) 16830* expressions, empty: Empty Exprs. (line 6) 16831* expressions, integer: Integer Exprs. (line 6) 16832* extAuxRegister directive, ARC: ARC Directives. (line 18) 16833* extCondCode directive, ARC: ARC Directives. (line 41) 16834* extCoreRegister directive, ARC: ARC Directives. (line 53) 16835* extend directive M680x0: M68K-Float. (line 17) 16836* extend directive M68HC11: M68HC11-Float. (line 17) 16837* extended directive, i960: Directives-i960. (line 13) 16838* extern directive: Extern. (line 6) 16839* extInstruction directive, ARC: ARC Directives. (line 78) 16840* fail directive: Fail. (line 6) 16841* far_mode directive, TIC54X: TIC54X-Directives. (line 82) 16842* faster processing (-f): f. (line 6) 16843* fatal signal: Bug Criteria. (line 9) 16844* fclist directive, TIC54X: TIC54X-Directives. (line 87) 16845* fcnolist directive, TIC54X: TIC54X-Directives. (line 87) 16846* fepc register, V850: V850-Regs. (line 107) 16847* fepsw register, V850: V850-Regs. (line 110) 16848* ffloat directive, VAX: VAX-directives. (line 14) 16849* field directive, TIC54X: TIC54X-Directives. (line 91) 16850* file directive <1>: File. (line 6) 16851* file directive: LNS directives. (line 6) 16852* file directive, MSP 430: MSP430 Directives. (line 6) 16853* file name, logical: File. (line 6) 16854* files, including: Include. (line 6) 16855* files, input: Input Files. (line 6) 16856* fill directive: Fill. (line 6) 16857* filling memory <1>: Space. (line 6) 16858* filling memory: Skip. (line 6) 16859* FLIX syntax: Xtensa Syntax. (line 6) 16860* float directive: Float. (line 6) 16861* float directive, i386: i386-Float. (line 14) 16862* float directive, M680x0: M68K-Float. (line 11) 16863* float directive, M68HC11: M68HC11-Float. (line 11) 16864* float directive, TIC54X: TIC54X-Directives. (line 64) 16865* float directive, VAX: VAX-float. (line 15) 16866* float directive, x86-64: i386-Float. (line 14) 16867* floating point numbers: Flonums. (line 6) 16868* floating point numbers (double): Double. (line 6) 16869* floating point numbers (single) <1>: Single. (line 6) 16870* floating point numbers (single): Float. (line 6) 16871* floating point, Alpha (IEEE): Alpha Floating Point. 16872 (line 6) 16873* floating point, ARC (IEEE): ARC Floating Point. (line 6) 16874* floating point, ARM (IEEE): ARM Floating Point. (line 6) 16875* floating point, D10V: D10V-Float. (line 6) 16876* floating point, D30V: D30V-Float. (line 6) 16877* floating point, ESA/390 (IEEE): ESA/390 Floating Point. 16878 (line 6) 16879* floating point, H8/300 (IEEE): H8/300 Floating Point. 16880 (line 6) 16881* floating point, HPPA (IEEE): HPPA Floating Point. (line 6) 16882* floating point, i386: i386-Float. (line 6) 16883* floating point, i960 (IEEE): Floating Point-i960. (line 6) 16884* floating point, M680x0: M68K-Float. (line 6) 16885* floating point, M68HC11: M68HC11-Float. (line 6) 16886* floating point, MSP 430 (IEEE): MSP430 Floating Point. 16887 (line 6) 16888* floating point, SH (IEEE): SH Floating Point. (line 6) 16889* floating point, SPARC (IEEE): Sparc-Float. (line 6) 16890* floating point, V850 (IEEE): V850 Floating Point. (line 6) 16891* floating point, VAX: VAX-float. (line 6) 16892* floating point, x86-64: i386-Float. (line 6) 16893* floating point, Z80: Z80 Floating Point. (line 6) 16894* flonums: Flonums. (line 6) 16895* force_thumb directive, ARM: ARM Directives. (line 39) 16896* format of error messages: Errors. (line 24) 16897* format of warning messages: Errors. (line 12) 16898* formfeed (\f): Strings. (line 18) 16899* func directive: Func. (line 6) 16900* functions, in expressions: Operators. (line 6) 16901* gbr960, i960 postprocessor: Options-i960. (line 40) 16902* gfloat directive, VAX: VAX-directives. (line 18) 16903* global: Z8000 Directives. (line 21) 16904* global directive: Global. (line 6) 16905* global directive, TIC54X: TIC54X-Directives. (line 103) 16906* gp register, MIPS: MIPS Object. (line 11) 16907* gp register, V850: V850-Regs. (line 17) 16908* grouping data: Sub-Sections. (line 6) 16909* H8/300 addressing modes: H8/300-Addressing. (line 6) 16910* H8/300 floating point (IEEE): H8/300 Floating Point. 16911 (line 6) 16912* H8/300 line comment character: H8/300-Chars. (line 6) 16913* H8/300 line separator: H8/300-Chars. (line 8) 16914* H8/300 machine directives (none): H8/300 Directives. (line 6) 16915* H8/300 opcode summary: H8/300 Opcodes. (line 6) 16916* H8/300 options (none): H8/300 Options. (line 6) 16917* H8/300 registers: H8/300-Regs. (line 6) 16918* H8/300 size suffixes: H8/300 Opcodes. (line 163) 16919* H8/300 support: H8/300-Dependent. (line 6) 16920* H8/300H, assembling for: H8/300 Directives. (line 8) 16921* half directive, ARC: ARC Directives. (line 156) 16922* half directive, SPARC: Sparc-Directives. (line 17) 16923* half directive, TIC54X: TIC54X-Directives. (line 111) 16924* hex character code (\XD...): Strings. (line 36) 16925* hexadecimal integers: Integers. (line 15) 16926* hexadecimal prefix, Z80: Z80-Chars. (line 8) 16927* hfloat directive, VAX: VAX-directives. (line 22) 16928* hi pseudo-op, V850: V850 Opcodes. (line 33) 16929* hi0 pseudo-op, V850: V850 Opcodes. (line 10) 16930* hidden directive: Hidden. (line 6) 16931* high directive, M32R: M32R-Directives. (line 18) 16932* hilo pseudo-op, V850: V850 Opcodes. (line 55) 16933* HPPA directives not supported: HPPA Directives. (line 11) 16934* HPPA floating point (IEEE): HPPA Floating Point. (line 6) 16935* HPPA Syntax: HPPA Options. (line 8) 16936* HPPA-only directives: HPPA Directives. (line 24) 16937* hword directive: hword. (line 6) 16938* i370 support: ESA/390-Dependent. (line 6) 16939* i386 16-bit code: i386-16bit. (line 6) 16940* i386 arch directive: i386-Arch. (line 6) 16941* i386 att_syntax pseudo op: i386-Syntax. (line 6) 16942* i386 conversion instructions: i386-Mnemonics. (line 32) 16943* i386 floating point: i386-Float. (line 6) 16944* i386 immediate operands: i386-Syntax. (line 15) 16945* i386 instruction naming: i386-Mnemonics. (line 6) 16946* i386 instruction prefixes: i386-Prefixes. (line 6) 16947* i386 intel_syntax pseudo op: i386-Syntax. (line 6) 16948* i386 jump optimization: i386-Jumps. (line 6) 16949* i386 jump, call, return: i386-Syntax. (line 38) 16950* i386 jump/call operands: i386-Syntax. (line 15) 16951* i386 memory references: i386-Memory. (line 6) 16952* i386 mul, imul instructions: i386-Notes. (line 6) 16953* i386 options: i386-Options. (line 6) 16954* i386 register operands: i386-Syntax. (line 15) 16955* i386 registers: i386-Regs. (line 6) 16956* i386 sections: i386-Syntax. (line 44) 16957* i386 size suffixes: i386-Syntax. (line 29) 16958* i386 source, destination operands: i386-Syntax. (line 22) 16959* i386 support: i386-Dependent. (line 6) 16960* i386 syntax compatibility: i386-Syntax. (line 6) 16961* i80306 support: i386-Dependent. (line 6) 16962* i860 machine directives: Directives-i860. (line 6) 16963* i860 opcodes: Opcodes for i860. (line 6) 16964* i860 support: i860-Dependent. (line 6) 16965* i960 architecture options: Options-i960. (line 6) 16966* i960 branch recording: Options-i960. (line 22) 16967* i960 callj pseudo-opcode: callj-i960. (line 6) 16968* i960 compare and jump expansions: Compare-and-branch-i960. 16969 (line 13) 16970* i960 compare/branch instructions: Compare-and-branch-i960. 16971 (line 6) 16972* i960 floating point (IEEE): Floating Point-i960. (line 6) 16973* i960 machine directives: Directives-i960. (line 6) 16974* i960 opcodes: Opcodes for i960. (line 6) 16975* i960 options: Options-i960. (line 6) 16976* i960 support: i960-Dependent. (line 6) 16977* IA-64 line comment character: IA-64-Chars. (line 6) 16978* IA-64 line separator: IA-64-Chars. (line 8) 16979* IA-64 options: IA-64 Options. (line 6) 16980* IA-64 Processor-status-Register bit names: IA-64-Bits. (line 6) 16981* IA-64 registers: IA-64-Regs. (line 6) 16982* IA-64 support: IA-64-Dependent. (line 6) 16983* IA-64 Syntax: IA-64 Options. (line 96) 16984* ident directive: Ident. (line 6) 16985* identifiers, ARM: ARM-Chars. (line 15) 16986* identifiers, MSP 430: MSP430-Chars. (line 8) 16987* if directive: If. (line 6) 16988* ifb directive: If. (line 21) 16989* ifc directive: If. (line 25) 16990* ifdef directive: If. (line 16) 16991* ifeq directive: If. (line 33) 16992* ifeqs directive: If. (line 36) 16993* ifge directive: If. (line 40) 16994* ifgt directive: If. (line 44) 16995* ifle directive: If. (line 48) 16996* iflt directive: If. (line 52) 16997* ifnb directive: If. (line 56) 16998* ifnc directive: If. (line 61) 16999* ifndef directive: If. (line 65) 17000* ifne directive: If. (line 72) 17001* ifnes directive: If. (line 76) 17002* ifnotdef directive: If. (line 65) 17003* immediate character, ARM: ARM-Chars. (line 13) 17004* immediate character, M680x0: M68K-Chars. (line 6) 17005* immediate character, VAX: VAX-operands. (line 6) 17006* immediate fields, relaxation: Xtensa Immediate Relaxation. 17007 (line 6) 17008* immediate operands, i386: i386-Syntax. (line 15) 17009* immediate operands, x86-64: i386-Syntax. (line 15) 17010* imul instruction, i386: i386-Notes. (line 6) 17011* imul instruction, x86-64: i386-Notes. (line 6) 17012* incbin directive: Incbin. (line 6) 17013* include directive: Include. (line 6) 17014* include directive search path: I. (line 6) 17015* indirect character, VAX: VAX-operands. (line 9) 17016* infix operators: Infix Ops. (line 6) 17017* inhibiting interrupts, i386: i386-Prefixes. (line 36) 17018* input: Input Files. (line 6) 17019* input file linenumbers: Input Files. (line 35) 17020* instruction expansion, CRIS: CRIS-Expand. (line 6) 17021* instruction expansion, MMIX: MMIX-Expand. (line 6) 17022* instruction naming, i386: i386-Mnemonics. (line 6) 17023* instruction naming, x86-64: i386-Mnemonics. (line 6) 17024* instruction prefixes, i386: i386-Prefixes. (line 6) 17025* instruction set, M680x0: M68K-opcodes. (line 6) 17026* instruction set, M68HC11: M68HC11-opcodes. (line 6) 17027* instruction summary, D10V: D10V-Opcodes. (line 6) 17028* instruction summary, D30V: D30V-Opcodes. (line 6) 17029* instruction summary, H8/300: H8/300 Opcodes. (line 6) 17030* instruction summary, SH: SH Opcodes. (line 6) 17031* instruction summary, SH64: SH64 Opcodes. (line 6) 17032* instruction summary, Z8000: Z8000 Opcodes. (line 6) 17033* instructions and directives: Statements. (line 19) 17034* int directive: Int. (line 6) 17035* int directive, H8/300: H8/300 Directives. (line 6) 17036* int directive, i386: i386-Float. (line 21) 17037* int directive, TIC54X: TIC54X-Directives. (line 111) 17038* int directive, x86-64: i386-Float. (line 21) 17039* integer expressions: Integer Exprs. (line 6) 17040* integer, 16-byte: Octa. (line 6) 17041* integer, 8-byte: Quad. (line 9) 17042* integers: Integers. (line 6) 17043* integers, 16-bit: hword. (line 6) 17044* integers, 32-bit: Int. (line 6) 17045* integers, binary: Integers. (line 6) 17046* integers, decimal: Integers. (line 12) 17047* integers, hexadecimal: Integers. (line 15) 17048* integers, octal: Integers. (line 9) 17049* integers, one byte: Byte. (line 6) 17050* intel_syntax pseudo op, i386: i386-Syntax. (line 6) 17051* intel_syntax pseudo op, x86-64: i386-Syntax. (line 6) 17052* internal assembler sections: As Sections. (line 6) 17053* internal directive: Internal. (line 6) 17054* invalid input: Bug Criteria. (line 14) 17055* invocation summary: Overview. (line 6) 17056* IP2K architecture options: IP2K-Opts. (line 9) 17057* IP2K options: IP2K-Opts. (line 6) 17058* IP2K support: IP2K-Dependent. (line 6) 17059* irp directive: Irp. (line 6) 17060* irpc directive: Irpc. (line 6) 17061* ISA options, SH64: SH64 Options. (line 6) 17062* joining text and data sections: R. (line 6) 17063* jump instructions, i386: i386-Mnemonics. (line 51) 17064* jump instructions, x86-64: i386-Mnemonics. (line 51) 17065* jump optimization, i386: i386-Jumps. (line 6) 17066* jump optimization, x86-64: i386-Jumps. (line 6) 17067* jump/call operands, i386: i386-Syntax. (line 15) 17068* jump/call operands, x86-64: i386-Syntax. (line 15) 17069* L16SI instructions, relaxation: Xtensa Immediate Relaxation. 17070 (line 23) 17071* L16UI instructions, relaxation: Xtensa Immediate Relaxation. 17072 (line 23) 17073* L32I instructions, relaxation: Xtensa Immediate Relaxation. 17074 (line 23) 17075* L8UI instructions, relaxation: Xtensa Immediate Relaxation. 17076 (line 23) 17077* label (:): Statements. (line 30) 17078* label directive, TIC54X: TIC54X-Directives. (line 123) 17079* labels: Labels. (line 6) 17080* lcomm directive: Lcomm. (line 6) 17081* ld: Object. (line 15) 17082* ldouble directive M680x0: M68K-Float. (line 17) 17083* ldouble directive M68HC11: M68HC11-Float. (line 17) 17084* ldouble directive, TIC54X: TIC54X-Directives. (line 64) 17085* LDR reg,=<label> pseudo op, ARM: ARM Opcodes. (line 15) 17086* leafproc directive, i960: Directives-i960. (line 18) 17087* length directive, TIC54X: TIC54X-Directives. (line 127) 17088* length of symbols: Symbol Intro. (line 14) 17089* lflags directive (ignored): Lflags. (line 6) 17090* line comment character: Comments. (line 19) 17091* line comment character, Alpha: Alpha-Chars. (line 6) 17092* line comment character, ARM: ARM-Chars. (line 6) 17093* line comment character, D10V: D10V-Chars. (line 6) 17094* line comment character, D30V: D30V-Chars. (line 6) 17095* line comment character, H8/300: H8/300-Chars. (line 6) 17096* line comment character, IA-64: IA-64-Chars. (line 6) 17097* line comment character, M680x0: M68K-Chars. (line 6) 17098* line comment character, MSP 430: MSP430-Chars. (line 6) 17099* line comment character, SH: SH-Chars. (line 6) 17100* line comment character, SH64: SH64-Chars. (line 6) 17101* line comment character, V850: V850-Chars. (line 6) 17102* line comment character, Z80: Z80-Chars. (line 6) 17103* line comment character, Z8000: Z8000-Chars. (line 6) 17104* line comment characters, CRIS: CRIS-Chars. (line 6) 17105* line comment characters, MMIX: MMIX-Chars. (line 6) 17106* line directive: Line. (line 6) 17107* line directive, MSP 430: MSP430 Directives. (line 14) 17108* line numbers, in input files: Input Files. (line 35) 17109* line numbers, in warnings/errors: Errors. (line 16) 17110* line separator character: Statements. (line 6) 17111* line separator, Alpha: Alpha-Chars. (line 8) 17112* line separator, ARM: ARM-Chars. (line 10) 17113* line separator, H8/300: H8/300-Chars. (line 8) 17114* line separator, IA-64: IA-64-Chars. (line 8) 17115* line separator, SH: SH-Chars. (line 8) 17116* line separator, SH64: SH64-Chars. (line 8) 17117* line separator, Z8000: Z8000-Chars. (line 8) 17118* lines starting with #: Comments. (line 38) 17119* linker: Object. (line 15) 17120* linker, and assembler: Secs Background. (line 10) 17121* linkonce directive: Linkonce. (line 6) 17122* list directive: List. (line 6) 17123* list directive, TIC54X: TIC54X-Directives. (line 131) 17124* listing control, turning off: Nolist. (line 6) 17125* listing control, turning on: List. (line 6) 17126* listing control: new page: Eject. (line 6) 17127* listing control: paper size: Psize. (line 6) 17128* listing control: subtitle: Sbttl. (line 6) 17129* listing control: title line: Title. (line 6) 17130* listings, enabling: a. (line 6) 17131* literal directive: Literal Directive. (line 6) 17132* literal_position directive: Literal Position Directive. 17133 (line 6) 17134* literal_prefix directive: Literal Prefix Directive. 17135 (line 6) 17136* little endian output, MIPS: Overview. (line 609) 17137* little endian output, PJ: Overview. (line 516) 17138* little-endian output, MIPS: MIPS Opts. (line 13) 17139* ln directive: Ln. (line 6) 17140* lo pseudo-op, V850: V850 Opcodes. (line 22) 17141* loc directive: LNS directives. (line 19) 17142* loc_mark_blocks directive: LNS directives. (line 50) 17143* local common symbols: Lcomm. (line 6) 17144* local labels, retaining in output: L. (line 6) 17145* local symbol names: Symbol Names. (line 22) 17146* location counter: Dot. (line 6) 17147* location counter, advancing: Org. (line 6) 17148* location counter, Z80: Z80-Chars. (line 8) 17149* logical file name: File. (line 6) 17150* logical line number: Line. (line 6) 17151* logical line numbers: Comments. (line 38) 17152* long directive: Long. (line 6) 17153* long directive, ARC: ARC Directives. (line 159) 17154* long directive, i386: i386-Float. (line 21) 17155* long directive, TIC54X: TIC54X-Directives. (line 135) 17156* long directive, x86-64: i386-Float. (line 21) 17157* longcall pseudo-op, V850: V850 Opcodes. (line 123) 17158* longcalls directive: Longcalls Directive. (line 6) 17159* longjump pseudo-op, V850: V850 Opcodes. (line 129) 17160* loop directive, TIC54X: TIC54X-Directives. (line 143) 17161* LOOP instructions, alignment: Xtensa Automatic Alignment. 17162 (line 6) 17163* low directive, M32R: M32R-Directives. (line 9) 17164* lp register, V850: V850-Regs. (line 98) 17165* lval: Z8000 Directives. (line 27) 17166* M16C architecture option: M32C-Opts. (line 12) 17167* M32C architecture option: M32C-Opts. (line 9) 17168* M32C modifiers: M32C-Modifiers. (line 6) 17169* M32C options: M32C-Opts. (line 6) 17170* M32C support: M32C-Dependent. (line 6) 17171* M32R architecture options: M32R-Opts. (line 9) 17172* M32R directives: M32R-Directives. (line 6) 17173* M32R options: M32R-Opts. (line 6) 17174* M32R support: M32R-Dependent. (line 6) 17175* M32R warnings: M32R-Warnings. (line 6) 17176* M680x0 addressing modes: M68K-Syntax. (line 21) 17177* M680x0 architecture options: M68K-Opts. (line 103) 17178* M680x0 branch improvement: M68K-Branch. (line 6) 17179* M680x0 directives: M68K-Directives. (line 6) 17180* M680x0 floating point: M68K-Float. (line 6) 17181* M680x0 immediate character: M68K-Chars. (line 6) 17182* M680x0 line comment character: M68K-Chars. (line 6) 17183* M680x0 opcodes: M68K-opcodes. (line 6) 17184* M680x0 options: M68K-Opts. (line 6) 17185* M680x0 pseudo-opcodes: M68K-Branch. (line 6) 17186* M680x0 size modifiers: M68K-Syntax. (line 8) 17187* M680x0 support: M68K-Dependent. (line 6) 17188* M680x0 syntax: M68K-Syntax. (line 8) 17189* M68HC11 addressing modes: M68HC11-Syntax. (line 17) 17190* M68HC11 and M68HC12 support: M68HC11-Dependent. (line 6) 17191* M68HC11 assembler directive .far: M68HC11-Directives. (line 20) 17192* M68HC11 assembler directive .interrupt: M68HC11-Directives. (line 26) 17193* M68HC11 assembler directive .mode: M68HC11-Directives. (line 16) 17194* M68HC11 assembler directive .relax: M68HC11-Directives. (line 10) 17195* M68HC11 assembler directive .xrefb: M68HC11-Directives. (line 31) 17196* M68HC11 assembler directives: M68HC11-Directives. (line 6) 17197* M68HC11 branch improvement: M68HC11-Branch. (line 6) 17198* M68HC11 floating point: M68HC11-Float. (line 6) 17199* M68HC11 modifiers: M68HC11-Modifiers. (line 6) 17200* M68HC11 opcodes: M68HC11-opcodes. (line 6) 17201* M68HC11 options: M68HC11-Opts. (line 6) 17202* M68HC11 pseudo-opcodes: M68HC11-Branch. (line 6) 17203* M68HC11 syntax: M68HC11-Syntax. (line 6) 17204* M68HC12 assembler directives: M68HC11-Directives. (line 6) 17205* machine dependencies: Machine Dependencies. 17206 (line 6) 17207* machine directives, ARC: ARC Directives. (line 6) 17208* machine directives, ARM: ARM Directives. (line 6) 17209* machine directives, H8/300 (none): H8/300 Directives. (line 6) 17210* machine directives, i860: Directives-i860. (line 6) 17211* machine directives, i960: Directives-i960. (line 6) 17212* machine directives, MSP 430: MSP430 Directives. (line 6) 17213* machine directives, SH: SH Directives. (line 6) 17214* machine directives, SH64: SH64 Directives. (line 9) 17215* machine directives, SPARC: Sparc-Directives. (line 6) 17216* machine directives, TIC54X: TIC54X-Directives. (line 6) 17217* machine directives, V850: V850 Directives. (line 6) 17218* machine directives, VAX: VAX-directives. (line 6) 17219* machine independent directives: Pseudo Ops. (line 6) 17220* machine instructions (not covered): Manual. (line 14) 17221* machine-independent syntax: Syntax. (line 6) 17222* macro directive: Macro. (line 28) 17223* macro directive, TIC54X: TIC54X-Directives. (line 153) 17224* macros: Macro. (line 6) 17225* macros, count executed: Macro. (line 101) 17226* Macros, MSP 430: MSP430-Macros. (line 6) 17227* macros, TIC54X: TIC54X-Macros. (line 6) 17228* make rules: MD. (line 6) 17229* manual, structure and purpose: Manual. (line 6) 17230* math builtins, TIC54X: TIC54X-Builtins. (line 6) 17231* Maximum number of continuation lines: listing. (line 33) 17232* memory references, i386: i386-Memory. (line 6) 17233* memory references, x86-64: i386-Memory. (line 6) 17234* memory-mapped registers, TIC54X: TIC54X-MMRegs. (line 6) 17235* merging text and data sections: R. (line 6) 17236* messages from assembler: Errors. (line 6) 17237* minus, permitted arguments: Infix Ops. (line 49) 17238* MIPS architecture options: MIPS Opts. (line 20) 17239* MIPS big-endian output: MIPS Opts. (line 13) 17240* MIPS debugging directives: MIPS Stabs. (line 6) 17241* MIPS DSP instruction generation override: MIPS ASE instruction generation overrides. 17242 (line 16) 17243* MIPS ECOFF sections: MIPS Object. (line 6) 17244* MIPS endianness: Overview. (line 606) 17245* MIPS ISA: Overview. (line 612) 17246* MIPS ISA override: MIPS ISA. (line 6) 17247* MIPS little-endian output: MIPS Opts. (line 13) 17248* MIPS MDMX instruction generation override: MIPS ASE instruction generation overrides. 17249 (line 11) 17250* MIPS MIPS-3D instruction generation override: MIPS ASE instruction generation overrides. 17251 (line 6) 17252* MIPS MT instruction generation override: MIPS ASE instruction generation overrides. 17253 (line 21) 17254* MIPS option stack: MIPS option stack. (line 6) 17255* MIPS processor: MIPS-Dependent. (line 6) 17256* MIT: M68K-Syntax. (line 6) 17257* mlib directive, TIC54X: TIC54X-Directives. (line 159) 17258* mlist directive, TIC54X: TIC54X-Directives. (line 164) 17259* MMIX assembler directive BSPEC: MMIX-Pseudos. (line 131) 17260* MMIX assembler directive BYTE: MMIX-Pseudos. (line 97) 17261* MMIX assembler directive ESPEC: MMIX-Pseudos. (line 131) 17262* MMIX assembler directive GREG: MMIX-Pseudos. (line 50) 17263* MMIX assembler directive IS: MMIX-Pseudos. (line 42) 17264* MMIX assembler directive LOC: MMIX-Pseudos. (line 7) 17265* MMIX assembler directive LOCAL: MMIX-Pseudos. (line 28) 17266* MMIX assembler directive OCTA: MMIX-Pseudos. (line 108) 17267* MMIX assembler directive PREFIX: MMIX-Pseudos. (line 120) 17268* MMIX assembler directive TETRA: MMIX-Pseudos. (line 108) 17269* MMIX assembler directive WYDE: MMIX-Pseudos. (line 108) 17270* MMIX assembler directives: MMIX-Pseudos. (line 6) 17271* MMIX line comment characters: MMIX-Chars. (line 6) 17272* MMIX options: MMIX-Opts. (line 6) 17273* MMIX pseudo-op BSPEC: MMIX-Pseudos. (line 131) 17274* MMIX pseudo-op BYTE: MMIX-Pseudos. (line 97) 17275* MMIX pseudo-op ESPEC: MMIX-Pseudos. (line 131) 17276* MMIX pseudo-op GREG: MMIX-Pseudos. (line 50) 17277* MMIX pseudo-op IS: MMIX-Pseudos. (line 42) 17278* MMIX pseudo-op LOC: MMIX-Pseudos. (line 7) 17279* MMIX pseudo-op LOCAL: MMIX-Pseudos. (line 28) 17280* MMIX pseudo-op OCTA: MMIX-Pseudos. (line 108) 17281* MMIX pseudo-op PREFIX: MMIX-Pseudos. (line 120) 17282* MMIX pseudo-op TETRA: MMIX-Pseudos. (line 108) 17283* MMIX pseudo-op WYDE: MMIX-Pseudos. (line 108) 17284* MMIX pseudo-ops: MMIX-Pseudos. (line 6) 17285* MMIX register names: MMIX-Regs. (line 6) 17286* MMIX support: MMIX-Dependent. (line 6) 17287* mmixal differences: MMIX-mmixal. (line 6) 17288* mmregs directive, TIC54X: TIC54X-Directives. (line 170) 17289* mmsg directive, TIC54X: TIC54X-Directives. (line 77) 17290* MMX, i386: i386-SIMD. (line 6) 17291* MMX, x86-64: i386-SIMD. (line 6) 17292* mnemonic suffixes, i386: i386-Syntax. (line 29) 17293* mnemonic suffixes, x86-64: i386-Syntax. (line 29) 17294* mnemonics for opcodes, VAX: VAX-opcodes. (line 6) 17295* mnemonics, D10V: D10V-Opcodes. (line 6) 17296* mnemonics, D30V: D30V-Opcodes. (line 6) 17297* mnemonics, H8/300: H8/300 Opcodes. (line 6) 17298* mnemonics, SH: SH Opcodes. (line 6) 17299* mnemonics, SH64: SH64 Opcodes. (line 6) 17300* mnemonics, Z8000: Z8000 Opcodes. (line 6) 17301* mnolist directive, TIC54X: TIC54X-Directives. (line 164) 17302* Motorola syntax for the 680x0: M68K-Moto-Syntax. (line 6) 17303* MOVI instructions, relaxation: Xtensa Immediate Relaxation. 17304 (line 12) 17305* MRI compatibility mode: M. (line 6) 17306* mri directive: MRI. (line 6) 17307* MRI mode, temporarily: MRI. (line 6) 17308* MSP 430 floating point (IEEE): MSP430 Floating Point. 17309 (line 6) 17310* MSP 430 identifiers: MSP430-Chars. (line 8) 17311* MSP 430 line comment character: MSP430-Chars. (line 6) 17312* MSP 430 machine directives: MSP430 Directives. (line 6) 17313* MSP 430 macros: MSP430-Macros. (line 6) 17314* MSP 430 opcodes: MSP430 Opcodes. (line 6) 17315* MSP 430 options (none): MSP430 Options. (line 6) 17316* MSP 430 profiling capability: MSP430 Profiling Capability. 17317 (line 6) 17318* MSP 430 register names: MSP430-Regs. (line 6) 17319* MSP 430 support: MSP430-Dependent. (line 6) 17320* MSP430 Assembler Extensions: MSP430-Ext. (line 6) 17321* mul instruction, i386: i386-Notes. (line 6) 17322* mul instruction, x86-64: i386-Notes. (line 6) 17323* name: Z8000 Directives. (line 18) 17324* named section: Section. (line 6) 17325* named sections: Ld Sections. (line 8) 17326* names, symbol: Symbol Names. (line 6) 17327* naming object file: o. (line 6) 17328* new page, in listings: Eject. (line 6) 17329* newblock directive, TIC54X: TIC54X-Directives. (line 176) 17330* newline (\n): Strings. (line 21) 17331* newline, required at file end: Statements. (line 13) 17332* no-absolute-literals directive: Absolute Literals Directive. 17333 (line 6) 17334* no-longcalls directive: Longcalls Directive. (line 6) 17335* no-schedule directive: Schedule Directive. (line 6) 17336* no-transform directive: Transform Directive. (line 6) 17337* nolist directive: Nolist. (line 6) 17338* nolist directive, TIC54X: TIC54X-Directives. (line 131) 17339* NOP pseudo op, ARM: ARM Opcodes. (line 9) 17340* notes for Alpha: Alpha Notes. (line 6) 17341* null-terminated strings: Asciz. (line 6) 17342* number constants: Numbers. (line 6) 17343* number of macros executed: Macro. (line 101) 17344* numbered subsections: Sub-Sections. (line 6) 17345* numbers, 16-bit: hword. (line 6) 17346* numeric values: Expressions. (line 6) 17347* nword directive, SPARC: Sparc-Directives. (line 20) 17348* object file: Object. (line 6) 17349* object file format: Object Formats. (line 6) 17350* object file name: o. (line 6) 17351* object file, after errors: Z. (line 6) 17352* obsolescent directives: Deprecated. (line 6) 17353* octa directive: Octa. (line 6) 17354* octal character code (\DDD): Strings. (line 30) 17355* octal integers: Integers. (line 9) 17356* offset directive, V850: V850 Directives. (line 6) 17357* opcode mnemonics, VAX: VAX-opcodes. (line 6) 17358* opcode names, Xtensa: Xtensa Opcodes. (line 6) 17359* opcode summary, D10V: D10V-Opcodes. (line 6) 17360* opcode summary, D30V: D30V-Opcodes. (line 6) 17361* opcode summary, H8/300: H8/300 Opcodes. (line 6) 17362* opcode summary, SH: SH Opcodes. (line 6) 17363* opcode summary, SH64: SH64 Opcodes. (line 6) 17364* opcode summary, Z8000: Z8000 Opcodes. (line 6) 17365* opcodes for ARC: ARC Opcodes. (line 6) 17366* opcodes for ARM: ARM Opcodes. (line 6) 17367* opcodes for MSP 430: MSP430 Opcodes. (line 6) 17368* opcodes for V850: V850 Opcodes. (line 6) 17369* opcodes, i860: Opcodes for i860. (line 6) 17370* opcodes, i960: Opcodes for i960. (line 6) 17371* opcodes, M680x0: M68K-opcodes. (line 6) 17372* opcodes, M68HC11: M68HC11-opcodes. (line 6) 17373* operand delimiters, i386: i386-Syntax. (line 15) 17374* operand delimiters, x86-64: i386-Syntax. (line 15) 17375* operand notation, VAX: VAX-operands. (line 6) 17376* operands in expressions: Arguments. (line 6) 17377* operator precedence: Infix Ops. (line 11) 17378* operators, in expressions: Operators. (line 6) 17379* operators, permitted arguments: Infix Ops. (line 6) 17380* optimization, D10V: Overview. (line 391) 17381* optimization, D30V: Overview. (line 396) 17382* optimizations: Xtensa Optimizations. 17383 (line 6) 17384* option directive, ARC: ARC Directives. (line 162) 17385* option directive, TIC54X: TIC54X-Directives. (line 180) 17386* option summary: Overview. (line 6) 17387* options for Alpha: Alpha Options. (line 6) 17388* options for ARC (none): ARC Options. (line 6) 17389* options for ARM (none): ARM Options. (line 6) 17390* options for i386: i386-Options. (line 6) 17391* options for IA-64: IA-64 Options. (line 6) 17392* options for MSP430 (none): MSP430 Options. (line 6) 17393* options for PDP-11: PDP-11-Options. (line 6) 17394* options for PowerPC: PowerPC-Opts. (line 6) 17395* options for SPARC: Sparc-Opts. (line 6) 17396* options for V850 (none): V850 Options. (line 6) 17397* options for VAX/VMS: VAX-Opts. (line 42) 17398* options for x86-64: i386-Options. (line 6) 17399* options for Z80: Z80 Options. (line 6) 17400* options, all versions of assembler: Invoking. (line 6) 17401* options, command line: Command Line. (line 13) 17402* options, CRIS: CRIS-Opts. (line 6) 17403* options, D10V: D10V-Opts. (line 6) 17404* options, D30V: D30V-Opts. (line 6) 17405* options, H8/300 (none): H8/300 Options. (line 6) 17406* options, i960: Options-i960. (line 6) 17407* options, IP2K: IP2K-Opts. (line 6) 17408* options, M32C: M32C-Opts. (line 6) 17409* options, M32R: M32R-Opts. (line 6) 17410* options, M680x0: M68K-Opts. (line 6) 17411* options, M68HC11: M68HC11-Opts. (line 6) 17412* options, MMIX: MMIX-Opts. (line 6) 17413* options, PJ: PJ Options. (line 6) 17414* options, SH: SH Options. (line 6) 17415* options, SH64: SH64 Options. (line 6) 17416* options, TIC54X: TIC54X-Opts. (line 6) 17417* options, Z8000: Z8000 Options. (line 6) 17418* org directive: Org. (line 6) 17419* other attribute, of a.out symbol: Symbol Other. (line 6) 17420* output file: Object. (line 6) 17421* p2align directive: P2align. (line 6) 17422* p2alignl directive: P2align. (line 28) 17423* p2alignw directive: P2align. (line 28) 17424* padding the location counter: Align. (line 6) 17425* padding the location counter given a power of two: P2align. (line 6) 17426* padding the location counter given number of bytes: Balign. (line 6) 17427* page, in listings: Eject. (line 6) 17428* paper size, for listings: Psize. (line 6) 17429* paths for .include: I. (line 6) 17430* patterns, writing in memory: Fill. (line 6) 17431* PDP-11 comments: PDP-11-Syntax. (line 16) 17432* PDP-11 floating-point register syntax: PDP-11-Syntax. (line 13) 17433* PDP-11 general-purpose register syntax: PDP-11-Syntax. (line 10) 17434* PDP-11 instruction naming: PDP-11-Mnemonics. (line 6) 17435* PDP-11 support: PDP-11-Dependent. (line 6) 17436* PDP-11 syntax: PDP-11-Syntax. (line 6) 17437* PIC code generation for ARM: ARM Options. (line 120) 17438* PIC code generation for M32R: M32R-Opts. (line 42) 17439* PJ endianness: Overview. (line 513) 17440* PJ options: PJ Options. (line 6) 17441* PJ support: PJ-Dependent. (line 6) 17442* plus, permitted arguments: Infix Ops. (line 44) 17443* popsection directive: PopSection. (line 6) 17444* Position-independent code, CRIS: CRIS-Opts. (line 27) 17445* Position-independent code, symbols in, CRIS: CRIS-Pic. (line 6) 17446* PowerPC architectures: PowerPC-Opts. (line 6) 17447* PowerPC directives: PowerPC-Pseudo. (line 6) 17448* PowerPC options: PowerPC-Opts. (line 6) 17449* PowerPC support: PPC-Dependent. (line 6) 17450* precedence of operators: Infix Ops. (line 11) 17451* precision, floating point: Flonums. (line 6) 17452* prefix operators: Prefix Ops. (line 6) 17453* prefixes, i386: i386-Prefixes. (line 6) 17454* preprocessing: Preprocessing. (line 6) 17455* preprocessing, turning on and off: Preprocessing. (line 26) 17456* previous directive: Previous. (line 6) 17457* primary attributes, COFF symbols: COFF Symbols. (line 13) 17458* print directive: Print. (line 6) 17459* proc directive, SPARC: Sparc-Directives. (line 25) 17460* profiler directive, MSP 430: MSP430 Directives. (line 22) 17461* profiling capability for MSP 430: MSP430 Profiling Capability. 17462 (line 6) 17463* protected directive: Protected. (line 6) 17464* pseudo-op .arch, CRIS: CRIS-Pseudos. (line 45) 17465* pseudo-op .dword, CRIS: CRIS-Pseudos. (line 12) 17466* pseudo-op .syntax, CRIS: CRIS-Pseudos. (line 17) 17467* pseudo-op BSPEC, MMIX: MMIX-Pseudos. (line 131) 17468* pseudo-op BYTE, MMIX: MMIX-Pseudos. (line 97) 17469* pseudo-op ESPEC, MMIX: MMIX-Pseudos. (line 131) 17470* pseudo-op GREG, MMIX: MMIX-Pseudos. (line 50) 17471* pseudo-op IS, MMIX: MMIX-Pseudos. (line 42) 17472* pseudo-op LOC, MMIX: MMIX-Pseudos. (line 7) 17473* pseudo-op LOCAL, MMIX: MMIX-Pseudos. (line 28) 17474* pseudo-op OCTA, MMIX: MMIX-Pseudos. (line 108) 17475* pseudo-op PREFIX, MMIX: MMIX-Pseudos. (line 120) 17476* pseudo-op TETRA, MMIX: MMIX-Pseudos. (line 108) 17477* pseudo-op WYDE, MMIX: MMIX-Pseudos. (line 108) 17478* pseudo-opcodes, M680x0: M68K-Branch. (line 6) 17479* pseudo-opcodes, M68HC11: M68HC11-Branch. (line 6) 17480* pseudo-ops for branch, VAX: VAX-branch. (line 6) 17481* pseudo-ops, CRIS: CRIS-Pseudos. (line 6) 17482* pseudo-ops, machine independent: Pseudo Ops. (line 6) 17483* pseudo-ops, MMIX: MMIX-Pseudos. (line 6) 17484* psize directive: Psize. (line 6) 17485* PSR bits: IA-64-Bits. (line 6) 17486* pstring directive, TIC54X: TIC54X-Directives. (line 209) 17487* psw register, V850: V850-Regs. (line 116) 17488* purgem directive: Purgem. (line 6) 17489* purpose of GNU assembler: GNU Assembler. (line 12) 17490* pushsection directive: PushSection. (line 6) 17491* quad directive: Quad. (line 6) 17492* quad directive, i386: i386-Float. (line 21) 17493* quad directive, x86-64: i386-Float. (line 21) 17494* real-mode code, i386: i386-16bit. (line 6) 17495* ref directive, TIC54X: TIC54X-Directives. (line 103) 17496* register directive, SPARC: Sparc-Directives. (line 29) 17497* register names, Alpha: Alpha-Regs. (line 6) 17498* register names, ARC: ARC-Regs. (line 6) 17499* register names, ARM: ARM-Regs. (line 6) 17500* register names, CRIS: CRIS-Regs. (line 6) 17501* register names, H8/300: H8/300-Regs. (line 6) 17502* register names, IA-64: IA-64-Regs. (line 6) 17503* register names, MMIX: MMIX-Regs. (line 6) 17504* register names, MSP 430: MSP430-Regs. (line 6) 17505* register names, V850: V850-Regs. (line 6) 17506* register names, VAX: VAX-operands. (line 17) 17507* register names, Xtensa: Xtensa Registers. (line 6) 17508* register names, Z80: Z80-Regs. (line 6) 17509* register operands, i386: i386-Syntax. (line 15) 17510* register operands, x86-64: i386-Syntax. (line 15) 17511* registers, D10V: D10V-Regs. (line 6) 17512* registers, D30V: D30V-Regs. (line 6) 17513* registers, i386: i386-Regs. (line 6) 17514* registers, SH: SH-Regs. (line 6) 17515* registers, SH64: SH64-Regs. (line 6) 17516* registers, TIC54X memory-mapped: TIC54X-MMRegs. (line 6) 17517* registers, x86-64: i386-Regs. (line 6) 17518* registers, Z8000: Z8000-Regs. (line 6) 17519* relaxation: Xtensa Relaxation. (line 6) 17520* relaxation of ADDI instructions: Xtensa Immediate Relaxation. 17521 (line 43) 17522* relaxation of branch instructions: Xtensa Branch Relaxation. 17523 (line 6) 17524* relaxation of call instructions: Xtensa Call Relaxation. 17525 (line 6) 17526* relaxation of immediate fields: Xtensa Immediate Relaxation. 17527 (line 6) 17528* relaxation of L16SI instructions: Xtensa Immediate Relaxation. 17529 (line 23) 17530* relaxation of L16UI instructions: Xtensa Immediate Relaxation. 17531 (line 23) 17532* relaxation of L32I instructions: Xtensa Immediate Relaxation. 17533 (line 23) 17534* relaxation of L8UI instructions: Xtensa Immediate Relaxation. 17535 (line 23) 17536* relaxation of MOVI instructions: Xtensa Immediate Relaxation. 17537 (line 12) 17538* relocation: Sections. (line 6) 17539* relocation example: Ld Sections. (line 40) 17540* relocations, Alpha: Alpha-Relocs. (line 6) 17541* repeat prefixes, i386: i386-Prefixes. (line 44) 17542* reporting bugs in assembler: Reporting Bugs. (line 6) 17543* rept directive: Rept. (line 6) 17544* req directive, ARM: ARM Directives. (line 13) 17545* reserve directive, SPARC: Sparc-Directives. (line 39) 17546* return instructions, i386: i386-Syntax. (line 38) 17547* return instructions, x86-64: i386-Syntax. (line 38) 17548* REX prefixes, i386: i386-Prefixes. (line 46) 17549* rsect: Z8000 Directives. (line 52) 17550* sblock directive, TIC54X: TIC54X-Directives. (line 183) 17551* sbttl directive: Sbttl. (line 6) 17552* schedule directive: Schedule Directive. (line 6) 17553* scl directive: Scl. (line 6) 17554* sdaoff pseudo-op, V850: V850 Opcodes. (line 65) 17555* search path for .include: I. (line 6) 17556* sect directive, MSP 430: MSP430 Directives. (line 18) 17557* sect directive, TIC54X: TIC54X-Directives. (line 189) 17558* section directive (COFF version): Section. (line 16) 17559* section directive (ELF version): Section. (line 67) 17560* section directive, V850: V850 Directives. (line 9) 17561* section override prefixes, i386: i386-Prefixes. (line 23) 17562* Section Stack <1>: SubSection. (line 6) 17563* Section Stack <2>: Section. (line 62) 17564* Section Stack <3>: PushSection. (line 6) 17565* Section Stack <4>: PopSection. (line 6) 17566* Section Stack: Previous. (line 6) 17567* section-relative addressing: Secs Background. (line 68) 17568* sections: Sections. (line 6) 17569* sections in messages, internal: As Sections. (line 6) 17570* sections, i386: i386-Syntax. (line 44) 17571* sections, named: Ld Sections. (line 8) 17572* sections, x86-64: i386-Syntax. (line 44) 17573* seg directive, SPARC: Sparc-Directives. (line 44) 17574* segm: Z8000 Directives. (line 10) 17575* set directive: Set. (line 6) 17576* set directive, TIC54X: TIC54X-Directives. (line 192) 17577* SH addressing modes: SH-Addressing. (line 6) 17578* SH floating point (IEEE): SH Floating Point. (line 6) 17579* SH line comment character: SH-Chars. (line 6) 17580* SH line separator: SH-Chars. (line 8) 17581* SH machine directives: SH Directives. (line 6) 17582* SH opcode summary: SH Opcodes. (line 6) 17583* SH options: SH Options. (line 6) 17584* SH registers: SH-Regs. (line 6) 17585* SH support: SH-Dependent. (line 6) 17586* SH64 ABI options: SH64 Options. (line 29) 17587* SH64 addressing modes: SH64-Addressing. (line 6) 17588* SH64 ISA options: SH64 Options. (line 6) 17589* SH64 line comment character: SH64-Chars. (line 6) 17590* SH64 line separator: SH64-Chars. (line 8) 17591* SH64 machine directives: SH64 Directives. (line 9) 17592* SH64 opcode summary: SH64 Opcodes. (line 6) 17593* SH64 options: SH64 Options. (line 6) 17594* SH64 registers: SH64-Regs. (line 6) 17595* SH64 support: SH64-Dependent. (line 6) 17596* shigh directive, M32R: M32R-Directives. (line 26) 17597* short directive: Short. (line 6) 17598* short directive, ARC: ARC Directives. (line 171) 17599* short directive, TIC54X: TIC54X-Directives. (line 111) 17600* SIMD, i386: i386-SIMD. (line 6) 17601* SIMD, x86-64: i386-SIMD. (line 6) 17602* single character constant: Chars. (line 6) 17603* single directive: Single. (line 6) 17604* single directive, i386: i386-Float. (line 14) 17605* single directive, x86-64: i386-Float. (line 14) 17606* single quote, Z80: Z80-Chars. (line 13) 17607* sixteen bit integers: hword. (line 6) 17608* sixteen byte integer: Octa. (line 6) 17609* size directive (COFF version): Size. (line 11) 17610* size directive (ELF version): Size. (line 19) 17611* size modifiers, D10V: D10V-Size. (line 6) 17612* size modifiers, D30V: D30V-Size. (line 6) 17613* size modifiers, M680x0: M68K-Syntax. (line 8) 17614* size prefixes, i386: i386-Prefixes. (line 27) 17615* size suffixes, H8/300: H8/300 Opcodes. (line 163) 17616* sizes operands, i386: i386-Syntax. (line 29) 17617* sizes operands, x86-64: i386-Syntax. (line 29) 17618* skip directive: Skip. (line 6) 17619* skip directive, M680x0: M68K-Directives. (line 19) 17620* skip directive, SPARC: Sparc-Directives. (line 48) 17621* sleb128 directive: Sleb128. (line 6) 17622* small objects, MIPS ECOFF: MIPS Object. (line 11) 17623* SOM symbol attributes: SOM Symbols. (line 6) 17624* source program: Input Files. (line 6) 17625* source, destination operands; i386: i386-Syntax. (line 22) 17626* source, destination operands; x86-64: i386-Syntax. (line 22) 17627* sp register: Xtensa Registers. (line 6) 17628* sp register, V850: V850-Regs. (line 14) 17629* space directive: Space. (line 6) 17630* space directive, TIC54X: TIC54X-Directives. (line 197) 17631* space used, maximum for assembly: statistics. (line 6) 17632* SPARC architectures: Sparc-Opts. (line 6) 17633* SPARC data alignment: Sparc-Aligned-Data. (line 6) 17634* SPARC floating point (IEEE): Sparc-Float. (line 6) 17635* SPARC machine directives: Sparc-Directives. (line 6) 17636* SPARC options: Sparc-Opts. (line 6) 17637* SPARC support: Sparc-Dependent. (line 6) 17638* special characters, ARC: ARC-Chars. (line 6) 17639* special characters, M680x0: M68K-Chars. (line 6) 17640* special purpose registers, MSP 430: MSP430-Regs. (line 11) 17641* sslist directive, TIC54X: TIC54X-Directives. (line 204) 17642* ssnolist directive, TIC54X: TIC54X-Directives. (line 204) 17643* stabd directive: Stab. (line 38) 17644* stabn directive: Stab. (line 48) 17645* stabs directive: Stab. (line 51) 17646* stabX directives: Stab. (line 6) 17647* standard assembler sections: Secs Background. (line 27) 17648* standard input, as input file: Command Line. (line 10) 17649* statement separator character: Statements. (line 6) 17650* statement separator, Alpha: Alpha-Chars. (line 8) 17651* statement separator, ARM: ARM-Chars. (line 10) 17652* statement separator, H8/300: H8/300-Chars. (line 8) 17653* statement separator, IA-64: IA-64-Chars. (line 8) 17654* statement separator, SH: SH-Chars. (line 8) 17655* statement separator, SH64: SH64-Chars. (line 8) 17656* statement separator, Z8000: Z8000-Chars. (line 8) 17657* statements, structure of: Statements. (line 6) 17658* statistics, about assembly: statistics. (line 6) 17659* stopping the assembly: Abort. (line 6) 17660* string constants: Strings. (line 6) 17661* string directive: String. (line 6) 17662* string directive on HPPA: HPPA Directives. (line 137) 17663* string directive, TIC54X: TIC54X-Directives. (line 209) 17664* string literals: Ascii. (line 6) 17665* string, copying to object file: String. (line 6) 17666* struct directive: Struct. (line 6) 17667* struct directive, TIC54X: TIC54X-Directives. (line 217) 17668* structure debugging, COFF: Tag. (line 6) 17669* sub-instruction ordering, D10V: D10V-Chars. (line 6) 17670* sub-instruction ordering, D30V: D30V-Chars. (line 6) 17671* sub-instructions, D10V: D10V-Subs. (line 6) 17672* sub-instructions, D30V: D30V-Subs. (line 6) 17673* subexpressions: Arguments. (line 24) 17674* subsection directive: SubSection. (line 6) 17675* subsym builtins, TIC54X: TIC54X-Macros. (line 16) 17676* subtitles for listings: Sbttl. (line 6) 17677* subtraction, permitted arguments: Infix Ops. (line 49) 17678* summary of options: Overview. (line 6) 17679* support: HPPA-Dependent. (line 6) 17680* supporting files, including: Include. (line 6) 17681* suppressing warnings: W. (line 11) 17682* sval: Z8000 Directives. (line 33) 17683* symbol attributes: Symbol Attributes. (line 6) 17684* symbol attributes, a.out: a.out Symbols. (line 6) 17685* symbol attributes, COFF: COFF Symbols. (line 6) 17686* symbol attributes, SOM: SOM Symbols. (line 6) 17687* symbol descriptor, COFF: Desc. (line 6) 17688* symbol modifiers <1>: M68HC11-Modifiers. (line 12) 17689* symbol modifiers: M32C-Modifiers. (line 11) 17690* symbol names: Symbol Names. (line 6) 17691* symbol names, $ in <1>: SH64-Chars. (line 10) 17692* symbol names, $ in <2>: SH-Chars. (line 10) 17693* symbol names, $ in <3>: D30V-Chars. (line 63) 17694* symbol names, $ in: D10V-Chars. (line 46) 17695* symbol names, local: Symbol Names. (line 22) 17696* symbol names, temporary: Symbol Names. (line 22) 17697* symbol storage class (COFF): Scl. (line 6) 17698* symbol type: Symbol Type. (line 6) 17699* symbol type, COFF: Type. (line 11) 17700* symbol type, ELF: Type. (line 22) 17701* symbol value: Symbol Value. (line 6) 17702* symbol value, setting: Set. (line 6) 17703* symbol values, assigning: Setting Symbols. (line 6) 17704* symbol versioning: Symver. (line 6) 17705* symbol, common: Comm. (line 6) 17706* symbol, making visible to linker: Global. (line 6) 17707* symbolic debuggers, information for: Stab. (line 6) 17708* symbols: Symbols. (line 6) 17709* Symbols in position-independent code, CRIS: CRIS-Pic. (line 6) 17710* symbols with uppercase, VAX/VMS: VAX-Opts. (line 42) 17711* symbols, assigning values to: Equ. (line 6) 17712* Symbols, built-in, CRIS: CRIS-Symbols. (line 6) 17713* Symbols, CRIS, built-in: CRIS-Symbols. (line 6) 17714* symbols, local common: Lcomm. (line 6) 17715* symver directive: Symver. (line 6) 17716* syntax compatibility, i386: i386-Syntax. (line 6) 17717* syntax compatibility, x86-64: i386-Syntax. (line 6) 17718* syntax, BFIN: BFIN Syntax. (line 6) 17719* syntax, D10V: D10V-Syntax. (line 6) 17720* syntax, D30V: D30V-Syntax. (line 6) 17721* syntax, M32C: M32C-Modifiers. (line 6) 17722* syntax, M680x0: M68K-Syntax. (line 8) 17723* syntax, M68HC11 <1>: M68HC11-Modifiers. (line 6) 17724* syntax, M68HC11: M68HC11-Syntax. (line 6) 17725* syntax, machine-independent: Syntax. (line 6) 17726* syntax, Xtensa assembler: Xtensa Syntax. (line 6) 17727* sysproc directive, i960: Directives-i960. (line 37) 17728* tab (\t): Strings. (line 27) 17729* tab directive, TIC54X: TIC54X-Directives. (line 248) 17730* tag directive: Tag. (line 6) 17731* tag directive, TIC54X: TIC54X-Directives. (line 217) 17732* tdaoff pseudo-op, V850: V850 Opcodes. (line 81) 17733* temporary symbol names: Symbol Names. (line 22) 17734* text and data sections, joining: R. (line 6) 17735* text directive: Text. (line 6) 17736* text section: Ld Sections. (line 9) 17737* tfloat directive, i386: i386-Float. (line 14) 17738* tfloat directive, x86-64: i386-Float. (line 14) 17739* thumb directive, ARM: ARM Directives. (line 33) 17740* Thumb support: ARM-Dependent. (line 6) 17741* thumb_func directive, ARM: ARM Directives. (line 43) 17742* thumb_set directive, ARM: ARM Directives. (line 51) 17743* TIC54X builtin math functions: TIC54X-Builtins. (line 6) 17744* TIC54X machine directives: TIC54X-Directives. (line 6) 17745* TIC54X memory-mapped registers: TIC54X-MMRegs. (line 6) 17746* TIC54X options: TIC54X-Opts. (line 6) 17747* TIC54X subsym builtins: TIC54X-Macros. (line 16) 17748* TIC54X support: TIC54X-Dependent. (line 6) 17749* TIC54X-specific macros: TIC54X-Macros. (line 6) 17750* time, total for assembly: statistics. (line 6) 17751* title directive: Title. (line 6) 17752* tp register, V850: V850-Regs. (line 20) 17753* transform directive: Transform Directive. (line 6) 17754* trusted compiler: f. (line 6) 17755* turning preprocessing on and off: Preprocessing. (line 26) 17756* type directive (COFF version): Type. (line 11) 17757* type directive (ELF version): Type. (line 22) 17758* type of a symbol: Symbol Type. (line 6) 17759* ualong directive, SH: SH Directives. (line 6) 17760* uaword directive, SH: SH Directives. (line 6) 17761* ubyte directive, TIC54X: TIC54X-Directives. (line 36) 17762* uchar directive, TIC54X: TIC54X-Directives. (line 36) 17763* uhalf directive, TIC54X: TIC54X-Directives. (line 111) 17764* uint directive, TIC54X: TIC54X-Directives. (line 111) 17765* uleb128 directive: Uleb128. (line 6) 17766* ulong directive, TIC54X: TIC54X-Directives. (line 135) 17767* undefined section: Ld Sections. (line 36) 17768* union directive, TIC54X: TIC54X-Directives. (line 251) 17769* unreq directive, ARM: ARM Directives. (line 18) 17770* unsegm: Z8000 Directives. (line 14) 17771* usect directive, TIC54X: TIC54X-Directives. (line 263) 17772* ushort directive, TIC54X: TIC54X-Directives. (line 111) 17773* uword directive, TIC54X: TIC54X-Directives. (line 111) 17774* V850 command line options: V850 Options. (line 9) 17775* V850 floating point (IEEE): V850 Floating Point. (line 6) 17776* V850 line comment character: V850-Chars. (line 6) 17777* V850 machine directives: V850 Directives. (line 6) 17778* V850 opcodes: V850 Opcodes. (line 6) 17779* V850 options (none): V850 Options. (line 6) 17780* V850 register names: V850-Regs. (line 6) 17781* V850 support: V850-Dependent. (line 6) 17782* val directive: Val. (line 6) 17783* value attribute, COFF: Val. (line 6) 17784* value of a symbol: Symbol Value. (line 6) 17785* var directive, TIC54X: TIC54X-Directives. (line 273) 17786* VAX bitfields not supported: VAX-no. (line 6) 17787* VAX branch improvement: VAX-branch. (line 6) 17788* VAX command-line options ignored: VAX-Opts. (line 6) 17789* VAX displacement sizing character: VAX-operands. (line 12) 17790* VAX floating point: VAX-float. (line 6) 17791* VAX immediate character: VAX-operands. (line 6) 17792* VAX indirect character: VAX-operands. (line 9) 17793* VAX machine directives: VAX-directives. (line 6) 17794* VAX opcode mnemonics: VAX-opcodes. (line 6) 17795* VAX operand notation: VAX-operands. (line 6) 17796* VAX register names: VAX-operands. (line 17) 17797* VAX support: Vax-Dependent. (line 6) 17798* Vax-11 C compatibility: VAX-Opts. (line 42) 17799* VAX/VMS options: VAX-Opts. (line 42) 17800* version directive: Version. (line 6) 17801* version directive, TIC54X: TIC54X-Directives. (line 277) 17802* version of assembler: v. (line 6) 17803* versions of symbols: Symver. (line 6) 17804* visibility <1>: Protected. (line 6) 17805* visibility <2>: Internal. (line 6) 17806* visibility: Hidden. (line 6) 17807* VMS (VAX) options: VAX-Opts. (line 42) 17808* vtable_entry directive: VTableEntry. (line 6) 17809* vtable_inherit directive: VTableInherit. (line 6) 17810* warning directive: Warning. (line 6) 17811* warning for altered difference tables: K. (line 6) 17812* warning messages: Errors. (line 6) 17813* warnings, causing error: W. (line 16) 17814* warnings, M32R: M32R-Warnings. (line 6) 17815* warnings, suppressing: W. (line 11) 17816* warnings, switching on: W. (line 19) 17817* weak directive: Weak. (line 6) 17818* weakref directive: Weakref. (line 6) 17819* whitespace: Whitespace. (line 6) 17820* whitespace, removed by preprocessor: Preprocessing. (line 7) 17821* wide floating point directives, VAX: VAX-directives. (line 10) 17822* width directive, TIC54X: TIC54X-Directives. (line 127) 17823* Width of continuation lines of disassembly output: listing. (line 20) 17824* Width of first line disassembly output: listing. (line 15) 17825* Width of source line output: listing. (line 27) 17826* wmsg directive, TIC54X: TIC54X-Directives. (line 77) 17827* word directive: Word. (line 6) 17828* word directive, ARC: ARC Directives. (line 174) 17829* word directive, H8/300: H8/300 Directives. (line 6) 17830* word directive, i386: i386-Float. (line 21) 17831* word directive, SPARC: Sparc-Directives. (line 51) 17832* word directive, TIC54X: TIC54X-Directives. (line 111) 17833* word directive, x86-64: i386-Float. (line 21) 17834* writing patterns in memory: Fill. (line 6) 17835* wval: Z8000 Directives. (line 24) 17836* x86-64 arch directive: i386-Arch. (line 6) 17837* x86-64 att_syntax pseudo op: i386-Syntax. (line 6) 17838* x86-64 conversion instructions: i386-Mnemonics. (line 32) 17839* x86-64 floating point: i386-Float. (line 6) 17840* x86-64 immediate operands: i386-Syntax. (line 15) 17841* x86-64 instruction naming: i386-Mnemonics. (line 6) 17842* x86-64 intel_syntax pseudo op: i386-Syntax. (line 6) 17843* x86-64 jump optimization: i386-Jumps. (line 6) 17844* x86-64 jump, call, return: i386-Syntax. (line 38) 17845* x86-64 jump/call operands: i386-Syntax. (line 15) 17846* x86-64 memory references: i386-Memory. (line 6) 17847* x86-64 options: i386-Options. (line 6) 17848* x86-64 register operands: i386-Syntax. (line 15) 17849* x86-64 registers: i386-Regs. (line 6) 17850* x86-64 sections: i386-Syntax. (line 44) 17851* x86-64 size suffixes: i386-Syntax. (line 29) 17852* x86-64 source, destination operands: i386-Syntax. (line 22) 17853* x86-64 support: i386-Dependent. (line 6) 17854* x86-64 syntax compatibility: i386-Syntax. (line 6) 17855* xfloat directive, TIC54X: TIC54X-Directives. (line 64) 17856* xlong directive, TIC54X: TIC54X-Directives. (line 135) 17857* Xtensa architecture: Xtensa-Dependent. (line 6) 17858* Xtensa assembler syntax: Xtensa Syntax. (line 6) 17859* Xtensa directives: Xtensa Directives. (line 6) 17860* Xtensa opcode names: Xtensa Opcodes. (line 6) 17861* Xtensa register names: Xtensa Registers. (line 6) 17862* xword directive, SPARC: Sparc-Directives. (line 55) 17863* Z80 $: Z80-Chars. (line 8) 17864* Z80 ': Z80-Chars. (line 13) 17865* Z80 floating point: Z80 Floating Point. (line 6) 17866* Z80 line comment character: Z80-Chars. (line 6) 17867* Z80 options: Z80 Options. (line 6) 17868* Z80 registers: Z80-Regs. (line 6) 17869* Z80 support: Z80-Dependent. (line 6) 17870* Z80 Syntax: Z80 Options. (line 47) 17871* Z80, \: Z80-Chars. (line 11) 17872* Z80, case sensitivity: Z80-Case. (line 6) 17873* Z80-only directives: Z80 Directives. (line 9) 17874* Z800 addressing modes: Z8000-Addressing. (line 6) 17875* Z8000 directives: Z8000 Directives. (line 6) 17876* Z8000 line comment character: Z8000-Chars. (line 6) 17877* Z8000 line separator: Z8000-Chars. (line 8) 17878* Z8000 opcode summary: Z8000 Opcodes. (line 6) 17879* Z8000 options: Z8000 Options. (line 6) 17880* Z8000 registers: Z8000-Regs. (line 6) 17881* Z8000 support: Z8000-Dependent. (line 6) 17882* zdaoff pseudo-op, V850: V850 Opcodes. (line 99) 17883* zero register, V850: V850-Regs. (line 7) 17884* zero-terminated strings: Asciz. (line 6) 17885 17886 17887 17888Tag Table: 17889Node: Top875 17890Node: Overview1792 17891Node: Manual28284 17892Node: GNU Assembler29228 17893Node: Object Formats30399 17894Node: Command Line30851 17895Node: Input Files31938 17896Node: Object33919 17897Node: Errors34815 17898Node: Invoking36010 17899Node: a37959 17900Node: alternate39731 17901Node: D39903 17902Node: f40136 17903Node: I40644 17904Node: K41188 17905Node: L41491 17906Node: listing42328 17907Node: M43920 17908Node: MD48321 17909Node: o48747 17910Node: R49202 17911Node: statistics50232 17912Node: traditional-format50639 17913Node: v51112 17914Node: W51387 17915Node: Z52294 17916Node: Syntax52816 17917Node: Preprocessing53407 17918Node: Whitespace54970 17919Node: Comments55366 17920Node: Symbol Intro57519 17921Node: Statements58209 17922Node: Constants60125 17923Node: Characters60756 17924Node: Strings61258 17925Node: Chars63424 17926Node: Numbers64178 17927Node: Integers64718 17928Node: Bignums65374 17929Node: Flonums65730 17930Node: Sections67477 17931Node: Secs Background67855 17932Node: Ld Sections72894 17933Node: As Sections75278 17934Node: Sub-Sections76188 17935Node: bss79335 17936Node: Symbols80285 17937Node: Labels80933 17938Node: Setting Symbols81664 17939Node: Symbol Names82160 17940Node: Dot86525 17941Node: Symbol Attributes86972 17942Node: Symbol Value87709 17943Node: Symbol Type88754 17944Node: a.out Symbols89142 17945Node: Symbol Desc89404 17946Node: Symbol Other89699 17947Node: COFF Symbols89868 17948Node: SOM Symbols90541 17949Node: Expressions90983 17950Node: Empty Exprs91732 17951Node: Integer Exprs92079 17952Node: Arguments92474 17953Node: Operators93580 17954Node: Prefix Ops93915 17955Node: Infix Ops94243 17956Node: Pseudo Ops96633 17957Node: Abort101828 17958Node: ABORT102233 17959Node: Align102420 17960Node: Ascii104702 17961Node: Asciz105011 17962Node: Balign105256 17963Node: Byte107119 17964Node: Comm107357 17965Node: CFI directives108731 17966Node: LNS directives111083 17967Node: Data113160 17968Node: Def113487 17969Node: Desc113719 17970Node: Dim114219 17971Node: Double114476 17972Node: Eject114814 17973Node: Else114989 17974Node: Elseif115285 17975Node: End115575 17976Node: Endef115790 17977Node: Endfunc115967 17978Node: Endif116142 17979Node: Equ116403 17980Node: Equiv116912 17981Node: Eqv117468 17982Node: Err117832 17983Node: Error118143 17984Node: Exitm118588 17985Node: Extern118757 17986Node: Fail119018 17987Node: File119463 17988Node: Fill119940 17989Node: Float120904 17990Node: Func121246 17991Node: Global121836 17992Node: Hidden122586 17993Node: hword123165 17994Node: Ident123493 17995Node: If124067 17996Node: Incbin127126 17997Node: Include127821 17998Node: Int128372 17999Node: Internal128753 18000Node: Irp129401 18001Node: Irpc130298 18002Node: Lcomm131215 18003Node: Lflags131963 18004Node: Line132157 18005Node: Linkonce133076 18006Node: Ln134305 18007Node: MRI134466 18008Node: List134804 18009Node: Long135412 18010Node: Macro135598 18011Node: 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18053Node: Word170856 18054Node: Deprecated172702 18055Node: Machine Dependencies172937 18056Node: Alpha-Dependent175701 18057Node: Alpha Notes176115 18058Node: Alpha Options176396 18059Node: Alpha Syntax178594 18060Node: Alpha-Chars179063 18061Node: Alpha-Regs179294 18062Node: Alpha-Relocs179681 18063Node: Alpha Floating Point185939 18064Node: Alpha Directives186161 18065Node: Alpha Opcodes191684 18066Node: ARC-Dependent191979 18067Node: ARC Options192362 18068Node: ARC Syntax193431 18069Node: ARC-Chars193663 18070Node: ARC-Regs193795 18071Node: ARC Floating Point193919 18072Node: ARC Directives194230 18073Node: ARC Opcodes200201 18074Node: ARM-Dependent200427 18075Node: ARM Options200854 18076Node: ARM Syntax206648 18077Node: ARM-Chars206880 18078Node: ARM-Regs207404 18079Node: ARM Floating Point207589 18080Node: ARM Directives207788 18081Node: ARM Opcodes214152 18082Node: ARM Mapping Symbols216240 18083Node: BFIN-Dependent217019 18084Node: BFIN Syntax217273 18085Node: BFIN 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i386-Float302269 18152Node: i386-SIMD304098 18153Node: i386-16bit305207 18154Node: i386-Bugs307245 18155Node: i386-Arch307999 18156Node: i386-Notes310180 18157Node: i860-Dependent311038 18158Node: Notes-i860311434 18159Node: Options-i860312339 18160Node: Directives-i860313702 18161Node: Opcodes for i860314771 18162Node: i960-Dependent316938 18163Node: Options-i960317341 18164Node: Floating Point-i960321225 18165Node: Directives-i960321493 18166Node: Opcodes for i960323527 18167Node: callj-i960324144 18168Node: Compare-and-branch-i960324633 18169Node: IA-64-Dependent326537 18170Node: IA-64 Options326838 18171Node: IA-64 Syntax329998 18172Node: IA-64-Chars330361 18173Node: IA-64-Regs330591 18174Node: IA-64-Bits331517 18175Node: IA-64 Opcodes332026 18176Node: IP2K-Dependent332298 18177Node: IP2K-Opts332526 18178Node: M32C-Dependent333006 18179Node: M32C-Opts333530 18180Node: M32C-Modifiers333814 18181Node: M32R-Dependent335601 18182Node: M32R-Opts335922 18183Node: M32R-Directives340088 18184Node: M32R-Warnings344063 18185Node: M68K-Dependent347069 18186Node: M68K-Opts347536 18187Node: M68K-Syntax354915 18188Node: M68K-Moto-Syntax356754 18189Node: M68K-Float359343 18190Node: M68K-Directives359863 18191Node: M68K-opcodes361189 18192Node: M68K-Branch361415 18193Node: M68K-Chars365613 18194Node: M68HC11-Dependent366026 18195Node: M68HC11-Opts366557 18196Node: M68HC11-Syntax370373 18197Node: M68HC11-Modifiers372587 18198Node: M68HC11-Directives374415 18199Node: M68HC11-Float375791 18200Node: M68HC11-opcodes376319 18201Node: M68HC11-Branch376501 18202Node: MIPS-Dependent378948 18203Node: MIPS Opts380038 18204Node: MIPS Object387365 18205Node: MIPS Stabs388931 18206Node: MIPS symbol sizes389653 18207Node: MIPS ISA391322 18208Node: MIPS autoextend392471 18209Node: MIPS insn393201 18210Node: MIPS option stack393698 18211Node: MIPS ASE instruction generation overrides394472 18212Node: MMIX-Dependent395689 18213Node: MMIX-Opts396069 18214Node: MMIX-Expand399673 18215Node: MMIX-Syntax400988 18216Ref: mmixsite401345 18217Node: MMIX-Chars402186 18218Node: MMIX-Symbols402840 18219Node: MMIX-Regs404908 18220Node: MMIX-Pseudos405933 18221Ref: MMIX-loc406074 18222Ref: MMIX-local407154 18223Ref: MMIX-is407686 18224Ref: MMIX-greg407957 18225Ref: GREG-base408876 18226Ref: MMIX-byte410193 18227Ref: MMIX-constants410664 18228Ref: MMIX-prefix411310 18229Ref: MMIX-spec411684 18230Node: MMIX-mmixal412018 18231Node: MSP430-Dependent415515 18232Node: MSP430 Options415981 18233Node: MSP430 Syntax416267 18234Node: MSP430-Macros416583 18235Node: MSP430-Chars417314 18236Node: MSP430-Regs417627 18237Node: MSP430-Ext418187 18238Node: MSP430 Floating Point420008 18239Node: MSP430 Directives420232 18240Node: MSP430 Opcodes421023 18241Node: MSP430 Profiling Capability421418 18242Node: PDP-11-Dependent423747 18243Node: PDP-11-Options424136 18244Node: PDP-11-Pseudos429207 18245Node: PDP-11-Syntax429552 18246Node: PDP-11-Mnemonics430303 18247Node: PDP-11-Synthetic430605 18248Node: PJ-Dependent430823 18249Node: PJ Options431048 18250Node: PPC-Dependent431325 18251Node: PowerPC-Opts431612 18252Node: PowerPC-Pseudo433687 18253Node: SH-Dependent434286 18254Node: SH Options434698 18255Node: SH Syntax435626 18256Node: SH-Chars435899 18257Node: SH-Regs436193 18258Node: SH-Addressing436807 18259Node: SH Floating Point437716 18260Node: SH Directives438810 18261Node: SH Opcodes439180 18262Node: SH64-Dependent443502 18263Node: SH64 Options443865 18264Node: SH64 Syntax445582 18265Node: SH64-Chars445865 18266Node: SH64-Regs446165 18267Node: SH64-Addressing447261 18268Node: SH64 Directives448444 18269Node: SH64 Opcodes449554 18270Node: Sparc-Dependent450270 18271Node: Sparc-Opts450655 18272Node: Sparc-Aligned-Data452912 18273Node: Sparc-Float453767 18274Node: Sparc-Directives453968 18275Node: TIC54X-Dependent455928 18276Node: TIC54X-Opts456654 18277Node: TIC54X-Block457697 18278Node: TIC54X-Env458057 18279Node: TIC54X-Constants458405 18280Node: TIC54X-Subsyms458807 18281Node: TIC54X-Locals460716 18282Node: TIC54X-Builtins461460 18283Node: TIC54X-Ext463931 18284Node: TIC54X-Directives464502 18285Node: TIC54X-Macros475404 18286Node: TIC54X-MMRegs477514 18287Node: Z80-Dependent477730 18288Node: Z80 Options478118 18289Node: Z80 Syntax479541 18290Node: Z80-Chars480213 18291Node: Z80-Regs480746 18292Node: Z80-Case481098 18293Node: Z80 Floating Point481543 18294Node: Z80 Directives481737 18295Node: Z80 Opcodes483362 18296Node: Z8000-Dependent484704 18297Node: Z8000 Options485665 18298Node: Z8000 Syntax485882 18299Node: Z8000-Chars486172 18300Node: Z8000-Regs486405 18301Node: Z8000-Addressing487195 18302Node: Z8000 Directives488312 18303Node: Z8000 Opcodes489921 18304Node: Vax-Dependent499863 18305Node: VAX-Opts500380 18306Node: VAX-float504115 18307Node: VAX-directives504747 18308Node: VAX-opcodes505608 18309Node: VAX-branch505997 18310Node: VAX-operands508504 18311Node: VAX-no509267 18312Node: V850-Dependent509504 18313Node: V850 Options509902 18314Node: V850 Syntax512291 18315Node: V850-Chars512531 18316Node: V850-Regs512696 18317Node: V850 Floating Point514264 18318Node: V850 Directives514470 18319Node: V850 Opcodes515613 18320Node: Xtensa-Dependent521505 18321Node: Xtensa Options522234 18322Node: Xtensa Syntax525005 18323Node: Xtensa Opcodes526894 18324Node: Xtensa Registers528688 18325Node: Xtensa Optimizations529321 18326Node: Density Instructions529773 18327Node: Xtensa Automatic Alignment530875 18328Node: Xtensa Relaxation533621 18329Node: Xtensa Branch Relaxation534529 18330Node: Xtensa Call Relaxation535901 18331Node: Xtensa Immediate Relaxation537687 18332Node: Xtensa Directives540261 18333Node: Schedule Directive541969 18334Node: Longcalls Directive542309 18335Node: Transform Directive542853 18336Node: Literal Directive543595 18337Node: Literal Position Directive545380 18338Node: Literal Prefix Directive547079 18339Node: Absolute Literals Directive549242 18340Node: Reporting Bugs550549 18341Node: Bug Criteria551273 18342Node: Bug Reporting552038 18343Node: Acknowledgements558671 18344Ref: Acknowledgements-Footnote-1563569 18345Node: GNU Free Documentation License563595 18346Node: Index583310 18347 18348End Tag Table 18349