1/* Define per-register tables for data flow info and register allocation. 2 Copyright (C) 1987-2015 Free Software Foundation, Inc. 3 4This file is part of GCC. 5 6GCC is free software; you can redistribute it and/or modify it under 7the terms of the GNU General Public License as published by the Free 8Software Foundation; either version 3, or (at your option) any later 9version. 10 11GCC is distributed in the hope that it will be useful, but WITHOUT ANY 12WARRANTY; without even the implied warranty of MERCHANTABILITY or 13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14for more details. 15 16You should have received a copy of the GNU General Public License 17along with GCC; see the file COPYING3. If not see 18<http://www.gnu.org/licenses/>. */ 19 20#ifndef GCC_REGS_H 21#define GCC_REGS_H 22 23#include "machmode.h" 24#include "hard-reg-set.h" 25#include "rtl.h" 26 27#define REG_BYTES(R) mode_size[(int) GET_MODE (R)] 28 29/* When you only have the mode of a pseudo register before it has a hard 30 register chosen for it, this reports the size of each hard register 31 a pseudo in such a mode would get allocated to. A target may 32 override this. */ 33 34#ifndef REGMODE_NATURAL_SIZE 35#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD 36#endif 37 38/* Maximum register number used in this function, plus one. */ 39 40extern int max_regno; 41 42/* REG_N_REFS and REG_N_SETS are initialized by a call to 43 regstat_init_n_sets_and_refs from the current values of 44 DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS 45 should only be used if a pass need to change these values in some 46 magical way or the pass needs to have accurate values for these 47 and is not using incremental df scanning. 48 49 At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call 50 should be made to regstat_free_n_sets_and_refs. 51 52 Local alloc seems to play pretty loose with these values. 53 REG_N_REFS is set to 0 if the register is used in an asm. 54 Furthermore, local_alloc calls regclass to hack both REG_N_REFS and 55 REG_N_SETS for three address insns. Other passes seem to have 56 other special values. */ 57 58 59 60/* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */ 61 62struct regstat_n_sets_and_refs_t 63{ 64 int sets; /* # of times (REG n) is set */ 65 int refs; /* # of times (REG n) is used or set */ 66}; 67 68extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs; 69 70/* Indexed by n, gives number of times (REG n) is used or set. */ 71static inline int 72REG_N_REFS (int regno) 73{ 74 return regstat_n_sets_and_refs[regno].refs; 75} 76 77/* Indexed by n, gives number of times (REG n) is used or set. */ 78#define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V) 79#define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V) 80 81/* Indexed by n, gives number of times (REG n) is set. */ 82static inline int 83REG_N_SETS (int regno) 84{ 85 return regstat_n_sets_and_refs[regno].sets; 86} 87 88/* Indexed by n, gives number of times (REG n) is set. */ 89#define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V) 90#define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V) 91 92/* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise. */ 93extern bool reg_is_parm_p (rtx); 94 95/* Functions defined in regstat.c. */ 96extern void regstat_init_n_sets_and_refs (void); 97extern void regstat_free_n_sets_and_refs (void); 98extern void regstat_compute_ri (void); 99extern void regstat_free_ri (void); 100extern bitmap regstat_get_setjmp_crosses (void); 101extern void regstat_compute_calls_crossed (void); 102extern void regstat_free_calls_crossed (void); 103extern void dump_reg_info (FILE *); 104 105/* Register information indexed by register number. This structure is 106 initialized by calling regstat_compute_ri and is destroyed by 107 calling regstat_free_ri. */ 108struct reg_info_t 109{ 110 int freq; /* # estimated frequency (REG n) is used or set */ 111 int deaths; /* # of times (REG n) dies */ 112 int live_length; /* # of instructions (REG n) is live */ 113 int calls_crossed; /* # of calls (REG n) is live across */ 114 int freq_calls_crossed; /* # estimated frequency (REG n) crosses call */ 115 int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */ 116 int basic_block; /* # of basic blocks (REG n) is used in */ 117}; 118 119extern struct reg_info_t *reg_info_p; 120 121/* The number allocated elements of reg_info_p. */ 122extern size_t reg_info_p_size; 123 124/* Estimate frequency of references to register N. */ 125 126#define REG_FREQ(N) (reg_info_p[N].freq) 127 128/* The weights for each insn varies from 0 to REG_FREQ_BASE. 129 This constant does not need to be high, as in infrequently executed 130 regions we want to count instructions equivalently to optimize for 131 size instead of speed. */ 132#define REG_FREQ_MAX 1000 133 134/* Compute register frequency from the BB frequency. When optimizing for size, 135 or profile driven feedback is available and the function is never executed, 136 frequency is always equivalent. Otherwise rescale the basic block 137 frequency. */ 138#define REG_FREQ_FROM_BB(bb) (optimize_function_for_size_p (cfun) \ 139 ? REG_FREQ_MAX \ 140 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ 141 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ 142 : 1) 143 144/* Indexed by N, gives number of insns in which register N dies. 145 Note that if register N is live around loops, it can die 146 in transitions between basic blocks, and that is not counted here. 147 So this is only a reliable indicator of how many regions of life there are 148 for registers that are contained in one basic block. */ 149 150#define REG_N_DEATHS(N) (reg_info_p[N].deaths) 151 152/* Get the number of consecutive words required to hold pseudo-reg N. */ 153 154#define PSEUDO_REGNO_SIZE(N) \ 155 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \ 156 / UNITS_PER_WORD) 157 158/* Get the number of bytes required to hold pseudo-reg N. */ 159 160#define PSEUDO_REGNO_BYTES(N) \ 161 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) 162 163/* Get the machine mode of pseudo-reg N. */ 164 165#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N]) 166 167/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */ 168 169#define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed) 170#define REG_FREQ_CALLS_CROSSED(N) (reg_info_p[N].freq_calls_crossed) 171 172/* Indexed by N, gives number of CALL_INSNS that may throw, across which 173 (REG n) is live. */ 174 175#define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed) 176 177/* Total number of instructions at which (REG n) is live. 178 179 This is set in regstat.c whenever register info is requested and 180 remains valid for the rest of the compilation of the function; it is 181 used to control register allocation. The larger this is, the less 182 priority (REG n) gets for allocation in a hard register (in IRA in 183 priority-coloring mode). 184 185 Negative values are special: -1 is used to mark a pseudo reg that 186 should not be allocated to a hard register, because it crosses a 187 setjmp call. */ 188 189#define REG_LIVE_LENGTH(N) (reg_info_p[N].live_length) 190 191/* Indexed by n, gives number of basic block that (REG n) is used in. 192 If the value is REG_BLOCK_GLOBAL (-1), 193 it means (REG n) is used in more than one basic block. 194 REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know. 195 This information remains valid for the rest of the compilation 196 of the current function; it is used to control register allocation. */ 197 198#define REG_BLOCK_UNKNOWN 0 199#define REG_BLOCK_GLOBAL -1 200 201#define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block) 202 203/* Vector of substitutions of register numbers, 204 used to map pseudo regs into hardware regs. 205 206 This can't be folded into reg_n_info without changing all of the 207 machine dependent directories, since the reload functions 208 in the machine dependent files access it. */ 209 210extern short *reg_renumber; 211 212/* Flag set by local-alloc or global-alloc if they decide to allocate 213 something in a call-clobbered register. */ 214 215extern int caller_save_needed; 216 217/* Select a register mode required for caller save of hard regno REGNO. */ 218#ifndef HARD_REGNO_CALLER_SAVE_MODE 219#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ 220 choose_hard_reg_mode (REGNO, NREGS, false) 221#endif 222 223/* Registers that get partially clobbered by a call in a given mode. 224 These must not be call used registers. */ 225#ifndef HARD_REGNO_CALL_PART_CLOBBERED 226#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0 227#endif 228 229/* Target-dependent globals. */ 230struct target_regs { 231 /* For each starting hard register, the number of consecutive hard 232 registers that a given machine mode occupies. */ 233 unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; 234 235 /* For each hard register, the widest mode object that it can contain. 236 This will be a MODE_INT mode if the register can hold integers. Otherwise 237 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the 238 register. */ 239 machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER]; 240 241 /* Vector indexed by machine mode saying whether there are regs of 242 that mode. */ 243 bool x_have_regs_of_mode[MAX_MACHINE_MODE]; 244 245 /* 1 if the corresponding class contains a register of the given mode. */ 246 char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE]; 247 248 /* Record for each mode whether we can move a register directly to or 249 from an object of that mode in memory. If we can't, we won't try 250 to use that mode directly when accessing a field of that mode. */ 251 char x_direct_load[NUM_MACHINE_MODES]; 252 char x_direct_store[NUM_MACHINE_MODES]; 253 254 /* Record for each mode whether we can float-extend from memory. */ 255 bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES]; 256}; 257 258extern struct target_regs default_target_regs; 259#if SWITCHABLE_TARGET 260extern struct target_regs *this_target_regs; 261#else 262#define this_target_regs (&default_target_regs) 263#endif 264 265#define hard_regno_nregs \ 266 (this_target_regs->x_hard_regno_nregs) 267#define reg_raw_mode \ 268 (this_target_regs->x_reg_raw_mode) 269#define have_regs_of_mode \ 270 (this_target_regs->x_have_regs_of_mode) 271#define contains_reg_of_mode \ 272 (this_target_regs->x_contains_reg_of_mode) 273#define direct_load \ 274 (this_target_regs->x_direct_load) 275#define direct_store \ 276 (this_target_regs->x_direct_store) 277#define float_extend_from_mem \ 278 (this_target_regs->x_float_extend_from_mem) 279 280/* Return an exclusive upper bound on the registers occupied by hard 281 register (reg:MODE REGNO). */ 282 283static inline unsigned int 284end_hard_regno (machine_mode mode, unsigned int regno) 285{ 286 return regno + hard_regno_nregs[regno][(int) mode]; 287} 288 289/* Likewise for hard register X. */ 290 291#define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X)) 292 293/* Likewise for hard or pseudo register X. */ 294 295#define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1) 296 297/* Add to REGS all the registers required to store a value of mode MODE 298 in register REGNO. */ 299 300static inline void 301add_to_hard_reg_set (HARD_REG_SET *regs, machine_mode mode, 302 unsigned int regno) 303{ 304 unsigned int end_regno; 305 306 end_regno = end_hard_regno (mode, regno); 307 do 308 SET_HARD_REG_BIT (*regs, regno); 309 while (++regno < end_regno); 310} 311 312/* Likewise, but remove the registers. */ 313 314static inline void 315remove_from_hard_reg_set (HARD_REG_SET *regs, machine_mode mode, 316 unsigned int regno) 317{ 318 unsigned int end_regno; 319 320 end_regno = end_hard_regno (mode, regno); 321 do 322 CLEAR_HARD_REG_BIT (*regs, regno); 323 while (++regno < end_regno); 324} 325 326/* Return true if REGS contains the whole of (reg:MODE REGNO). */ 327 328static inline bool 329in_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode, 330 unsigned int regno) 331{ 332 unsigned int end_regno; 333 334 gcc_assert (HARD_REGISTER_NUM_P (regno)); 335 336 if (!TEST_HARD_REG_BIT (regs, regno)) 337 return false; 338 339 end_regno = end_hard_regno (mode, regno); 340 341 if (!HARD_REGISTER_NUM_P (end_regno - 1)) 342 return false; 343 344 while (++regno < end_regno) 345 if (!TEST_HARD_REG_BIT (regs, regno)) 346 return false; 347 348 return true; 349} 350 351/* Return true if (reg:MODE REGNO) includes an element of REGS. */ 352 353static inline bool 354overlaps_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode, 355 unsigned int regno) 356{ 357 unsigned int end_regno; 358 359 if (TEST_HARD_REG_BIT (regs, regno)) 360 return true; 361 362 end_regno = end_hard_regno (mode, regno); 363 while (++regno < end_regno) 364 if (TEST_HARD_REG_BIT (regs, regno)) 365 return true; 366 367 return false; 368} 369 370/* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of 371 REGNO and MODE. */ 372 373static inline void 374add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno, 375 int nregs) 376{ 377 while (nregs-- > 0) 378 SET_HARD_REG_BIT (*regs, regno + nregs); 379} 380 381/* Likewise, but remove the registers. */ 382 383static inline void 384remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno, 385 int nregs) 386{ 387 while (nregs-- > 0) 388 CLEAR_HARD_REG_BIT (*regs, regno + nregs); 389} 390 391/* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of 392 REGNO and MODE. */ 393static inline bool 394range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, 395 int nregs) 396{ 397 while (nregs-- > 0) 398 if (TEST_HARD_REG_BIT (set, regno + nregs)) 399 return true; 400 return false; 401} 402 403/* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of 404 REGNO and MODE. */ 405static inline bool 406range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs) 407{ 408 while (nregs-- > 0) 409 if (!TEST_HARD_REG_BIT (set, regno + nregs)) 410 return false; 411 return true; 412} 413 414/* Get registers used by given function call instruction. */ 415extern bool get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set, 416 HARD_REG_SET default_set); 417 418#endif /* GCC_REGS_H */ 419