1/* Definitions of target machine for GNU compiler, for MMIX. 2 Copyright (C) 2000-2015 Free Software Foundation, Inc. 3 Contributed by Hans-Peter Nilsson (hp@bitrange.com) 4 5This file is part of GCC. 6 7GCC is free software; you can redistribute it and/or modify 8it under the terms of the GNU General Public License as published by 9the Free Software Foundation; either version 3, or (at your option) 10any later version. 11 12GCC is distributed in the hope that it will be useful, 13but WITHOUT ANY WARRANTY; without even the implied warranty of 14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15GNU General Public License for more details. 16 17You should have received a copy of the GNU General Public License 18along with GCC; see the file COPYING3. If not see 19<http://www.gnu.org/licenses/>. */ 20 21#include "config.h" 22#include "system.h" 23#include "coretypes.h" 24#include "tm.h" 25#include "rtl.h" 26#include "regs.h" 27#include "hard-reg-set.h" 28#include "hashtab.h" 29#include "insn-config.h" 30#include "output.h" 31#include "predict.h" 32#include "vec.h" 33#include "hash-set.h" 34#include "machmode.h" 35#include "input.h" 36#include "function.h" 37#include "dominance.h" 38#include "cfg.h" 39#include "cfgrtl.h" 40#include "cfganal.h" 41#include "lcm.h" 42#include "cfgbuild.h" 43#include "cfgcleanup.h" 44#include "basic-block.h" 45#include "flags.h" 46#include "symtab.h" 47#include "wide-int.h" 48#include "inchash.h" 49#include "tree.h" 50#include "varasm.h" 51#include "stor-layout.h" 52#include "calls.h" 53#include "statistics.h" 54#include "double-int.h" 55#include "real.h" 56#include "fixed-value.h" 57#include "alias.h" 58#include "expmed.h" 59#include "dojump.h" 60#include "explow.h" 61#include "emit-rtl.h" 62#include "stmt.h" 63#include "expr.h" 64#include "diagnostic-core.h" 65#include "recog.h" 66#include "ggc.h" 67#include "dwarf2.h" 68#include "debug.h" 69#include "tm_p.h" 70#include "target.h" 71#include "target-def.h" 72#include "df.h" 73#include "tm-constrs.h" 74#include "builtins.h" 75 76/* First some local helper definitions. */ 77#define MMIX_FIRST_GLOBAL_REGNUM 32 78 79/* We'd need a current_function_has_landing_pad. It's marked as such when 80 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but 81 mostly. */ 82#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0) 83 84/* We have no means to tell DWARF 2 about the register stack, so we need 85 to store the return address on the stack if an exception can get into 86 this function. FIXME: Narrow condition. Before any whole-function 87 analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date 88 after reload_completed; it may contain incorrect information some time 89 before that. Within a RTL sequence (after a call to start_sequence, 90 such as in RTL expanders), leaf_function_p doesn't see all insns 91 (perhaps any insn). But regs_ever_live is up-to-date when 92 leaf_function_p () isn't, so we "or" them together to get accurate 93 information. FIXME: Some tweak to leaf_function_p might be 94 preferable. */ 95#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \ 96 (flag_exceptions \ 97 && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \ 98 || !leaf_function_p ())) 99 100#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \ 101 (crtl->calls_eh_return \ 102 && (EH_RETURN_DATA_REGNO (0) == REGNO \ 103 || EH_RETURN_DATA_REGNO (1) == REGNO \ 104 || EH_RETURN_DATA_REGNO (2) == REGNO \ 105 || EH_RETURN_DATA_REGNO (3) == REGNO)) 106 107/* For the default ABI, we rename registers at output-time to fill the gap 108 between the (statically partitioned) saved registers and call-clobbered 109 registers. In effect this makes unused call-saved registers to be used 110 as call-clobbered registers. The benefit comes from keeping the number 111 of local registers (value of rL) low, since there's a cost of 112 increasing rL and clearing unused (unset) registers with lower numbers. 113 Don't translate while outputting the prologue. */ 114#define MMIX_OUTPUT_REGNO(N) \ 115 (TARGET_ABI_GNU \ 116 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \ 117 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \ 118 || cfun == NULL \ 119 || cfun->machine == NULL \ 120 || cfun->machine->in_prologue \ 121 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \ 122 + cfun->machine->highest_saved_stack_register + 1)) 123 124/* The %d in "POP %d,0". */ 125#define MMIX_POP_ARGUMENT() \ 126 ((! TARGET_ABI_GNU \ 127 && crtl->return_rtx != NULL \ 128 && ! cfun->returns_struct) \ 129 ? (GET_CODE (crtl->return_rtx) == PARALLEL \ 130 ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \ 131 : 0) 132 133/* The canonical saved comparison operands for non-cc0 machines, set in 134 the compare expander. */ 135rtx mmix_compare_op0; 136rtx mmix_compare_op1; 137 138/* Declarations of locals. */ 139 140/* Intermediate for insn output. */ 141static int mmix_output_destination_register; 142 143static void mmix_option_override (void); 144static void mmix_asm_output_source_filename (FILE *, const char *); 145static void mmix_output_shiftvalue_op_from_str 146 (FILE *, const char *, int64_t); 147static void mmix_output_shifted_value (FILE *, int64_t); 148static void mmix_output_condition (FILE *, const_rtx, int); 149static void mmix_output_octa (FILE *, int64_t, int); 150static bool mmix_assemble_integer (rtx, unsigned int, int); 151static struct machine_function *mmix_init_machine_status (void); 152static void mmix_encode_section_info (tree, rtx, int); 153static const char *mmix_strip_name_encoding (const char *); 154static void mmix_emit_sp_add (HOST_WIDE_INT offset); 155static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT); 156static void mmix_target_asm_function_end_prologue (FILE *); 157static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT); 158static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t); 159static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t); 160static bool mmix_legitimate_address_p (machine_mode, rtx, bool); 161static bool mmix_legitimate_constant_p (machine_mode, rtx); 162static void mmix_reorg (void); 163static void mmix_asm_output_mi_thunk 164 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); 165static void mmix_setup_incoming_varargs 166 (cumulative_args_t, machine_mode, tree, int *, int); 167static void mmix_file_start (void); 168static void mmix_file_end (void); 169static bool mmix_rtx_costs (rtx, int, int, int, int *, bool); 170static int mmix_register_move_cost (machine_mode, 171 reg_class_t, reg_class_t); 172static rtx mmix_struct_value_rtx (tree, int); 173static machine_mode mmix_promote_function_mode (const_tree, 174 machine_mode, 175 int *, const_tree, int); 176static void mmix_function_arg_advance (cumulative_args_t, machine_mode, 177 const_tree, bool); 178static rtx mmix_function_arg_1 (const cumulative_args_t, machine_mode, 179 const_tree, bool, bool); 180static rtx mmix_function_incoming_arg (cumulative_args_t, machine_mode, 181 const_tree, bool); 182static rtx mmix_function_arg (cumulative_args_t, machine_mode, 183 const_tree, bool); 184static rtx mmix_function_value (const_tree, const_tree, bool); 185static rtx mmix_libcall_value (machine_mode, const_rtx); 186static bool mmix_function_value_regno_p (const unsigned int); 187static bool mmix_pass_by_reference (cumulative_args_t, 188 machine_mode, const_tree, bool); 189static bool mmix_frame_pointer_required (void); 190static void mmix_asm_trampoline_template (FILE *); 191static void mmix_trampoline_init (rtx, tree, rtx); 192static void mmix_print_operand (FILE *, rtx, int); 193static void mmix_print_operand_address (FILE *, rtx); 194static bool mmix_print_operand_punct_valid_p (unsigned char); 195static void mmix_conditional_register_usage (void); 196 197/* Target structure macros. Listed by node. See `Using and Porting GCC' 198 for a general description. */ 199 200/* Node: Function Entry */ 201 202#undef TARGET_ASM_BYTE_OP 203#define TARGET_ASM_BYTE_OP NULL 204#undef TARGET_ASM_ALIGNED_HI_OP 205#define TARGET_ASM_ALIGNED_HI_OP NULL 206#undef TARGET_ASM_ALIGNED_SI_OP 207#define TARGET_ASM_ALIGNED_SI_OP NULL 208#undef TARGET_ASM_ALIGNED_DI_OP 209#define TARGET_ASM_ALIGNED_DI_OP NULL 210#undef TARGET_ASM_INTEGER 211#define TARGET_ASM_INTEGER mmix_assemble_integer 212 213#undef TARGET_ASM_FUNCTION_PROLOGUE 214#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue 215 216#undef TARGET_ASM_FUNCTION_END_PROLOGUE 217#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue 218 219#undef TARGET_ASM_FUNCTION_EPILOGUE 220#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue 221 222#undef TARGET_PRINT_OPERAND 223#define TARGET_PRINT_OPERAND mmix_print_operand 224#undef TARGET_PRINT_OPERAND_ADDRESS 225#define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address 226#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P 227#define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p 228 229#undef TARGET_ENCODE_SECTION_INFO 230#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info 231#undef TARGET_STRIP_NAME_ENCODING 232#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding 233 234#undef TARGET_ASM_OUTPUT_MI_THUNK 235#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk 236#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK 237#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall 238#undef TARGET_ASM_FILE_START 239#define TARGET_ASM_FILE_START mmix_file_start 240#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE 241#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true 242#undef TARGET_ASM_FILE_END 243#define TARGET_ASM_FILE_END mmix_file_end 244#undef TARGET_ASM_OUTPUT_SOURCE_FILENAME 245#define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename 246 247#undef TARGET_CONDITIONAL_REGISTER_USAGE 248#define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage 249 250#undef TARGET_RTX_COSTS 251#define TARGET_RTX_COSTS mmix_rtx_costs 252#undef TARGET_ADDRESS_COST 253#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0 254 255#undef TARGET_REGISTER_MOVE_COST 256#define TARGET_REGISTER_MOVE_COST mmix_register_move_cost 257 258#undef TARGET_MACHINE_DEPENDENT_REORG 259#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg 260 261#undef TARGET_PROMOTE_FUNCTION_MODE 262#define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode 263 264#undef TARGET_FUNCTION_VALUE 265#define TARGET_FUNCTION_VALUE mmix_function_value 266#undef TARGET_LIBCALL_VALUE 267#define TARGET_LIBCALL_VALUE mmix_libcall_value 268#undef TARGET_FUNCTION_VALUE_REGNO_P 269#define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p 270 271#undef TARGET_FUNCTION_ARG 272#define TARGET_FUNCTION_ARG mmix_function_arg 273#undef TARGET_FUNCTION_INCOMING_ARG 274#define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg 275#undef TARGET_FUNCTION_ARG_ADVANCE 276#define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance 277#undef TARGET_STRUCT_VALUE_RTX 278#define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx 279#undef TARGET_SETUP_INCOMING_VARARGS 280#define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs 281#undef TARGET_PASS_BY_REFERENCE 282#define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference 283#undef TARGET_CALLEE_COPIES 284#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true 285 286#undef TARGET_PREFERRED_RELOAD_CLASS 287#define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class 288#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS 289#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class 290 291#undef TARGET_LEGITIMATE_ADDRESS_P 292#define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p 293#undef TARGET_LEGITIMATE_CONSTANT_P 294#define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p 295 296#undef TARGET_FRAME_POINTER_REQUIRED 297#define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required 298 299#undef TARGET_ASM_TRAMPOLINE_TEMPLATE 300#define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template 301#undef TARGET_TRAMPOLINE_INIT 302#define TARGET_TRAMPOLINE_INIT mmix_trampoline_init 303 304#undef TARGET_OPTION_OVERRIDE 305#define TARGET_OPTION_OVERRIDE mmix_option_override 306 307struct gcc_target targetm = TARGET_INITIALIZER; 308 309/* Functions that are expansions for target macros. 310 See Target Macros in `Using and Porting GCC'. */ 311 312/* TARGET_OPTION_OVERRIDE. */ 313 314static void 315mmix_option_override (void) 316{ 317 /* Should we err or should we warn? Hmm. At least we must neutralize 318 it. For example the wrong kind of case-tables will be generated with 319 PIC; we use absolute address items for mmixal compatibility. FIXME: 320 They could be relative if we just elide them to after all pertinent 321 labels. */ 322 if (flag_pic) 323 { 324 warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic"); 325 flag_pic = 0; 326 } 327} 328 329/* INIT_EXPANDERS. */ 330 331void 332mmix_init_expanders (void) 333{ 334 init_machine_status = mmix_init_machine_status; 335} 336 337/* Set the per-function data. */ 338 339static struct machine_function * 340mmix_init_machine_status (void) 341{ 342 return ggc_cleared_alloc<machine_function> (); 343} 344 345/* DATA_ABI_ALIGNMENT. 346 We have trouble getting the address of stuff that is located at other 347 than 32-bit alignments (GETA requirements), so try to give everything 348 at least 32-bit alignment. */ 349 350int 351mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align) 352{ 353 if (basic_align < 32) 354 return 32; 355 356 return basic_align; 357} 358 359/* CONSTANT_ALIGNMENT. */ 360 361int 362mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align) 363{ 364 if (basic_align < 32) 365 return 32; 366 367 return basic_align; 368} 369 370/* LOCAL_ALIGNMENT. */ 371 372unsigned 373mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align) 374{ 375 if (basic_align < 32) 376 return 32; 377 378 return basic_align; 379} 380 381/* TARGET_CONDITIONAL_REGISTER_USAGE. */ 382 383static void 384mmix_conditional_register_usage (void) 385{ 386 int i; 387 388 if (TARGET_ABI_GNU) 389 { 390 static const int gnu_abi_reg_alloc_order[] 391 = MMIX_GNU_ABI_REG_ALLOC_ORDER; 392 393 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 394 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i]; 395 396 /* Change the default from the mmixware ABI. For the GNU ABI, 397 $15..$30 are call-saved just as $0..$14. There must be one 398 call-clobbered local register for the "hole" that holds the 399 number of saved local registers saved by PUSHJ/PUSHGO during the 400 function call, receiving the return value at return. So best is 401 to use the highest, $31. It's already marked call-clobbered for 402 the mmixware ABI. */ 403 for (i = 15; i <= 30; i++) 404 call_used_regs[i] = 0; 405 406 /* "Unfix" the parameter registers. */ 407 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM; 408 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS; 409 i++) 410 fixed_regs[i] = 0; 411 } 412 413 /* Step over the ":" in special register names. */ 414 if (! TARGET_TOPLEVEL_SYMBOLS) 415 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 416 if (reg_names[i][0] == ':') 417 reg_names[i]++; 418} 419 420/* INCOMING_REGNO and OUTGOING_REGNO worker function. 421 Those two macros must only be applied to function argument 422 registers and the function return value register for the opposite 423 use. FIXME: for their current use in gcc, it'd be better with an 424 explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P a'la 425 TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of 426 forcing the target to commit to a fixed mapping and for any 427 unspecified register use. Particularly when thinking about the 428 return-value, it is better to imagine INCOMING_REGNO and 429 OUTGOING_REGNO as named CALLEE_TO_CALLER_REGNO and INNER_REGNO as 430 named CALLER_TO_CALLEE_REGNO because the direction. The "incoming" 431 and "outgoing" is from the perspective of the parameter-registers, 432 but the same macro is (must be, lacking an alternative like 433 suggested above) used to map the return-value-register from the 434 same perspective. To make directions even more confusing, the macro 435 MMIX_OUTGOING_RETURN_VALUE_REGNUM holds the number of the register 436 in which to return a value, i.e. INCOMING_REGNO for the return-value- 437 register as received from a called function; the return-value on the 438 way out. */ 439 440int 441mmix_opposite_regno (int regno, int incoming) 442{ 443 if (incoming && regno == MMIX_OUTGOING_RETURN_VALUE_REGNUM) 444 return MMIX_RETURN_VALUE_REGNUM; 445 446 if (!incoming && regno == MMIX_RETURN_VALUE_REGNUM) 447 return MMIX_OUTGOING_RETURN_VALUE_REGNUM; 448 449 if (!mmix_function_arg_regno_p (regno, incoming)) 450 return regno; 451 452 return 453 regno - (incoming 454 ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM 455 : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM); 456} 457 458/* LOCAL_REGNO. 459 All registers that are part of the register stack and that will be 460 saved are local. */ 461 462int 463mmix_local_regno (int regno) 464{ 465 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno]; 466} 467 468/* TARGET_PREFERRED_RELOAD_CLASS. 469 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */ 470 471static reg_class_t 472mmix_preferred_reload_class (rtx x, reg_class_t rclass) 473{ 474 /* FIXME: Revisit. */ 475 return GET_CODE (x) == MOD && GET_MODE (x) == DImode 476 ? REMAINDER_REG : rclass; 477} 478 479/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS. 480 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */ 481 482static reg_class_t 483mmix_preferred_output_reload_class (rtx x, reg_class_t rclass) 484{ 485 /* FIXME: Revisit. */ 486 return GET_CODE (x) == MOD && GET_MODE (x) == DImode 487 ? REMAINDER_REG : rclass; 488} 489 490/* SECONDARY_RELOAD_CLASS. 491 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */ 492 493enum reg_class 494mmix_secondary_reload_class (enum reg_class rclass, 495 machine_mode mode ATTRIBUTE_UNUSED, 496 rtx x ATTRIBUTE_UNUSED, 497 int in_p ATTRIBUTE_UNUSED) 498{ 499 if (rclass == REMAINDER_REG 500 || rclass == HIMULT_REG 501 || rclass == SYSTEM_REGS) 502 return GENERAL_REGS; 503 504 return NO_REGS; 505} 506 507/* DYNAMIC_CHAIN_ADDRESS. */ 508 509rtx 510mmix_dynamic_chain_address (rtx frame) 511{ 512 /* FIXME: the frame-pointer is stored at offset -8 from the current 513 frame-pointer. Unfortunately, the caller assumes that a 514 frame-pointer is present for *all* previous frames. There should be 515 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */ 516 return plus_constant (Pmode, frame, -8); 517} 518 519/* STARTING_FRAME_OFFSET. */ 520 521int 522mmix_starting_frame_offset (void) 523{ 524 /* The old frame pointer is in the slot below the new one, so 525 FIRST_PARM_OFFSET does not need to depend on whether the 526 frame-pointer is needed or not. We have to adjust for the register 527 stack pointer being located below the saved frame pointer. 528 Similarly, we store the return address on the stack too, for 529 exception handling, and always if we save the register stack pointer. */ 530 return 531 (-8 532 + (MMIX_CFUN_HAS_LANDING_PAD 533 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0))); 534} 535 536/* RETURN_ADDR_RTX. */ 537 538rtx 539mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED) 540{ 541 return count == 0 542 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS 543 /* FIXME: Set frame_alias_set on the following. (Why?) 544 See mmix_initial_elimination_offset for the reason we can't use 545 get_hard_reg_initial_val for both. Always using a stack slot 546 and not a register would be suboptimal. */ 547 ? validize_mem (gen_rtx_MEM (Pmode, 548 plus_constant (Pmode, 549 frame_pointer_rtx, -16))) 550 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM)) 551 : NULL_RTX; 552} 553 554/* SETUP_FRAME_ADDRESSES. */ 555 556void 557mmix_setup_frame_addresses (void) 558{ 559 /* Nothing needed at the moment. */ 560} 561 562/* The difference between the (imaginary) frame pointer and the stack 563 pointer. Used to eliminate the frame pointer. */ 564 565int 566mmix_initial_elimination_offset (int fromreg, int toreg) 567{ 568 int regno; 569 int fp_sp_offset 570 = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7; 571 572 /* There is no actual offset between these two virtual values, but for 573 the frame-pointer, we have the old one in the stack position below 574 it, so the offset for the frame-pointer to the stack-pointer is one 575 octabyte larger. */ 576 if (fromreg == MMIX_ARG_POINTER_REGNUM 577 && toreg == MMIX_FRAME_POINTER_REGNUM) 578 return 0; 579 580 /* The difference is the size of local variables plus the size of 581 outgoing function arguments that would normally be passed as 582 registers but must be passed on stack because we're out of 583 function-argument registers. Only global saved registers are 584 counted; the others go on the register stack. 585 586 The frame-pointer is counted too if it is what is eliminated, as we 587 need to balance the offset for it from STARTING_FRAME_OFFSET. 588 589 Also add in the slot for the register stack pointer we save if we 590 have a landing pad. 591 592 Unfortunately, we can't access $0..$14, from unwinder code easily, so 593 store the return address in a frame slot too. FIXME: Only for 594 non-leaf functions. FIXME: Always with a landing pad, because it's 595 hard to know whether we need the other at the time we know we need 596 the offset for one (and have to state it). It's a kludge until we 597 can express the register stack in the EH frame info. 598 599 We have to do alignment here; get_frame_size will not return a 600 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */ 601 602 for (regno = MMIX_FIRST_GLOBAL_REGNUM; 603 regno <= 255; 604 regno++) 605 if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno]) 606 || IS_MMIX_EH_RETURN_DATA_REG (regno)) 607 fp_sp_offset += 8; 608 609 return fp_sp_offset 610 + (MMIX_CFUN_HAS_LANDING_PAD 611 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0)) 612 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8); 613} 614 615static void 616mmix_function_arg_advance (cumulative_args_t argsp_v, machine_mode mode, 617 const_tree type, bool named ATTRIBUTE_UNUSED) 618{ 619 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); 620 int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type); 621 622 argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type) 623 || (arg_size > 8 624 && !TARGET_LIBFUNC 625 && !argsp->lib)) 626 ? (MMIX_MAX_ARGS_IN_REGS) + 1 627 : argsp->regs + (7 + arg_size) / 8); 628} 629 630/* Helper function for mmix_function_arg and mmix_function_incoming_arg. */ 631 632static rtx 633mmix_function_arg_1 (const cumulative_args_t argsp_v, 634 machine_mode mode, 635 const_tree type, 636 bool named ATTRIBUTE_UNUSED, 637 bool incoming) 638{ 639 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); 640 641 /* Last-argument marker. */ 642 if (type == void_type_node) 643 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS) 644 ? gen_rtx_REG (mode, 645 (incoming 646 ? MMIX_FIRST_INCOMING_ARG_REGNUM 647 : MMIX_FIRST_ARG_REGNUM) + argsp->regs) 648 : NULL_RTX; 649 650 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS 651 && !targetm.calls.must_pass_in_stack (mode, type) 652 && (GET_MODE_BITSIZE (mode) <= 64 653 || argsp->lib 654 || TARGET_LIBFUNC)) 655 ? gen_rtx_REG (mode, 656 (incoming 657 ? MMIX_FIRST_INCOMING_ARG_REGNUM 658 : MMIX_FIRST_ARG_REGNUM) 659 + argsp->regs) 660 : NULL_RTX; 661} 662 663/* Return an rtx for a function argument to go in a register, and 0 for 664 one that must go on stack. */ 665 666static rtx 667mmix_function_arg (cumulative_args_t argsp, 668 machine_mode mode, 669 const_tree type, 670 bool named) 671{ 672 return mmix_function_arg_1 (argsp, mode, type, named, false); 673} 674 675static rtx 676mmix_function_incoming_arg (cumulative_args_t argsp, 677 machine_mode mode, 678 const_tree type, 679 bool named) 680{ 681 return mmix_function_arg_1 (argsp, mode, type, named, true); 682} 683 684/* Returns nonzero for everything that goes by reference, 0 for 685 everything that goes by value. */ 686 687static bool 688mmix_pass_by_reference (cumulative_args_t argsp_v, machine_mode mode, 689 const_tree type, bool named ATTRIBUTE_UNUSED) 690{ 691 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); 692 693 /* FIXME: Check: I'm not sure the must_pass_in_stack check is 694 necessary. */ 695 if (targetm.calls.must_pass_in_stack (mode, type)) 696 return true; 697 698 if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8 699 && !TARGET_LIBFUNC 700 && (!argsp || !argsp->lib)) 701 return true; 702 703 return false; 704} 705 706/* Return nonzero if regno is a register number where a parameter is 707 passed, and 0 otherwise. */ 708 709int 710mmix_function_arg_regno_p (int regno, int incoming) 711{ 712 int first_arg_regnum 713 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM; 714 715 return regno >= first_arg_regnum 716 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS; 717} 718 719/* Implements TARGET_FUNCTION_VALUE. */ 720 721static rtx 722mmix_function_value (const_tree valtype, 723 const_tree func ATTRIBUTE_UNUSED, 724 bool outgoing) 725{ 726 machine_mode mode = TYPE_MODE (valtype); 727 machine_mode cmode; 728 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM; 729 rtx vec[MMIX_MAX_REGS_FOR_VALUE]; 730 int i; 731 int nregs; 732 733 if (!outgoing) 734 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM); 735 736 /* Return values that fit in a register need no special handling. 737 There's no register hole when parameters are passed in global 738 registers. */ 739 if (TARGET_ABI_GNU 740 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD) 741 return 742 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM); 743 744 if (COMPLEX_MODE_P (mode)) 745 /* A complex type, made up of components. */ 746 cmode = TYPE_MODE (TREE_TYPE (valtype)); 747 else 748 { 749 /* Of the other larger-than-register modes, we only support 750 scalar mode TImode. (At least, that's the only one that's 751 been rudimentally tested.) Make sure we're alerted for 752 unexpected cases. */ 753 if (mode != TImode) 754 sorry ("support for mode %qs", GET_MODE_NAME (mode)); 755 756 /* In any case, we will fill registers to the natural size. */ 757 cmode = DImode; 758 } 759 760 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD); 761 762 /* We need to take care of the effect of the register hole on return 763 values of large sizes; the last register will appear as the first 764 register, with the rest shifted. (For complex modes, this is just 765 swapped registers.) */ 766 767 if (nregs > MMIX_MAX_REGS_FOR_VALUE) 768 internal_error ("too large function value type, needs %d registers,\ 769 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE); 770 771 /* FIXME: Maybe we should handle structure values like this too 772 (adjusted for BLKmode), perhaps for both ABI:s. */ 773 for (i = 0; i < nregs - 1; i++) 774 vec[i] 775 = gen_rtx_EXPR_LIST (VOIDmode, 776 gen_rtx_REG (cmode, first_val_regnum + i), 777 GEN_INT ((i + 1) * BITS_PER_UNIT)); 778 779 vec[nregs - 1] 780 = gen_rtx_EXPR_LIST (VOIDmode, 781 gen_rtx_REG (cmode, first_val_regnum + nregs - 1), 782 const0_rtx); 783 784 return gen_rtx_PARALLEL (mode, gen_rtvec_v (nregs, vec)); 785} 786 787/* Implements TARGET_LIBCALL_VALUE. */ 788 789static rtx 790mmix_libcall_value (machine_mode mode, 791 const_rtx fun ATTRIBUTE_UNUSED) 792{ 793 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM); 794} 795 796/* Implements TARGET_FUNCTION_VALUE_REGNO_P. */ 797 798static bool 799mmix_function_value_regno_p (const unsigned int regno) 800{ 801 return regno == MMIX_RETURN_VALUE_REGNUM; 802} 803 804/* EH_RETURN_DATA_REGNO. */ 805 806int 807mmix_eh_return_data_regno (int n) 808{ 809 if (n >= 0 && n < 4) 810 return MMIX_EH_RETURN_DATA_REGNO_START + n; 811 812 return INVALID_REGNUM; 813} 814 815/* EH_RETURN_STACKADJ_RTX. */ 816 817rtx 818mmix_eh_return_stackadj_rtx (void) 819{ 820 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM); 821} 822 823/* EH_RETURN_HANDLER_RTX. */ 824 825rtx 826mmix_eh_return_handler_rtx (void) 827{ 828 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM); 829} 830 831/* ASM_PREFERRED_EH_DATA_FORMAT. */ 832 833int 834mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, 835 int global ATTRIBUTE_UNUSED) 836{ 837 /* This is the default (was at 2001-07-20). Revisit when needed. */ 838 return DW_EH_PE_absptr; 839} 840 841/* Make a note that we've seen the beginning of the prologue. This 842 matters to whether we'll translate register numbers as calculated by 843 mmix_reorg. */ 844 845static void 846mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED, 847 HOST_WIDE_INT framesize ATTRIBUTE_UNUSED) 848{ 849 cfun->machine->in_prologue = 1; 850} 851 852/* Make a note that we've seen the end of the prologue. */ 853 854static void 855mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED) 856{ 857 cfun->machine->in_prologue = 0; 858} 859 860/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements 861 done here; just virtually by calculating the highest saved stack 862 register number used to modify the register numbers at output time. */ 863 864static void 865mmix_reorg (void) 866{ 867 int regno; 868 869 /* We put the number of the highest saved register-file register in a 870 location convenient for the call-patterns to output. Note that we 871 don't tell dwarf2 about these registers, since it can't restore them 872 anyway. */ 873 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM; 874 regno >= 0; 875 regno--) 876 if ((df_regs_ever_live_p (regno) && !call_used_regs[regno]) 877 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed)) 878 break; 879 880 /* Regardless of whether they're saved (they might be just read), we 881 mustn't include registers that carry parameters. We could scan the 882 insns to see whether they're actually used (and indeed do other less 883 trivial register usage analysis and transformations), but it seems 884 wasteful to optimize for unused parameter registers. As of 885 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but 886 that might change. */ 887 if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1) 888 { 889 regno = crtl->args.info.regs - 1; 890 891 /* We don't want to let this cause us to go over the limit and make 892 incoming parameter registers be misnumbered and treating the last 893 parameter register and incoming return value register call-saved. 894 Stop things at the unmodified scheme. */ 895 if (regno > MMIX_RETURN_VALUE_REGNUM - 1) 896 regno = MMIX_RETURN_VALUE_REGNUM - 1; 897 } 898 899 cfun->machine->highest_saved_stack_register = regno; 900} 901 902/* TARGET_ASM_FUNCTION_EPILOGUE. */ 903 904static void 905mmix_target_asm_function_epilogue (FILE *stream, 906 HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED) 907{ 908 /* Emit an \n for readability of the generated assembly. */ 909 fputc ('\n', stream); 910} 911 912/* TARGET_ASM_OUTPUT_MI_THUNK. */ 913 914static void 915mmix_asm_output_mi_thunk (FILE *stream, 916 tree fndecl ATTRIBUTE_UNUSED, 917 HOST_WIDE_INT delta, 918 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED, 919 tree func) 920{ 921 /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass 922 location of structure to return as invisible first argument), you 923 need to tweak this code too. */ 924 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM]; 925 926 if (delta >= 0 && delta < 65536) 927 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta); 928 else if (delta < 0 && delta >= -255) 929 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta); 930 else 931 { 932 mmix_output_register_setting (stream, 255, delta, 1); 933 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname); 934 } 935 936 fprintf (stream, "\tJMP "); 937 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0)); 938 fprintf (stream, "\n"); 939} 940 941/* FUNCTION_PROFILER. */ 942 943void 944mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED, 945 int labelno ATTRIBUTE_UNUSED) 946{ 947 sorry ("function_profiler support for MMIX"); 948} 949 950/* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment, 951 let's stick to pushing argument registers on the stack. Later, we 952 can parse all arguments in registers, to improve performance. */ 953 954static void 955mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v, 956 machine_mode mode, 957 tree vartype, 958 int *pretend_sizep, 959 int second_time ATTRIBUTE_UNUSED) 960{ 961 CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v); 962 963 /* The last named variable has been handled, but 964 args_so_farp has not been advanced for it. */ 965 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS) 966 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8; 967 968 /* We assume that one argument takes up one register here. That should 969 be true until we start messing with multi-reg parameters. */ 970 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1) 971 internal_error ("MMIX Internal: Last named vararg would not fit in a register"); 972} 973 974/* TARGET_ASM_TRAMPOLINE_TEMPLATE. */ 975 976static void 977mmix_asm_trampoline_template (FILE *stream) 978{ 979 /* Read a value into the static-chain register and jump somewhere. The 980 static chain is stored at offset 16, and the function address is 981 stored at offset 24. */ 982 983 fprintf (stream, "\tGETA $255,1F\n\t"); 984 fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]); 985 fprintf (stream, "LDOU $255,$255,8\n\t"); 986 fprintf (stream, "GO $255,$255,0\n"); 987 fprintf (stream, "1H\tOCTA 0\n\t"); 988 fprintf (stream, "OCTA 0\n"); 989} 990 991/* TARGET_TRAMPOLINE_INIT. */ 992/* Set the static chain and function pointer field in the trampoline. 993 We also SYNCID here to be sure (doesn't matter in the simulator, but 994 some day it will). */ 995 996static void 997mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain) 998{ 999 rtx fnaddr = XEXP (DECL_RTL (fndecl), 0); 1000 rtx mem; 1001 1002 emit_block_move (m_tramp, assemble_trampoline_template (), 1003 GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL); 1004 1005 mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD); 1006 emit_move_insn (mem, static_chain); 1007 mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD); 1008 emit_move_insn (mem, fnaddr); 1009 1010 mem = adjust_address (m_tramp, DImode, 0); 1011 emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1))); 1012} 1013 1014/* We must exclude constant addresses that have an increment that is not a 1015 multiple of four bytes because of restrictions of the GETA 1016 instruction, unless TARGET_BASE_ADDRESSES. */ 1017 1018int 1019mmix_constant_address_p (rtx x) 1020{ 1021 RTX_CODE code = GET_CODE (x); 1022 int addend = 0; 1023 /* When using "base addresses", anything constant goes. */ 1024 int constant_ok = TARGET_BASE_ADDRESSES != 0; 1025 1026 switch (code) 1027 { 1028 case LABEL_REF: 1029 case SYMBOL_REF: 1030 return 1; 1031 1032 case HIGH: 1033 /* FIXME: Don't know how to dissect these. Avoid them for now, 1034 except we know they're constants. */ 1035 return constant_ok; 1036 1037 case CONST_INT: 1038 addend = INTVAL (x); 1039 break; 1040 1041 case CONST_DOUBLE: 1042 if (GET_MODE (x) != VOIDmode) 1043 /* Strange that we got here. FIXME: Check if we do. */ 1044 return constant_ok; 1045 addend = CONST_DOUBLE_LOW (x); 1046 break; 1047 1048 case CONST: 1049 /* Note that expressions with arithmetic on forward references don't 1050 work in mmixal. People using gcc assembly code with mmixal might 1051 need to move arrays and such to before the point of use. */ 1052 if (GET_CODE (XEXP (x, 0)) == PLUS) 1053 { 1054 rtx x0 = XEXP (XEXP (x, 0), 0); 1055 rtx x1 = XEXP (XEXP (x, 0), 1); 1056 1057 if ((GET_CODE (x0) == SYMBOL_REF 1058 || GET_CODE (x0) == LABEL_REF) 1059 && (GET_CODE (x1) == CONST_INT 1060 || (GET_CODE (x1) == CONST_DOUBLE 1061 && GET_MODE (x1) == VOIDmode))) 1062 addend = mmix_intval (x1); 1063 else 1064 return constant_ok; 1065 } 1066 else 1067 return constant_ok; 1068 break; 1069 1070 default: 1071 return 0; 1072 } 1073 1074 return constant_ok || (addend & 3) == 0; 1075} 1076 1077/* Return 1 if the address is OK, otherwise 0. */ 1078 1079bool 1080mmix_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, 1081 rtx x, 1082 bool strict_checking) 1083{ 1084#define MMIX_REG_OK(X) \ 1085 ((strict_checking \ 1086 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \ 1087 || (reg_renumber[REGNO (X)] > 0 \ 1088 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \ 1089 || (!strict_checking \ 1090 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \ 1091 || REGNO (X) >= FIRST_PSEUDO_REGISTER \ 1092 || REGNO (X) == ARG_POINTER_REGNUM))) 1093 1094 /* We only accept: 1095 (mem reg) 1096 (mem (plus reg reg)) 1097 (mem (plus reg 0..255)). 1098 unless TARGET_BASE_ADDRESSES, in which case we accept all 1099 (mem constant_address) too. */ 1100 1101 1102 /* (mem reg) */ 1103 if (REG_P (x) && MMIX_REG_OK (x)) 1104 return 1; 1105 1106 if (GET_CODE(x) == PLUS) 1107 { 1108 rtx x1 = XEXP (x, 0); 1109 rtx x2 = XEXP (x, 1); 1110 1111 /* Try swapping the order. FIXME: Do we need this? */ 1112 if (! REG_P (x1)) 1113 { 1114 rtx tem = x1; 1115 x1 = x2; 1116 x2 = tem; 1117 } 1118 1119 /* (mem (plus (reg?) (?))) */ 1120 if (!REG_P (x1) || !MMIX_REG_OK (x1)) 1121 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x); 1122 1123 /* (mem (plus (reg) (reg?))) */ 1124 if (REG_P (x2) && MMIX_REG_OK (x2)) 1125 return 1; 1126 1127 /* (mem (plus (reg) (0..255?))) */ 1128 if (satisfies_constraint_I (x2)) 1129 return 1; 1130 1131 return 0; 1132 } 1133 1134 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x); 1135} 1136 1137/* Implement TARGET_LEGITIMATE_CONSTANT_P. */ 1138 1139static bool 1140mmix_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) 1141{ 1142 RTX_CODE code = GET_CODE (x); 1143 1144 /* We must allow any number due to the way the cse passes works; if we 1145 do not allow any number here, general_operand will fail, and insns 1146 will fatally fail recognition instead of "softly". */ 1147 if (code == CONST_INT || code == CONST_DOUBLE) 1148 return 1; 1149 1150 return CONSTANT_ADDRESS_P (x); 1151} 1152 1153/* SELECT_CC_MODE. */ 1154 1155machine_mode 1156mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED) 1157{ 1158 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to 1159 output different compare insns. Note that we do not check the 1160 validity of the comparison here. */ 1161 1162 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) 1163 { 1164 if (op == ORDERED || op == UNORDERED || op == UNGE 1165 || op == UNGT || op == UNLE || op == UNLT) 1166 return CC_FUNmode; 1167 1168 if (op == EQ || op == NE) 1169 return CC_FPEQmode; 1170 1171 return CC_FPmode; 1172 } 1173 1174 if (op == GTU || op == LTU || op == GEU || op == LEU) 1175 return CC_UNSmode; 1176 1177 return CCmode; 1178} 1179 1180/* REVERSIBLE_CC_MODE. */ 1181 1182int 1183mmix_reversible_cc_mode (machine_mode mode) 1184{ 1185 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float 1186 compares. */ 1187 return mode != CC_FPmode; 1188} 1189 1190/* TARGET_RTX_COSTS. */ 1191 1192static bool 1193mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED, 1194 int code ATTRIBUTE_UNUSED, 1195 int outer_code ATTRIBUTE_UNUSED, 1196 int opno ATTRIBUTE_UNUSED, 1197 int *total ATTRIBUTE_UNUSED, 1198 bool speed ATTRIBUTE_UNUSED) 1199{ 1200 /* For the time being, this is just a stub and we'll accept the 1201 generic calculations, until we can do measurements, at least. 1202 Say we did not modify any calculated costs. */ 1203 return false; 1204} 1205 1206/* TARGET_REGISTER_MOVE_COST. 1207 1208 The special registers can only move to and from general regs, and we 1209 need to check that their constraints match, so say 3 for them. */ 1210 1211static int 1212mmix_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, 1213 reg_class_t from, 1214 reg_class_t to) 1215{ 1216 return (from == GENERAL_REGS && from == to) ? 2 : 3; 1217} 1218 1219/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a 1220 compile-time constant; it's used in an asm in crtstuff.c, compiled for 1221 the target. */ 1222 1223/* DATA_SECTION_ASM_OP. */ 1224 1225const char * 1226mmix_data_section_asm_op (void) 1227{ 1228 return "\t.data ! mmixal:= 8H LOC 9B"; 1229} 1230 1231static void 1232mmix_encode_section_info (tree decl, rtx rtl, int first) 1233{ 1234 /* Test for an external declaration, and do nothing if it is one. */ 1235 if ((TREE_CODE (decl) == VAR_DECL 1236 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl))) 1237 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl))) 1238 ; 1239 else if (first && DECL_P (decl)) 1240 { 1241 /* For non-visible declarations, add a "@" prefix, which we skip 1242 when the label is output. If the label does not have this 1243 prefix, a ":" is output if -mtoplevel-symbols. 1244 1245 Note that this does not work for data that is declared extern and 1246 later defined as static. If there's code in between, that code 1247 will refer to the extern declaration, and vice versa. This just 1248 means that when -mtoplevel-symbols is in use, we can just handle 1249 well-behaved ISO-compliant code. */ 1250 1251 const char *str = XSTR (XEXP (rtl, 0), 0); 1252 int len = strlen (str); 1253 char *newstr = XALLOCAVEC (char, len + 2); 1254 newstr[0] = '@'; 1255 strcpy (newstr + 1, str); 1256 XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1); 1257 } 1258 1259 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We 1260 may need different options to reach for different things with GETA. 1261 For now, functions and things we know or have been told are constant. */ 1262 if (TREE_CODE (decl) == FUNCTION_DECL 1263 || TREE_CONSTANT (decl) 1264 || (TREE_CODE (decl) == VAR_DECL 1265 && TREE_READONLY (decl) 1266 && !TREE_SIDE_EFFECTS (decl) 1267 && (!DECL_INITIAL (decl) 1268 || TREE_CONSTANT (DECL_INITIAL (decl))))) 1269 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1; 1270} 1271 1272static const char * 1273mmix_strip_name_encoding (const char *name) 1274{ 1275 for (; (*name == '@' || *name == '*'); name++) 1276 ; 1277 1278 return name; 1279} 1280 1281/* TARGET_ASM_FILE_START. 1282 We just emit a little comment for the time being. */ 1283 1284static void 1285mmix_file_start (void) 1286{ 1287 default_file_start (); 1288 1289 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file); 1290 1291 /* Make sure each file starts with the text section. */ 1292 switch_to_section (text_section); 1293} 1294 1295/* TARGET_ASM_FILE_END. */ 1296 1297static void 1298mmix_file_end (void) 1299{ 1300 /* Make sure each file ends with the data section. */ 1301 switch_to_section (data_section); 1302} 1303 1304/* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */ 1305 1306static void 1307mmix_asm_output_source_filename (FILE *stream, const char *name) 1308{ 1309 fprintf (stream, "# 1 "); 1310 OUTPUT_QUOTED_STRING (stream, name); 1311 fprintf (stream, "\n"); 1312} 1313 1314/* OUTPUT_QUOTED_STRING. */ 1315 1316void 1317mmix_output_quoted_string (FILE *stream, const char *string, int length) 1318{ 1319 const char * string_end = string + length; 1320 static const char *const unwanted_chars = "\"[]\\"; 1321 1322 /* Output "any character except newline and double quote character". We 1323 play it safe and avoid all control characters too. We also do not 1324 want [] as characters, should input be passed through m4 with [] as 1325 quotes. Further, we avoid "\", because the GAS port handles it as a 1326 quoting character. */ 1327 while (string < string_end) 1328 { 1329 if (*string 1330 && (unsigned char) *string < 128 1331 && !ISCNTRL (*string) 1332 && strchr (unwanted_chars, *string) == NULL) 1333 { 1334 fputc ('"', stream); 1335 while (*string 1336 && (unsigned char) *string < 128 1337 && !ISCNTRL (*string) 1338 && strchr (unwanted_chars, *string) == NULL 1339 && string < string_end) 1340 { 1341 fputc (*string, stream); 1342 string++; 1343 } 1344 fputc ('"', stream); 1345 if (string < string_end) 1346 fprintf (stream, ","); 1347 } 1348 if (string < string_end) 1349 { 1350 fprintf (stream, "#%x", *string & 255); 1351 string++; 1352 if (string < string_end) 1353 fprintf (stream, ","); 1354 } 1355 } 1356} 1357 1358/* Target hook for assembling integer objects. Use mmix_print_operand 1359 for WYDE and TETRA. Use mmix_output_octa to output 8-byte 1360 CONST_DOUBLEs. */ 1361 1362static bool 1363mmix_assemble_integer (rtx x, unsigned int size, int aligned_p) 1364{ 1365 if (aligned_p) 1366 switch (size) 1367 { 1368 /* We handle a limited number of types of operands in here. But 1369 that's ok, because we can punt to generic functions. We then 1370 pretend that aligned data isn't needed, so the usual .<pseudo> 1371 syntax is used (which works for aligned data too). We actually 1372 *must* do that, since we say we don't have simple aligned 1373 pseudos, causing this function to be called. We just try and 1374 keep as much compatibility as possible with mmixal syntax for 1375 normal cases (i.e. without GNU extensions and C only). */ 1376 case 1: 1377 if (GET_CODE (x) != CONST_INT) 1378 { 1379 aligned_p = 0; 1380 break; 1381 } 1382 fputs ("\tBYTE\t", asm_out_file); 1383 mmix_print_operand (asm_out_file, x, 'B'); 1384 fputc ('\n', asm_out_file); 1385 return true; 1386 1387 case 2: 1388 if (GET_CODE (x) != CONST_INT) 1389 { 1390 aligned_p = 0; 1391 break; 1392 } 1393 fputs ("\tWYDE\t", asm_out_file); 1394 mmix_print_operand (asm_out_file, x, 'W'); 1395 fputc ('\n', asm_out_file); 1396 return true; 1397 1398 case 4: 1399 if (GET_CODE (x) != CONST_INT) 1400 { 1401 aligned_p = 0; 1402 break; 1403 } 1404 fputs ("\tTETRA\t", asm_out_file); 1405 mmix_print_operand (asm_out_file, x, 'L'); 1406 fputc ('\n', asm_out_file); 1407 return true; 1408 1409 case 8: 1410 /* We don't get here anymore for CONST_DOUBLE, because DImode 1411 isn't expressed as CONST_DOUBLE, and DFmode is handled 1412 elsewhere. */ 1413 gcc_assert (GET_CODE (x) != CONST_DOUBLE); 1414 assemble_integer_with_op ("\tOCTA\t", x); 1415 return true; 1416 } 1417 return default_assemble_integer (x, size, aligned_p); 1418} 1419 1420/* ASM_OUTPUT_ASCII. */ 1421 1422void 1423mmix_asm_output_ascii (FILE *stream, const char *string, int length) 1424{ 1425 while (length > 0) 1426 { 1427 int chunk_size = length > 60 ? 60 : length; 1428 fprintf (stream, "\tBYTE "); 1429 mmix_output_quoted_string (stream, string, chunk_size); 1430 string += chunk_size; 1431 length -= chunk_size; 1432 fprintf (stream, "\n"); 1433 } 1434} 1435 1436/* ASM_OUTPUT_ALIGNED_COMMON. */ 1437 1438void 1439mmix_asm_output_aligned_common (FILE *stream, 1440 const char *name, 1441 int size, 1442 int align) 1443{ 1444 /* This is mostly the elfos.h one. There doesn't seem to be a way to 1445 express this in a mmixal-compatible way. */ 1446 fprintf (stream, "\t.comm\t"); 1447 assemble_name (stream, name); 1448 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n", 1449 size, align / BITS_PER_UNIT); 1450} 1451 1452/* ASM_OUTPUT_ALIGNED_LOCAL. */ 1453 1454void 1455mmix_asm_output_aligned_local (FILE *stream, 1456 const char *name, 1457 int size, 1458 int align) 1459{ 1460 switch_to_section (data_section); 1461 1462 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT)); 1463 assemble_name (stream, name); 1464 fprintf (stream, "\tLOC @+%d\n", size); 1465} 1466 1467/* ASM_OUTPUT_LABEL. */ 1468 1469void 1470mmix_asm_output_label (FILE *stream, const char *name) 1471{ 1472 assemble_name (stream, name); 1473 fprintf (stream, "\tIS @\n"); 1474} 1475 1476/* ASM_OUTPUT_INTERNAL_LABEL. */ 1477 1478void 1479mmix_asm_output_internal_label (FILE *stream, const char *name) 1480{ 1481 assemble_name_raw (stream, name); 1482 fprintf (stream, "\tIS @\n"); 1483} 1484 1485/* ASM_DECLARE_REGISTER_GLOBAL. */ 1486 1487void 1488mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED, 1489 tree decl ATTRIBUTE_UNUSED, 1490 int regno ATTRIBUTE_UNUSED, 1491 const char *name ATTRIBUTE_UNUSED) 1492{ 1493 /* Nothing to do here, but there *will* be, therefore the framework is 1494 here. */ 1495} 1496 1497/* ASM_WEAKEN_LABEL. */ 1498 1499void 1500mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED, 1501 const char *name ATTRIBUTE_UNUSED) 1502{ 1503 fprintf (stream, "\t.weak "); 1504 assemble_name (stream, name); 1505 fprintf (stream, " ! mmixal-incompatible\n"); 1506} 1507 1508/* MAKE_DECL_ONE_ONLY. */ 1509 1510void 1511mmix_make_decl_one_only (tree decl) 1512{ 1513 DECL_WEAK (decl) = 1; 1514} 1515 1516/* ASM_OUTPUT_LABELREF. 1517 Strip GCC's '*' and our own '@'. No order is assumed. */ 1518 1519void 1520mmix_asm_output_labelref (FILE *stream, const char *name) 1521{ 1522 int is_extern = 1; 1523 1524 for (; (*name == '@' || *name == '*'); name++) 1525 if (*name == '@') 1526 is_extern = 0; 1527 1528 asm_fprintf (stream, "%s%U%s", 1529 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "", 1530 name); 1531} 1532 1533/* ASM_OUTPUT_DEF. */ 1534 1535void 1536mmix_asm_output_def (FILE *stream, const char *name, const char *value) 1537{ 1538 assemble_name (stream, name); 1539 fprintf (stream, "\tIS "); 1540 assemble_name (stream, value); 1541 fputc ('\n', stream); 1542} 1543 1544/* TARGET_PRINT_OPERAND. */ 1545 1546static void 1547mmix_print_operand (FILE *stream, rtx x, int code) 1548{ 1549 /* When we add support for different codes later, we can, when needed, 1550 drop through to the main handler with a modified operand. */ 1551 rtx modified_x = x; 1552 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0; 1553 1554 switch (code) 1555 { 1556 /* Unrelated codes are in alphabetic order. */ 1557 1558 case '+': 1559 /* For conditional branches, output "P" for a probable branch. */ 1560 if (TARGET_BRANCH_PREDICT) 1561 { 1562 x = find_reg_note (current_output_insn, REG_BR_PROB, 0); 1563 if (x && XINT (x, 0) > REG_BR_PROB_BASE / 2) 1564 putc ('P', stream); 1565 } 1566 return; 1567 1568 case '.': 1569 /* For the %d in POP %d,0. */ 1570 fprintf (stream, "%d", MMIX_POP_ARGUMENT ()); 1571 return; 1572 1573 case 'B': 1574 if (GET_CODE (x) != CONST_INT) 1575 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x); 1576 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff)); 1577 return; 1578 1579 case 'H': 1580 /* Highpart. Must be general register, and not the last one, as 1581 that one cannot be part of a consecutive register pair. */ 1582 if (regno > MMIX_LAST_GENERAL_REGISTER - 1) 1583 internal_error ("MMIX Internal: Bad register: %d", regno); 1584 1585 /* This is big-endian, so the high-part is the first one. */ 1586 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]); 1587 return; 1588 1589 case 'L': 1590 /* Lowpart. Must be CONST_INT or general register, and not the last 1591 one, as that one cannot be part of a consecutive register pair. */ 1592 if (GET_CODE (x) == CONST_INT) 1593 { 1594 fprintf (stream, "#%lx", 1595 (unsigned long) (INTVAL (x) 1596 & ((unsigned int) 0x7fffffff * 2 + 1))); 1597 return; 1598 } 1599 1600 if (GET_CODE (x) == SYMBOL_REF) 1601 { 1602 output_addr_const (stream, x); 1603 return; 1604 } 1605 1606 if (regno > MMIX_LAST_GENERAL_REGISTER - 1) 1607 internal_error ("MMIX Internal: Bad register: %d", regno); 1608 1609 /* This is big-endian, so the low-part is + 1. */ 1610 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]); 1611 return; 1612 1613 /* Can't use 'a' because that's a generic modifier for address 1614 output. */ 1615 case 'A': 1616 mmix_output_shiftvalue_op_from_str (stream, "ANDN", 1617 ~(uint64_t) 1618 mmix_intval (x)); 1619 return; 1620 1621 case 'i': 1622 mmix_output_shiftvalue_op_from_str (stream, "INC", 1623 (uint64_t) 1624 mmix_intval (x)); 1625 return; 1626 1627 case 'o': 1628 mmix_output_shiftvalue_op_from_str (stream, "OR", 1629 (uint64_t) 1630 mmix_intval (x)); 1631 return; 1632 1633 case 's': 1634 mmix_output_shiftvalue_op_from_str (stream, "SET", 1635 (uint64_t) 1636 mmix_intval (x)); 1637 return; 1638 1639 case 'd': 1640 case 'D': 1641 mmix_output_condition (stream, x, (code == 'D')); 1642 return; 1643 1644 case 'e': 1645 /* Output an extra "e" to make fcmpe, fune. */ 1646 if (TARGET_FCMP_EPSILON) 1647 fprintf (stream, "e"); 1648 return; 1649 1650 case 'm': 1651 /* Output the number minus 1. */ 1652 if (GET_CODE (x) != CONST_INT) 1653 { 1654 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT", 1655 x); 1656 } 1657 fprintf (stream, "%"PRId64, 1658 (int64_t) (mmix_intval (x) - 1)); 1659 return; 1660 1661 case 'p': 1662 /* Store the number of registers we want to save. This was setup 1663 by the prologue. The actual operand contains the number of 1664 registers to pass, but we don't use it currently. Anyway, we 1665 need to output the number of saved registers here. */ 1666 fprintf (stream, "%d", 1667 cfun->machine->highest_saved_stack_register + 1); 1668 return; 1669 1670 case 'r': 1671 /* Store the register to output a constant to. */ 1672 if (! REG_P (x)) 1673 fatal_insn ("MMIX Internal: Expected a register, not this", x); 1674 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno); 1675 return; 1676 1677 case 'I': 1678 /* Output the constant. Note that we use this for floats as well. */ 1679 if (GET_CODE (x) != CONST_INT 1680 && (GET_CODE (x) != CONST_DOUBLE 1681 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode 1682 && GET_MODE (x) != SFmode))) 1683 fatal_insn ("MMIX Internal: Expected a constant, not this", x); 1684 mmix_output_register_setting (stream, 1685 mmix_output_destination_register, 1686 mmix_intval (x), 0); 1687 return; 1688 1689 case 'U': 1690 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */ 1691 if (TARGET_ZERO_EXTEND) 1692 putc ('U', stream); 1693 return; 1694 1695 case 'v': 1696 mmix_output_shifted_value (stream, (int64_t) mmix_intval (x)); 1697 return; 1698 1699 case 'V': 1700 mmix_output_shifted_value (stream, (int64_t) ~mmix_intval (x)); 1701 return; 1702 1703 case 'W': 1704 if (GET_CODE (x) != CONST_INT) 1705 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x); 1706 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff)); 1707 return; 1708 1709 case 0: 1710 /* Nothing to do. */ 1711 break; 1712 1713 default: 1714 /* Presumably there's a missing case above if we get here. */ 1715 internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code); 1716 } 1717 1718 switch (GET_CODE (modified_x)) 1719 { 1720 case REG: 1721 regno = REGNO (modified_x); 1722 if (regno >= FIRST_PSEUDO_REGISTER) 1723 internal_error ("MMIX Internal: Bad register: %d", regno); 1724 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]); 1725 return; 1726 1727 case MEM: 1728 output_address (XEXP (modified_x, 0)); 1729 return; 1730 1731 case CONST_INT: 1732 /* For -2147483648, mmixal complains that the constant does not fit 1733 in 4 bytes, so let's output it as hex. Take care to handle hosts 1734 where HOST_WIDE_INT is longer than an int. 1735 1736 Print small constants +-255 using decimal. */ 1737 1738 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256) 1739 fprintf (stream, "%d", (int) (INTVAL (modified_x))); 1740 else 1741 fprintf (stream, "#%x", 1742 (int) (INTVAL (modified_x)) & (unsigned int) ~0); 1743 return; 1744 1745 case CONST_DOUBLE: 1746 /* Do somewhat as CONST_INT. */ 1747 mmix_output_octa (stream, mmix_intval (modified_x), 0); 1748 return; 1749 1750 case CONST: 1751 output_addr_const (stream, modified_x); 1752 return; 1753 1754 default: 1755 /* No need to test for all strange things. Let output_addr_const do 1756 it for us. */ 1757 if (CONSTANT_P (modified_x) 1758 /* Strangely enough, this is not included in CONSTANT_P. 1759 FIXME: Ask/check about sanity here. */ 1760 || LABEL_P (modified_x)) 1761 { 1762 output_addr_const (stream, modified_x); 1763 return; 1764 } 1765 1766 /* We need the original here. */ 1767 fatal_insn ("MMIX Internal: Cannot decode this operand", x); 1768 } 1769} 1770 1771/* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */ 1772 1773static bool 1774mmix_print_operand_punct_valid_p (unsigned char code) 1775{ 1776 /* A '+' is used for branch prediction, similar to other ports. */ 1777 return code == '+' 1778 /* A '.' is used for the %d in the POP %d,0 return insn. */ 1779 || code == '.'; 1780} 1781 1782/* TARGET_PRINT_OPERAND_ADDRESS. */ 1783 1784static void 1785mmix_print_operand_address (FILE *stream, rtx x) 1786{ 1787 if (REG_P (x)) 1788 { 1789 /* I find the generated assembly code harder to read without 1790 the ",0". */ 1791 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]); 1792 return; 1793 } 1794 else if (GET_CODE (x) == PLUS) 1795 { 1796 rtx x1 = XEXP (x, 0); 1797 rtx x2 = XEXP (x, 1); 1798 1799 if (REG_P (x1)) 1800 { 1801 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]); 1802 1803 if (REG_P (x2)) 1804 { 1805 fprintf (stream, "%s", 1806 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]); 1807 return; 1808 } 1809 else if (satisfies_constraint_I (x2)) 1810 { 1811 output_addr_const (stream, x2); 1812 return; 1813 } 1814 } 1815 } 1816 1817 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x)) 1818 { 1819 output_addr_const (stream, x); 1820 return; 1821 } 1822 1823 fatal_insn ("MMIX Internal: This is not a recognized address", x); 1824} 1825 1826/* ASM_OUTPUT_REG_PUSH. */ 1827 1828void 1829mmix_asm_output_reg_push (FILE *stream, int regno) 1830{ 1831 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n", 1832 reg_names[MMIX_STACK_POINTER_REGNUM], 1833 reg_names[MMIX_STACK_POINTER_REGNUM], 1834 reg_names[MMIX_OUTPUT_REGNO (regno)], 1835 reg_names[MMIX_STACK_POINTER_REGNUM]); 1836} 1837 1838/* ASM_OUTPUT_REG_POP. */ 1839 1840void 1841mmix_asm_output_reg_pop (FILE *stream, int regno) 1842{ 1843 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n", 1844 reg_names[MMIX_OUTPUT_REGNO (regno)], 1845 reg_names[MMIX_STACK_POINTER_REGNUM], 1846 reg_names[MMIX_STACK_POINTER_REGNUM]); 1847} 1848 1849/* ASM_OUTPUT_ADDR_DIFF_ELT. */ 1850 1851void 1852mmix_asm_output_addr_diff_elt (FILE *stream, 1853 rtx body ATTRIBUTE_UNUSED, 1854 int value, 1855 int rel) 1856{ 1857 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel); 1858} 1859 1860/* ASM_OUTPUT_ADDR_VEC_ELT. */ 1861 1862void 1863mmix_asm_output_addr_vec_elt (FILE *stream, int value) 1864{ 1865 fprintf (stream, "\tOCTA L:%d\n", value); 1866} 1867 1868/* ASM_OUTPUT_SKIP. */ 1869 1870void 1871mmix_asm_output_skip (FILE *stream, int nbytes) 1872{ 1873 fprintf (stream, "\tLOC @+%d\n", nbytes); 1874} 1875 1876/* ASM_OUTPUT_ALIGN. */ 1877 1878void 1879mmix_asm_output_align (FILE *stream, int power) 1880{ 1881 /* We need to record the needed alignment of this section in the object, 1882 so we have to output an alignment directive. Use a .p2align (not 1883 .align) so people will never have to wonder about whether the 1884 argument is in number of bytes or the log2 thereof. We do it in 1885 addition to the LOC directive, so nothing needs tweaking when 1886 copy-pasting assembly into mmixal. */ 1887 fprintf (stream, "\t.p2align %d\n", power); 1888 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1); 1889} 1890 1891/* DBX_REGISTER_NUMBER. */ 1892 1893unsigned 1894mmix_dbx_register_number (unsigned regno) 1895{ 1896 /* Adjust the register number to the one it will be output as, dammit. 1897 It'd be nice if we could check the assumption that we're filling a 1898 gap, but every register between the last saved register and parameter 1899 registers might be a valid parameter register. */ 1900 regno = MMIX_OUTPUT_REGNO (regno); 1901 1902 /* We need to renumber registers to get the number of the return address 1903 register in the range 0..255. It is also space-saving if registers 1904 mentioned in the call-frame information (which uses this function by 1905 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered 1906 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */ 1907 return regno >= 224 ? (regno - 224) : (regno + 48); 1908} 1909 1910/* End of target macro support functions. 1911 1912 Now the MMIX port's own functions. First the exported ones. */ 1913 1914/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included 1915 from insn-emit.c. */ 1916 1917rtx 1918mmix_get_hard_reg_initial_val (machine_mode mode, int regno) 1919{ 1920 return get_hard_reg_initial_val (mode, regno); 1921} 1922 1923/* Nonzero when the function epilogue is simple enough that a single 1924 "POP %d,0" should be used even within the function. */ 1925 1926int 1927mmix_use_simple_return (void) 1928{ 1929 int regno; 1930 1931 int stack_space_to_allocate 1932 = (crtl->outgoing_args_size 1933 + crtl->args.pretend_args_size 1934 + get_frame_size () + 7) & ~7; 1935 1936 if (!TARGET_USE_RETURN_INSN || !reload_completed) 1937 return 0; 1938 1939 for (regno = 255; 1940 regno >= MMIX_FIRST_GLOBAL_REGNUM; 1941 regno--) 1942 /* Note that we assume that the frame-pointer-register is one of these 1943 registers, in which case we don't count it here. */ 1944 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) 1945 && df_regs_ever_live_p (regno) && !call_used_regs[regno])) 1946 || IS_MMIX_EH_RETURN_DATA_REG (regno)) 1947 return 0; 1948 1949 if (frame_pointer_needed) 1950 stack_space_to_allocate += 8; 1951 1952 if (MMIX_CFUN_HAS_LANDING_PAD) 1953 stack_space_to_allocate += 16; 1954 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) 1955 stack_space_to_allocate += 8; 1956 1957 return stack_space_to_allocate == 0; 1958} 1959 1960 1961/* Expands the function prologue into RTX. */ 1962 1963void 1964mmix_expand_prologue (void) 1965{ 1966 HOST_WIDE_INT locals_size = get_frame_size (); 1967 int regno; 1968 HOST_WIDE_INT stack_space_to_allocate 1969 = (crtl->outgoing_args_size 1970 + crtl->args.pretend_args_size 1971 + locals_size + 7) & ~7; 1972 HOST_WIDE_INT offset = -8; 1973 1974 /* Add room needed to save global non-register-stack registers. */ 1975 for (regno = 255; 1976 regno >= MMIX_FIRST_GLOBAL_REGNUM; 1977 regno--) 1978 /* Note that we assume that the frame-pointer-register is one of these 1979 registers, in which case we don't count it here. */ 1980 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) 1981 && df_regs_ever_live_p (regno) && !call_used_regs[regno])) 1982 || IS_MMIX_EH_RETURN_DATA_REG (regno)) 1983 stack_space_to_allocate += 8; 1984 1985 /* If we do have a frame-pointer, add room for it. */ 1986 if (frame_pointer_needed) 1987 stack_space_to_allocate += 8; 1988 1989 /* If we have a non-local label, we need to be able to unwind to it, so 1990 store the current register stack pointer. Also store the return 1991 address if we do that. */ 1992 if (MMIX_CFUN_HAS_LANDING_PAD) 1993 stack_space_to_allocate += 16; 1994 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) 1995 /* If we do have a saved return-address slot, add room for it. */ 1996 stack_space_to_allocate += 8; 1997 1998 /* Make sure we don't get an unaligned stack. */ 1999 if ((stack_space_to_allocate % 8) != 0) 2000 internal_error ("stack frame not a multiple of 8 bytes: %wd", 2001 stack_space_to_allocate); 2002 2003 if (crtl->args.pretend_args_size) 2004 { 2005 int mmix_first_vararg_reg 2006 = (MMIX_FIRST_INCOMING_ARG_REGNUM 2007 + (MMIX_MAX_ARGS_IN_REGS 2008 - crtl->args.pretend_args_size / 8)); 2009 2010 for (regno 2011 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1; 2012 regno >= mmix_first_vararg_reg; 2013 regno--) 2014 { 2015 if (offset < 0) 2016 { 2017 HOST_WIDE_INT stack_chunk 2018 = stack_space_to_allocate > (256 - 8) 2019 ? (256 - 8) : stack_space_to_allocate; 2020 2021 mmix_emit_sp_add (-stack_chunk); 2022 offset += stack_chunk; 2023 stack_space_to_allocate -= stack_chunk; 2024 } 2025 2026 /* These registers aren't actually saved (as in "will be 2027 restored"), so don't tell DWARF2 they're saved. */ 2028 emit_move_insn (gen_rtx_MEM (DImode, 2029 plus_constant (Pmode, stack_pointer_rtx, 2030 offset)), 2031 gen_rtx_REG (DImode, regno)); 2032 offset -= 8; 2033 } 2034 } 2035 2036 /* Store the frame-pointer. */ 2037 2038 if (frame_pointer_needed) 2039 { 2040 rtx insn; 2041 2042 if (offset < 0) 2043 { 2044 /* Get 8 less than otherwise, since we need to reach offset + 8. */ 2045 HOST_WIDE_INT stack_chunk 2046 = stack_space_to_allocate > (256 - 8 - 8) 2047 ? (256 - 8 - 8) : stack_space_to_allocate; 2048 2049 mmix_emit_sp_add (-stack_chunk); 2050 2051 offset += stack_chunk; 2052 stack_space_to_allocate -= stack_chunk; 2053 } 2054 2055 insn = emit_move_insn (gen_rtx_MEM (DImode, 2056 plus_constant (Pmode, 2057 stack_pointer_rtx, 2058 offset)), 2059 hard_frame_pointer_rtx); 2060 RTX_FRAME_RELATED_P (insn) = 1; 2061 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx, 2062 stack_pointer_rtx, 2063 GEN_INT (offset + 8))); 2064 RTX_FRAME_RELATED_P (insn) = 1; 2065 offset -= 8; 2066 } 2067 2068 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) 2069 { 2070 rtx tmpreg, retreg; 2071 rtx insn; 2072 2073 /* Store the return-address, if one is needed on the stack. We 2074 usually store it in a register when needed, but that doesn't work 2075 with -fexceptions. */ 2076 2077 if (offset < 0) 2078 { 2079 /* Get 8 less than otherwise, since we need to reach offset + 8. */ 2080 HOST_WIDE_INT stack_chunk 2081 = stack_space_to_allocate > (256 - 8 - 8) 2082 ? (256 - 8 - 8) : stack_space_to_allocate; 2083 2084 mmix_emit_sp_add (-stack_chunk); 2085 2086 offset += stack_chunk; 2087 stack_space_to_allocate -= stack_chunk; 2088 } 2089 2090 tmpreg = gen_rtx_REG (DImode, 255); 2091 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM); 2092 2093 /* Dwarf2 code is confused by the use of a temporary register for 2094 storing the return address, so we have to express it as a note, 2095 which we attach to the actual store insn. */ 2096 emit_move_insn (tmpreg, retreg); 2097 2098 insn = emit_move_insn (gen_rtx_MEM (DImode, 2099 plus_constant (Pmode, 2100 stack_pointer_rtx, 2101 offset)), 2102 tmpreg); 2103 RTX_FRAME_RELATED_P (insn) = 1; 2104 add_reg_note (insn, REG_FRAME_RELATED_EXPR, 2105 gen_rtx_SET (VOIDmode, 2106 gen_rtx_MEM (DImode, 2107 plus_constant (Pmode, 2108 stack_pointer_rtx, 2109 offset)), 2110 retreg)); 2111 2112 offset -= 8; 2113 } 2114 else if (MMIX_CFUN_HAS_LANDING_PAD) 2115 offset -= 8; 2116 2117 if (MMIX_CFUN_HAS_LANDING_PAD) 2118 { 2119 /* Store the register defining the numbering of local registers, so 2120 we know how long to unwind the register stack. */ 2121 2122 if (offset < 0) 2123 { 2124 /* Get 8 less than otherwise, since we need to reach offset + 8. */ 2125 HOST_WIDE_INT stack_chunk 2126 = stack_space_to_allocate > (256 - 8 - 8) 2127 ? (256 - 8 - 8) : stack_space_to_allocate; 2128 2129 mmix_emit_sp_add (-stack_chunk); 2130 2131 offset += stack_chunk; 2132 stack_space_to_allocate -= stack_chunk; 2133 } 2134 2135 /* We don't tell dwarf2 about this one; we just have it to unwind 2136 the register stack at landing pads. FIXME: It's a kludge because 2137 we can't describe the effect of the PUSHJ and PUSHGO insns on the 2138 register stack at the moment. Best thing would be to handle it 2139 like stack-pointer offsets. Better: some hook into dwarf2out.c 2140 to produce DW_CFA_expression:s that specify the increment of rO, 2141 and unwind it at eh_return (preferred) or at the landing pad. 2142 Then saves to $0..$G-1 could be specified through that register. */ 2143 2144 emit_move_insn (gen_rtx_REG (DImode, 255), 2145 gen_rtx_REG (DImode, 2146 MMIX_rO_REGNUM)); 2147 emit_move_insn (gen_rtx_MEM (DImode, 2148 plus_constant (Pmode, stack_pointer_rtx, 2149 offset)), 2150 gen_rtx_REG (DImode, 255)); 2151 offset -= 8; 2152 } 2153 2154 /* After the return-address and the frame-pointer, we have the local 2155 variables. They're the ones that may have an "unaligned" size. */ 2156 offset -= (locals_size + 7) & ~7; 2157 2158 /* Now store all registers that are global, i.e. not saved by the 2159 register file machinery. 2160 2161 It is assumed that the frame-pointer is one of these registers, so it 2162 is explicitly excluded in the count. */ 2163 2164 for (regno = 255; 2165 regno >= MMIX_FIRST_GLOBAL_REGNUM; 2166 regno--) 2167 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) 2168 && df_regs_ever_live_p (regno) && ! call_used_regs[regno]) 2169 || IS_MMIX_EH_RETURN_DATA_REG (regno)) 2170 { 2171 rtx insn; 2172 2173 if (offset < 0) 2174 { 2175 HOST_WIDE_INT stack_chunk 2176 = (stack_space_to_allocate > (256 - offset - 8) 2177 ? (256 - offset - 8) : stack_space_to_allocate); 2178 2179 mmix_emit_sp_add (-stack_chunk); 2180 offset += stack_chunk; 2181 stack_space_to_allocate -= stack_chunk; 2182 } 2183 2184 insn = emit_move_insn (gen_rtx_MEM (DImode, 2185 plus_constant (Pmode, 2186 stack_pointer_rtx, 2187 offset)), 2188 gen_rtx_REG (DImode, regno)); 2189 RTX_FRAME_RELATED_P (insn) = 1; 2190 offset -= 8; 2191 } 2192 2193 /* Finally, allocate room for outgoing args and local vars if room 2194 wasn't allocated above. */ 2195 if (stack_space_to_allocate) 2196 mmix_emit_sp_add (-stack_space_to_allocate); 2197} 2198 2199/* Expands the function epilogue into RTX. */ 2200 2201void 2202mmix_expand_epilogue (void) 2203{ 2204 HOST_WIDE_INT locals_size = get_frame_size (); 2205 int regno; 2206 HOST_WIDE_INT stack_space_to_deallocate 2207 = (crtl->outgoing_args_size 2208 + crtl->args.pretend_args_size 2209 + locals_size + 7) & ~7; 2210 2211 /* The first address to access is beyond the outgoing_args area. */ 2212 HOST_WIDE_INT offset = crtl->outgoing_args_size; 2213 2214 /* Add the space for global non-register-stack registers. 2215 It is assumed that the frame-pointer register can be one of these 2216 registers, in which case it is excluded from the count when needed. */ 2217 for (regno = 255; 2218 regno >= MMIX_FIRST_GLOBAL_REGNUM; 2219 regno--) 2220 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) 2221 && df_regs_ever_live_p (regno) && !call_used_regs[regno]) 2222 || IS_MMIX_EH_RETURN_DATA_REG (regno)) 2223 stack_space_to_deallocate += 8; 2224 2225 /* Add in the space for register stack-pointer. If so, always add room 2226 for the saved PC. */ 2227 if (MMIX_CFUN_HAS_LANDING_PAD) 2228 stack_space_to_deallocate += 16; 2229 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) 2230 /* If we have a saved return-address slot, add it in. */ 2231 stack_space_to_deallocate += 8; 2232 2233 /* Add in the frame-pointer. */ 2234 if (frame_pointer_needed) 2235 stack_space_to_deallocate += 8; 2236 2237 /* Make sure we don't get an unaligned stack. */ 2238 if ((stack_space_to_deallocate % 8) != 0) 2239 internal_error ("stack frame not a multiple of octabyte: %wd", 2240 stack_space_to_deallocate); 2241 2242 /* We will add back small offsets to the stack pointer as we go. 2243 First, we restore all registers that are global, i.e. not saved by 2244 the register file machinery. */ 2245 2246 for (regno = MMIX_FIRST_GLOBAL_REGNUM; 2247 regno <= 255; 2248 regno++) 2249 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) 2250 && df_regs_ever_live_p (regno) && !call_used_regs[regno]) 2251 || IS_MMIX_EH_RETURN_DATA_REG (regno)) 2252 { 2253 if (offset > 255) 2254 { 2255 mmix_emit_sp_add (offset); 2256 stack_space_to_deallocate -= offset; 2257 offset = 0; 2258 } 2259 2260 emit_move_insn (gen_rtx_REG (DImode, regno), 2261 gen_rtx_MEM (DImode, 2262 plus_constant (Pmode, stack_pointer_rtx, 2263 offset))); 2264 offset += 8; 2265 } 2266 2267 /* Here is where the local variables were. As in the prologue, they 2268 might be of an unaligned size. */ 2269 offset += (locals_size + 7) & ~7; 2270 2271 /* The saved register stack pointer is just below the frame-pointer 2272 register. We don't need to restore it "manually"; the POP 2273 instruction does that. */ 2274 if (MMIX_CFUN_HAS_LANDING_PAD) 2275 offset += 16; 2276 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) 2277 /* The return-address slot is just below the frame-pointer register. 2278 We don't need to restore it because we don't really use it. */ 2279 offset += 8; 2280 2281 /* Get back the old frame-pointer-value. */ 2282 if (frame_pointer_needed) 2283 { 2284 if (offset > 255) 2285 { 2286 mmix_emit_sp_add (offset); 2287 2288 stack_space_to_deallocate -= offset; 2289 offset = 0; 2290 } 2291 2292 emit_move_insn (hard_frame_pointer_rtx, 2293 gen_rtx_MEM (DImode, 2294 plus_constant (Pmode, stack_pointer_rtx, 2295 offset))); 2296 offset += 8; 2297 } 2298 2299 /* We do not need to restore pretended incoming args, just add back 2300 offset to sp. */ 2301 if (stack_space_to_deallocate != 0) 2302 mmix_emit_sp_add (stack_space_to_deallocate); 2303 2304 if (crtl->calls_eh_return) 2305 /* Adjust the (normal) stack-pointer to that of the receiver. 2306 FIXME: It would be nice if we could also adjust the register stack 2307 here, but we need to express it through DWARF 2 too. */ 2308 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx, 2309 gen_rtx_REG (DImode, 2310 MMIX_EH_RETURN_STACKADJ_REGNUM))); 2311} 2312 2313/* Output an optimal sequence for setting a register to a specific 2314 constant. Used in an alternative for const_ints in movdi, and when 2315 using large stack-frame offsets. 2316 2317 Use do_begin_end to say if a line-starting TAB and newline before the 2318 first insn and after the last insn is wanted. */ 2319 2320void 2321mmix_output_register_setting (FILE *stream, 2322 int regno, 2323 int64_t value, 2324 int do_begin_end) 2325{ 2326 if (do_begin_end) 2327 fprintf (stream, "\t"); 2328 2329 if (insn_const_int_ok_for_constraint (value, CONSTRAINT_K)) 2330 fprintf (stream, "NEGU %s,0,%"PRId64, reg_names[regno], -value); 2331 else if (mmix_shiftable_wyde_value ((uint64_t) value)) 2332 { 2333 /* First, the one-insn cases. */ 2334 mmix_output_shiftvalue_op_from_str (stream, "SET", 2335 (uint64_t) 2336 value); 2337 fprintf (stream, " %s,", reg_names[regno]); 2338 mmix_output_shifted_value (stream, (uint64_t) value); 2339 } 2340 else if (mmix_shiftable_wyde_value (-(uint64_t) value)) 2341 { 2342 /* We do this to get a bit more legible assembly code. The next 2343 alternative is mostly redundant with this. */ 2344 2345 mmix_output_shiftvalue_op_from_str (stream, "SET", 2346 -(uint64_t) 2347 value); 2348 fprintf (stream, " %s,", reg_names[regno]); 2349 mmix_output_shifted_value (stream, -(uint64_t) value); 2350 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno], 2351 reg_names[regno]); 2352 } 2353 else if (mmix_shiftable_wyde_value (~(uint64_t) value)) 2354 { 2355 /* Slightly more expensive, the two-insn cases. */ 2356 2357 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255) 2358 is shiftable, or any other one-insn transformation of the value. 2359 FIXME: Check first if the value is "shiftable" by two loading 2360 with two insns, since it makes more readable assembly code (if 2361 anyone else cares). */ 2362 2363 mmix_output_shiftvalue_op_from_str (stream, "SET", 2364 ~(uint64_t) 2365 value); 2366 fprintf (stream, " %s,", reg_names[regno]); 2367 mmix_output_shifted_value (stream, ~(uint64_t) value); 2368 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno], 2369 reg_names[regno]); 2370 } 2371 else 2372 { 2373 /* The generic case. 2..4 insns. */ 2374 static const char *const higher_parts[] = {"L", "ML", "MH", "H"}; 2375 const char *op = "SET"; 2376 const char *line_begin = ""; 2377 int insns = 0; 2378 int i; 2379 int64_t tmpvalue = value; 2380 2381 /* Compute the number of insns needed to output this constant. */ 2382 for (i = 0; i < 4 && tmpvalue != 0; i++) 2383 { 2384 if (tmpvalue & 65535) 2385 insns++; 2386 tmpvalue >>= 16; 2387 } 2388 if (TARGET_BASE_ADDRESSES && insns == 3) 2389 { 2390 /* The number three is based on a static observation on 2391 ghostscript-6.52. Two and four are excluded because there 2392 are too many such constants, and each unique constant (maybe 2393 offset by 1..255) were used few times compared to other uses, 2394 e.g. addresses. 2395 2396 We use base-plus-offset addressing to force it into a global 2397 register; we just use a "LDA reg,VALUE", which will cause the 2398 assembler and linker to DTRT (for constants as well as 2399 addresses). */ 2400 fprintf (stream, "LDA %s,", reg_names[regno]); 2401 mmix_output_octa (stream, value, 0); 2402 } 2403 else 2404 { 2405 /* Output pertinent parts of the 4-wyde sequence. 2406 Still more to do if we want this to be optimal, but hey... 2407 Note that the zero case has been handled above. */ 2408 for (i = 0; i < 4 && value != 0; i++) 2409 { 2410 if (value & 65535) 2411 { 2412 fprintf (stream, "%s%s%s %s,#%x", line_begin, op, 2413 higher_parts[i], reg_names[regno], 2414 (int) (value & 65535)); 2415 /* The first one sets the rest of the bits to 0, the next 2416 ones add set bits. */ 2417 op = "INC"; 2418 line_begin = "\n\t"; 2419 } 2420 2421 value >>= 16; 2422 } 2423 } 2424 } 2425 2426 if (do_begin_end) 2427 fprintf (stream, "\n"); 2428} 2429 2430/* Return 1 if value is 0..65535*2**(16*N) for N=0..3. 2431 else return 0. */ 2432 2433int 2434mmix_shiftable_wyde_value (uint64_t value) 2435{ 2436 /* Shift by 16 bits per group, stop when we've found two groups with 2437 nonzero bits. */ 2438 int i; 2439 int has_candidate = 0; 2440 2441 for (i = 0; i < 4; i++) 2442 { 2443 if (value & 65535) 2444 { 2445 if (has_candidate) 2446 return 0; 2447 else 2448 has_candidate = 1; 2449 } 2450 2451 value >>= 16; 2452 } 2453 2454 return 1; 2455} 2456 2457/* X and Y are two things to compare using CODE. Return the rtx for 2458 the cc-reg in the proper mode. */ 2459 2460rtx 2461mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y) 2462{ 2463 machine_mode ccmode = SELECT_CC_MODE (code, x, y); 2464 return gen_reg_rtx (ccmode); 2465} 2466 2467/* Local (static) helper functions. */ 2468 2469static void 2470mmix_emit_sp_add (HOST_WIDE_INT offset) 2471{ 2472 rtx insn; 2473 2474 if (offset < 0) 2475 { 2476 /* Negative stack-pointer adjustments are allocations and appear in 2477 the prologue only. We mark them as frame-related so unwind and 2478 debug info is properly emitted for them. */ 2479 if (offset > -255) 2480 insn = emit_insn (gen_adddi3 (stack_pointer_rtx, 2481 stack_pointer_rtx, 2482 GEN_INT (offset))); 2483 else 2484 { 2485 rtx tmpr = gen_rtx_REG (DImode, 255); 2486 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1; 2487 insn = emit_insn (gen_adddi3 (stack_pointer_rtx, 2488 stack_pointer_rtx, tmpr)); 2489 } 2490 RTX_FRAME_RELATED_P (insn) = 1; 2491 } 2492 else 2493 { 2494 /* Positive adjustments are in the epilogue only. Don't mark them 2495 as "frame-related" for unwind info. */ 2496 if (insn_const_int_ok_for_constraint (offset, CONSTRAINT_L)) 2497 emit_insn (gen_adddi3 (stack_pointer_rtx, 2498 stack_pointer_rtx, 2499 GEN_INT (offset))); 2500 else 2501 { 2502 rtx tmpr = gen_rtx_REG (DImode, 255); 2503 emit_move_insn (tmpr, GEN_INT (offset)); 2504 insn = emit_insn (gen_adddi3 (stack_pointer_rtx, 2505 stack_pointer_rtx, tmpr)); 2506 } 2507 } 2508} 2509 2510/* Print operator suitable for doing something with a shiftable 2511 wyde. The type of operator is passed as an asm output modifier. */ 2512 2513static void 2514mmix_output_shiftvalue_op_from_str (FILE *stream, 2515 const char *mainop, 2516 int64_t value) 2517{ 2518 static const char *const op_part[] = {"L", "ML", "MH", "H"}; 2519 int i; 2520 2521 if (! mmix_shiftable_wyde_value (value)) 2522 { 2523 char s[sizeof ("0xffffffffffffffff")]; 2524 sprintf (s, "%#"PRIx64, value); 2525 internal_error ("MMIX Internal: %s is not a shiftable int", s); 2526 } 2527 2528 for (i = 0; i < 4; i++) 2529 { 2530 /* We know we're through when we find one-bits in the low 2531 16 bits. */ 2532 if (value & 0xffff) 2533 { 2534 fprintf (stream, "%s%s", mainop, op_part[i]); 2535 return; 2536 } 2537 value >>= 16; 2538 } 2539 2540 /* No bits set? Then it must have been zero. */ 2541 fprintf (stream, "%sL", mainop); 2542} 2543 2544/* Print a 64-bit value, optionally prefixed by assembly pseudo. */ 2545 2546static void 2547mmix_output_octa (FILE *stream, int64_t value, int do_begin_end) 2548{ 2549 if (do_begin_end) 2550 fprintf (stream, "\tOCTA "); 2551 2552 /* Provide a few alternative output formats depending on the number, to 2553 improve legibility of assembler output. */ 2554 if ((value < (int64_t) 0 && value > (int64_t) -10000) 2555 || (value >= (int64_t) 0 && value <= (int64_t) 16384)) 2556 fprintf (stream, "%d", (int) value); 2557 else if (value > (int64_t) 0 2558 && value < ((int64_t) 1 << 31) * 2) 2559 fprintf (stream, "#%x", (unsigned int) value); 2560 else if (sizeof (HOST_WIDE_INT) == sizeof (int64_t)) 2561 /* We need to avoid the not-so-universal "0x" prefix; we need the 2562 pure hex-digits together with the mmixal "#" hex prefix. */ 2563 fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX_PURE, 2564 (HOST_WIDE_INT) value); 2565 else /* Need to avoid the hex output; there's no ...WIDEST...HEX_PURE. */ 2566 fprintf (stream, "%"PRIu64, value); 2567 2568 if (do_begin_end) 2569 fprintf (stream, "\n"); 2570} 2571 2572/* Print the presumed shiftable wyde argument shifted into place (to 2573 be output with an operand). */ 2574 2575static void 2576mmix_output_shifted_value (FILE *stream, int64_t value) 2577{ 2578 int i; 2579 2580 if (! mmix_shiftable_wyde_value (value)) 2581 { 2582 char s[16+2+1]; 2583 sprintf (s, "%#"PRIx64, value); 2584 internal_error ("MMIX Internal: %s is not a shiftable int", s); 2585 } 2586 2587 for (i = 0; i < 4; i++) 2588 { 2589 /* We know we're through when we find one-bits in the low 16 bits. */ 2590 if (value & 0xffff) 2591 { 2592 fprintf (stream, "#%x", (int) (value & 0xffff)); 2593 return; 2594 } 2595 2596 value >>= 16; 2597 } 2598 2599 /* No bits set? Then it must have been zero. */ 2600 fprintf (stream, "0"); 2601} 2602 2603/* Output an MMIX condition name corresponding to an operator 2604 and operands: 2605 (comparison_operator [(comparison_operator ...) (const_int 0)]) 2606 which means we have to look at *two* operators. 2607 2608 The argument "reversed" refers to reversal of the condition (not the 2609 same as swapping the arguments). */ 2610 2611static void 2612mmix_output_condition (FILE *stream, const_rtx x, int reversed) 2613{ 2614 struct cc_conv 2615 { 2616 RTX_CODE cc; 2617 2618 /* The normal output cc-code. */ 2619 const char *const normal; 2620 2621 /* The reversed cc-code, or NULL if invalid. */ 2622 const char *const reversed; 2623 }; 2624 2625 struct cc_type_conv 2626 { 2627 machine_mode cc_mode; 2628 2629 /* Terminated with {UNKNOWN, NULL, NULL} */ 2630 const struct cc_conv *const convs; 2631 }; 2632 2633#undef CCEND 2634#define CCEND {UNKNOWN, NULL, NULL} 2635 2636 static const struct cc_conv cc_fun_convs[] 2637 = {{ORDERED, "Z", "P"}, 2638 {UNORDERED, "P", "Z"}, 2639 CCEND}; 2640 static const struct cc_conv cc_fp_convs[] 2641 = {{GT, "P", NULL}, 2642 {LT, "N", NULL}, 2643 CCEND}; 2644 static const struct cc_conv cc_fpeq_convs[] 2645 = {{NE, "Z", "P"}, 2646 {EQ, "P", "Z"}, 2647 CCEND}; 2648 static const struct cc_conv cc_uns_convs[] 2649 = {{GEU, "NN", "N"}, 2650 {GTU, "P", "NP"}, 2651 {LEU, "NP", "P"}, 2652 {LTU, "N", "NN"}, 2653 CCEND}; 2654 static const struct cc_conv cc_signed_convs[] 2655 = {{NE, "NZ", "Z"}, 2656 {EQ, "Z", "NZ"}, 2657 {GE, "NN", "N"}, 2658 {GT, "P", "NP"}, 2659 {LE, "NP", "P"}, 2660 {LT, "N", "NN"}, 2661 CCEND}; 2662 static const struct cc_conv cc_di_convs[] 2663 = {{NE, "NZ", "Z"}, 2664 {EQ, "Z", "NZ"}, 2665 {GE, "NN", "N"}, 2666 {GT, "P", "NP"}, 2667 {LE, "NP", "P"}, 2668 {LT, "N", "NN"}, 2669 {GTU, "NZ", "Z"}, 2670 {LEU, "Z", "NZ"}, 2671 CCEND}; 2672#undef CCEND 2673 2674 static const struct cc_type_conv cc_convs[] 2675 = {{CC_FUNmode, cc_fun_convs}, 2676 {CC_FPmode, cc_fp_convs}, 2677 {CC_FPEQmode, cc_fpeq_convs}, 2678 {CC_UNSmode, cc_uns_convs}, 2679 {CCmode, cc_signed_convs}, 2680 {DImode, cc_di_convs}}; 2681 2682 size_t i; 2683 int j; 2684 2685 machine_mode mode = GET_MODE (XEXP (x, 0)); 2686 RTX_CODE cc = GET_CODE (x); 2687 2688 for (i = 0; i < ARRAY_SIZE (cc_convs); i++) 2689 { 2690 if (mode == cc_convs[i].cc_mode) 2691 { 2692 for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++) 2693 if (cc == cc_convs[i].convs[j].cc) 2694 { 2695 const char *mmix_cc 2696 = (reversed ? cc_convs[i].convs[j].reversed 2697 : cc_convs[i].convs[j].normal); 2698 2699 if (mmix_cc == NULL) 2700 fatal_insn ("MMIX Internal: Trying to output invalidly\ 2701 reversed condition:", x); 2702 2703 fprintf (stream, "%s", mmix_cc); 2704 return; 2705 } 2706 2707 fatal_insn ("MMIX Internal: What's the CC of this?", x); 2708 } 2709 } 2710 2711 fatal_insn ("MMIX Internal: What is the CC of this?", x); 2712} 2713 2714/* Return the bit-value for a const_int or const_double. */ 2715 2716int64_t 2717mmix_intval (const_rtx x) 2718{ 2719 if (GET_CODE (x) == CONST_INT) 2720 return INTVAL (x); 2721 2722 /* We make a little song and dance because converting to long long in 2723 gcc-2.7.2 is broken. I still want people to be able to use it for 2724 cross-compilation to MMIX. */ 2725 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode) 2726 return CONST_DOUBLE_HIGH (x); 2727 2728 if (GET_CODE (x) == CONST_DOUBLE) 2729 { 2730 REAL_VALUE_TYPE value; 2731 2732 /* FIXME: This macro is not in the manual but should be. */ 2733 REAL_VALUE_FROM_CONST_DOUBLE (value, x); 2734 2735 if (GET_MODE (x) == DFmode) 2736 { 2737 long bits[2]; 2738 2739 REAL_VALUE_TO_TARGET_DOUBLE (value, bits); 2740 2741 /* The double cast is necessary to avoid getting the long 2742 sign-extended to unsigned long long(!) when they're of 2743 different size (usually 32-bit hosts). */ 2744 return 2745 ((uint64_t) (unsigned long) bits[0] 2746 << (uint64_t) 32U) 2747 | (uint64_t) (unsigned long) bits[1]; 2748 } 2749 else if (GET_MODE (x) == SFmode) 2750 { 2751 long bits; 2752 REAL_VALUE_TO_TARGET_SINGLE (value, bits); 2753 2754 return (unsigned long) bits; 2755 } 2756 } 2757 2758 fatal_insn ("MMIX Internal: This is not a constant:", x); 2759} 2760 2761/* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */ 2762 2763machine_mode 2764mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, 2765 machine_mode mode, 2766 int *punsignedp ATTRIBUTE_UNUSED, 2767 const_tree fntype ATTRIBUTE_UNUSED, 2768 int for_return) 2769{ 2770 /* Apparently not doing TRT if int < register-size. FIXME: Perhaps 2771 FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */ 2772 if (for_return == 1) 2773 return mode; 2774 2775 /* Promotion of modes currently generates slow code, extending before 2776 operation, so we do it only for arguments. */ 2777 if (GET_MODE_CLASS (mode) == MODE_INT 2778 && GET_MODE_SIZE (mode) < 8) 2779 return DImode; 2780 else 2781 return mode; 2782} 2783/* Worker function for TARGET_STRUCT_VALUE_RTX. */ 2784 2785static rtx 2786mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, 2787 int incoming ATTRIBUTE_UNUSED) 2788{ 2789 return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM); 2790} 2791 2792/* Worker function for TARGET_FRAME_POINTER_REQUIRED. 2793 2794 FIXME: Is this requirement built-in? Anyway, we should try to get rid 2795 of it; we can deduce the value. */ 2796 2797bool 2798mmix_frame_pointer_required (void) 2799{ 2800 return (cfun->has_nonlocal_label); 2801} 2802 2803/* 2804 * Local variables: 2805 * eval: (c-set-style "gnu") 2806 * indent-tabs-mode: t 2807 * End: 2808 */ 2809