1/* RISC-V opcode list 2 Copyright (C) 2011-2017 Free Software Foundation, Inc. 3 4 Contributed by Andrew Waterman (andrew@sifive.com). 5 Based on MIPS target. 6 7 This file is part of the GNU opcodes library. 8 9 This library is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 It is distributed in the hope that it will be useful, but WITHOUT 15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17 License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; see the file COPYING3. If not, 21 see <http://www.gnu.org/licenses/>. */ 22 23#include "sysdep.h" 24#include "opcode/riscv.h" 25#include <stdio.h> 26 27/* Register names used by gas and objdump. */ 28 29const char * const riscv_gpr_names_numeric[NGPR] = 30{ 31 "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", 32 "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", 33 "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", 34 "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31" 35}; 36 37const char * const riscv_gpr_names_abi[NGPR] = { 38 "zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", 39 "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5", 40 "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", 41 "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6" 42}; 43 44const char * const riscv_fpr_names_numeric[NFPR] = 45{ 46 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 47 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 48 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 49 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31" 50}; 51 52const char * const riscv_fpr_names_abi[NFPR] = { 53 "ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7", 54 "fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5", 55 "fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", 56 "fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11" 57}; 58 59/* The order of overloaded instructions matters. Label arguments and 60 register arguments look the same. Instructions that can have either 61 for arguments must apear in the correct order in this table for the 62 assembler to pick the right one. In other words, entries with 63 immediate operands must apear after the same instruction with 64 registers. 65 66 Because of the lookup algorithm used, entries with the same opcode 67 name must be contiguous. */ 68 69#define MASK_RS1 (OP_MASK_RS1 << OP_SH_RS1) 70#define MASK_RS2 (OP_MASK_RS2 << OP_SH_RS2) 71#define MASK_RD (OP_MASK_RD << OP_SH_RD) 72#define MASK_CRS2 (OP_MASK_CRS2 << OP_SH_CRS2) 73#define MASK_IMM ENCODE_ITYPE_IMM (-1U) 74#define MASK_RVC_IMM ENCODE_RVC_IMM (-1U) 75#define MASK_UIMM ENCODE_UTYPE_IMM (-1U) 76#define MASK_RM (OP_MASK_RM << OP_SH_RM) 77#define MASK_PRED (OP_MASK_PRED << OP_SH_PRED) 78#define MASK_SUCC (OP_MASK_SUCC << OP_SH_SUCC) 79#define MASK_AQ (OP_MASK_AQ << OP_SH_AQ) 80#define MASK_RL (OP_MASK_RL << OP_SH_RL) 81#define MASK_AQRL (MASK_AQ | MASK_RL) 82 83static int 84match_opcode (const struct riscv_opcode *op, insn_t insn) 85{ 86 return ((insn ^ op->match) & op->mask) == 0; 87} 88 89static int 90match_never (const struct riscv_opcode *op ATTRIBUTE_UNUSED, 91 insn_t insn ATTRIBUTE_UNUSED) 92{ 93 return 0; 94} 95 96static int 97match_rs1_eq_rs2 (const struct riscv_opcode *op, insn_t insn) 98{ 99 int rs1 = (insn & MASK_RS1) >> OP_SH_RS1; 100 int rs2 = (insn & MASK_RS2) >> OP_SH_RS2; 101 return match_opcode (op, insn) && rs1 == rs2; 102} 103 104static int 105match_rd_nonzero (const struct riscv_opcode *op, insn_t insn) 106{ 107 return match_opcode (op, insn) && ((insn & MASK_RD) != 0); 108} 109 110static int 111match_c_add (const struct riscv_opcode *op, insn_t insn) 112{ 113 return match_rd_nonzero (op, insn) && ((insn & MASK_CRS2) != 0); 114} 115 116static int 117match_c_lui (const struct riscv_opcode *op, insn_t insn) 118{ 119 return match_rd_nonzero (op, insn) && (((insn & MASK_RD) >> OP_SH_RD) != 2); 120} 121 122const struct riscv_opcode riscv_opcodes[] = 123{ 124/* name, isa, operands, match, mask, match_func, pinfo. */ 125{"unimp", "C", "", 0, 0xffffU, match_opcode, 0 }, 126{"unimp", "I", "", MATCH_CSRRW | (CSR_CYCLE << OP_SH_CSR), 0xffffffffU, match_opcode, 0 }, /* csrw cycle, x0 */ 127{"ebreak", "C", "", MATCH_C_EBREAK, MASK_C_EBREAK, match_opcode, INSN_ALIAS }, 128{"ebreak", "I", "", MATCH_EBREAK, MASK_EBREAK, match_opcode, 0 }, 129{"sbreak", "C", "", MATCH_C_EBREAK, MASK_C_EBREAK, match_opcode, INSN_ALIAS }, 130{"sbreak", "I", "", MATCH_EBREAK, MASK_EBREAK, match_opcode, INSN_ALIAS }, 131{"ret", "C", "", MATCH_C_JR | (X_RA << OP_SH_RD), MASK_C_JR | MASK_RD, match_opcode, INSN_ALIAS }, 132{"ret", "I", "", MATCH_JALR | (X_RA << OP_SH_RS1), MASK_JALR | MASK_RD | MASK_RS1 | MASK_IMM, match_opcode, INSN_ALIAS }, 133{"jr", "C", "d", MATCH_C_JR, MASK_C_JR, match_rd_nonzero, INSN_ALIAS }, 134{"jr", "I", "s", MATCH_JALR, MASK_JALR | MASK_RD | MASK_IMM, match_opcode, INSN_ALIAS }, 135{"jr", "I", "o(s)", MATCH_JALR, MASK_JALR | MASK_RD, match_opcode, INSN_ALIAS }, 136{"jr", "I", "s,j", MATCH_JALR, MASK_JALR | MASK_RD, match_opcode, INSN_ALIAS }, 137{"jalr", "C", "d", MATCH_C_JALR, MASK_C_JALR, match_rd_nonzero, INSN_ALIAS }, 138{"jalr", "I", "s", MATCH_JALR | (X_RA << OP_SH_RD), MASK_JALR | MASK_RD | MASK_IMM, match_opcode, INSN_ALIAS }, 139{"jalr", "I", "o(s)", MATCH_JALR | (X_RA << OP_SH_RD), MASK_JALR | MASK_RD, match_opcode, INSN_ALIAS }, 140{"jalr", "I", "s,j", MATCH_JALR | (X_RA << OP_SH_RD), MASK_JALR | MASK_RD, match_opcode, INSN_ALIAS }, 141{"jalr", "I", "d,s", MATCH_JALR, MASK_JALR | MASK_IMM, match_opcode, INSN_ALIAS }, 142{"jalr", "I", "d,o(s)", MATCH_JALR, MASK_JALR, match_opcode, 0 }, 143{"jalr", "I", "d,s,j", MATCH_JALR, MASK_JALR, match_opcode, 0 }, 144{"j", "C", "Ca", MATCH_C_J, MASK_C_J, match_opcode, INSN_ALIAS }, 145{"j", "I", "a", MATCH_JAL, MASK_JAL | MASK_RD, match_opcode, INSN_ALIAS }, 146{"jal", "I", "d,a", MATCH_JAL, MASK_JAL, match_opcode, 0 }, 147{"jal", "32C", "Ca", MATCH_C_JAL, MASK_C_JAL, match_opcode, INSN_ALIAS }, 148{"jal", "I", "a", MATCH_JAL | (X_RA << OP_SH_RD), MASK_JAL | MASK_RD, match_opcode, INSN_ALIAS }, 149{"call", "I", "d,c", (X_T1 << OP_SH_RS1), (int) M_CALL, match_never, INSN_MACRO }, 150{"call", "I", "c", (X_RA << OP_SH_RS1) | (X_RA << OP_SH_RD), (int) M_CALL, match_never, INSN_MACRO }, 151{"tail", "I", "c", (X_T1 << OP_SH_RS1), (int) M_CALL, match_never, INSN_MACRO }, 152{"jump", "I", "c,s", 0, (int) M_CALL, match_never, INSN_MACRO }, 153{"nop", "C", "", MATCH_C_ADDI, 0xffff, match_opcode, INSN_ALIAS }, 154{"nop", "I", "", MATCH_ADDI, MASK_ADDI | MASK_RD | MASK_RS1 | MASK_IMM, match_opcode, INSN_ALIAS }, 155{"lui", "C", "d,Cu", MATCH_C_LUI, MASK_C_LUI, match_c_lui, INSN_ALIAS }, 156{"lui", "I", "d,u", MATCH_LUI, MASK_LUI, match_opcode, 0 }, 157{"li", "C", "d,Cv", MATCH_C_LUI, MASK_C_LUI, match_c_lui, INSN_ALIAS }, 158{"li", "C", "d,Cj", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, INSN_ALIAS }, 159{"li", "C", "d,0", MATCH_C_LI, MASK_C_LI | MASK_RVC_IMM, match_rd_nonzero, INSN_ALIAS }, 160{"li", "I", "d,j", MATCH_ADDI, MASK_ADDI | MASK_RS1, match_opcode, INSN_ALIAS }, /* addi */ 161{"li", "I", "d,I", 0, (int) M_LI, match_never, INSN_MACRO }, 162{"mv", "C", "d,CV", MATCH_C_MV, MASK_C_MV, match_c_add, INSN_ALIAS }, 163{"mv", "I", "d,s", MATCH_ADDI, MASK_ADDI | MASK_IMM, match_opcode, INSN_ALIAS }, 164{"move", "C", "d,CV", MATCH_C_MV, MASK_C_MV, match_c_add, INSN_ALIAS }, 165{"move", "I", "d,s", MATCH_ADDI, MASK_ADDI | MASK_IMM, match_opcode, INSN_ALIAS }, 166{"andi", "C", "Cs,Cw,Cj", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, INSN_ALIAS }, 167{"andi", "I", "d,s,j", MATCH_ANDI, MASK_ANDI, match_opcode, 0 }, 168{"and", "C", "Cs,Cw,Ct", MATCH_C_AND, MASK_C_AND, match_opcode, INSN_ALIAS }, 169{"and", "C", "Cs,Ct,Cw", MATCH_C_AND, MASK_C_AND, match_opcode, INSN_ALIAS }, 170{"and", "C", "Cs,Cw,Cj", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, INSN_ALIAS }, 171{"and", "I", "d,s,t", MATCH_AND, MASK_AND, match_opcode, 0 }, 172{"and", "I", "d,s,j", MATCH_ANDI, MASK_ANDI, match_opcode, INSN_ALIAS }, 173{"beqz", "C", "Cs,Cp", MATCH_C_BEQZ, MASK_C_BEQZ, match_opcode, INSN_ALIAS }, 174{"beqz", "I", "s,p", MATCH_BEQ, MASK_BEQ | MASK_RS2, match_opcode, INSN_ALIAS }, 175{"beq", "I", "s,t,p", MATCH_BEQ, MASK_BEQ, match_opcode, 0 }, 176{"blez", "I", "t,p", MATCH_BGE, MASK_BGE | MASK_RS1, match_opcode, INSN_ALIAS }, 177{"bgez", "I", "s,p", MATCH_BGE, MASK_BGE | MASK_RS2, match_opcode, INSN_ALIAS }, 178{"ble", "I", "t,s,p", MATCH_BGE, MASK_BGE, match_opcode, INSN_ALIAS }, 179{"bleu", "I", "t,s,p", MATCH_BGEU, MASK_BGEU, match_opcode, INSN_ALIAS }, 180{"bge", "I", "s,t,p", MATCH_BGE, MASK_BGE, match_opcode, 0 }, 181{"bgeu", "I", "s,t,p", MATCH_BGEU, MASK_BGEU, match_opcode, 0 }, 182{"bltz", "I", "s,p", MATCH_BLT, MASK_BLT | MASK_RS2, match_opcode, INSN_ALIAS }, 183{"bgtz", "I", "t,p", MATCH_BLT, MASK_BLT | MASK_RS1, match_opcode, INSN_ALIAS }, 184{"blt", "I", "s,t,p", MATCH_BLT, MASK_BLT, match_opcode, 0 }, 185{"bltu", "I", "s,t,p", MATCH_BLTU, MASK_BLTU, match_opcode, 0 }, 186{"bgt", "I", "t,s,p", MATCH_BLT, MASK_BLT, match_opcode, INSN_ALIAS }, 187{"bgtu", "I", "t,s,p", MATCH_BLTU, MASK_BLTU, match_opcode, INSN_ALIAS }, 188{"bnez", "C", "Cs,Cp", MATCH_C_BNEZ, MASK_C_BNEZ, match_opcode, INSN_ALIAS }, 189{"bnez", "I", "s,p", MATCH_BNE, MASK_BNE | MASK_RS2, match_opcode, INSN_ALIAS }, 190{"bne", "I", "s,t,p", MATCH_BNE, MASK_BNE, match_opcode, 0 }, 191{"addi", "C", "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_opcode, INSN_ALIAS }, 192{"addi", "C", "d,CU,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, INSN_ALIAS }, 193{"addi", "C", "Cc,Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_opcode, INSN_ALIAS }, 194{"addi", "I", "d,s,j", MATCH_ADDI, MASK_ADDI, match_opcode, 0 }, 195{"add", "C", "d,CU,CV", MATCH_C_ADD, MASK_C_ADD, match_c_add, INSN_ALIAS }, 196{"add", "C", "d,CV,CU", MATCH_C_ADD, MASK_C_ADD, match_c_add, INSN_ALIAS }, 197{"add", "C", "d,CU,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, INSN_ALIAS }, 198{"add", "C", "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_opcode, INSN_ALIAS }, 199{"add", "C", "Cc,Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_opcode, INSN_ALIAS }, 200{"add", "I", "d,s,t", MATCH_ADD, MASK_ADD, match_opcode, 0 }, 201{"add", "I", "d,s,t,0",MATCH_ADD, MASK_ADD, match_opcode, 0 }, 202{"add", "I", "d,s,j", MATCH_ADDI, MASK_ADDI, match_opcode, INSN_ALIAS }, 203{"la", "I", "d,A", 0, (int) M_LA, match_never, INSN_MACRO }, 204{"lla", "I", "d,A", 0, (int) M_LLA, match_never, INSN_MACRO }, 205{"la.tls.gd", "I", "d,A", 0, (int) M_LA_TLS_GD, match_never, INSN_MACRO }, 206{"la.tls.ie", "I", "d,A", 0, (int) M_LA_TLS_IE, match_never, INSN_MACRO }, 207{"neg", "I", "d,t", MATCH_SUB, MASK_SUB | MASK_RS1, match_opcode, INSN_ALIAS }, /* sub 0 */ 208{"slli", "C", "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_rd_nonzero, INSN_ALIAS }, 209{"slli", "I", "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, 0 }, 210{"sll", "C", "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_rd_nonzero, INSN_ALIAS }, 211{"sll", "I", "d,s,t", MATCH_SLL, MASK_SLL, match_opcode, 0 }, 212{"sll", "I", "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, INSN_ALIAS }, 213{"srli", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, INSN_ALIAS }, 214{"srli", "I", "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, 0 }, 215{"srl", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, INSN_ALIAS }, 216{"srl", "I", "d,s,t", MATCH_SRL, MASK_SRL, match_opcode, 0 }, 217{"srl", "I", "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, INSN_ALIAS }, 218{"srai", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, INSN_ALIAS }, 219{"srai", "I", "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, 0 }, 220{"sra", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, INSN_ALIAS }, 221{"sra", "I", "d,s,t", MATCH_SRA, MASK_SRA, match_opcode, 0 }, 222{"sra", "I", "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, INSN_ALIAS }, 223{"sub", "C", "Cs,Cw,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, INSN_ALIAS }, 224{"sub", "I", "d,s,t", MATCH_SUB, MASK_SUB, match_opcode, 0 }, 225{"lb", "I", "d,o(s)", MATCH_LB, MASK_LB, match_opcode, 0 }, 226{"lb", "I", "d,A", 0, (int) M_LB, match_never, INSN_MACRO }, 227{"lbu", "I", "d,o(s)", MATCH_LBU, MASK_LBU, match_opcode, 0 }, 228{"lbu", "I", "d,A", 0, (int) M_LBU, match_never, INSN_MACRO }, 229{"lh", "I", "d,o(s)", MATCH_LH, MASK_LH, match_opcode, 0 }, 230{"lh", "I", "d,A", 0, (int) M_LH, match_never, INSN_MACRO }, 231{"lhu", "I", "d,o(s)", MATCH_LHU, MASK_LHU, match_opcode, 0 }, 232{"lhu", "I", "d,A", 0, (int) M_LHU, match_never, INSN_MACRO }, 233{"lw", "C", "d,Cm(Cc)", MATCH_C_LWSP, MASK_C_LWSP, match_rd_nonzero, INSN_ALIAS }, 234{"lw", "C", "Ct,Ck(Cs)", MATCH_C_LW, MASK_C_LW, match_opcode, INSN_ALIAS }, 235{"lw", "I", "d,o(s)", MATCH_LW, MASK_LW, match_opcode, 0 }, 236{"lw", "I", "d,A", 0, (int) M_LW, match_never, INSN_MACRO }, 237{"not", "I", "d,s", MATCH_XORI | MASK_IMM, MASK_XORI | MASK_IMM, match_opcode, INSN_ALIAS }, 238{"ori", "I", "d,s,j", MATCH_ORI, MASK_ORI, match_opcode, 0 }, 239{"or", "C", "Cs,Cw,Ct", MATCH_C_OR, MASK_C_OR, match_opcode, INSN_ALIAS }, 240{"or", "C", "Cs,Ct,Cw", MATCH_C_OR, MASK_C_OR, match_opcode, INSN_ALIAS }, 241{"or", "I", "d,s,t", MATCH_OR, MASK_OR, match_opcode, 0 }, 242{"or", "I", "d,s,j", MATCH_ORI, MASK_ORI, match_opcode, INSN_ALIAS }, 243{"auipc", "I", "d,u", MATCH_AUIPC, MASK_AUIPC, match_opcode, 0 }, 244{"seqz", "I", "d,s", MATCH_SLTIU | ENCODE_ITYPE_IMM (1), MASK_SLTIU | MASK_IMM, match_opcode, INSN_ALIAS }, 245{"snez", "I", "d,t", MATCH_SLTU, MASK_SLTU | MASK_RS1, match_opcode, INSN_ALIAS }, 246{"sltz", "I", "d,s", MATCH_SLT, MASK_SLT | MASK_RS2, match_opcode, INSN_ALIAS }, 247{"sgtz", "I", "d,t", MATCH_SLT, MASK_SLT | MASK_RS1, match_opcode, INSN_ALIAS }, 248{"slti", "I", "d,s,j", MATCH_SLTI, MASK_SLTI, match_opcode, INSN_ALIAS }, 249{"slt", "I", "d,s,t", MATCH_SLT, MASK_SLT, match_opcode, 0 }, 250{"slt", "I", "d,s,j", MATCH_SLTI, MASK_SLTI, match_opcode, 0 }, 251{"sltiu", "I", "d,s,j", MATCH_SLTIU, MASK_SLTIU, match_opcode, 0 }, 252{"sltu", "I", "d,s,t", MATCH_SLTU, MASK_SLTU, match_opcode, 0 }, 253{"sltu", "I", "d,s,j", MATCH_SLTIU, MASK_SLTIU, match_opcode, INSN_ALIAS }, 254{"sgt", "I", "d,t,s", MATCH_SLT, MASK_SLT, match_opcode, INSN_ALIAS }, 255{"sgtu", "I", "d,t,s", MATCH_SLTU, MASK_SLTU, match_opcode, INSN_ALIAS }, 256{"sb", "I", "t,q(s)", MATCH_SB, MASK_SB, match_opcode, 0 }, 257{"sb", "I", "t,A,s", 0, (int) M_SB, match_never, INSN_MACRO }, 258{"sh", "I", "t,q(s)", MATCH_SH, MASK_SH, match_opcode, 0 }, 259{"sh", "I", "t,A,s", 0, (int) M_SH, match_never, INSN_MACRO }, 260{"sw", "C", "CV,CM(Cc)", MATCH_C_SWSP, MASK_C_SWSP, match_opcode, INSN_ALIAS }, 261{"sw", "C", "Ct,Ck(Cs)", MATCH_C_SW, MASK_C_SW, match_opcode, INSN_ALIAS }, 262{"sw", "I", "t,q(s)", MATCH_SW, MASK_SW, match_opcode, 0 }, 263{"sw", "I", "t,A,s", 0, (int) M_SW, match_never, INSN_MACRO }, 264{"fence", "I", "", MATCH_FENCE | MASK_PRED | MASK_SUCC, MASK_FENCE | MASK_RD | MASK_RS1 | MASK_IMM, match_opcode, INSN_ALIAS }, 265{"fence", "I", "P,Q", MATCH_FENCE, MASK_FENCE | MASK_RD | MASK_RS1 | (MASK_IMM & ~MASK_PRED & ~MASK_SUCC), match_opcode, 0 }, 266{"fence.i", "I", "", MATCH_FENCE_I, MASK_FENCE | MASK_RD | MASK_RS1 | MASK_IMM, match_opcode, 0 }, 267{"rdcycle", "I", "d", MATCH_RDCYCLE, MASK_RDCYCLE, match_opcode, INSN_ALIAS }, 268{"rdinstret", "I", "d", MATCH_RDINSTRET, MASK_RDINSTRET, match_opcode, INSN_ALIAS }, 269{"rdtime", "I", "d", MATCH_RDTIME, MASK_RDTIME, match_opcode, INSN_ALIAS }, 270{"rdcycleh", "32I", "d", MATCH_RDCYCLEH, MASK_RDCYCLEH, match_opcode, INSN_ALIAS }, 271{"rdinstreth","32I", "d", MATCH_RDINSTRETH, MASK_RDINSTRETH, match_opcode, INSN_ALIAS }, 272{"rdtimeh", "32I", "d", MATCH_RDTIMEH, MASK_RDTIMEH, match_opcode, INSN_ALIAS }, 273{"ecall", "I", "", MATCH_SCALL, MASK_SCALL, match_opcode, 0 }, 274{"scall", "I", "", MATCH_SCALL, MASK_SCALL, match_opcode, 0 }, 275{"xori", "I", "d,s,j", MATCH_XORI, MASK_XORI, match_opcode, 0 }, 276{"xor", "C", "Cs,Cw,Ct", MATCH_C_XOR, MASK_C_XOR, match_opcode, INSN_ALIAS }, 277{"xor", "C", "Cs,Ct,Cw", MATCH_C_XOR, MASK_C_XOR, match_opcode, INSN_ALIAS }, 278{"xor", "I", "d,s,t", MATCH_XOR, MASK_XOR, match_opcode, 0 }, 279{"xor", "I", "d,s,j", MATCH_XORI, MASK_XORI, match_opcode, INSN_ALIAS }, 280{"lwu", "64I", "d,o(s)", MATCH_LWU, MASK_LWU, match_opcode, 0 }, 281{"lwu", "64I", "d,A", 0, (int) M_LWU, match_never, INSN_MACRO }, 282{"ld", "64C", "d,Cn(Cc)", MATCH_C_LDSP, MASK_C_LDSP, match_rd_nonzero, INSN_ALIAS }, 283{"ld", "64C", "Ct,Cl(Cs)", MATCH_C_LD, MASK_C_LD, match_opcode, INSN_ALIAS }, 284{"ld", "64I", "d,o(s)", MATCH_LD, MASK_LD, match_opcode, 0 }, 285{"ld", "64I", "d,A", 0, (int) M_LD, match_never, INSN_MACRO }, 286{"sd", "64C", "CV,CN(Cc)", MATCH_C_SDSP, MASK_C_SDSP, match_opcode, INSN_ALIAS }, 287{"sd", "64C", "Ct,Cl(Cs)", MATCH_C_SD, MASK_C_SD, match_opcode, INSN_ALIAS }, 288{"sd", "64I", "t,q(s)", MATCH_SD, MASK_SD, match_opcode, 0 }, 289{"sd", "64I", "t,A,s", 0, (int) M_SD, match_never, INSN_MACRO }, 290{"sext.w", "64C", "d,CU", MATCH_C_ADDIW, MASK_C_ADDIW | MASK_RVC_IMM, match_rd_nonzero, INSN_ALIAS }, 291{"sext.w", "64I", "d,s", MATCH_ADDIW, MASK_ADDIW | MASK_IMM, match_opcode, INSN_ALIAS }, 292{"addiw", "64C", "d,CU,Cj", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, INSN_ALIAS }, 293{"addiw", "64I", "d,s,j", MATCH_ADDIW, MASK_ADDIW, match_opcode, 0 }, 294{"addw", "64C", "Cs,Cw,Ct", MATCH_C_ADDW, MASK_C_ADDW, match_opcode, INSN_ALIAS }, 295{"addw", "64C", "Cs,Ct,Cw", MATCH_C_ADDW, MASK_C_ADDW, match_opcode, INSN_ALIAS }, 296{"addw", "64C", "d,CU,Cj", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, INSN_ALIAS }, 297{"addw", "64I", "d,s,t", MATCH_ADDW, MASK_ADDW, match_opcode, 0 }, 298{"addw", "64I", "d,s,j", MATCH_ADDIW, MASK_ADDIW, match_opcode, INSN_ALIAS }, 299{"negw", "64I", "d,t", MATCH_SUBW, MASK_SUBW | MASK_RS1, match_opcode, INSN_ALIAS }, /* sub 0 */ 300{"slliw", "64I", "d,s,<", MATCH_SLLIW, MASK_SLLIW, match_opcode, 0 }, 301{"sllw", "64I", "d,s,t", MATCH_SLLW, MASK_SLLW, match_opcode, 0 }, 302{"sllw", "64I", "d,s,<", MATCH_SLLIW, MASK_SLLIW, match_opcode, INSN_ALIAS }, 303{"srliw", "64I", "d,s,<", MATCH_SRLIW, MASK_SRLIW, match_opcode, 0 }, 304{"srlw", "64I", "d,s,t", MATCH_SRLW, MASK_SRLW, match_opcode, 0 }, 305{"srlw", "64I", "d,s,<", MATCH_SRLIW, MASK_SRLIW, match_opcode, INSN_ALIAS }, 306{"sraiw", "64I", "d,s,<", MATCH_SRAIW, MASK_SRAIW, match_opcode, 0 }, 307{"sraw", "64I", "d,s,t", MATCH_SRAW, MASK_SRAW, match_opcode, 0 }, 308{"sraw", "64I", "d,s,<", MATCH_SRAIW, MASK_SRAIW, match_opcode, INSN_ALIAS }, 309{"subw", "64C", "Cs,Cw,Ct", MATCH_C_SUBW, MASK_C_SUBW, match_opcode, INSN_ALIAS }, 310{"subw", "64I", "d,s,t", MATCH_SUBW, MASK_SUBW, match_opcode, 0 }, 311 312/* Atomic memory operation instruction subset */ 313{"lr.w", "A", "d,0(s)", MATCH_LR_W, MASK_LR_W | MASK_AQRL, match_opcode, 0 }, 314{"sc.w", "A", "d,t,0(s)", MATCH_SC_W, MASK_SC_W | MASK_AQRL, match_opcode, 0 }, 315{"amoadd.w", "A", "d,t,0(s)", MATCH_AMOADD_W, MASK_AMOADD_W | MASK_AQRL, match_opcode, 0 }, 316{"amoswap.w", "A", "d,t,0(s)", MATCH_AMOSWAP_W, MASK_AMOSWAP_W | MASK_AQRL, match_opcode, 0 }, 317{"amoand.w", "A", "d,t,0(s)", MATCH_AMOAND_W, MASK_AMOAND_W | MASK_AQRL, match_opcode, 0 }, 318{"amoor.w", "A", "d,t,0(s)", MATCH_AMOOR_W, MASK_AMOOR_W | MASK_AQRL, match_opcode, 0 }, 319{"amoxor.w", "A", "d,t,0(s)", MATCH_AMOXOR_W, MASK_AMOXOR_W | MASK_AQRL, match_opcode, 0 }, 320{"amomax.w", "A", "d,t,0(s)", MATCH_AMOMAX_W, MASK_AMOMAX_W | MASK_AQRL, match_opcode, 0 }, 321{"amomaxu.w", "A", "d,t,0(s)", MATCH_AMOMAXU_W, MASK_AMOMAXU_W | MASK_AQRL, match_opcode, 0 }, 322{"amomin.w", "A", "d,t,0(s)", MATCH_AMOMIN_W, MASK_AMOMIN_W | MASK_AQRL, match_opcode, 0 }, 323{"amominu.w", "A", "d,t,0(s)", MATCH_AMOMINU_W, MASK_AMOMINU_W | MASK_AQRL, match_opcode, 0 }, 324{"lr.w.aq", "A", "d,0(s)", MATCH_LR_W | MASK_AQ, MASK_LR_W | MASK_AQRL, match_opcode, 0 }, 325{"sc.w.aq", "A", "d,t,0(s)", MATCH_SC_W | MASK_AQ, MASK_SC_W | MASK_AQRL, match_opcode, 0 }, 326{"amoadd.w.aq", "A", "d,t,0(s)", MATCH_AMOADD_W | MASK_AQ, MASK_AMOADD_W | MASK_AQRL, match_opcode, 0 }, 327{"amoswap.w.aq", "A", "d,t,0(s)", MATCH_AMOSWAP_W | MASK_AQ, MASK_AMOSWAP_W | MASK_AQRL, match_opcode, 0 }, 328{"amoand.w.aq", "A", "d,t,0(s)", MATCH_AMOAND_W | MASK_AQ, MASK_AMOAND_W | MASK_AQRL, match_opcode, 0 }, 329{"amoor.w.aq", "A", "d,t,0(s)", MATCH_AMOOR_W | MASK_AQ, MASK_AMOOR_W | MASK_AQRL, match_opcode, 0 }, 330{"amoxor.w.aq", "A", "d,t,0(s)", MATCH_AMOXOR_W | MASK_AQ, MASK_AMOXOR_W | MASK_AQRL, match_opcode, 0 }, 331{"amomax.w.aq", "A", "d,t,0(s)", MATCH_AMOMAX_W | MASK_AQ, MASK_AMOMAX_W | MASK_AQRL, match_opcode, 0 }, 332{"amomaxu.w.aq", "A", "d,t,0(s)", MATCH_AMOMAXU_W | MASK_AQ, MASK_AMOMAXU_W | MASK_AQRL, match_opcode, 0 }, 333{"amomin.w.aq", "A", "d,t,0(s)", MATCH_AMOMIN_W | MASK_AQ, MASK_AMOMIN_W | MASK_AQRL, match_opcode, 0 }, 334{"amominu.w.aq", "A", "d,t,0(s)", MATCH_AMOMINU_W | MASK_AQ, MASK_AMOMINU_W | MASK_AQRL, match_opcode, 0 }, 335{"lr.w.rl", "A", "d,0(s)", MATCH_LR_W | MASK_RL, MASK_LR_W | MASK_AQRL, match_opcode, 0 }, 336{"sc.w.rl", "A", "d,t,0(s)", MATCH_SC_W | MASK_RL, MASK_SC_W | MASK_AQRL, match_opcode, 0 }, 337{"amoadd.w.rl", "A", "d,t,0(s)", MATCH_AMOADD_W | MASK_RL, MASK_AMOADD_W | MASK_AQRL, match_opcode, 0 }, 338{"amoswap.w.rl", "A", "d,t,0(s)", MATCH_AMOSWAP_W | MASK_RL, MASK_AMOSWAP_W | MASK_AQRL, match_opcode, 0 }, 339{"amoand.w.rl", "A", "d,t,0(s)", MATCH_AMOAND_W | MASK_RL, MASK_AMOAND_W | MASK_AQRL, match_opcode, 0 }, 340{"amoor.w.rl", "A", "d,t,0(s)", MATCH_AMOOR_W | MASK_RL, MASK_AMOOR_W | MASK_AQRL, match_opcode, 0 }, 341{"amoxor.w.rl", "A", "d,t,0(s)", MATCH_AMOXOR_W | MASK_RL, MASK_AMOXOR_W | MASK_AQRL, match_opcode, 0 }, 342{"amomax.w.rl", "A", "d,t,0(s)", MATCH_AMOMAX_W | MASK_RL, MASK_AMOMAX_W | MASK_AQRL, match_opcode, 0 }, 343{"amomaxu.w.rl", "A", "d,t,0(s)", MATCH_AMOMAXU_W | MASK_RL, MASK_AMOMAXU_W | MASK_AQRL, match_opcode, 0 }, 344{"amomin.w.rl", "A", "d,t,0(s)", MATCH_AMOMIN_W | MASK_RL, MASK_AMOMIN_W | MASK_AQRL, match_opcode, 0 }, 345{"amominu.w.rl", "A", "d,t,0(s)", MATCH_AMOMINU_W | MASK_RL, MASK_AMOMINU_W | MASK_AQRL, match_opcode, 0 }, 346{"lr.w.aqrl", "A", "d,0(s)", MATCH_LR_W | MASK_AQRL, MASK_LR_W | MASK_AQRL, match_opcode, 0 }, 347{"sc.w.aqrl", "A", "d,t,0(s)", MATCH_SC_W | MASK_AQRL, MASK_SC_W | MASK_AQRL, match_opcode, 0 }, 348{"amoadd.w.aqrl", "A", "d,t,0(s)", MATCH_AMOADD_W | MASK_AQRL, MASK_AMOADD_W | MASK_AQRL, match_opcode, 0 }, 349{"amoswap.w.aqrl", "A", "d,t,0(s)", MATCH_AMOSWAP_W | MASK_AQRL, MASK_AMOSWAP_W | MASK_AQRL, match_opcode, 0 }, 350{"amoand.w.aqrl", "A", "d,t,0(s)", MATCH_AMOAND_W | MASK_AQRL, MASK_AMOAND_W | MASK_AQRL, match_opcode, 0 }, 351{"amoor.w.aqrl", "A", "d,t,0(s)", MATCH_AMOOR_W | MASK_AQRL, MASK_AMOOR_W | MASK_AQRL, match_opcode, 0 }, 352{"amoxor.w.aqrl", "A", "d,t,0(s)", MATCH_AMOXOR_W | MASK_AQRL, MASK_AMOXOR_W | MASK_AQRL, match_opcode, 0 }, 353{"amomax.w.aqrl", "A", "d,t,0(s)", MATCH_AMOMAX_W | MASK_AQRL, MASK_AMOMAX_W | MASK_AQRL, match_opcode, 0 }, 354{"amomaxu.w.aqrl", "A", "d,t,0(s)", MATCH_AMOMAXU_W | MASK_AQRL, MASK_AMOMAXU_W | MASK_AQRL, match_opcode, 0 }, 355{"amomin.w.aqrl", "A", "d,t,0(s)", MATCH_AMOMIN_W | MASK_AQRL, MASK_AMOMIN_W | MASK_AQRL, match_opcode, 0 }, 356{"amominu.w.aqrl", "A", "d,t,0(s)", MATCH_AMOMINU_W | MASK_AQRL, MASK_AMOMINU_W | MASK_AQRL, match_opcode, 0 }, 357{"lr.d", "64A", "d,0(s)", MATCH_LR_D, MASK_LR_D | MASK_AQRL, match_opcode, 0 }, 358{"sc.d", "64A", "d,t,0(s)", MATCH_SC_D, MASK_SC_D | MASK_AQRL, match_opcode, 0 }, 359{"amoadd.d", "64A", "d,t,0(s)", MATCH_AMOADD_D, MASK_AMOADD_D | MASK_AQRL, match_opcode, 0 }, 360{"amoswap.d", "64A", "d,t,0(s)", MATCH_AMOSWAP_D, MASK_AMOSWAP_D | MASK_AQRL, match_opcode, 0 }, 361{"amoand.d", "64A", "d,t,0(s)", MATCH_AMOAND_D, MASK_AMOAND_D | MASK_AQRL, match_opcode, 0 }, 362{"amoor.d", "64A", "d,t,0(s)", MATCH_AMOOR_D, MASK_AMOOR_D | MASK_AQRL, match_opcode, 0 }, 363{"amoxor.d", "64A", "d,t,0(s)", MATCH_AMOXOR_D, MASK_AMOXOR_D | MASK_AQRL, match_opcode, 0 }, 364{"amomax.d", "64A", "d,t,0(s)", MATCH_AMOMAX_D, MASK_AMOMAX_D | MASK_AQRL, match_opcode, 0 }, 365{"amomaxu.d", "64A", "d,t,0(s)", MATCH_AMOMAXU_D, MASK_AMOMAXU_D | MASK_AQRL, match_opcode, 0 }, 366{"amomin.d", "64A", "d,t,0(s)", MATCH_AMOMIN_D, MASK_AMOMIN_D | MASK_AQRL, match_opcode, 0 }, 367{"amominu.d", "64A", "d,t,0(s)", MATCH_AMOMINU_D, MASK_AMOMINU_D | MASK_AQRL, match_opcode, 0 }, 368{"lr.d.aq", "64A", "d,0(s)", MATCH_LR_D | MASK_AQ, MASK_LR_D | MASK_AQRL, match_opcode, 0 }, 369{"sc.d.aq", "64A", "d,t,0(s)", MATCH_SC_D | MASK_AQ, MASK_SC_D | MASK_AQRL, match_opcode, 0 }, 370{"amoadd.d.aq", "64A", "d,t,0(s)", MATCH_AMOADD_D | MASK_AQ, MASK_AMOADD_D | MASK_AQRL, match_opcode, 0 }, 371{"amoswap.d.aq", "64A", "d,t,0(s)", MATCH_AMOSWAP_D | MASK_AQ, MASK_AMOSWAP_D | MASK_AQRL, match_opcode, 0 }, 372{"amoand.d.aq", "64A", "d,t,0(s)", MATCH_AMOAND_D | MASK_AQ, MASK_AMOAND_D | MASK_AQRL, match_opcode, 0 }, 373{"amoor.d.aq", "64A", "d,t,0(s)", MATCH_AMOOR_D | MASK_AQ, MASK_AMOOR_D | MASK_AQRL, match_opcode, 0 }, 374{"amoxor.d.aq", "64A", "d,t,0(s)", MATCH_AMOXOR_D | MASK_AQ, MASK_AMOXOR_D | MASK_AQRL, match_opcode, 0 }, 375{"amomax.d.aq", "64A", "d,t,0(s)", MATCH_AMOMAX_D | MASK_AQ, MASK_AMOMAX_D | MASK_AQRL, match_opcode, 0 }, 376{"amomaxu.d.aq", "64A", "d,t,0(s)", MATCH_AMOMAXU_D | MASK_AQ, MASK_AMOMAXU_D | MASK_AQRL, match_opcode, 0 }, 377{"amomin.d.aq", "64A", "d,t,0(s)", MATCH_AMOMIN_D | MASK_AQ, MASK_AMOMIN_D | MASK_AQRL, match_opcode, 0 }, 378{"amominu.d.aq", "64A", "d,t,0(s)", MATCH_AMOMINU_D | MASK_AQ, MASK_AMOMINU_D | MASK_AQRL, match_opcode, 0 }, 379{"lr.d.rl", "64A", "d,0(s)", MATCH_LR_D | MASK_RL, MASK_LR_D | MASK_AQRL, match_opcode, 0 }, 380{"sc.d.rl", "64A", "d,t,0(s)", MATCH_SC_D | MASK_RL, MASK_SC_D | MASK_AQRL, match_opcode, 0 }, 381{"amoadd.d.rl", "64A", "d,t,0(s)", MATCH_AMOADD_D | MASK_RL, MASK_AMOADD_D | MASK_AQRL, match_opcode, 0 }, 382{"amoswap.d.rl", "64A", "d,t,0(s)", MATCH_AMOSWAP_D | MASK_RL, MASK_AMOSWAP_D | MASK_AQRL, match_opcode, 0 }, 383{"amoand.d.rl", "64A", "d,t,0(s)", MATCH_AMOAND_D | MASK_RL, MASK_AMOAND_D | MASK_AQRL, match_opcode, 0 }, 384{"amoor.d.rl", "64A", "d,t,0(s)", MATCH_AMOOR_D | MASK_RL, MASK_AMOOR_D | MASK_AQRL, match_opcode, 0 }, 385{"amoxor.d.rl", "64A", "d,t,0(s)", MATCH_AMOXOR_D | MASK_RL, MASK_AMOXOR_D | MASK_AQRL, match_opcode, 0 }, 386{"amomax.d.rl", "64A", "d,t,0(s)", MATCH_AMOMAX_D | MASK_RL, MASK_AMOMAX_D | MASK_AQRL, match_opcode, 0 }, 387{"amomaxu.d.rl", "64A", "d,t,0(s)", MATCH_AMOMAXU_D | MASK_RL, MASK_AMOMAXU_D | MASK_AQRL, match_opcode, 0 }, 388{"amomin.d.rl", "64A", "d,t,0(s)", MATCH_AMOMIN_D | MASK_RL, MASK_AMOMIN_D | MASK_AQRL, match_opcode, 0 }, 389{"amominu.d.rl", "64A", "d,t,0(s)", MATCH_AMOMINU_D | MASK_RL, MASK_AMOMINU_D | MASK_AQRL, match_opcode, 0 }, 390{"lr.d.aqrl", "64A", "d,0(s)", MATCH_LR_D | MASK_AQRL, MASK_LR_D | MASK_AQRL, match_opcode, 0 }, 391{"sc.d.aqrl", "64A", "d,t,0(s)", MATCH_SC_D | MASK_AQRL, MASK_SC_D | MASK_AQRL, match_opcode, 0 }, 392{"amoadd.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOADD_D | MASK_AQRL, MASK_AMOADD_D | MASK_AQRL, match_opcode, 0 }, 393{"amoswap.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOSWAP_D | MASK_AQRL, MASK_AMOSWAP_D | MASK_AQRL, match_opcode, 0 }, 394{"amoand.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOAND_D | MASK_AQRL, MASK_AMOAND_D | MASK_AQRL, match_opcode, 0 }, 395{"amoor.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOOR_D | MASK_AQRL, MASK_AMOOR_D | MASK_AQRL, match_opcode, 0 }, 396{"amoxor.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOXOR_D | MASK_AQRL, MASK_AMOXOR_D | MASK_AQRL, match_opcode, 0 }, 397{"amomax.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOMAX_D | MASK_AQRL, MASK_AMOMAX_D | MASK_AQRL, match_opcode, 0 }, 398{"amomaxu.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOMAXU_D | MASK_AQRL, MASK_AMOMAXU_D | MASK_AQRL, match_opcode, 0 }, 399{"amomin.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOMIN_D | MASK_AQRL, MASK_AMOMIN_D | MASK_AQRL, match_opcode, 0 }, 400{"amominu.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOMINU_D | MASK_AQRL, MASK_AMOMINU_D | MASK_AQRL, match_opcode, 0 }, 401 402/* Multiply/Divide instruction subset */ 403{"mul", "M", "d,s,t", MATCH_MUL, MASK_MUL, match_opcode, 0 }, 404{"mulh", "M", "d,s,t", MATCH_MULH, MASK_MULH, match_opcode, 0 }, 405{"mulhu", "M", "d,s,t", MATCH_MULHU, MASK_MULHU, match_opcode, 0 }, 406{"mulhsu", "M", "d,s,t", MATCH_MULHSU, MASK_MULHSU, match_opcode, 0 }, 407{"div", "M", "d,s,t", MATCH_DIV, MASK_DIV, match_opcode, 0 }, 408{"divu", "M", "d,s,t", MATCH_DIVU, MASK_DIVU, match_opcode, 0 }, 409{"rem", "M", "d,s,t", MATCH_REM, MASK_REM, match_opcode, 0 }, 410{"remu", "M", "d,s,t", MATCH_REMU, MASK_REMU, match_opcode, 0 }, 411{"mulw", "64M", "d,s,t", MATCH_MULW, MASK_MULW, match_opcode, 0 }, 412{"divw", "64M", "d,s,t", MATCH_DIVW, MASK_DIVW, match_opcode, 0 }, 413{"divuw", "64M", "d,s,t", MATCH_DIVUW, MASK_DIVUW, match_opcode, 0 }, 414{"remw", "64M", "d,s,t", MATCH_REMW, MASK_REMW, match_opcode, 0 }, 415{"remuw", "64M", "d,s,t", MATCH_REMUW, MASK_REMUW, match_opcode, 0 }, 416 417/* Single-precision floating-point instruction subset */ 418{"frsr", "F", "d", MATCH_FRCSR, MASK_FRCSR, match_opcode, 0 }, 419{"fssr", "F", "s", MATCH_FSCSR, MASK_FSCSR | MASK_RD, match_opcode, 0 }, 420{"fssr", "F", "d,s", MATCH_FSCSR, MASK_FSCSR, match_opcode, 0 }, 421{"frcsr", "F", "d", MATCH_FRCSR, MASK_FRCSR, match_opcode, 0 }, 422{"fscsr", "F", "s", MATCH_FSCSR, MASK_FSCSR | MASK_RD, match_opcode, 0 }, 423{"fscsr", "F", "d,s", MATCH_FSCSR, MASK_FSCSR, match_opcode, 0 }, 424{"frrm", "F", "d", MATCH_FRRM, MASK_FRRM, match_opcode, 0 }, 425{"fsrm", "F", "s", MATCH_FSRM, MASK_FSRM | MASK_RD, match_opcode, 0 }, 426{"fsrm", "F", "d,s", MATCH_FSRM, MASK_FSRM, match_opcode, 0 }, 427{"frflags", "F", "d", MATCH_FRFLAGS, MASK_FRFLAGS, match_opcode, 0 }, 428{"fsflags", "F", "s", MATCH_FSFLAGS, MASK_FSFLAGS | MASK_RD, match_opcode, 0 }, 429{"fsflags", "F", "d,s", MATCH_FSFLAGS, MASK_FSFLAGS, match_opcode, 0 }, 430{"flw", "32C", "D,Cm(Cc)", MATCH_C_FLWSP, MASK_C_FLWSP, match_opcode, INSN_ALIAS }, 431{"flw", "32C", "CD,Ck(Cs)", MATCH_C_FLW, MASK_C_FLW, match_opcode, INSN_ALIAS }, 432{"flw", "F", "D,o(s)", MATCH_FLW, MASK_FLW, match_opcode, 0 }, 433{"flw", "F", "D,A,s", 0, (int) M_FLW, match_never, INSN_MACRO }, 434{"fsw", "32C", "CT,CM(Cc)", MATCH_C_FSWSP, MASK_C_FSWSP, match_opcode, INSN_ALIAS }, 435{"fsw", "32C", "CD,Ck(Cs)", MATCH_C_FSW, MASK_C_FSW, match_opcode, INSN_ALIAS }, 436{"fsw", "F", "T,q(s)", MATCH_FSW, MASK_FSW, match_opcode, 0 }, 437{"fsw", "F", "T,A,s", 0, (int) M_FSW, match_never, INSN_MACRO }, 438{"fmv.x.s", "F", "d,S", MATCH_FMV_X_S, MASK_FMV_X_S, match_opcode, 0 }, 439{"fmv.s.x", "F", "D,s", MATCH_FMV_S_X, MASK_FMV_S_X, match_opcode, 0 }, 440{"fmv.s", "F", "D,U", MATCH_FSGNJ_S, MASK_FSGNJ_S, match_rs1_eq_rs2, INSN_ALIAS }, 441{"fneg.s", "F", "D,U", MATCH_FSGNJN_S, MASK_FSGNJN_S, match_rs1_eq_rs2, INSN_ALIAS }, 442{"fabs.s", "F", "D,U", MATCH_FSGNJX_S, MASK_FSGNJX_S, match_rs1_eq_rs2, INSN_ALIAS }, 443{"fsgnj.s", "F", "D,S,T", MATCH_FSGNJ_S, MASK_FSGNJ_S, match_opcode, 0 }, 444{"fsgnjn.s", "F", "D,S,T", MATCH_FSGNJN_S, MASK_FSGNJN_S, match_opcode, 0 }, 445{"fsgnjx.s", "F", "D,S,T", MATCH_FSGNJX_S, MASK_FSGNJX_S, match_opcode, 0 }, 446{"fadd.s", "F", "D,S,T", MATCH_FADD_S | MASK_RM, MASK_FADD_S | MASK_RM, match_opcode, 0 }, 447{"fadd.s", "F", "D,S,T,m", MATCH_FADD_S, MASK_FADD_S, match_opcode, 0 }, 448{"fsub.s", "F", "D,S,T", MATCH_FSUB_S | MASK_RM, MASK_FSUB_S | MASK_RM, match_opcode, 0 }, 449{"fsub.s", "F", "D,S,T,m", MATCH_FSUB_S, MASK_FSUB_S, match_opcode, 0 }, 450{"fmul.s", "F", "D,S,T", MATCH_FMUL_S | MASK_RM, MASK_FMUL_S | MASK_RM, match_opcode, 0 }, 451{"fmul.s", "F", "D,S,T,m", MATCH_FMUL_S, MASK_FMUL_S, match_opcode, 0 }, 452{"fdiv.s", "F", "D,S,T", MATCH_FDIV_S | MASK_RM, MASK_FDIV_S | MASK_RM, match_opcode, 0 }, 453{"fdiv.s", "F", "D,S,T,m", MATCH_FDIV_S, MASK_FDIV_S, match_opcode, 0 }, 454{"fsqrt.s", "F", "D,S", MATCH_FSQRT_S | MASK_RM, MASK_FSQRT_S | MASK_RM, match_opcode, 0 }, 455{"fsqrt.s", "F", "D,S,m", MATCH_FSQRT_S, MASK_FSQRT_S, match_opcode, 0 }, 456{"fmin.s", "F", "D,S,T", MATCH_FMIN_S, MASK_FMIN_S, match_opcode, 0 }, 457{"fmax.s", "F", "D,S,T", MATCH_FMAX_S, MASK_FMAX_S, match_opcode, 0 }, 458{"fmadd.s", "F", "D,S,T,R", MATCH_FMADD_S | MASK_RM, MASK_FMADD_S | MASK_RM, match_opcode, 0 }, 459{"fmadd.s", "F", "D,S,T,R,m", MATCH_FMADD_S, MASK_FMADD_S, match_opcode, 0 }, 460{"fnmadd.s", "F", "D,S,T,R", MATCH_FNMADD_S | MASK_RM, MASK_FNMADD_S | MASK_RM, match_opcode, 0 }, 461{"fnmadd.s", "F", "D,S,T,R,m", MATCH_FNMADD_S, MASK_FNMADD_S, match_opcode, 0 }, 462{"fmsub.s", "F", "D,S,T,R", MATCH_FMSUB_S | MASK_RM, MASK_FMSUB_S | MASK_RM, match_opcode, 0 }, 463{"fmsub.s", "F", "D,S,T,R,m", MATCH_FMSUB_S, MASK_FMSUB_S, match_opcode, 0 }, 464{"fnmsub.s", "F", "D,S,T,R", MATCH_FNMSUB_S | MASK_RM, MASK_FNMSUB_S | MASK_RM, match_opcode, 0 }, 465{"fnmsub.s", "F", "D,S,T,R,m", MATCH_FNMSUB_S, MASK_FNMSUB_S, match_opcode, 0 }, 466{"fcvt.w.s", "F", "d,S", MATCH_FCVT_W_S | MASK_RM, MASK_FCVT_W_S | MASK_RM, match_opcode, 0 }, 467{"fcvt.w.s", "F", "d,S,m", MATCH_FCVT_W_S, MASK_FCVT_W_S, match_opcode, 0 }, 468{"fcvt.wu.s", "F", "d,S", MATCH_FCVT_WU_S | MASK_RM, MASK_FCVT_WU_S | MASK_RM, match_opcode, 0 }, 469{"fcvt.wu.s", "F", "d,S,m", MATCH_FCVT_WU_S, MASK_FCVT_WU_S, match_opcode, 0 }, 470{"fcvt.s.w", "F", "D,s", MATCH_FCVT_S_W | MASK_RM, MASK_FCVT_S_W | MASK_RM, match_opcode, 0 }, 471{"fcvt.s.w", "F", "D,s,m", MATCH_FCVT_S_W, MASK_FCVT_S_W, match_opcode, 0 }, 472{"fcvt.s.wu", "F", "D,s", MATCH_FCVT_S_WU | MASK_RM, MASK_FCVT_S_W | MASK_RM, match_opcode, 0 }, 473{"fcvt.s.wu", "F", "D,s,m", MATCH_FCVT_S_WU, MASK_FCVT_S_WU, match_opcode, 0 }, 474{"fclass.s", "F", "d,S", MATCH_FCLASS_S, MASK_FCLASS_S, match_opcode, 0 }, 475{"feq.s", "F", "d,S,T", MATCH_FEQ_S, MASK_FEQ_S, match_opcode, 0 }, 476{"flt.s", "F", "d,S,T", MATCH_FLT_S, MASK_FLT_S, match_opcode, 0 }, 477{"fle.s", "F", "d,S,T", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 }, 478{"fgt.s", "F", "d,T,S", MATCH_FLT_S, MASK_FLT_S, match_opcode, 0 }, 479{"fge.s", "F", "d,T,S", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 }, 480{"fcvt.l.s", "64F", "d,S", MATCH_FCVT_L_S | MASK_RM, MASK_FCVT_L_S | MASK_RM, match_opcode, 0 }, 481{"fcvt.l.s", "64F", "d,S,m", MATCH_FCVT_L_S, MASK_FCVT_L_S, match_opcode, 0 }, 482{"fcvt.lu.s", "64F", "d,S", MATCH_FCVT_LU_S | MASK_RM, MASK_FCVT_LU_S | MASK_RM, match_opcode, 0 }, 483{"fcvt.lu.s", "64F", "d,S,m", MATCH_FCVT_LU_S, MASK_FCVT_LU_S, match_opcode, 0 }, 484{"fcvt.s.l", "64F", "D,s", MATCH_FCVT_S_L | MASK_RM, MASK_FCVT_S_L | MASK_RM, match_opcode, 0 }, 485{"fcvt.s.l", "64F", "D,s,m", MATCH_FCVT_S_L, MASK_FCVT_S_L, match_opcode, 0 }, 486{"fcvt.s.lu", "64F", "D,s", MATCH_FCVT_S_LU | MASK_RM, MASK_FCVT_S_L | MASK_RM, match_opcode, 0 }, 487{"fcvt.s.lu", "64F", "D,s,m", MATCH_FCVT_S_LU, MASK_FCVT_S_LU, match_opcode, 0 }, 488 489/* Double-precision floating-point instruction subset */ 490{"fld", "C", "D,Cn(Cc)", MATCH_C_FLDSP, MASK_C_FLDSP, match_opcode, INSN_ALIAS }, 491{"fld", "C", "CD,Cl(Cs)", MATCH_C_FLD, MASK_C_FLD, match_opcode, INSN_ALIAS }, 492{"fld", "D", "D,o(s)", MATCH_FLD, MASK_FLD, match_opcode, 0 }, 493{"fld", "D", "D,A,s", 0, (int) M_FLD, match_never, INSN_MACRO }, 494{"fsd", "C", "CT,CN(Cc)", MATCH_C_FSDSP, MASK_C_FSDSP, match_opcode, INSN_ALIAS }, 495{"fsd", "C", "CD,Cl(Cs)", MATCH_C_FSD, MASK_C_FSD, match_opcode, INSN_ALIAS }, 496{"fsd", "D", "T,q(s)", MATCH_FSD, MASK_FSD, match_opcode, 0 }, 497{"fsd", "D", "T,A,s", 0, (int) M_FSD, match_never, INSN_MACRO }, 498{"fmv.d", "D", "D,U", MATCH_FSGNJ_D, MASK_FSGNJ_D, match_rs1_eq_rs2, INSN_ALIAS }, 499{"fneg.d", "D", "D,U", MATCH_FSGNJN_D, MASK_FSGNJN_D, match_rs1_eq_rs2, INSN_ALIAS }, 500{"fabs.d", "D", "D,U", MATCH_FSGNJX_D, MASK_FSGNJX_D, match_rs1_eq_rs2, INSN_ALIAS }, 501{"fsgnj.d", "D", "D,S,T", MATCH_FSGNJ_D, MASK_FSGNJ_D, match_opcode, 0 }, 502{"fsgnjn.d", "D", "D,S,T", MATCH_FSGNJN_D, MASK_FSGNJN_D, match_opcode, 0 }, 503{"fsgnjx.d", "D", "D,S,T", MATCH_FSGNJX_D, MASK_FSGNJX_D, match_opcode, 0 }, 504{"fadd.d", "D", "D,S,T", MATCH_FADD_D | MASK_RM, MASK_FADD_D | MASK_RM, match_opcode, 0 }, 505{"fadd.d", "D", "D,S,T,m", MATCH_FADD_D, MASK_FADD_D, match_opcode, 0 }, 506{"fsub.d", "D", "D,S,T", MATCH_FSUB_D | MASK_RM, MASK_FSUB_D | MASK_RM, match_opcode, 0 }, 507{"fsub.d", "D", "D,S,T,m", MATCH_FSUB_D, MASK_FSUB_D, match_opcode, 0 }, 508{"fmul.d", "D", "D,S,T", MATCH_FMUL_D | MASK_RM, MASK_FMUL_D | MASK_RM, match_opcode, 0 }, 509{"fmul.d", "D", "D,S,T,m", MATCH_FMUL_D, MASK_FMUL_D, match_opcode, 0 }, 510{"fdiv.d", "D", "D,S,T", MATCH_FDIV_D | MASK_RM, MASK_FDIV_D | MASK_RM, match_opcode, 0 }, 511{"fdiv.d", "D", "D,S,T,m", MATCH_FDIV_D, MASK_FDIV_D, match_opcode, 0 }, 512{"fsqrt.d", "D", "D,S", MATCH_FSQRT_D | MASK_RM, MASK_FSQRT_D | MASK_RM, match_opcode, 0 }, 513{"fsqrt.d", "D", "D,S,m", MATCH_FSQRT_D, MASK_FSQRT_D, match_opcode, 0 }, 514{"fmin.d", "D", "D,S,T", MATCH_FMIN_D, MASK_FMIN_D, match_opcode, 0 }, 515{"fmax.d", "D", "D,S,T", MATCH_FMAX_D, MASK_FMAX_D, match_opcode, 0 }, 516{"fmadd.d", "D", "D,S,T,R", MATCH_FMADD_D | MASK_RM, MASK_FMADD_D | MASK_RM, match_opcode, 0 }, 517{"fmadd.d", "D", "D,S,T,R,m", MATCH_FMADD_D, MASK_FMADD_D, match_opcode, 0 }, 518{"fnmadd.d", "D", "D,S,T,R", MATCH_FNMADD_D | MASK_RM, MASK_FNMADD_D | MASK_RM, match_opcode, 0 }, 519{"fnmadd.d", "D", "D,S,T,R,m", MATCH_FNMADD_D, MASK_FNMADD_D, match_opcode, 0 }, 520{"fmsub.d", "D", "D,S,T,R", MATCH_FMSUB_D | MASK_RM, MASK_FMSUB_D | MASK_RM, match_opcode, 0 }, 521{"fmsub.d", "D", "D,S,T,R,m", MATCH_FMSUB_D, MASK_FMSUB_D, match_opcode, 0 }, 522{"fnmsub.d", "D", "D,S,T,R", MATCH_FNMSUB_D | MASK_RM, MASK_FNMSUB_D | MASK_RM, match_opcode, 0 }, 523{"fnmsub.d", "D", "D,S,T,R,m", MATCH_FNMSUB_D, MASK_FNMSUB_D, match_opcode, 0 }, 524{"fcvt.w.d", "D", "d,S", MATCH_FCVT_W_D | MASK_RM, MASK_FCVT_W_D | MASK_RM, match_opcode, 0 }, 525{"fcvt.w.d", "D", "d,S,m", MATCH_FCVT_W_D, MASK_FCVT_W_D, match_opcode, 0 }, 526{"fcvt.wu.d", "D", "d,S", MATCH_FCVT_WU_D | MASK_RM, MASK_FCVT_WU_D | MASK_RM, match_opcode, 0 }, 527{"fcvt.wu.d", "D", "d,S,m", MATCH_FCVT_WU_D, MASK_FCVT_WU_D, match_opcode, 0 }, 528{"fcvt.d.w", "D", "D,s", MATCH_FCVT_D_W, MASK_FCVT_D_W | MASK_RM, match_opcode, 0 }, 529{"fcvt.d.wu", "D", "D,s", MATCH_FCVT_D_WU, MASK_FCVT_D_WU | MASK_RM, match_opcode, 0 }, 530{"fcvt.d.s", "D", "D,S", MATCH_FCVT_D_S, MASK_FCVT_D_S | MASK_RM, match_opcode, 0 }, 531{"fcvt.s.d", "D", "D,S", MATCH_FCVT_S_D | MASK_RM, MASK_FCVT_S_D | MASK_RM, match_opcode, 0 }, 532{"fcvt.s.d", "D", "D,S,m", MATCH_FCVT_S_D, MASK_FCVT_S_D, match_opcode, 0 }, 533{"fclass.d", "D", "d,S", MATCH_FCLASS_D, MASK_FCLASS_D, match_opcode, 0 }, 534{"feq.d", "D", "d,S,T", MATCH_FEQ_D, MASK_FEQ_D, match_opcode, 0 }, 535{"flt.d", "D", "d,S,T", MATCH_FLT_D, MASK_FLT_D, match_opcode, 0 }, 536{"fle.d", "D", "d,S,T", MATCH_FLE_D, MASK_FLE_D, match_opcode, 0 }, 537{"fgt.d", "D", "d,T,S", MATCH_FLT_D, MASK_FLT_D, match_opcode, 0 }, 538{"fge.d", "D", "d,T,S", MATCH_FLE_D, MASK_FLE_D, match_opcode, 0 }, 539{"fmv.x.d", "64D", "d,S", MATCH_FMV_X_D, MASK_FMV_X_D, match_opcode, 0 }, 540{"fmv.d.x", "64D", "D,s", MATCH_FMV_D_X, MASK_FMV_D_X, match_opcode, 0 }, 541{"fcvt.l.d", "64D", "d,S", MATCH_FCVT_L_D | MASK_RM, MASK_FCVT_L_D | MASK_RM, match_opcode, 0 }, 542{"fcvt.l.d", "64D", "d,S,m", MATCH_FCVT_L_D, MASK_FCVT_L_D, match_opcode, 0 }, 543{"fcvt.lu.d", "64D", "d,S", MATCH_FCVT_LU_D | MASK_RM, MASK_FCVT_LU_D | MASK_RM, match_opcode, 0 }, 544{"fcvt.lu.d", "64D", "d,S,m", MATCH_FCVT_LU_D, MASK_FCVT_LU_D, match_opcode, 0 }, 545{"fcvt.d.l", "64D", "D,s", MATCH_FCVT_D_L | MASK_RM, MASK_FCVT_D_L | MASK_RM, match_opcode, 0 }, 546{"fcvt.d.l", "64D", "D,s,m", MATCH_FCVT_D_L, MASK_FCVT_D_L, match_opcode, 0 }, 547{"fcvt.d.lu", "64D", "D,s", MATCH_FCVT_D_LU | MASK_RM, MASK_FCVT_D_L | MASK_RM, match_opcode, 0 }, 548{"fcvt.d.lu", "64D", "D,s,m", MATCH_FCVT_D_LU, MASK_FCVT_D_LU, match_opcode, 0 }, 549 550/* Compressed instructions. */ 551{"c.ebreak", "C", "", MATCH_C_EBREAK, MASK_C_EBREAK, match_opcode, 0 }, 552{"c.jr", "C", "d", MATCH_C_JR, MASK_C_JR, match_rd_nonzero, 0 }, 553{"c.jalr", "C", "d", MATCH_C_JALR, MASK_C_JALR, match_rd_nonzero, 0 }, 554{"c.j", "C", "Ca", MATCH_C_J, MASK_C_J, match_opcode, 0 }, 555{"c.jal", "32C", "Ca", MATCH_C_JAL, MASK_C_JAL, match_opcode, 0 }, 556{"c.beqz", "C", "Cs,Cp", MATCH_C_BEQZ, MASK_C_BEQZ, match_opcode, 0 }, 557{"c.bnez", "C", "Cs,Cp", MATCH_C_BNEZ, MASK_C_BNEZ, match_opcode, 0 }, 558{"c.lwsp", "C", "d,Cm(Cc)", MATCH_C_LWSP, MASK_C_LWSP, match_rd_nonzero, 0 }, 559{"c.lw", "C", "Ct,Ck(Cs)", MATCH_C_LW, MASK_C_LW, match_opcode, 0 }, 560{"c.swsp", "C", "CV,CM(Cc)", MATCH_C_SWSP, MASK_C_SWSP, match_opcode, 0 }, 561{"c.sw", "C", "Ct,Ck(Cs)", MATCH_C_SW, MASK_C_SW, match_opcode, 0 }, 562{"c.nop", "C", "", MATCH_C_ADDI, 0xffff, match_opcode, 0 }, 563{"c.mv", "C", "d,CV", MATCH_C_MV, MASK_C_MV, match_c_add, 0 }, 564{"c.lui", "C", "d,Cu", MATCH_C_LUI, MASK_C_LUI, match_c_lui, 0 }, 565{"c.li", "C", "d,Co", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, 0 }, 566{"c.addi4spn","C", "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_opcode, 0 }, 567{"c.addi16sp","C", "Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_opcode, 0 }, 568{"c.addi", "C", "d,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_opcode, 0 }, 569{"c.add", "C", "d,CV", MATCH_C_ADD, MASK_C_ADD, match_c_add, 0 }, 570{"c.sub", "C", "Cs,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, 0 }, 571{"c.and", "C", "Cs,Ct", MATCH_C_AND, MASK_C_AND, match_opcode, 0 }, 572{"c.or", "C", "Cs,Ct", MATCH_C_OR, MASK_C_OR, match_opcode, 0 }, 573{"c.xor", "C", "Cs,Ct", MATCH_C_XOR, MASK_C_XOR, match_opcode, 0 }, 574{"c.slli", "C", "d,C>", MATCH_C_SLLI, MASK_C_SLLI, match_rd_nonzero, 0 }, 575{"c.srli", "C", "Cs,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, 0 }, 576{"c.srai", "C", "Cs,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, 0 }, 577{"c.andi", "C", "Cs,Co", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, 0 }, 578{"c.addiw", "64C", "d,Co", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, 0 }, 579{"c.addw", "64C", "Cs,Ct", MATCH_C_ADDW, MASK_C_ADDW, match_opcode, 0 }, 580{"c.subw", "64C", "Cs,Ct", MATCH_C_SUBW, MASK_C_SUBW, match_opcode, 0 }, 581{"c.ldsp", "64C", "d,Cn(Cc)", MATCH_C_LDSP, MASK_C_LDSP, match_rd_nonzero, 0 }, 582{"c.ld", "64C", "Ct,Cl(Cs)", MATCH_C_LD, MASK_C_LD, match_opcode, 0 }, 583{"c.sdsp", "64C", "CV,CN(Cc)", MATCH_C_SDSP, MASK_C_SDSP, match_opcode, 0 }, 584{"c.sd", "64C", "Ct,Cl(Cs)", MATCH_C_SD, MASK_C_SD, match_opcode, 0 }, 585{"c.fldsp", "C", "D,Cn(Cc)", MATCH_C_FLDSP, MASK_C_FLDSP, match_opcode, 0 }, 586{"c.fld", "C", "CD,Cl(Cs)", MATCH_C_FLD, MASK_C_FLD, match_opcode, 0 }, 587{"c.fsdsp", "C", "CT,CN(Cc)", MATCH_C_FSDSP, MASK_C_FSDSP, match_opcode, 0 }, 588{"c.fsd", "C", "CD,Cl(Cs)", MATCH_C_FSD, MASK_C_FSD, match_opcode, 0 }, 589{"c.flwsp", "32C", "D,Cm(Cc)", MATCH_C_FLWSP, MASK_C_FLWSP, match_opcode, 0 }, 590{"c.flw", "32C", "CD,Ck(Cs)", MATCH_C_FLW, MASK_C_FLW, match_opcode, 0 }, 591{"c.fswsp", "32C", "CT,CM(Cc)", MATCH_C_FSWSP, MASK_C_FSWSP, match_opcode, 0 }, 592{"c.fsw", "32C", "CD,Ck(Cs)", MATCH_C_FSW, MASK_C_FSW, match_opcode, 0 }, 593 594/* Supervisor instructions */ 595{"csrr", "I", "d,E", MATCH_CSRRS, MASK_CSRRS | MASK_RS1, match_opcode, INSN_ALIAS }, 596{"csrwi", "I", "E,Z", MATCH_CSRRWI, MASK_CSRRWI | MASK_RD, match_opcode, INSN_ALIAS }, 597{"csrsi", "I", "E,Z", MATCH_CSRRSI, MASK_CSRRSI | MASK_RD, match_opcode, INSN_ALIAS }, 598{"csrci", "I", "E,Z", MATCH_CSRRCI, MASK_CSRRCI | MASK_RD, match_opcode, INSN_ALIAS }, 599{"csrw", "I", "E,s", MATCH_CSRRW, MASK_CSRRW | MASK_RD, match_opcode, INSN_ALIAS }, 600{"csrw", "I", "E,Z", MATCH_CSRRWI, MASK_CSRRWI | MASK_RD, match_opcode, INSN_ALIAS }, 601{"csrs", "I", "E,s", MATCH_CSRRS, MASK_CSRRS | MASK_RD, match_opcode, INSN_ALIAS }, 602{"csrs", "I", "E,Z", MATCH_CSRRSI, MASK_CSRRSI | MASK_RD, match_opcode, INSN_ALIAS }, 603{"csrc", "I", "E,s", MATCH_CSRRC, MASK_CSRRC | MASK_RD, match_opcode, INSN_ALIAS }, 604{"csrc", "I", "E,Z", MATCH_CSRRCI, MASK_CSRRCI | MASK_RD, match_opcode, INSN_ALIAS }, 605{"csrrwi", "I", "d,E,Z", MATCH_CSRRWI, MASK_CSRRWI, match_opcode, 0 }, 606{"csrrsi", "I", "d,E,Z", MATCH_CSRRSI, MASK_CSRRSI, match_opcode, 0 }, 607{"csrrci", "I", "d,E,Z", MATCH_CSRRCI, MASK_CSRRCI, match_opcode, 0 }, 608{"csrrw", "I", "d,E,s", MATCH_CSRRW, MASK_CSRRW, match_opcode, 0 }, 609{"csrrw", "I", "d,E,Z", MATCH_CSRRWI, MASK_CSRRWI, match_opcode, INSN_ALIAS }, 610{"csrrs", "I", "d,E,s", MATCH_CSRRS, MASK_CSRRS, match_opcode, 0 }, 611{"csrrs", "I", "d,E,Z", MATCH_CSRRSI, MASK_CSRRSI, match_opcode, INSN_ALIAS }, 612{"csrrc", "I", "d,E,s", MATCH_CSRRC, MASK_CSRRC, match_opcode, 0 }, 613{"csrrc", "I", "d,E,Z", MATCH_CSRRCI, MASK_CSRRCI, match_opcode, INSN_ALIAS }, 614{"uret", "I", "", MATCH_URET, MASK_URET, match_opcode, 0 }, 615{"sret", "I", "", MATCH_SRET, MASK_SRET, match_opcode, 0 }, 616{"hret", "I", "", MATCH_HRET, MASK_HRET, match_opcode, 0 }, 617{"mret", "I", "", MATCH_MRET, MASK_MRET, match_opcode, 0 }, 618{"dret", "I", "", MATCH_DRET, MASK_DRET, match_opcode, 0 }, 619{"sfence.vm", "I", "", MATCH_SFENCE_VM, MASK_SFENCE_VM | MASK_RS1, match_opcode, 0 }, 620{"sfence.vm", "I", "s", MATCH_SFENCE_VM, MASK_SFENCE_VM, match_opcode, 0 }, 621{"sfence.vma","I", "", MATCH_SFENCE_VMA, MASK_SFENCE_VMA | MASK_RS1 | MASK_RS2, match_opcode, INSN_ALIAS }, 622{"sfence.vma","I", "s", MATCH_SFENCE_VMA, MASK_SFENCE_VMA | MASK_RS2, match_opcode, INSN_ALIAS }, 623{"sfence.vma","I", "s,t", MATCH_SFENCE_VMA, MASK_SFENCE_VMA, match_opcode, 0 }, 624{"wfi", "I", "", MATCH_WFI, MASK_WFI, match_opcode, 0 }, 625 626/* Terminate the list. */ 627{0, 0, 0, 0, 0, 0, 0} 628}; 629