12017-04-03  Palmer Dabbelt  <palmer@dabbelt.com>
2
3	* elf/riscv.h (RISCV_GP_SYMBOL): New define.
4
52017-03-27  Andrew Waterman  <andrew@sifive.com>
6
7	* opcode/riscv-opc.h (CSR_PMPCFG0): New define.
8	(CSR_PMPCFG1): Likewise.
9	(CSR_PMPCFG2): Likewise.
10	(CSR_PMPCFG3): Likewise.
11	(CSR_PMPADDR0): Likewise.
12	(CSR_PMPADDR1): Likewise.
13	(CSR_PMPADDR2): Likewise.
14	(CSR_PMPADDR3): Likewise.
15	(CSR_PMPADDR4): Likewise.
16	(CSR_PMPADDR5): Likewise.
17	(CSR_PMPADDR6): Likewise.
18	(CSR_PMPADDR7): Likewise.
19	(CSR_PMPADDR8): Likewise.
20	(CSR_PMPADDR9): Likewise.
21	(CSR_PMPADDR10): Likewise.
22	(CSR_PMPADDR11): Likewise.
23	(CSR_PMPADDR12): Likewise.
24	(CSR_PMPADDR13): Likewise.
25	(CSR_PMPADDR14): Likewise.
26	(CSR_PMPADDR15): Likewise.
27	(pmpcfg0): Declare register.
28	(pmpcfg1): Likewise.
29	(pmpcfg2): Likewise.
30	(pmpcfg3): Likewise.
31	(pmpaddr0): Likewise.
32	(pmpaddr1): Likewise.
33	(pmpaddr2): Likewise.
34	(pmpaddr3): Likewise.
35	(pmpaddr4): Likewise.
36	(pmpaddr5): Likewise.
37	(pmpaddr6): Likewise.
38	(pmpaddr7): Likewise.
39	(pmpaddr8): Likewise.
40	(pmpaddr9): Likewise.
41	(pmpaddr10): Likewise.
42	(pmpaddr11): Likewise.
43	(pmpaddr12): Likewise.
44	(pmpaddr13): Likewise.
45	(pmpaddr14): Likewise.
46	(pmpaddr15): Likewise.
47
482017-03-21  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
49
50	Backport from mainline
51	2017-03-21  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
52
53	* opcode/s390.h (S390_INSTR_FLAG_VX2): Remove.
54	(S390_INSTR_FLAG_FACILITY_MASK): Adjust value.
55
562017-02-28  Alan Modra  <amodra@gmail.com>
57
58	* elf/ppc64.h (R_PPC64_16DX_HA): New.  Expand fake reloc comment.
59	* elf/ppc.h (R_PPC_16DX_HA): Likewise.
60
612017-02-22  Andrew Waterman  <andrew@sifive.com>
62
63	* opcode/riscv-opc.h (CSR_SCOUNTEREN): New define.
64	(CSR_MCOUNTEREN): Likewise.
65	(scounteren): Declare register.
66	(mcounteren): Likewise.
67
682017-02-14  Andrew Waterman  <andrew@sifive.com>
69
70	* opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.
71	(MASK_SFENCE_VMA): Likewise.
72	(sfence_vma): Declare instruction.
73
742017-02-27  Richard Sandiford  <richard.sandiford@arm.com>
75
76	* opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4x16)
77	(AARCH64_OPND_SVE_IMM_ROT1, AARCH64_OPND_SVE_IMM_ROT2)
78	(AARCH64_OPND_SVE_Zm3_INDEX, AARCH64_OPND_SVE_Zm3_22_INDEX)
79	(AARCH64_OPND_SVE_Zm4_INDEX): New aarch64_opnds.
80
812017-02-27  Richard Sandiford  <richard.sandiford@arm.com>
82
83	* opcode/aarch64.h (AARCH64_FEATURE_COMPNUM): New macro.
84	(AARCH64_ARCH_V8_3): Include AARCH64_FEATURE_COMPNUM.
85
862017-02-27  Szabolcs Nagy  <szabolcs.nagy@arm.com>
87
88	* opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
89	(AARCH64_ARCH_V8_3): Update.
90
912017-01-02  Alan Modra  <amodra@gmail.com>
92
93	Update year range in copyright notice of all files.
94
95For older changes see ChangeLog-2016
96
97Copyright (C) 2017 Free Software Foundation, Inc.
98
99Copying and distribution of this file, with or without modification,
100are permitted in any medium without royalty provided the copyright
101notice and this notice are preserved.
102
103Local Variables:
104mode: change-log
105left-margin: 8
106fill-column: 74
107version-control: never
108End:
109