1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) 2 Copyright (C) 1994-2017 Free Software Foundation, Inc. 3 Written by Ian Lance Taylor, Cygnus Support. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22#include "as.h" 23#include "safe-ctype.h" 24#include "subsegs.h" 25#include "dw2gencfi.h" 26#include "opcode/ppc.h" 27 28#ifdef OBJ_ELF 29#include "elf/ppc.h" 30#include "elf/ppc64.h" 31#include "dwarf2dbg.h" 32#endif 33 34#ifdef TE_PE 35#include "coff/pe.h" 36#endif 37 38#ifdef OBJ_XCOFF 39#include "coff/xcoff.h" 40#include "libxcoff.h" 41#endif 42 43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ 44 45/* Tell the main code what the endianness is. */ 46extern int target_big_endian; 47 48/* Whether or not, we've set target_big_endian. */ 49static int set_target_endian = 0; 50 51/* Whether to use user friendly register names. */ 52#ifndef TARGET_REG_NAMES_P 53#ifdef TE_PE 54#define TARGET_REG_NAMES_P TRUE 55#else 56#define TARGET_REG_NAMES_P FALSE 57#endif 58#endif 59 60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, 61 HIGHESTA. */ 62 63/* #lo(value) denotes the least significant 16 bits of the indicated. */ 64#define PPC_LO(v) ((v) & 0xffff) 65 66/* #hi(value) denotes bits 16 through 31 of the indicated value. */ 67#define PPC_HI(v) (((v) >> 16) & 0xffff) 68 69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of 70 the indicated value, compensating for #lo() being treated as a 71 signed number. */ 72#define PPC_HA(v) PPC_HI ((v) + 0x8000) 73 74/* #higher(value) denotes bits 32 through 47 of the indicated value. */ 75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) 76 77/* #highera(value) denotes bits 32 through 47 of the indicated value, 78 compensating for #lo() being treated as a signed number. */ 79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) 80 81/* #highest(value) denotes bits 48 through 63 of the indicated value. */ 82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) 83 84/* #highesta(value) denotes bits 48 through 63 of the indicated value, 85 compensating for #lo being treated as a signed number. */ 86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) 87 88#define SEX16(val) (((val) ^ 0x8000) - 0x8000) 89 90/* For the time being on ppc64, don't report overflow on @h and @ha 91 applied to constants. */ 92#define REPORT_OVERFLOW_HI 0 93 94static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; 95 96static void ppc_macro (char *, const struct powerpc_macro *); 97static void ppc_byte (int); 98 99#if defined (OBJ_XCOFF) || defined (OBJ_ELF) 100static void ppc_tc (int); 101static void ppc_machine (int); 102#endif 103 104#ifdef OBJ_XCOFF 105static void ppc_comm (int); 106static void ppc_bb (int); 107static void ppc_bc (int); 108static void ppc_bf (int); 109static void ppc_biei (int); 110static void ppc_bs (int); 111static void ppc_eb (int); 112static void ppc_ec (int); 113static void ppc_ef (int); 114static void ppc_es (int); 115static void ppc_csect (int); 116static void ppc_dwsect (int); 117static void ppc_change_csect (symbolS *, offsetT); 118static void ppc_function (int); 119static void ppc_extern (int); 120static void ppc_lglobl (int); 121static void ppc_ref (int); 122static void ppc_section (int); 123static void ppc_named_section (int); 124static void ppc_stabx (int); 125static void ppc_rename (int); 126static void ppc_toc (int); 127static void ppc_xcoff_cons (int); 128static void ppc_vbyte (int); 129#endif 130 131#ifdef OBJ_ELF 132static void ppc_elf_rdata (int); 133static void ppc_elf_lcomm (int); 134static void ppc_elf_localentry (int); 135static void ppc_elf_abiversion (int); 136static void ppc_elf_gnu_attribute (int); 137#endif 138 139#ifdef TE_PE 140static void ppc_previous (int); 141static void ppc_pdata (int); 142static void ppc_ydata (int); 143static void ppc_reldata (int); 144static void ppc_rdata (int); 145static void ppc_ualong (int); 146static void ppc_znop (int); 147static void ppc_pe_comm (int); 148static void ppc_pe_section (int); 149static void ppc_pe_function (int); 150static void ppc_pe_tocd (int); 151#endif 152 153/* Generic assembler global variables which must be defined by all 154 targets. */ 155 156#ifdef OBJ_ELF 157/* This string holds the chars that always start a comment. If the 158 pre-processor is disabled, these aren't very useful. The macro 159 tc_comment_chars points to this. We use this, rather than the 160 usual comment_chars, so that we can switch for Solaris conventions. */ 161static const char ppc_solaris_comment_chars[] = "#!"; 162static const char ppc_eabi_comment_chars[] = "#"; 163 164#ifdef TARGET_SOLARIS_COMMENT 165const char *ppc_comment_chars = ppc_solaris_comment_chars; 166#else 167const char *ppc_comment_chars = ppc_eabi_comment_chars; 168#endif 169#else 170const char comment_chars[] = "#"; 171#endif 172 173/* Characters which start a comment at the beginning of a line. */ 174const char line_comment_chars[] = "#"; 175 176/* Characters which may be used to separate multiple commands on a 177 single line. */ 178const char line_separator_chars[] = ";"; 179 180/* Characters which are used to indicate an exponent in a floating 181 point number. */ 182const char EXP_CHARS[] = "eE"; 183 184/* Characters which mean that a number is a floating point constant, 185 as in 0d1.0. */ 186const char FLT_CHARS[] = "dD"; 187 188/* Anything that can start an operand needs to be mentioned here, 189 to stop the input scrubber eating whitespace. */ 190const char ppc_symbol_chars[] = "%["; 191 192/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ 193int ppc_cie_data_alignment; 194 195/* The dwarf2 minimum instruction length. */ 196int ppc_dwarf2_line_min_insn_length; 197 198/* More than this number of nops in an alignment op gets a branch 199 instead. */ 200unsigned long nop_limit = 4; 201 202/* The type of processor we are assembling for. This is one or more 203 of the PPC_OPCODE flags defined in opcode/ppc.h. */ 204ppc_cpu_t ppc_cpu = 0; 205ppc_cpu_t sticky = 0; 206 207/* Value for ELF e_flags EF_PPC64_ABI. */ 208unsigned int ppc_abiversion = 0; 209 210#ifdef OBJ_ELF 211/* Flags set on encountering toc relocs. */ 212static enum { 213 has_large_toc_reloc = 1, 214 has_small_toc_reloc = 2 215} toc_reloc_types; 216#endif 217 218/* Warn on emitting data to code sections. */ 219int warn_476; 220unsigned long last_insn; 221segT last_seg; 222subsegT last_subseg; 223 224/* The target specific pseudo-ops which we support. */ 225 226const pseudo_typeS md_pseudo_table[] = 227{ 228 /* Pseudo-ops which must be overridden. */ 229 { "byte", ppc_byte, 0 }, 230 231#ifdef OBJ_XCOFF 232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these 233 legitimately belong in the obj-*.c file. However, XCOFF is based 234 on COFF, and is only implemented for the RS/6000. We just use 235 obj-coff.c, and add what we need here. */ 236 { "comm", ppc_comm, 0 }, 237 { "lcomm", ppc_comm, 1 }, 238 { "bb", ppc_bb, 0 }, 239 { "bc", ppc_bc, 0 }, 240 { "bf", ppc_bf, 0 }, 241 { "bi", ppc_biei, 0 }, 242 { "bs", ppc_bs, 0 }, 243 { "csect", ppc_csect, 0 }, 244 { "dwsect", ppc_dwsect, 0 }, 245 { "data", ppc_section, 'd' }, 246 { "eb", ppc_eb, 0 }, 247 { "ec", ppc_ec, 0 }, 248 { "ef", ppc_ef, 0 }, 249 { "ei", ppc_biei, 1 }, 250 { "es", ppc_es, 0 }, 251 { "extern", ppc_extern, 0 }, 252 { "function", ppc_function, 0 }, 253 { "lglobl", ppc_lglobl, 0 }, 254 { "ref", ppc_ref, 0 }, 255 { "rename", ppc_rename, 0 }, 256 { "section", ppc_named_section, 0 }, 257 { "stabx", ppc_stabx, 0 }, 258 { "text", ppc_section, 't' }, 259 { "toc", ppc_toc, 0 }, 260 { "long", ppc_xcoff_cons, 2 }, 261 { "llong", ppc_xcoff_cons, 3 }, 262 { "word", ppc_xcoff_cons, 1 }, 263 { "short", ppc_xcoff_cons, 1 }, 264 { "vbyte", ppc_vbyte, 0 }, 265#endif 266 267#ifdef OBJ_ELF 268 { "llong", cons, 8 }, 269 { "rdata", ppc_elf_rdata, 0 }, 270 { "rodata", ppc_elf_rdata, 0 }, 271 { "lcomm", ppc_elf_lcomm, 0 }, 272 { "localentry", ppc_elf_localentry, 0 }, 273 { "abiversion", ppc_elf_abiversion, 0 }, 274 { "gnu_attribute", ppc_elf_gnu_attribute, 0}, 275#endif 276 277#ifdef TE_PE 278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ 279 { "previous", ppc_previous, 0 }, 280 { "pdata", ppc_pdata, 0 }, 281 { "ydata", ppc_ydata, 0 }, 282 { "reldata", ppc_reldata, 0 }, 283 { "rdata", ppc_rdata, 0 }, 284 { "ualong", ppc_ualong, 0 }, 285 { "znop", ppc_znop, 0 }, 286 { "comm", ppc_pe_comm, 0 }, 287 { "lcomm", ppc_pe_comm, 1 }, 288 { "section", ppc_pe_section, 0 }, 289 { "function", ppc_pe_function,0 }, 290 { "tocd", ppc_pe_tocd, 0 }, 291#endif 292 293#if defined (OBJ_XCOFF) || defined (OBJ_ELF) 294 { "tc", ppc_tc, 0 }, 295 { "machine", ppc_machine, 0 }, 296#endif 297 298 { NULL, NULL, 0 } 299}; 300 301 302/* Predefined register names if -mregnames (or default for Windows NT). 303 In general, there are lots of them, in an attempt to be compatible 304 with a number of other Windows NT assemblers. */ 305 306/* Structure to hold information about predefined registers. */ 307struct pd_reg 308 { 309 const char *name; 310 int value; 311 }; 312 313/* List of registers that are pre-defined: 314 315 Each general register has predefined names of the form: 316 1. r<reg_num> which has the value <reg_num>. 317 2. r.<reg_num> which has the value <reg_num>. 318 319 Each floating point register has predefined names of the form: 320 1. f<reg_num> which has the value <reg_num>. 321 2. f.<reg_num> which has the value <reg_num>. 322 323 Each vector unit register has predefined names of the form: 324 1. v<reg_num> which has the value <reg_num>. 325 2. v.<reg_num> which has the value <reg_num>. 326 327 Each condition register has predefined names of the form: 328 1. cr<reg_num> which has the value <reg_num>. 329 2. cr.<reg_num> which has the value <reg_num>. 330 331 There are individual registers as well: 332 sp or r.sp has the value 1 333 rtoc or r.toc has the value 2 334 fpscr has the value 0 335 xer has the value 1 336 lr has the value 8 337 ctr has the value 9 338 pmr has the value 0 339 dar has the value 19 340 dsisr has the value 18 341 dec has the value 22 342 sdr1 has the value 25 343 srr0 has the value 26 344 srr1 has the value 27 345 346 The table is sorted. Suitable for searching by a binary search. */ 347 348static const struct pd_reg pre_defined_registers[] = 349{ 350 { "cr.0", 0 }, /* Condition Registers */ 351 { "cr.1", 1 }, 352 { "cr.2", 2 }, 353 { "cr.3", 3 }, 354 { "cr.4", 4 }, 355 { "cr.5", 5 }, 356 { "cr.6", 6 }, 357 { "cr.7", 7 }, 358 359 { "cr0", 0 }, 360 { "cr1", 1 }, 361 { "cr2", 2 }, 362 { "cr3", 3 }, 363 { "cr4", 4 }, 364 { "cr5", 5 }, 365 { "cr6", 6 }, 366 { "cr7", 7 }, 367 368 { "ctr", 9 }, 369 370 { "dar", 19 }, /* Data Access Register */ 371 { "dec", 22 }, /* Decrementer */ 372 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ 373 374 { "f.0", 0 }, /* Floating point registers */ 375 { "f.1", 1 }, 376 { "f.10", 10 }, 377 { "f.11", 11 }, 378 { "f.12", 12 }, 379 { "f.13", 13 }, 380 { "f.14", 14 }, 381 { "f.15", 15 }, 382 { "f.16", 16 }, 383 { "f.17", 17 }, 384 { "f.18", 18 }, 385 { "f.19", 19 }, 386 { "f.2", 2 }, 387 { "f.20", 20 }, 388 { "f.21", 21 }, 389 { "f.22", 22 }, 390 { "f.23", 23 }, 391 { "f.24", 24 }, 392 { "f.25", 25 }, 393 { "f.26", 26 }, 394 { "f.27", 27 }, 395 { "f.28", 28 }, 396 { "f.29", 29 }, 397 { "f.3", 3 }, 398 { "f.30", 30 }, 399 { "f.31", 31 }, 400 401 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ 402 { "f.33", 33 }, 403 { "f.34", 34 }, 404 { "f.35", 35 }, 405 { "f.36", 36 }, 406 { "f.37", 37 }, 407 { "f.38", 38 }, 408 { "f.39", 39 }, 409 { "f.4", 4 }, 410 { "f.40", 40 }, 411 { "f.41", 41 }, 412 { "f.42", 42 }, 413 { "f.43", 43 }, 414 { "f.44", 44 }, 415 { "f.45", 45 }, 416 { "f.46", 46 }, 417 { "f.47", 47 }, 418 { "f.48", 48 }, 419 { "f.49", 49 }, 420 { "f.5", 5 }, 421 { "f.50", 50 }, 422 { "f.51", 51 }, 423 { "f.52", 52 }, 424 { "f.53", 53 }, 425 { "f.54", 54 }, 426 { "f.55", 55 }, 427 { "f.56", 56 }, 428 { "f.57", 57 }, 429 { "f.58", 58 }, 430 { "f.59", 59 }, 431 { "f.6", 6 }, 432 { "f.60", 60 }, 433 { "f.61", 61 }, 434 { "f.62", 62 }, 435 { "f.63", 63 }, 436 { "f.7", 7 }, 437 { "f.8", 8 }, 438 { "f.9", 9 }, 439 440 { "f0", 0 }, 441 { "f1", 1 }, 442 { "f10", 10 }, 443 { "f11", 11 }, 444 { "f12", 12 }, 445 { "f13", 13 }, 446 { "f14", 14 }, 447 { "f15", 15 }, 448 { "f16", 16 }, 449 { "f17", 17 }, 450 { "f18", 18 }, 451 { "f19", 19 }, 452 { "f2", 2 }, 453 { "f20", 20 }, 454 { "f21", 21 }, 455 { "f22", 22 }, 456 { "f23", 23 }, 457 { "f24", 24 }, 458 { "f25", 25 }, 459 { "f26", 26 }, 460 { "f27", 27 }, 461 { "f28", 28 }, 462 { "f29", 29 }, 463 { "f3", 3 }, 464 { "f30", 30 }, 465 { "f31", 31 }, 466 467 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ 468 { "f33", 33 }, 469 { "f34", 34 }, 470 { "f35", 35 }, 471 { "f36", 36 }, 472 { "f37", 37 }, 473 { "f38", 38 }, 474 { "f39", 39 }, 475 { "f4", 4 }, 476 { "f40", 40 }, 477 { "f41", 41 }, 478 { "f42", 42 }, 479 { "f43", 43 }, 480 { "f44", 44 }, 481 { "f45", 45 }, 482 { "f46", 46 }, 483 { "f47", 47 }, 484 { "f48", 48 }, 485 { "f49", 49 }, 486 { "f5", 5 }, 487 { "f50", 50 }, 488 { "f51", 51 }, 489 { "f52", 52 }, 490 { "f53", 53 }, 491 { "f54", 54 }, 492 { "f55", 55 }, 493 { "f56", 56 }, 494 { "f57", 57 }, 495 { "f58", 58 }, 496 { "f59", 59 }, 497 { "f6", 6 }, 498 { "f60", 60 }, 499 { "f61", 61 }, 500 { "f62", 62 }, 501 { "f63", 63 }, 502 { "f7", 7 }, 503 { "f8", 8 }, 504 { "f9", 9 }, 505 506 { "fpscr", 0 }, 507 508 /* Quantization registers used with pair single instructions. */ 509 { "gqr.0", 0 }, 510 { "gqr.1", 1 }, 511 { "gqr.2", 2 }, 512 { "gqr.3", 3 }, 513 { "gqr.4", 4 }, 514 { "gqr.5", 5 }, 515 { "gqr.6", 6 }, 516 { "gqr.7", 7 }, 517 { "gqr0", 0 }, 518 { "gqr1", 1 }, 519 { "gqr2", 2 }, 520 { "gqr3", 3 }, 521 { "gqr4", 4 }, 522 { "gqr5", 5 }, 523 { "gqr6", 6 }, 524 { "gqr7", 7 }, 525 526 { "lr", 8 }, /* Link Register */ 527 528 { "pmr", 0 }, 529 530 { "r.0", 0 }, /* General Purpose Registers */ 531 { "r.1", 1 }, 532 { "r.10", 10 }, 533 { "r.11", 11 }, 534 { "r.12", 12 }, 535 { "r.13", 13 }, 536 { "r.14", 14 }, 537 { "r.15", 15 }, 538 { "r.16", 16 }, 539 { "r.17", 17 }, 540 { "r.18", 18 }, 541 { "r.19", 19 }, 542 { "r.2", 2 }, 543 { "r.20", 20 }, 544 { "r.21", 21 }, 545 { "r.22", 22 }, 546 { "r.23", 23 }, 547 { "r.24", 24 }, 548 { "r.25", 25 }, 549 { "r.26", 26 }, 550 { "r.27", 27 }, 551 { "r.28", 28 }, 552 { "r.29", 29 }, 553 { "r.3", 3 }, 554 { "r.30", 30 }, 555 { "r.31", 31 }, 556 { "r.4", 4 }, 557 { "r.5", 5 }, 558 { "r.6", 6 }, 559 { "r.7", 7 }, 560 { "r.8", 8 }, 561 { "r.9", 9 }, 562 563 { "r.sp", 1 }, /* Stack Pointer */ 564 565 { "r.toc", 2 }, /* Pointer to the table of contents */ 566 567 { "r0", 0 }, /* More general purpose registers */ 568 { "r1", 1 }, 569 { "r10", 10 }, 570 { "r11", 11 }, 571 { "r12", 12 }, 572 { "r13", 13 }, 573 { "r14", 14 }, 574 { "r15", 15 }, 575 { "r16", 16 }, 576 { "r17", 17 }, 577 { "r18", 18 }, 578 { "r19", 19 }, 579 { "r2", 2 }, 580 { "r20", 20 }, 581 { "r21", 21 }, 582 { "r22", 22 }, 583 { "r23", 23 }, 584 { "r24", 24 }, 585 { "r25", 25 }, 586 { "r26", 26 }, 587 { "r27", 27 }, 588 { "r28", 28 }, 589 { "r29", 29 }, 590 { "r3", 3 }, 591 { "r30", 30 }, 592 { "r31", 31 }, 593 { "r4", 4 }, 594 { "r5", 5 }, 595 { "r6", 6 }, 596 { "r7", 7 }, 597 { "r8", 8 }, 598 { "r9", 9 }, 599 600 { "rtoc", 2 }, /* Table of contents */ 601 602 { "sdr1", 25 }, /* Storage Description Register 1 */ 603 604 { "sp", 1 }, 605 606 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ 607 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ 608 609 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */ 610 { "v.1", 1 }, 611 { "v.10", 10 }, 612 { "v.11", 11 }, 613 { "v.12", 12 }, 614 { "v.13", 13 }, 615 { "v.14", 14 }, 616 { "v.15", 15 }, 617 { "v.16", 16 }, 618 { "v.17", 17 }, 619 { "v.18", 18 }, 620 { "v.19", 19 }, 621 { "v.2", 2 }, 622 { "v.20", 20 }, 623 { "v.21", 21 }, 624 { "v.22", 22 }, 625 { "v.23", 23 }, 626 { "v.24", 24 }, 627 { "v.25", 25 }, 628 { "v.26", 26 }, 629 { "v.27", 27 }, 630 { "v.28", 28 }, 631 { "v.29", 29 }, 632 { "v.3", 3 }, 633 { "v.30", 30 }, 634 { "v.31", 31 }, 635 { "v.4", 4 }, 636 { "v.5", 5 }, 637 { "v.6", 6 }, 638 { "v.7", 7 }, 639 { "v.8", 8 }, 640 { "v.9", 9 }, 641 642 { "v0", 0 }, 643 { "v1", 1 }, 644 { "v10", 10 }, 645 { "v11", 11 }, 646 { "v12", 12 }, 647 { "v13", 13 }, 648 { "v14", 14 }, 649 { "v15", 15 }, 650 { "v16", 16 }, 651 { "v17", 17 }, 652 { "v18", 18 }, 653 { "v19", 19 }, 654 { "v2", 2 }, 655 { "v20", 20 }, 656 { "v21", 21 }, 657 { "v22", 22 }, 658 { "v23", 23 }, 659 { "v24", 24 }, 660 { "v25", 25 }, 661 { "v26", 26 }, 662 { "v27", 27 }, 663 { "v28", 28 }, 664 { "v29", 29 }, 665 { "v3", 3 }, 666 { "v30", 30 }, 667 { "v31", 31 }, 668 { "v4", 4 }, 669 { "v5", 5 }, 670 { "v6", 6 }, 671 { "v7", 7 }, 672 { "v8", 8 }, 673 { "v9", 9 }, 674 675 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */ 676 { "vs.1", 1 }, 677 { "vs.10", 10 }, 678 { "vs.11", 11 }, 679 { "vs.12", 12 }, 680 { "vs.13", 13 }, 681 { "vs.14", 14 }, 682 { "vs.15", 15 }, 683 { "vs.16", 16 }, 684 { "vs.17", 17 }, 685 { "vs.18", 18 }, 686 { "vs.19", 19 }, 687 { "vs.2", 2 }, 688 { "vs.20", 20 }, 689 { "vs.21", 21 }, 690 { "vs.22", 22 }, 691 { "vs.23", 23 }, 692 { "vs.24", 24 }, 693 { "vs.25", 25 }, 694 { "vs.26", 26 }, 695 { "vs.27", 27 }, 696 { "vs.28", 28 }, 697 { "vs.29", 29 }, 698 { "vs.3", 3 }, 699 { "vs.30", 30 }, 700 { "vs.31", 31 }, 701 { "vs.32", 32 }, 702 { "vs.33", 33 }, 703 { "vs.34", 34 }, 704 { "vs.35", 35 }, 705 { "vs.36", 36 }, 706 { "vs.37", 37 }, 707 { "vs.38", 38 }, 708 { "vs.39", 39 }, 709 { "vs.4", 4 }, 710 { "vs.40", 40 }, 711 { "vs.41", 41 }, 712 { "vs.42", 42 }, 713 { "vs.43", 43 }, 714 { "vs.44", 44 }, 715 { "vs.45", 45 }, 716 { "vs.46", 46 }, 717 { "vs.47", 47 }, 718 { "vs.48", 48 }, 719 { "vs.49", 49 }, 720 { "vs.5", 5 }, 721 { "vs.50", 50 }, 722 { "vs.51", 51 }, 723 { "vs.52", 52 }, 724 { "vs.53", 53 }, 725 { "vs.54", 54 }, 726 { "vs.55", 55 }, 727 { "vs.56", 56 }, 728 { "vs.57", 57 }, 729 { "vs.58", 58 }, 730 { "vs.59", 59 }, 731 { "vs.6", 6 }, 732 { "vs.60", 60 }, 733 { "vs.61", 61 }, 734 { "vs.62", 62 }, 735 { "vs.63", 63 }, 736 { "vs.7", 7 }, 737 { "vs.8", 8 }, 738 { "vs.9", 9 }, 739 740 { "vs0", 0 }, 741 { "vs1", 1 }, 742 { "vs10", 10 }, 743 { "vs11", 11 }, 744 { "vs12", 12 }, 745 { "vs13", 13 }, 746 { "vs14", 14 }, 747 { "vs15", 15 }, 748 { "vs16", 16 }, 749 { "vs17", 17 }, 750 { "vs18", 18 }, 751 { "vs19", 19 }, 752 { "vs2", 2 }, 753 { "vs20", 20 }, 754 { "vs21", 21 }, 755 { "vs22", 22 }, 756 { "vs23", 23 }, 757 { "vs24", 24 }, 758 { "vs25", 25 }, 759 { "vs26", 26 }, 760 { "vs27", 27 }, 761 { "vs28", 28 }, 762 { "vs29", 29 }, 763 { "vs3", 3 }, 764 { "vs30", 30 }, 765 { "vs31", 31 }, 766 { "vs32", 32 }, 767 { "vs33", 33 }, 768 { "vs34", 34 }, 769 { "vs35", 35 }, 770 { "vs36", 36 }, 771 { "vs37", 37 }, 772 { "vs38", 38 }, 773 { "vs39", 39 }, 774 { "vs4", 4 }, 775 { "vs40", 40 }, 776 { "vs41", 41 }, 777 { "vs42", 42 }, 778 { "vs43", 43 }, 779 { "vs44", 44 }, 780 { "vs45", 45 }, 781 { "vs46", 46 }, 782 { "vs47", 47 }, 783 { "vs48", 48 }, 784 { "vs49", 49 }, 785 { "vs5", 5 }, 786 { "vs50", 50 }, 787 { "vs51", 51 }, 788 { "vs52", 52 }, 789 { "vs53", 53 }, 790 { "vs54", 54 }, 791 { "vs55", 55 }, 792 { "vs56", 56 }, 793 { "vs57", 57 }, 794 { "vs58", 58 }, 795 { "vs59", 59 }, 796 { "vs6", 6 }, 797 { "vs60", 60 }, 798 { "vs61", 61 }, 799 { "vs62", 62 }, 800 { "vs63", 63 }, 801 { "vs7", 7 }, 802 { "vs8", 8 }, 803 { "vs9", 9 }, 804 805 { "xer", 1 }, 806 807}; 808 809#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) 810 811/* Given NAME, find the register number associated with that name, return 812 the integer value associated with the given name or -1 on failure. */ 813 814static int 815reg_name_search (const struct pd_reg *regs, int regcount, const char *name) 816{ 817 int middle, low, high; 818 int cmp; 819 820 low = 0; 821 high = regcount - 1; 822 823 do 824 { 825 middle = (low + high) / 2; 826 cmp = strcasecmp (name, regs[middle].name); 827 if (cmp < 0) 828 high = middle - 1; 829 else if (cmp > 0) 830 low = middle + 1; 831 else 832 return regs[middle].value; 833 } 834 while (low <= high); 835 836 return -1; 837} 838 839/* 840 * Summary of register_name. 841 * 842 * in: Input_line_pointer points to 1st char of operand. 843 * 844 * out: A expressionS. 845 * The operand may have been a register: in this case, X_op == O_register, 846 * X_add_number is set to the register number, and truth is returned. 847 * Input_line_pointer->(next non-blank) char after operand, or is in its 848 * original state. 849 */ 850 851static bfd_boolean 852register_name (expressionS *expressionP) 853{ 854 int reg_number; 855 char *name; 856 char *start; 857 char c; 858 859 /* Find the spelling of the operand. */ 860 start = name = input_line_pointer; 861 if (name[0] == '%' && ISALPHA (name[1])) 862 name = ++input_line_pointer; 863 864 else if (!reg_names_p || !ISALPHA (name[0])) 865 return FALSE; 866 867 c = get_symbol_name (&name); 868 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); 869 870 /* Put back the delimiting char. */ 871 *input_line_pointer = c; 872 873 /* Look to see if it's in the register table. */ 874 if (reg_number >= 0) 875 { 876 expressionP->X_op = O_register; 877 expressionP->X_add_number = reg_number; 878 879 /* Make the rest nice. */ 880 expressionP->X_add_symbol = NULL; 881 expressionP->X_op_symbol = NULL; 882 return TRUE; 883 } 884 885 /* Reset the line as if we had not done anything. */ 886 input_line_pointer = start; 887 return FALSE; 888} 889 890/* This function is called for each symbol seen in an expression. It 891 handles the special parsing which PowerPC assemblers are supposed 892 to use for condition codes. */ 893 894/* Whether to do the special parsing. */ 895static bfd_boolean cr_operand; 896 897/* Names to recognize in a condition code. This table is sorted. */ 898static const struct pd_reg cr_names[] = 899{ 900 { "cr0", 0 }, 901 { "cr1", 1 }, 902 { "cr2", 2 }, 903 { "cr3", 3 }, 904 { "cr4", 4 }, 905 { "cr5", 5 }, 906 { "cr6", 6 }, 907 { "cr7", 7 }, 908 { "eq", 2 }, 909 { "gt", 1 }, 910 { "lt", 0 }, 911 { "so", 3 }, 912 { "un", 3 } 913}; 914 915/* Parsing function. This returns non-zero if it recognized an 916 expression. */ 917 918int 919ppc_parse_name (const char *name, expressionS *exp) 920{ 921 int val; 922 923 if (! cr_operand) 924 return 0; 925 926 if (*name == '%') 927 ++name; 928 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], 929 name); 930 if (val < 0) 931 return 0; 932 933 exp->X_op = O_constant; 934 exp->X_add_number = val; 935 936 return 1; 937} 938 939/* Local variables. */ 940 941/* Whether to target xcoff64/elf64. */ 942static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; 943 944/* Opcode hash table. */ 945static struct hash_control *ppc_hash; 946 947/* Macro hash table. */ 948static struct hash_control *ppc_macro_hash; 949 950#ifdef OBJ_ELF 951/* What type of shared library support to use. */ 952static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; 953 954/* Flags to set in the elf header. */ 955static flagword ppc_flags = 0; 956 957/* Whether this is Solaris or not. */ 958#ifdef TARGET_SOLARIS_COMMENT 959#define SOLARIS_P TRUE 960#else 961#define SOLARIS_P FALSE 962#endif 963 964static bfd_boolean msolaris = SOLARIS_P; 965#endif 966 967#ifdef OBJ_XCOFF 968 969/* The RS/6000 assembler uses the .csect pseudo-op to generate code 970 using a bunch of different sections. These assembler sections, 971 however, are all encompassed within the .text or .data sections of 972 the final output file. We handle this by using different 973 subsegments within these main segments. */ 974 975/* Next subsegment to allocate within the .text segment. */ 976static subsegT ppc_text_subsegment = 2; 977 978/* Linked list of csects in the text section. */ 979static symbolS *ppc_text_csects; 980 981/* Next subsegment to allocate within the .data segment. */ 982static subsegT ppc_data_subsegment = 2; 983 984/* Linked list of csects in the data section. */ 985static symbolS *ppc_data_csects; 986 987/* The current csect. */ 988static symbolS *ppc_current_csect; 989 990/* The RS/6000 assembler uses a TOC which holds addresses of functions 991 and variables. Symbols are put in the TOC with the .tc pseudo-op. 992 A special relocation is used when accessing TOC entries. We handle 993 the TOC as a subsegment within the .data segment. We set it up if 994 we see a .toc pseudo-op, and save the csect symbol here. */ 995static symbolS *ppc_toc_csect; 996 997/* The first frag in the TOC subsegment. */ 998static fragS *ppc_toc_frag; 999 1000/* The first frag in the first subsegment after the TOC in the .data 1001 segment. NULL if there are no subsegments after the TOC. */ 1002static fragS *ppc_after_toc_frag; 1003 1004/* The current static block. */ 1005static symbolS *ppc_current_block; 1006 1007/* The COFF debugging section; set by md_begin. This is not the 1008 .debug section, but is instead the secret BFD section which will 1009 cause BFD to set the section number of a symbol to N_DEBUG. */ 1010static asection *ppc_coff_debug_section; 1011 1012/* Structure to set the length field of the dwarf sections. */ 1013struct dw_subsection { 1014 /* Subsections are simply linked. */ 1015 struct dw_subsection *link; 1016 1017 /* The subsection number. */ 1018 subsegT subseg; 1019 1020 /* Expression to compute the length of the section. */ 1021 expressionS end_exp; 1022}; 1023 1024static struct dw_section { 1025 /* Corresponding section. */ 1026 segT sect; 1027 1028 /* Simply linked list of subsections with a label. */ 1029 struct dw_subsection *list_subseg; 1030 1031 /* The anonymous subsection. */ 1032 struct dw_subsection *anon_subseg; 1033} dw_sections[XCOFF_DWSECT_NBR_NAMES]; 1034#endif /* OBJ_XCOFF */ 1035 1036#ifdef TE_PE 1037 1038/* Various sections that we need for PE coff support. */ 1039static segT ydata_section; 1040static segT pdata_section; 1041static segT reldata_section; 1042static segT rdata_section; 1043static segT tocdata_section; 1044 1045/* The current section and the previous section. See ppc_previous. */ 1046static segT ppc_previous_section; 1047static segT ppc_current_section; 1048 1049#endif /* TE_PE */ 1050 1051#ifdef OBJ_ELF 1052symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ 1053unsigned long *ppc_apuinfo_list; 1054unsigned int ppc_apuinfo_num; 1055unsigned int ppc_apuinfo_num_alloc; 1056#endif /* OBJ_ELF */ 1057 1058#ifdef OBJ_ELF 1059const char *const md_shortopts = "b:l:usm:K:VQ:"; 1060#else 1061const char *const md_shortopts = "um:"; 1062#endif 1063#define OPTION_NOPS (OPTION_MD_BASE + 0) 1064const struct option md_longopts[] = { 1065 {"nops", required_argument, NULL, OPTION_NOPS}, 1066 {"ppc476-workaround", no_argument, &warn_476, 1}, 1067 {"no-ppc476-workaround", no_argument, &warn_476, 0}, 1068 {NULL, no_argument, NULL, 0} 1069}; 1070const size_t md_longopts_size = sizeof (md_longopts); 1071 1072int 1073md_parse_option (int c, const char *arg) 1074{ 1075 ppc_cpu_t new_cpu; 1076 1077 switch (c) 1078 { 1079 case 'u': 1080 /* -u means that any undefined symbols should be treated as 1081 external, which is the default for gas anyhow. */ 1082 break; 1083 1084#ifdef OBJ_ELF 1085 case 'l': 1086 /* Solaris as takes -le (presumably for little endian). For completeness 1087 sake, recognize -be also. */ 1088 if (strcmp (arg, "e") == 0) 1089 { 1090 target_big_endian = 0; 1091 set_target_endian = 1; 1092 if (ppc_cpu & PPC_OPCODE_VLE) 1093 as_bad (_("the use of -mvle requires big endian.")); 1094 } 1095 else 1096 return 0; 1097 1098 break; 1099 1100 case 'b': 1101 if (strcmp (arg, "e") == 0) 1102 { 1103 target_big_endian = 1; 1104 set_target_endian = 1; 1105 } 1106 else 1107 return 0; 1108 1109 break; 1110 1111 case 'K': 1112 /* Recognize -K PIC. */ 1113 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) 1114 { 1115 shlib = SHLIB_PIC; 1116 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1117 } 1118 else 1119 return 0; 1120 1121 break; 1122#endif 1123 1124 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ 1125 case 'a': 1126 if (strcmp (arg, "64") == 0) 1127 { 1128#ifdef BFD64 1129 ppc_obj64 = 1; 1130 if (ppc_cpu & PPC_OPCODE_VLE) 1131 as_bad (_("the use of -mvle requires -a32.")); 1132#else 1133 as_fatal (_("%s unsupported"), "-a64"); 1134#endif 1135 } 1136 else if (strcmp (arg, "32") == 0) 1137 ppc_obj64 = 0; 1138 else 1139 return 0; 1140 break; 1141 1142 case 'm': 1143 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg); 1144 if (new_cpu != 0) 1145 { 1146 ppc_cpu = new_cpu; 1147 if (strcmp (arg, "vle") == 0) 1148 { 1149 if (set_target_endian && target_big_endian == 0) 1150 as_bad (_("the use of -mvle requires big endian.")); 1151 if (ppc_obj64) 1152 as_bad (_("the use of -mvle requires -a32.")); 1153 } 1154 } 1155 1156 else if (strcmp (arg, "regnames") == 0) 1157 reg_names_p = TRUE; 1158 1159 else if (strcmp (arg, "no-regnames") == 0) 1160 reg_names_p = FALSE; 1161 1162#ifdef OBJ_ELF 1163 /* -mrelocatable/-mrelocatable-lib -- warn about initializations 1164 that require relocation. */ 1165 else if (strcmp (arg, "relocatable") == 0) 1166 { 1167 shlib = SHLIB_MRELOCATABLE; 1168 ppc_flags |= EF_PPC_RELOCATABLE; 1169 } 1170 1171 else if (strcmp (arg, "relocatable-lib") == 0) 1172 { 1173 shlib = SHLIB_MRELOCATABLE; 1174 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1175 } 1176 1177 /* -memb, set embedded bit. */ 1178 else if (strcmp (arg, "emb") == 0) 1179 ppc_flags |= EF_PPC_EMB; 1180 1181 /* -mlittle/-mbig set the endianness. */ 1182 else if (strcmp (arg, "little") == 0 1183 || strcmp (arg, "little-endian") == 0) 1184 { 1185 target_big_endian = 0; 1186 set_target_endian = 1; 1187 if (ppc_cpu & PPC_OPCODE_VLE) 1188 as_bad (_("the use of -mvle requires big endian.")); 1189 } 1190 1191 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) 1192 { 1193 target_big_endian = 1; 1194 set_target_endian = 1; 1195 } 1196 1197 else if (strcmp (arg, "solaris") == 0) 1198 { 1199 msolaris = TRUE; 1200 ppc_comment_chars = ppc_solaris_comment_chars; 1201 } 1202 1203 else if (strcmp (arg, "no-solaris") == 0) 1204 { 1205 msolaris = FALSE; 1206 ppc_comment_chars = ppc_eabi_comment_chars; 1207 } 1208#endif 1209 else 1210 { 1211 as_bad (_("invalid switch -m%s"), arg); 1212 return 0; 1213 } 1214 break; 1215 1216#ifdef OBJ_ELF 1217 /* -V: SVR4 argument to print version ID. */ 1218 case 'V': 1219 print_version_id (); 1220 break; 1221 1222 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section 1223 should be emitted or not. FIXME: Not implemented. */ 1224 case 'Q': 1225 break; 1226 1227 /* Solaris takes -s to specify that .stabs go in a .stabs section, 1228 rather than .stabs.excl, which is ignored by the linker. 1229 FIXME: Not implemented. */ 1230 case 's': 1231 if (arg) 1232 return 0; 1233 1234 break; 1235#endif 1236 1237 case OPTION_NOPS: 1238 { 1239 char *end; 1240 nop_limit = strtoul (optarg, &end, 0); 1241 if (*end) 1242 as_bad (_("--nops needs a numeric argument")); 1243 } 1244 break; 1245 1246 case 0: 1247 break; 1248 1249 default: 1250 return 0; 1251 } 1252 1253 return 1; 1254} 1255 1256void 1257md_show_usage (FILE *stream) 1258{ 1259 fprintf (stream, _("\ 1260PowerPC options:\n\ 1261-a32 generate ELF32/XCOFF32\n\ 1262-a64 generate ELF64/XCOFF64\n\ 1263-u ignored\n\ 1264-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ 1265-mpwr generate code for POWER (RIOS1)\n\ 1266-m601 generate code for PowerPC 601\n\ 1267-mppc, -mppc32, -m603, -m604\n\ 1268 generate code for PowerPC 603/604\n\ 1269-m403 generate code for PowerPC 403\n\ 1270-m405 generate code for PowerPC 405\n\ 1271-m440 generate code for PowerPC 440\n\ 1272-m464 generate code for PowerPC 464\n\ 1273-m476 generate code for PowerPC 476\n\ 1274-m7400, -m7410, -m7450, -m7455\n\ 1275 generate code for PowerPC 7400/7410/7450/7455\n\ 1276-m750cl generate code for PowerPC 750cl\n\ 1277-m821, -m850, -m860 generate code for PowerPC 821/850/860\n")); 1278 fprintf (stream, _("\ 1279-mppc64, -m620 generate code for PowerPC 620/625/630\n\ 1280-mppc64bridge generate code for PowerPC 64, including bridge insns\n\ 1281-mbooke generate code for 32-bit PowerPC BookE\n\ 1282-ma2 generate code for A2 architecture\n\ 1283-mpower4, -mpwr4 generate code for Power4 architecture\n\ 1284-mpower5, -mpwr5, -mpwr5x\n\ 1285 generate code for Power5 architecture\n\ 1286-mpower6, -mpwr6 generate code for Power6 architecture\n\ 1287-mpower7, -mpwr7 generate code for Power7 architecture\n\ 1288-mpower8, -mpwr8 generate code for Power8 architecture\n\ 1289-mpower9, -mpwr9 generate code for Power9 architecture\n\ 1290-mcell generate code for Cell Broadband Engine architecture\n\ 1291-mcom generate code Power/PowerPC common instructions\n\ 1292-many generate code for any architecture (PWR/PWRX/PPC)\n")); 1293 fprintf (stream, _("\ 1294-maltivec generate code for AltiVec\n\ 1295-mvsx generate code for Vector-Scalar (VSX) instructions\n\ 1296-mhtm generate code for Hardware Transactional Memory\n\ 1297-me300 generate code for PowerPC e300 family\n\ 1298-me500, -me500x2 generate code for Motorola e500 core complex\n\ 1299-me500mc, generate code for Freescale e500mc core complex\n\ 1300-me500mc64, generate code for Freescale e500mc64 core complex\n\ 1301-me5500, generate code for Freescale e5500 core complex\n\ 1302-me6500, generate code for Freescale e6500 core complex\n\ 1303-mspe generate code for Motorola SPE instructions\n\ 1304-mvle generate code for Freescale VLE instructions\n\ 1305-mtitan generate code for AppliedMicro Titan core complex\n\ 1306-mregnames Allow symbolic names for registers\n\ 1307-mno-regnames Do not allow symbolic names for registers\n")); 1308#ifdef OBJ_ELF 1309 fprintf (stream, _("\ 1310-mrelocatable support for GCC's -mrelocatble option\n\ 1311-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ 1312-memb set PPC_EMB bit in ELF flags\n\ 1313-mlittle, -mlittle-endian, -le\n\ 1314 generate code for a little endian machine\n\ 1315-mbig, -mbig-endian, -be\n\ 1316 generate code for a big endian machine\n\ 1317-msolaris generate code for Solaris\n\ 1318-mno-solaris do not generate code for Solaris\n\ 1319-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\ 1320-V print assembler version number\n\ 1321-Qy, -Qn ignored\n")); 1322#endif 1323 fprintf (stream, _("\ 1324-nops=count when aligning, more than COUNT nops uses a branch\n\ 1325-ppc476-workaround warn if emitting data to code sections\n")); 1326} 1327 1328/* Set ppc_cpu if it is not already set. */ 1329 1330static void 1331ppc_set_cpu (void) 1332{ 1333 const char *default_os = TARGET_OS; 1334 const char *default_cpu = TARGET_CPU; 1335 1336 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) 1337 { 1338 if (ppc_obj64) 1339 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; 1340 else if (strncmp (default_os, "aix", 3) == 0 1341 && default_os[3] >= '4' && default_os[3] <= '9') 1342 ppc_cpu |= PPC_OPCODE_COMMON; 1343 else if (strncmp (default_os, "aix3", 4) == 0) 1344 ppc_cpu |= PPC_OPCODE_POWER; 1345 else if (strcmp (default_cpu, "rs6000") == 0) 1346 ppc_cpu |= PPC_OPCODE_POWER; 1347 else if (strncmp (default_cpu, "powerpc", 7) == 0) 1348 ppc_cpu |= PPC_OPCODE_PPC; 1349 else 1350 as_fatal (_("unknown default cpu = %s, os = %s"), 1351 default_cpu, default_os); 1352 } 1353} 1354 1355/* Figure out the BFD architecture to use. This function and ppc_mach 1356 are called well before md_begin, when the output file is opened. */ 1357 1358enum bfd_architecture 1359ppc_arch (void) 1360{ 1361 const char *default_cpu = TARGET_CPU; 1362 ppc_set_cpu (); 1363 1364 if ((ppc_cpu & PPC_OPCODE_PPC) != 0) 1365 return bfd_arch_powerpc; 1366 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 1367 return bfd_arch_powerpc; 1368 if ((ppc_cpu & PPC_OPCODE_POWER) != 0) 1369 return bfd_arch_rs6000; 1370 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) 1371 { 1372 if (strcmp (default_cpu, "rs6000") == 0) 1373 return bfd_arch_rs6000; 1374 else if (strncmp (default_cpu, "powerpc", 7) == 0) 1375 return bfd_arch_powerpc; 1376 } 1377 1378 as_fatal (_("neither Power nor PowerPC opcodes were selected.")); 1379 return bfd_arch_unknown; 1380} 1381 1382unsigned long 1383ppc_mach (void) 1384{ 1385 if (ppc_obj64) 1386 return bfd_mach_ppc64; 1387 else if (ppc_arch () == bfd_arch_rs6000) 1388 return bfd_mach_rs6k; 1389 else if (ppc_cpu & PPC_OPCODE_TITAN) 1390 return bfd_mach_ppc_titan; 1391 else if (ppc_cpu & PPC_OPCODE_VLE) 1392 return bfd_mach_ppc_vle; 1393 else 1394 return bfd_mach_ppc; 1395} 1396 1397extern const char* 1398ppc_target_format (void) 1399{ 1400#ifdef OBJ_COFF 1401#ifdef TE_PE 1402 return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; 1403#elif TE_POWERMAC 1404 return "xcoff-powermac"; 1405#else 1406# ifdef TE_AIX5 1407 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); 1408# else 1409 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); 1410# endif 1411#endif 1412#endif 1413#ifdef OBJ_ELF 1414# ifdef TE_FreeBSD 1415 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); 1416# elif defined (TE_VXWORKS) 1417 return "elf32-powerpc-vxworks"; 1418# else 1419 return (target_big_endian 1420 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") 1421 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); 1422# endif 1423#endif 1424} 1425 1426/* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. 1427 Return TRUE if there's a problem, otherwise FALSE. */ 1428 1429static bfd_boolean 1430insn_validate (const struct powerpc_opcode *op) 1431{ 1432 const unsigned char *o; 1433 unsigned long omask = op->mask; 1434 1435 /* The mask had better not trim off opcode bits. */ 1436 if ((op->opcode & omask) != op->opcode) 1437 { 1438 as_bad (_("mask trims opcode bits for %s"), op->name); 1439 return TRUE; 1440 } 1441 1442 /* The operands must not overlap the opcode or each other. */ 1443 for (o = op->operands; *o; ++o) 1444 { 1445 if (*o >= num_powerpc_operands) 1446 { 1447 as_bad (_("operand index error for %s"), op->name); 1448 return TRUE; 1449 } 1450 else 1451 { 1452 const struct powerpc_operand *operand = &powerpc_operands[*o]; 1453 if (operand->shift != (int) PPC_OPSHIFT_INV) 1454 { 1455 unsigned long mask; 1456 1457 if (operand->shift >= 0) 1458 mask = operand->bitm << operand->shift; 1459 else 1460 mask = operand->bitm >> -operand->shift; 1461 if (omask & mask) 1462 { 1463 as_bad (_("operand %d overlap in %s"), 1464 (int) (o - op->operands), op->name); 1465 return TRUE; 1466 } 1467 omask |= mask; 1468 } 1469 } 1470 } 1471 return FALSE; 1472} 1473 1474/* Insert opcodes and macros into hash tables. Called at startup and 1475 for .machine pseudo. */ 1476 1477static void 1478ppc_setup_opcodes (void) 1479{ 1480 const struct powerpc_opcode *op; 1481 const struct powerpc_opcode *op_end; 1482 const struct powerpc_macro *macro; 1483 const struct powerpc_macro *macro_end; 1484 bfd_boolean bad_insn = FALSE; 1485 1486 if (ppc_hash != NULL) 1487 hash_die (ppc_hash); 1488 if (ppc_macro_hash != NULL) 1489 hash_die (ppc_macro_hash); 1490 1491 /* Insert the opcodes into a hash table. */ 1492 ppc_hash = hash_new (); 1493 1494 if (ENABLE_CHECKING) 1495 { 1496 unsigned int i; 1497 1498 /* An index into powerpc_operands is stored in struct fix 1499 fx_pcrel_adjust which is 8 bits wide. */ 1500 gas_assert (num_powerpc_operands < 256); 1501 1502 /* Check operand masks. Code here and in the disassembler assumes 1503 all the 1's in the mask are contiguous. */ 1504 for (i = 0; i < num_powerpc_operands; ++i) 1505 { 1506 unsigned long mask = powerpc_operands[i].bitm; 1507 unsigned long right_bit; 1508 unsigned int j; 1509 1510 right_bit = mask & -mask; 1511 mask += right_bit; 1512 right_bit = mask & -mask; 1513 if (mask != right_bit) 1514 { 1515 as_bad (_("powerpc_operands[%d].bitm invalid"), i); 1516 bad_insn = TRUE; 1517 } 1518 for (j = i + 1; j < num_powerpc_operands; ++j) 1519 if (memcmp (&powerpc_operands[i], &powerpc_operands[j], 1520 sizeof (powerpc_operands[0])) == 0) 1521 { 1522 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), 1523 j, i); 1524 bad_insn = TRUE; 1525 } 1526 } 1527 } 1528 1529 op_end = powerpc_opcodes + powerpc_num_opcodes; 1530 for (op = powerpc_opcodes; op < op_end; op++) 1531 { 1532 if (ENABLE_CHECKING) 1533 { 1534 if (op != powerpc_opcodes) 1535 { 1536 int old_opcode = PPC_OP (op[-1].opcode); 1537 int new_opcode = PPC_OP (op[0].opcode); 1538 1539#ifdef PRINT_OPCODE_TABLE 1540 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", 1541 op->name, (unsigned int) (op - powerpc_opcodes), 1542 (unsigned int) new_opcode, (unsigned int) op->opcode, 1543 (unsigned int) op->mask, (unsigned long long) op->flags); 1544#endif 1545 1546 /* The major opcodes had better be sorted. Code in the 1547 disassembler assumes the insns are sorted according to 1548 major opcode. */ 1549 if (new_opcode < old_opcode) 1550 { 1551 as_bad (_("major opcode is not sorted for %s"), 1552 op->name); 1553 bad_insn = TRUE; 1554 } 1555 } 1556 if ((op->flags & PPC_OPCODE_VLE) != 0) 1557 { 1558 as_bad (_("%s is enabled by vle flag"), op->name); 1559 bad_insn = TRUE; 1560 } 1561 if (PPC_OP (op->opcode) != 4 1562 && PPC_OP (op->opcode) != 31 1563 && (op->deprecated & PPC_OPCODE_VLE) == 0) 1564 { 1565 as_bad (_("%s not disabled by vle flag"), op->name); 1566 bad_insn = TRUE; 1567 } 1568 bad_insn |= insn_validate (op); 1569 } 1570 1571 if ((ppc_cpu & op->flags) != 0 1572 && !(ppc_cpu & op->deprecated)) 1573 { 1574 const char *retval; 1575 1576 retval = hash_insert (ppc_hash, op->name, (void *) op); 1577 if (retval != NULL) 1578 { 1579 as_bad (_("duplicate instruction %s"), 1580 op->name); 1581 bad_insn = TRUE; 1582 } 1583 } 1584 } 1585 1586 if ((ppc_cpu & PPC_OPCODE_ANY) != 0) 1587 for (op = powerpc_opcodes; op < op_end; op++) 1588 hash_insert (ppc_hash, op->name, (void *) op); 1589 1590 op_end = vle_opcodes + vle_num_opcodes; 1591 for (op = vle_opcodes; op < op_end; op++) 1592 { 1593 if (ENABLE_CHECKING) 1594 { 1595 if (op != vle_opcodes) 1596 { 1597 unsigned old_seg, new_seg; 1598 1599 old_seg = VLE_OP (op[-1].opcode, op[-1].mask); 1600 old_seg = VLE_OP_TO_SEG (old_seg); 1601 new_seg = VLE_OP (op[0].opcode, op[0].mask); 1602 new_seg = VLE_OP_TO_SEG (new_seg); 1603 1604#ifdef PRINT_OPCODE_TABLE 1605 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", 1606 op->name, (unsigned int) (op - powerpc_opcodes), 1607 (unsigned int) new_seg, (unsigned int) op->opcode, 1608 (unsigned int) op->mask, (unsigned long long) op->flags); 1609#endif 1610 /* The major opcodes had better be sorted. Code in the 1611 disassembler assumes the insns are sorted according to 1612 major opcode. */ 1613 if (new_seg < old_seg) 1614 { 1615 as_bad (_("major opcode is not sorted for %s"), 1616 op->name); 1617 bad_insn = TRUE; 1618 } 1619 } 1620 1621 bad_insn |= insn_validate (op); 1622 } 1623 1624 if ((ppc_cpu & op->flags) != 0 1625 && !(ppc_cpu & op->deprecated)) 1626 { 1627 const char *retval; 1628 1629 retval = hash_insert (ppc_hash, op->name, (void *) op); 1630 if (retval != NULL) 1631 { 1632 as_bad (_("duplicate instruction %s"), 1633 op->name); 1634 bad_insn = TRUE; 1635 } 1636 } 1637 } 1638 1639 /* Insert the macros into a hash table. */ 1640 ppc_macro_hash = hash_new (); 1641 1642 macro_end = powerpc_macros + powerpc_num_macros; 1643 for (macro = powerpc_macros; macro < macro_end; macro++) 1644 { 1645 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0) 1646 { 1647 const char *retval; 1648 1649 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); 1650 if (retval != (const char *) NULL) 1651 { 1652 as_bad (_("duplicate macro %s"), macro->name); 1653 bad_insn = TRUE; 1654 } 1655 } 1656 } 1657 1658 if (bad_insn) 1659 abort (); 1660} 1661 1662/* This function is called when the assembler starts up. It is called 1663 after the options have been parsed and the output file has been 1664 opened. */ 1665 1666void 1667md_begin (void) 1668{ 1669 ppc_set_cpu (); 1670 1671 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; 1672 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; 1673 1674#ifdef OBJ_ELF 1675 /* Set the ELF flags if desired. */ 1676 if (ppc_flags && !msolaris) 1677 bfd_set_private_flags (stdoutput, ppc_flags); 1678#endif 1679 1680 ppc_setup_opcodes (); 1681 1682 /* Tell the main code what the endianness is if it is not overridden 1683 by the user. */ 1684 if (!set_target_endian) 1685 { 1686 set_target_endian = 1; 1687 target_big_endian = PPC_BIG_ENDIAN; 1688 } 1689 1690#ifdef OBJ_XCOFF 1691 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); 1692 1693 /* Create dummy symbols to serve as initial csects. This forces the 1694 text csects to precede the data csects. These symbols will not 1695 be output. */ 1696 ppc_text_csects = symbol_make ("dummy\001"); 1697 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; 1698 ppc_data_csects = symbol_make ("dummy\001"); 1699 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; 1700#endif 1701 1702#ifdef TE_PE 1703 1704 ppc_current_section = text_section; 1705 ppc_previous_section = 0; 1706 1707#endif 1708} 1709 1710void 1711ppc_cleanup (void) 1712{ 1713#ifdef OBJ_ELF 1714 if (ppc_apuinfo_list == NULL) 1715 return; 1716 1717 /* Ok, so write the section info out. We have this layout: 1718 1719 byte data what 1720 ---- ---- ---- 1721 0 8 length of "APUinfo\0" 1722 4 (n*4) number of APU's (4 bytes each) 1723 8 2 note type 2 1724 12 "APUinfo\0" name 1725 20 APU#1 first APU's info 1726 24 APU#2 second APU's info 1727 ... ... 1728 */ 1729 { 1730 char *p; 1731 asection *seg = now_seg; 1732 subsegT subseg = now_subseg; 1733 asection *apuinfo_secp = (asection *) NULL; 1734 unsigned int i; 1735 1736 /* Create the .PPC.EMB.apuinfo section. */ 1737 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0); 1738 bfd_set_section_flags (stdoutput, 1739 apuinfo_secp, 1740 SEC_HAS_CONTENTS | SEC_READONLY); 1741 1742 p = frag_more (4); 1743 md_number_to_chars (p, (valueT) 8, 4); 1744 1745 p = frag_more (4); 1746 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); 1747 1748 p = frag_more (4); 1749 md_number_to_chars (p, (valueT) 2, 4); 1750 1751 p = frag_more (8); 1752 strcpy (p, APUINFO_LABEL); 1753 1754 for (i = 0; i < ppc_apuinfo_num; i++) 1755 { 1756 p = frag_more (4); 1757 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); 1758 } 1759 1760 frag_align (2, 0, 0); 1761 1762 /* We probably can't restore the current segment, for there likely 1763 isn't one yet... */ 1764 if (seg && subseg) 1765 subseg_set (seg, subseg); 1766 } 1767#endif 1768} 1769 1770/* Insert an operand value into an instruction. */ 1771 1772static unsigned long 1773ppc_insert_operand (unsigned long insn, 1774 const struct powerpc_operand *operand, 1775 offsetT val, 1776 ppc_cpu_t cpu, 1777 const char *file, 1778 unsigned int line) 1779{ 1780 long min, max, right; 1781 1782 max = operand->bitm; 1783 right = max & -max; 1784 min = 0; 1785 1786 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0) 1787 { 1788 /* Extend the allowed range for addis to [-32768, 65535]. 1789 Similarly for cmpli and some VLE high part insns. For 64-bit 1790 it would be good to disable this for signed fields since the 1791 value is sign extended into the high 32 bits of the register. 1792 If the value is, say, an address, then we might care about 1793 the high bits. However, gcc as of 2014-06 uses unsigned 1794 values when loading the high part of 64-bit constants using 1795 lis. */ 1796 min = ~(max >> 1) & -right; 1797 } 1798 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 1799 { 1800 max = (max >> 1) & -right; 1801 min = ~max & -right; 1802 } 1803 1804 if ((operand->flags & PPC_OPERAND_PLUS1) != 0) 1805 max++; 1806 1807 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) 1808 { 1809 long tmp = min; 1810 min = -max; 1811 max = -tmp; 1812 } 1813 1814 if (min <= max) 1815 { 1816 /* Some people write constants with the sign extension done by 1817 hand but only up to 32 bits. This shouldn't really be valid, 1818 but, to permit this code to assemble on a 64-bit host, we 1819 sign extend the 32-bit value to 64 bits if so doing makes the 1820 value valid. */ 1821 if (val > max 1822 && (offsetT) (val - 0x80000000 - 0x80000000) >= min 1823 && (offsetT) (val - 0x80000000 - 0x80000000) <= max 1824 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) 1825 val = val - 0x80000000 - 0x80000000; 1826 1827 /* Similarly, people write expressions like ~(1<<15), and expect 1828 this to be OK for a 32-bit unsigned value. */ 1829 else if (val < min 1830 && (offsetT) (val + 0x80000000 + 0x80000000) >= min 1831 && (offsetT) (val + 0x80000000 + 0x80000000) <= max 1832 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) 1833 val = val + 0x80000000 + 0x80000000; 1834 1835 else if (val < min 1836 || val > max 1837 || (val & (right - 1)) != 0) 1838 as_bad_value_out_of_range (_("operand"), val, min, max, file, line); 1839 } 1840 1841 if (operand->insert) 1842 { 1843 const char *errmsg; 1844 1845 errmsg = NULL; 1846 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg); 1847 if (errmsg != (const char *) NULL) 1848 as_bad_where (file, line, "%s", errmsg); 1849 } 1850 else if (operand->shift >= 0) 1851 insn |= ((long) val & operand->bitm) << operand->shift; 1852 else 1853 insn |= ((long) val & operand->bitm) >> -operand->shift; 1854 1855 return insn; 1856} 1857 1858 1859#ifdef OBJ_ELF 1860/* Parse @got, etc. and return the desired relocation. */ 1861static bfd_reloc_code_real_type 1862ppc_elf_suffix (char **str_p, expressionS *exp_p) 1863{ 1864 struct map_bfd { 1865 const char *string; 1866 unsigned int length : 8; 1867 unsigned int valid32 : 1; 1868 unsigned int valid64 : 1; 1869 unsigned int reloc; 1870 }; 1871 1872 char ident[20]; 1873 char *str = *str_p; 1874 char *str2; 1875 int ch; 1876 int len; 1877 const struct map_bfd *ptr; 1878 1879#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } 1880#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } 1881#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } 1882 1883 static const struct map_bfd mapping[] = { 1884 MAP ("l", BFD_RELOC_LO16), 1885 MAP ("h", BFD_RELOC_HI16), 1886 MAP ("ha", BFD_RELOC_HI16_S), 1887 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), 1888 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), 1889 MAP ("got", BFD_RELOC_16_GOTOFF), 1890 MAP ("got@l", BFD_RELOC_LO16_GOTOFF), 1891 MAP ("got@h", BFD_RELOC_HI16_GOTOFF), 1892 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), 1893 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), 1894 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), 1895 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), 1896 MAP ("copy", BFD_RELOC_PPC_COPY), 1897 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), 1898 MAP ("sectoff", BFD_RELOC_16_BASEREL), 1899 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), 1900 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), 1901 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), 1902 MAP ("tls", BFD_RELOC_PPC_TLS), 1903 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), 1904 MAP ("dtprel", BFD_RELOC_PPC_DTPREL), 1905 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), 1906 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), 1907 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), 1908 MAP ("tprel", BFD_RELOC_PPC_TPREL), 1909 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), 1910 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), 1911 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), 1912 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), 1913 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), 1914 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), 1915 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), 1916 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), 1917 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), 1918 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), 1919 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), 1920 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), 1921 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), 1922 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), 1923 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), 1924 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), 1925 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), 1926 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), 1927 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), 1928 MAP32 ("fixup", BFD_RELOC_CTOR), 1929 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), 1930 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), 1931 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), 1932 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), 1933 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), 1934 MAP32 ("sdarel", BFD_RELOC_GPREL16), 1935 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), 1936 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), 1937 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), 1938 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), 1939 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), 1940 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), 1941 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), 1942 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), 1943 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), 1944 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), 1945 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), 1946 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), 1947 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), 1948 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), 1949 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), 1950 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), 1951 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), 1952 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), 1953 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), 1954 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), 1955 MAP32 ("xgot", BFD_RELOC_PPC_TOC16), 1956 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH), 1957 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA), 1958 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), 1959 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), 1960 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), 1961 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), 1962 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), 1963 MAP64 ("toc", BFD_RELOC_PPC_TOC16), 1964 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), 1965 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), 1966 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), 1967 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH), 1968 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA), 1969 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), 1970 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), 1971 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), 1972 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), 1973 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL), 1974 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH), 1975 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA), 1976 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), 1977 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), 1978 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), 1979 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), 1980 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE } 1981 }; 1982 1983 if (*str++ != '@') 1984 return BFD_RELOC_NONE; 1985 1986 for (ch = *str, str2 = ident; 1987 (str2 < ident + sizeof (ident) - 1 1988 && (ISALNUM (ch) || ch == '@')); 1989 ch = *++str) 1990 { 1991 *str2++ = TOLOWER (ch); 1992 } 1993 1994 *str2 = '\0'; 1995 len = str2 - ident; 1996 1997 ch = ident[0]; 1998 for (ptr = &mapping[0]; ptr->length > 0; ptr++) 1999 if (ch == ptr->string[0] 2000 && len == ptr->length 2001 && memcmp (ident, ptr->string, ptr->length) == 0 2002 && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) 2003 { 2004 int reloc = ptr->reloc; 2005 2006 if (!ppc_obj64 && exp_p->X_add_number != 0) 2007 { 2008 switch (reloc) 2009 { 2010 case BFD_RELOC_16_GOTOFF: 2011 case BFD_RELOC_LO16_GOTOFF: 2012 case BFD_RELOC_HI16_GOTOFF: 2013 case BFD_RELOC_HI16_S_GOTOFF: 2014 as_warn (_("identifier+constant@got means " 2015 "identifier@got+constant")); 2016 break; 2017 2018 case BFD_RELOC_PPC_GOT_TLSGD16: 2019 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 2020 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 2021 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 2022 case BFD_RELOC_PPC_GOT_TLSLD16: 2023 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 2024 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 2025 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 2026 case BFD_RELOC_PPC_GOT_DTPREL16: 2027 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 2028 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 2029 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 2030 case BFD_RELOC_PPC_GOT_TPREL16: 2031 case BFD_RELOC_PPC_GOT_TPREL16_LO: 2032 case BFD_RELOC_PPC_GOT_TPREL16_HI: 2033 case BFD_RELOC_PPC_GOT_TPREL16_HA: 2034 as_bad (_("symbol+offset not supported for got tls")); 2035 break; 2036 } 2037 } 2038 2039 /* Now check for identifier@suffix+constant. */ 2040 if (*str == '-' || *str == '+') 2041 { 2042 char *orig_line = input_line_pointer; 2043 expressionS new_exp; 2044 2045 input_line_pointer = str; 2046 expression (&new_exp); 2047 if (new_exp.X_op == O_constant) 2048 { 2049 exp_p->X_add_number += new_exp.X_add_number; 2050 str = input_line_pointer; 2051 } 2052 2053 if (&input_line_pointer != str_p) 2054 input_line_pointer = orig_line; 2055 } 2056 *str_p = str; 2057 2058 if (reloc == (int) BFD_RELOC_PPC64_TOC 2059 && exp_p->X_op == O_symbol 2060 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) 2061 { 2062 /* Change the symbol so that the dummy .TOC. symbol can be 2063 omitted from the object file. */ 2064 exp_p->X_add_symbol = &abs_symbol; 2065 } 2066 2067 return (bfd_reloc_code_real_type) reloc; 2068 } 2069 2070 return BFD_RELOC_NONE; 2071} 2072 2073/* Support @got, etc. on constants emitted via .short, .int etc. */ 2074 2075bfd_reloc_code_real_type 2076ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes) 2077{ 2078 expression (exp); 2079 if (nbytes >= 2 && *input_line_pointer == '@') 2080 return ppc_elf_suffix (&input_line_pointer, exp); 2081 return BFD_RELOC_NONE; 2082} 2083 2084/* Warn when emitting data to code sections, unless we are emitting 2085 a relocation that ld --ppc476-workaround uses to recognise data 2086 *and* there was an unconditional branch prior to the data. */ 2087 2088void 2089ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED, 2090 unsigned int nbytes, fixS *fix) 2091{ 2092 if (warn_476 2093 && (now_seg->flags & SEC_CODE) != 0 2094 && (nbytes != 4 2095 || fix == NULL 2096 || !(fix->fx_r_type == BFD_RELOC_32 2097 || fix->fx_r_type == BFD_RELOC_CTOR 2098 || fix->fx_r_type == BFD_RELOC_32_PCREL) 2099 || !(last_seg == now_seg && last_subseg == now_subseg) 2100 || !((last_insn & (0x3f << 26)) == (18u << 26) 2101 || ((last_insn & (0x3f << 26)) == (16u << 26) 2102 && (last_insn & (0x14 << 21)) == (0x14 << 21)) 2103 || ((last_insn & (0x3f << 26)) == (19u << 26) 2104 && (last_insn & (0x3ff << 1)) == (16u << 1) 2105 && (last_insn & (0x14 << 21)) == (0x14 << 21))))) 2106 { 2107 /* Flag that we've warned. */ 2108 if (fix != NULL) 2109 fix->fx_tcbit = 1; 2110 2111 as_warn (_("data in executable section")); 2112 } 2113} 2114 2115/* Solaris pseduo op to change to the .rodata section. */ 2116static void 2117ppc_elf_rdata (int xxx) 2118{ 2119 char *save_line = input_line_pointer; 2120 static char section[] = ".rodata\n"; 2121 2122 /* Just pretend this is .section .rodata */ 2123 input_line_pointer = section; 2124 obj_elf_section (xxx); 2125 2126 input_line_pointer = save_line; 2127} 2128 2129/* Pseudo op to make file scope bss items. */ 2130static void 2131ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) 2132{ 2133 char *name; 2134 char c; 2135 char *p; 2136 offsetT size; 2137 symbolS *symbolP; 2138 offsetT align; 2139 segT old_sec; 2140 int old_subsec; 2141 char *pfrag; 2142 int align2; 2143 2144 c = get_symbol_name (&name); 2145 2146 /* Just after name is now '\0'. */ 2147 p = input_line_pointer; 2148 *p = c; 2149 SKIP_WHITESPACE_AFTER_NAME (); 2150 if (*input_line_pointer != ',') 2151 { 2152 as_bad (_("expected comma after symbol-name: rest of line ignored.")); 2153 ignore_rest_of_line (); 2154 return; 2155 } 2156 2157 input_line_pointer++; /* skip ',' */ 2158 if ((size = get_absolute_expression ()) < 0) 2159 { 2160 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); 2161 ignore_rest_of_line (); 2162 return; 2163 } 2164 2165 /* The third argument to .lcomm is the alignment. */ 2166 if (*input_line_pointer != ',') 2167 align = 8; 2168 else 2169 { 2170 ++input_line_pointer; 2171 align = get_absolute_expression (); 2172 if (align <= 0) 2173 { 2174 as_warn (_("ignoring bad alignment")); 2175 align = 8; 2176 } 2177 } 2178 2179 *p = 0; 2180 symbolP = symbol_find_or_make (name); 2181 *p = c; 2182 2183 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 2184 { 2185 as_bad (_("ignoring attempt to re-define symbol `%s'."), 2186 S_GET_NAME (symbolP)); 2187 ignore_rest_of_line (); 2188 return; 2189 } 2190 2191 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) 2192 { 2193 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), 2194 S_GET_NAME (symbolP), 2195 (long) S_GET_VALUE (symbolP), 2196 (long) size); 2197 2198 ignore_rest_of_line (); 2199 return; 2200 } 2201 2202 /* Allocate_bss. */ 2203 old_sec = now_seg; 2204 old_subsec = now_subseg; 2205 if (align) 2206 { 2207 /* Convert to a power of 2 alignment. */ 2208 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); 2209 if (align != 1) 2210 { 2211 as_bad (_("common alignment not a power of 2")); 2212 ignore_rest_of_line (); 2213 return; 2214 } 2215 } 2216 else 2217 align2 = 0; 2218 2219 record_alignment (bss_section, align2); 2220 subseg_set (bss_section, 1); 2221 if (align2) 2222 frag_align (align2, 0, 0); 2223 if (S_GET_SEGMENT (symbolP) == bss_section) 2224 symbol_get_frag (symbolP)->fr_symbol = 0; 2225 symbol_set_frag (symbolP, frag_now); 2226 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, 2227 (char *) 0); 2228 *pfrag = 0; 2229 S_SET_SIZE (symbolP, size); 2230 S_SET_SEGMENT (symbolP, bss_section); 2231 subseg_set (old_sec, old_subsec); 2232 demand_empty_rest_of_line (); 2233} 2234 2235/* Pseudo op to set symbol local entry point. */ 2236static void 2237ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED) 2238{ 2239 char *name; 2240 char c = get_symbol_name (&name); 2241 char *p; 2242 expressionS exp; 2243 symbolS *sym; 2244 asymbol *bfdsym; 2245 elf_symbol_type *elfsym; 2246 2247 p = input_line_pointer; 2248 *p = c; 2249 SKIP_WHITESPACE_AFTER_NAME (); 2250 if (*input_line_pointer != ',') 2251 { 2252 *p = 0; 2253 as_bad (_("expected comma after name `%s' in .localentry directive"), 2254 name); 2255 *p = c; 2256 ignore_rest_of_line (); 2257 return; 2258 } 2259 input_line_pointer++; 2260 expression (&exp); 2261 if (exp.X_op == O_absent) 2262 { 2263 as_bad (_("missing expression in .localentry directive")); 2264 exp.X_op = O_constant; 2265 exp.X_add_number = 0; 2266 } 2267 *p = 0; 2268 sym = symbol_find_or_make (name); 2269 *p = c; 2270 2271 if (resolve_expression (&exp) 2272 && exp.X_op == O_constant) 2273 { 2274 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number); 2275 2276 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded)) 2277 as_bad (_(".localentry expression for `%s' " 2278 "is not a valid power of 2"), S_GET_NAME (sym)); 2279 else 2280 { 2281 bfdsym = symbol_get_bfdsym (sym); 2282 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 2283 gas_assert (elfsym); 2284 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK; 2285 elfsym->internal_elf_sym.st_other |= encoded; 2286 if (ppc_abiversion == 0) 2287 ppc_abiversion = 2; 2288 } 2289 } 2290 else 2291 as_bad (_(".localentry expression for `%s' " 2292 "does not evaluate to a constant"), S_GET_NAME (sym)); 2293 2294 demand_empty_rest_of_line (); 2295} 2296 2297/* Pseudo op to set ABI version. */ 2298static void 2299ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED) 2300{ 2301 expressionS exp; 2302 2303 expression (&exp); 2304 if (exp.X_op == O_absent) 2305 { 2306 as_bad (_("missing expression in .abiversion directive")); 2307 exp.X_op = O_constant; 2308 exp.X_add_number = 0; 2309 } 2310 2311 if (resolve_expression (&exp) 2312 && exp.X_op == O_constant) 2313 ppc_abiversion = exp.X_add_number; 2314 else 2315 as_bad (_(".abiversion expression does not evaluate to a constant")); 2316 demand_empty_rest_of_line (); 2317} 2318 2319/* Parse a .gnu_attribute directive. */ 2320static void 2321ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED) 2322{ 2323 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU); 2324 2325 /* Check validity of defined powerpc tags. */ 2326 if (tag == Tag_GNU_Power_ABI_FP 2327 || tag == Tag_GNU_Power_ABI_Vector 2328 || tag == Tag_GNU_Power_ABI_Struct_Return) 2329 { 2330 unsigned int val; 2331 2332 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag); 2333 2334 if ((tag == Tag_GNU_Power_ABI_FP && val > 15) 2335 || (tag == Tag_GNU_Power_ABI_Vector && val > 3) 2336 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2)) 2337 as_warn (_("unknown .gnu_attribute value")); 2338 } 2339} 2340 2341/* Set ABI version in output file. */ 2342void 2343ppc_elf_end (void) 2344{ 2345 if (ppc_obj64 && ppc_abiversion != 0) 2346 { 2347 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI; 2348 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI; 2349 } 2350} 2351 2352/* Validate any relocations emitted for -mrelocatable, possibly adding 2353 fixups for word relocations in writable segments, so we can adjust 2354 them at runtime. */ 2355static void 2356ppc_elf_validate_fix (fixS *fixp, segT seg) 2357{ 2358 if (fixp->fx_done || fixp->fx_pcrel) 2359 return; 2360 2361 switch (shlib) 2362 { 2363 case SHLIB_NONE: 2364 case SHLIB_PIC: 2365 return; 2366 2367 case SHLIB_MRELOCATABLE: 2368 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF 2369 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF 2370 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF 2371 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 2372 && fixp->fx_r_type != BFD_RELOC_16_BASEREL 2373 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL 2374 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL 2375 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL 2376 && (seg->flags & SEC_LOAD) != 0 2377 && strcmp (segment_name (seg), ".got2") != 0 2378 && strcmp (segment_name (seg), ".dtors") != 0 2379 && strcmp (segment_name (seg), ".ctors") != 0 2380 && strcmp (segment_name (seg), ".fixup") != 0 2381 && strcmp (segment_name (seg), ".gcc_except_table") != 0 2382 && strcmp (segment_name (seg), ".eh_frame") != 0 2383 && strcmp (segment_name (seg), ".ex_shared") != 0) 2384 { 2385 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 2386 || fixp->fx_r_type != BFD_RELOC_CTOR) 2387 { 2388 as_bad_where (fixp->fx_file, fixp->fx_line, 2389 _("relocation cannot be done when using -mrelocatable")); 2390 } 2391 } 2392 return; 2393 } 2394} 2395 2396/* Prevent elf_frob_file_before_adjust removing a weak undefined 2397 function descriptor sym if the corresponding code sym is used. */ 2398 2399void 2400ppc_frob_file_before_adjust (void) 2401{ 2402 symbolS *symp; 2403 asection *toc; 2404 2405 if (!ppc_obj64) 2406 return; 2407 2408 for (symp = symbol_rootP; symp; symp = symbol_next (symp)) 2409 { 2410 const char *name; 2411 char *dotname; 2412 symbolS *dotsym; 2413 2414 name = S_GET_NAME (symp); 2415 if (name[0] == '.') 2416 continue; 2417 2418 if (! S_IS_WEAK (symp) 2419 || S_IS_DEFINED (symp)) 2420 continue; 2421 2422 dotname = concat (".", name, (char *) NULL); 2423 dotsym = symbol_find_noref (dotname, 1); 2424 free (dotname); 2425 if (dotsym != NULL && (symbol_used_p (dotsym) 2426 || symbol_used_in_reloc_p (dotsym))) 2427 symbol_mark_used (symp); 2428 2429 } 2430 2431 toc = bfd_get_section_by_name (stdoutput, ".toc"); 2432 if (toc != NULL 2433 && toc_reloc_types != has_large_toc_reloc 2434 && bfd_section_size (stdoutput, toc) > 0x10000) 2435 as_warn (_("TOC section size exceeds 64k")); 2436} 2437 2438/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be 2439 emitted. Other uses of .TOC. will cause the symbol to be marked 2440 with BSF_KEEP in md_apply_fix. */ 2441 2442void 2443ppc_elf_adjust_symtab (void) 2444{ 2445 if (ppc_obj64) 2446 { 2447 symbolS *symp; 2448 symp = symbol_find (".TOC."); 2449 if (symp != NULL) 2450 { 2451 asymbol *bsym = symbol_get_bfdsym (symp); 2452 if ((bsym->flags & BSF_KEEP) == 0) 2453 symbol_remove (symp, &symbol_rootP, &symbol_lastP); 2454 } 2455 } 2456} 2457#endif /* OBJ_ELF */ 2458 2459#ifdef TE_PE 2460 2461/* 2462 * Summary of parse_toc_entry. 2463 * 2464 * in: Input_line_pointer points to the '[' in one of: 2465 * 2466 * [toc] [tocv] [toc32] [toc64] 2467 * 2468 * Anything else is an error of one kind or another. 2469 * 2470 * out: 2471 * return value: success or failure 2472 * toc_kind: kind of toc reference 2473 * input_line_pointer: 2474 * success: first char after the ']' 2475 * failure: unchanged 2476 * 2477 * settings: 2478 * 2479 * [toc] - rv == success, toc_kind = default_toc 2480 * [tocv] - rv == success, toc_kind = data_in_toc 2481 * [toc32] - rv == success, toc_kind = must_be_32 2482 * [toc64] - rv == success, toc_kind = must_be_64 2483 * 2484 */ 2485 2486enum toc_size_qualifier 2487{ 2488 default_toc, /* The toc cell constructed should be the system default size */ 2489 data_in_toc, /* This is a direct reference to a toc cell */ 2490 must_be_32, /* The toc cell constructed must be 32 bits wide */ 2491 must_be_64 /* The toc cell constructed must be 64 bits wide */ 2492}; 2493 2494static int 2495parse_toc_entry (enum toc_size_qualifier *toc_kind) 2496{ 2497 char *start; 2498 char *toc_spec; 2499 char c; 2500 enum toc_size_qualifier t; 2501 2502 /* Save the input_line_pointer. */ 2503 start = input_line_pointer; 2504 2505 /* Skip over the '[' , and whitespace. */ 2506 ++input_line_pointer; 2507 SKIP_WHITESPACE (); 2508 2509 /* Find the spelling of the operand. */ 2510 c = get_symbol_name (&toc_spec); 2511 2512 if (strcmp (toc_spec, "toc") == 0) 2513 { 2514 t = default_toc; 2515 } 2516 else if (strcmp (toc_spec, "tocv") == 0) 2517 { 2518 t = data_in_toc; 2519 } 2520 else if (strcmp (toc_spec, "toc32") == 0) 2521 { 2522 t = must_be_32; 2523 } 2524 else if (strcmp (toc_spec, "toc64") == 0) 2525 { 2526 t = must_be_64; 2527 } 2528 else 2529 { 2530 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); 2531 *input_line_pointer = c; 2532 input_line_pointer = start; 2533 return 0; 2534 } 2535 2536 /* Now find the ']'. */ 2537 *input_line_pointer = c; 2538 2539 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */ 2540 c = *input_line_pointer++; /* input_line_pointer->past char in c. */ 2541 2542 if (c != ']') 2543 { 2544 as_bad (_("syntax error: expected `]', found `%c'"), c); 2545 input_line_pointer = start; 2546 return 0; 2547 } 2548 2549 *toc_kind = t; 2550 return 1; 2551} 2552#endif 2553 2554#if defined (OBJ_XCOFF) || defined (OBJ_ELF) 2555/* See whether a symbol is in the TOC section. */ 2556 2557static int 2558ppc_is_toc_sym (symbolS *sym) 2559{ 2560#ifdef OBJ_XCOFF 2561 return (symbol_get_tc (sym)->symbol_class == XMC_TC 2562 || symbol_get_tc (sym)->symbol_class == XMC_TC0); 2563#endif 2564#ifdef OBJ_ELF 2565 const char *sname = segment_name (S_GET_SEGMENT (sym)); 2566 if (ppc_obj64) 2567 return strcmp (sname, ".toc") == 0; 2568 else 2569 return strcmp (sname, ".got") == 0; 2570#endif 2571} 2572#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 2573 2574 2575#ifdef OBJ_ELF 2576#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) 2577static void 2578ppc_apuinfo_section_add (unsigned int apu, unsigned int version) 2579{ 2580 unsigned int i; 2581 2582 /* Check we don't already exist. */ 2583 for (i = 0; i < ppc_apuinfo_num; i++) 2584 if (ppc_apuinfo_list[i] == APUID (apu, version)) 2585 return; 2586 2587 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) 2588 { 2589 if (ppc_apuinfo_num_alloc == 0) 2590 { 2591 ppc_apuinfo_num_alloc = 4; 2592 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc); 2593 } 2594 else 2595 { 2596 ppc_apuinfo_num_alloc += 4; 2597 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list, 2598 ppc_apuinfo_num_alloc); 2599 } 2600 } 2601 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); 2602} 2603#undef APUID 2604#endif 2605 2606 2607/* We need to keep a list of fixups. We can't simply generate them as 2608 we go, because that would require us to first create the frag, and 2609 that would screw up references to ``.''. */ 2610 2611struct ppc_fixup 2612{ 2613 expressionS exp; 2614 int opindex; 2615 bfd_reloc_code_real_type reloc; 2616}; 2617 2618#define MAX_INSN_FIXUPS (5) 2619 2620/* This routine is called for each instruction to be assembled. */ 2621 2622void 2623md_assemble (char *str) 2624{ 2625 char *s; 2626 const struct powerpc_opcode *opcode; 2627 unsigned long insn; 2628 const unsigned char *opindex_ptr; 2629 int skip_optional; 2630 int need_paren; 2631 int next_opindex; 2632 struct ppc_fixup fixups[MAX_INSN_FIXUPS]; 2633 int fc; 2634 char *f; 2635 int addr_mod; 2636 int i; 2637 unsigned int insn_length; 2638 2639 /* Get the opcode. */ 2640 for (s = str; *s != '\0' && ! ISSPACE (*s); s++) 2641 ; 2642 if (*s != '\0') 2643 *s++ = '\0'; 2644 2645 /* Look up the opcode in the hash table. */ 2646 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); 2647 if (opcode == (const struct powerpc_opcode *) NULL) 2648 { 2649 const struct powerpc_macro *macro; 2650 2651 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); 2652 if (macro == (const struct powerpc_macro *) NULL) 2653 as_bad (_("unrecognized opcode: `%s'"), str); 2654 else 2655 ppc_macro (s, macro); 2656 2657 return; 2658 } 2659 2660 insn = opcode->opcode; 2661 2662 str = s; 2663 while (ISSPACE (*str)) 2664 ++str; 2665 2666 /* PowerPC operands are just expressions. The only real issue is 2667 that a few operand types are optional. All cases which might use 2668 an optional operand separate the operands only with commas (in some 2669 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never 2670 have optional operands). Most instructions with optional operands 2671 have only one. Those that have more than one optional operand can 2672 take either all their operands or none. So, before we start seriously 2673 parsing the operands, we check to see if we have optional operands, 2674 and if we do, we count the number of commas to see which operands 2675 have been omitted. */ 2676 skip_optional = 0; 2677 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 2678 { 2679 const struct powerpc_operand *operand; 2680 2681 operand = &powerpc_operands[*opindex_ptr]; 2682 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 2683 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64)) 2684 { 2685 unsigned int opcount; 2686 unsigned int num_operands_expected; 2687 2688 /* There is an optional operand. Count the number of 2689 commas in the input line. */ 2690 if (*str == '\0') 2691 opcount = 0; 2692 else 2693 { 2694 opcount = 1; 2695 s = str; 2696 while ((s = strchr (s, ',')) != (char *) NULL) 2697 { 2698 ++opcount; 2699 ++s; 2700 } 2701 } 2702 2703 /* Compute the number of expected operands. 2704 Do not count fake operands. */ 2705 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) 2706 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) 2707 ++ num_operands_expected; 2708 2709 /* If there are fewer operands in the line then are called 2710 for by the instruction, we want to skip the optional 2711 operands. */ 2712 if (opcount < num_operands_expected) 2713 skip_optional = 1; 2714 2715 break; 2716 } 2717 } 2718 2719 /* Gather the operands. */ 2720 need_paren = 0; 2721 next_opindex = 0; 2722 fc = 0; 2723 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 2724 { 2725 const struct powerpc_operand *operand; 2726 const char *errmsg; 2727 char *hold; 2728 expressionS ex; 2729 char endc; 2730 2731 if (next_opindex == 0) 2732 operand = &powerpc_operands[*opindex_ptr]; 2733 else 2734 { 2735 operand = &powerpc_operands[next_opindex]; 2736 next_opindex = 0; 2737 } 2738 errmsg = NULL; 2739 2740 /* If this is a fake operand, then we do not expect anything 2741 from the input. */ 2742 if ((operand->flags & PPC_OPERAND_FAKE) != 0) 2743 { 2744 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); 2745 if (errmsg != (const char *) NULL) 2746 as_bad ("%s", errmsg); 2747 continue; 2748 } 2749 2750 /* If this is an optional operand, and we are skipping it, just 2751 insert a zero. */ 2752 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 2753 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64) 2754 && skip_optional) 2755 { 2756 long val = ppc_optional_operand_value (operand); 2757 if (operand->insert) 2758 { 2759 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg); 2760 if (errmsg != (const char *) NULL) 2761 as_bad ("%s", errmsg); 2762 } 2763 else if (operand->shift >= 0) 2764 insn |= ((long) val & operand->bitm) << operand->shift; 2765 else 2766 insn |= ((long) val & operand->bitm) >> -operand->shift; 2767 2768 if ((operand->flags & PPC_OPERAND_NEXT) != 0) 2769 next_opindex = *opindex_ptr + 1; 2770 continue; 2771 } 2772 2773 /* Gather the operand. */ 2774 hold = input_line_pointer; 2775 input_line_pointer = str; 2776 2777#ifdef TE_PE 2778 if (*input_line_pointer == '[') 2779 { 2780 /* We are expecting something like the second argument here: 2781 * 2782 * lwz r4,[toc].GS.0.static_int(rtoc) 2783 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ 2784 * The argument following the `]' must be a symbol name, and the 2785 * register must be the toc register: 'rtoc' or '2' 2786 * 2787 * The effect is to 0 as the displacement field 2788 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or 2789 * the appropriate variation) reloc against it based on the symbol. 2790 * The linker will build the toc, and insert the resolved toc offset. 2791 * 2792 * Note: 2793 * o The size of the toc entry is currently assumed to be 2794 * 32 bits. This should not be assumed to be a hard coded 2795 * number. 2796 * o In an effort to cope with a change from 32 to 64 bits, 2797 * there are also toc entries that are specified to be 2798 * either 32 or 64 bits: 2799 * lwz r4,[toc32].GS.0.static_int(rtoc) 2800 * lwz r4,[toc64].GS.0.static_int(rtoc) 2801 * These demand toc entries of the specified size, and the 2802 * instruction probably requires it. 2803 */ 2804 2805 int valid_toc; 2806 enum toc_size_qualifier toc_kind; 2807 bfd_reloc_code_real_type toc_reloc; 2808 2809 /* Go parse off the [tocXX] part. */ 2810 valid_toc = parse_toc_entry (&toc_kind); 2811 2812 if (!valid_toc) 2813 { 2814 ignore_rest_of_line (); 2815 break; 2816 } 2817 2818 /* Now get the symbol following the ']'. */ 2819 expression (&ex); 2820 2821 switch (toc_kind) 2822 { 2823 case default_toc: 2824 /* In this case, we may not have seen the symbol yet, 2825 since it is allowed to appear on a .extern or .globl 2826 or just be a label in the .data section. */ 2827 toc_reloc = BFD_RELOC_PPC_TOC16; 2828 break; 2829 case data_in_toc: 2830 /* 1. The symbol must be defined and either in the toc 2831 section, or a global. 2832 2. The reloc generated must have the TOCDEFN flag set 2833 in upper bit mess of the reloc type. 2834 FIXME: It's a little confusing what the tocv 2835 qualifier can be used for. At the very least, I've 2836 seen three uses, only one of which I'm sure I can 2837 explain. */ 2838 if (ex.X_op == O_symbol) 2839 { 2840 gas_assert (ex.X_add_symbol != NULL); 2841 if (symbol_get_bfdsym (ex.X_add_symbol)->section 2842 != tocdata_section) 2843 { 2844 as_bad (_("[tocv] symbol is not a toc symbol")); 2845 } 2846 } 2847 2848 toc_reloc = BFD_RELOC_PPC_TOC16; 2849 break; 2850 case must_be_32: 2851 /* FIXME: these next two specifically specify 32/64 bit 2852 toc entries. We don't support them today. Is this 2853 the right way to say that? */ 2854 toc_reloc = BFD_RELOC_NONE; 2855 as_bad (_("unimplemented toc32 expression modifier")); 2856 break; 2857 case must_be_64: 2858 /* FIXME: see above. */ 2859 toc_reloc = BFD_RELOC_NONE; 2860 as_bad (_("unimplemented toc64 expression modifier")); 2861 break; 2862 default: 2863 fprintf (stderr, 2864 _("Unexpected return value [%d] from parse_toc_entry!\n"), 2865 toc_kind); 2866 abort (); 2867 break; 2868 } 2869 2870 /* We need to generate a fixup for this expression. */ 2871 if (fc >= MAX_INSN_FIXUPS) 2872 as_fatal (_("too many fixups")); 2873 2874 fixups[fc].reloc = toc_reloc; 2875 fixups[fc].exp = ex; 2876 fixups[fc].opindex = *opindex_ptr; 2877 ++fc; 2878 2879 /* Ok. We've set up the fixup for the instruction. Now make it 2880 look like the constant 0 was found here. */ 2881 ex.X_unsigned = 1; 2882 ex.X_op = O_constant; 2883 ex.X_add_number = 0; 2884 ex.X_add_symbol = NULL; 2885 ex.X_op_symbol = NULL; 2886 } 2887 2888 else 2889#endif /* TE_PE */ 2890 { 2891 if ((reg_names_p 2892 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0) 2893 || ((operand->flags & PPC_OPERAND_CR_REG) != 0))) 2894 || !register_name (&ex)) 2895 { 2896 char save_lex = lex_type['%']; 2897 2898 if (((operand->flags & PPC_OPERAND_CR_REG) != 0) 2899 || (operand->flags & PPC_OPERAND_CR_BIT) != 0) 2900 { 2901 cr_operand = TRUE; 2902 lex_type['%'] |= LEX_BEGIN_NAME; 2903 } 2904 expression (&ex); 2905 cr_operand = FALSE; 2906 lex_type['%'] = save_lex; 2907 } 2908 } 2909 2910 str = input_line_pointer; 2911 input_line_pointer = hold; 2912 2913 if (ex.X_op == O_illegal) 2914 as_bad (_("illegal operand")); 2915 else if (ex.X_op == O_absent) 2916 as_bad (_("missing operand")); 2917 else if (ex.X_op == O_register) 2918 { 2919 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 2920 ppc_cpu, (char *) NULL, 0); 2921 } 2922 else if (ex.X_op == O_constant) 2923 { 2924#ifdef OBJ_ELF 2925 /* Allow @HA, @L, @H on constants. */ 2926 bfd_reloc_code_real_type reloc; 2927 char *orig_str = str; 2928 2929 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) 2930 switch (reloc) 2931 { 2932 default: 2933 str = orig_str; 2934 break; 2935 2936 case BFD_RELOC_LO16: 2937 ex.X_add_number &= 0xffff; 2938 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2939 ex.X_add_number = SEX16 (ex.X_add_number); 2940 break; 2941 2942 case BFD_RELOC_HI16: 2943 if (REPORT_OVERFLOW_HI && ppc_obj64) 2944 { 2945 /* PowerPC64 @h is tested for overflow. */ 2946 ex.X_add_number = (addressT) ex.X_add_number >> 16; 2947 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2948 { 2949 addressT sign = (((addressT) -1 >> 16) + 1) >> 1; 2950 ex.X_add_number 2951 = ((addressT) ex.X_add_number ^ sign) - sign; 2952 } 2953 break; 2954 } 2955 /* Fallthru */ 2956 2957 case BFD_RELOC_PPC64_ADDR16_HIGH: 2958 ex.X_add_number = PPC_HI (ex.X_add_number); 2959 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2960 ex.X_add_number = SEX16 (ex.X_add_number); 2961 break; 2962 2963 case BFD_RELOC_HI16_S: 2964 if (REPORT_OVERFLOW_HI && ppc_obj64) 2965 { 2966 /* PowerPC64 @ha is tested for overflow. */ 2967 ex.X_add_number 2968 = ((addressT) ex.X_add_number + 0x8000) >> 16; 2969 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2970 { 2971 addressT sign = (((addressT) -1 >> 16) + 1) >> 1; 2972 ex.X_add_number 2973 = ((addressT) ex.X_add_number ^ sign) - sign; 2974 } 2975 break; 2976 } 2977 /* Fallthru */ 2978 2979 case BFD_RELOC_PPC64_ADDR16_HIGHA: 2980 ex.X_add_number = PPC_HA (ex.X_add_number); 2981 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2982 ex.X_add_number = SEX16 (ex.X_add_number); 2983 break; 2984 2985 case BFD_RELOC_PPC64_HIGHER: 2986 ex.X_add_number = PPC_HIGHER (ex.X_add_number); 2987 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2988 ex.X_add_number = SEX16 (ex.X_add_number); 2989 break; 2990 2991 case BFD_RELOC_PPC64_HIGHER_S: 2992 ex.X_add_number = PPC_HIGHERA (ex.X_add_number); 2993 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2994 ex.X_add_number = SEX16 (ex.X_add_number); 2995 break; 2996 2997 case BFD_RELOC_PPC64_HIGHEST: 2998 ex.X_add_number = PPC_HIGHEST (ex.X_add_number); 2999 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3000 ex.X_add_number = SEX16 (ex.X_add_number); 3001 break; 3002 3003 case BFD_RELOC_PPC64_HIGHEST_S: 3004 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); 3005 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3006 ex.X_add_number = SEX16 (ex.X_add_number); 3007 break; 3008 } 3009#endif /* OBJ_ELF */ 3010 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 3011 ppc_cpu, (char *) NULL, 0); 3012 } 3013 else 3014 { 3015 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE; 3016#ifdef OBJ_ELF 3017 if (ex.X_op == O_symbol && str[0] == '(') 3018 { 3019 const char *sym_name = S_GET_NAME (ex.X_add_symbol); 3020 if (sym_name[0] == '.') 3021 ++sym_name; 3022 3023 if (strcasecmp (sym_name, "__tls_get_addr") == 0) 3024 { 3025 expressionS tls_exp; 3026 3027 hold = input_line_pointer; 3028 input_line_pointer = str + 1; 3029 expression (&tls_exp); 3030 if (tls_exp.X_op == O_symbol) 3031 { 3032 reloc = BFD_RELOC_NONE; 3033 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) 3034 { 3035 reloc = BFD_RELOC_PPC_TLSGD; 3036 input_line_pointer += 7; 3037 } 3038 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) 3039 { 3040 reloc = BFD_RELOC_PPC_TLSLD; 3041 input_line_pointer += 7; 3042 } 3043 if (reloc != BFD_RELOC_NONE) 3044 { 3045 SKIP_WHITESPACE (); 3046 str = input_line_pointer; 3047 3048 if (fc >= MAX_INSN_FIXUPS) 3049 as_fatal (_("too many fixups")); 3050 fixups[fc].exp = tls_exp; 3051 fixups[fc].opindex = *opindex_ptr; 3052 fixups[fc].reloc = reloc; 3053 ++fc; 3054 } 3055 } 3056 input_line_pointer = hold; 3057 } 3058 } 3059 3060 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) 3061 { 3062 /* Some TLS tweaks. */ 3063 switch (reloc) 3064 { 3065 default: 3066 break; 3067 3068 case BFD_RELOC_PPC_TLS: 3069 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) 3070 as_bad (_("@tls may not be used with \"%s\" operands"), 3071 opcode->name); 3072 else if (operand->shift != 11) 3073 as_bad (_("@tls may only be used in last operand")); 3074 else 3075 insn = ppc_insert_operand (insn, operand, 3076 ppc_obj64 ? 13 : 2, 3077 ppc_cpu, (char *) NULL, 0); 3078 break; 3079 3080 /* We'll only use the 32 (or 64) bit form of these relocations 3081 in constants. Instructions get the 16 bit form. */ 3082 case BFD_RELOC_PPC_DTPREL: 3083 reloc = BFD_RELOC_PPC_DTPREL16; 3084 break; 3085 case BFD_RELOC_PPC_TPREL: 3086 reloc = BFD_RELOC_PPC_TPREL16; 3087 break; 3088 } 3089 3090 /* addpcis. */ 3091 if (opcode->opcode == (19 << 26) + (2 << 1) 3092 && reloc == BFD_RELOC_HI16_S) 3093 reloc = BFD_RELOC_PPC_16DX_HA; 3094 3095 /* If VLE-mode convert LO/HI/HA relocations. */ 3096 if (opcode->flags & PPC_OPCODE_VLE) 3097 { 3098 int tmp_insn = insn & opcode->mask; 3099 3100 int use_a_reloc = (tmp_insn == E_OR2I_INSN 3101 || tmp_insn == E_AND2I_DOT_INSN 3102 || tmp_insn == E_OR2IS_INSN 3103 || tmp_insn == E_LIS_INSN 3104 || tmp_insn == E_AND2IS_DOT_INSN); 3105 3106 3107 int use_d_reloc = (tmp_insn == E_ADD2I_DOT_INSN 3108 || tmp_insn == E_ADD2IS_INSN 3109 || tmp_insn == E_CMP16I_INSN 3110 || tmp_insn == E_MULL2I_INSN 3111 || tmp_insn == E_CMPL16I_INSN 3112 || tmp_insn == E_CMPH16I_INSN 3113 || tmp_insn == E_CMPHL16I_INSN); 3114 3115 switch (reloc) 3116 { 3117 default: 3118 break; 3119 3120 case BFD_RELOC_PPC_EMB_SDA21: 3121 reloc = BFD_RELOC_PPC_VLE_SDA21; 3122 break; 3123 3124 case BFD_RELOC_LO16: 3125 if (use_d_reloc) 3126 reloc = BFD_RELOC_PPC_VLE_LO16D; 3127 else if (use_a_reloc) 3128 reloc = BFD_RELOC_PPC_VLE_LO16A; 3129 break; 3130 3131 case BFD_RELOC_HI16: 3132 if (use_d_reloc) 3133 reloc = BFD_RELOC_PPC_VLE_HI16D; 3134 else if (use_a_reloc) 3135 reloc = BFD_RELOC_PPC_VLE_HI16A; 3136 break; 3137 3138 case BFD_RELOC_HI16_S: 3139 if (use_d_reloc) 3140 reloc = BFD_RELOC_PPC_VLE_HA16D; 3141 else if (use_a_reloc) 3142 reloc = BFD_RELOC_PPC_VLE_HA16A; 3143 break; 3144 3145 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 3146 if (use_d_reloc) 3147 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; 3148 break; 3149 3150 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 3151 if (use_d_reloc) 3152 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; 3153 break; 3154 3155 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 3156 if (use_d_reloc) 3157 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; 3158 break; 3159 } 3160 } 3161 } 3162#endif /* OBJ_ELF */ 3163 3164 if (reloc != BFD_RELOC_NONE) 3165 ; 3166 /* Determine a BFD reloc value based on the operand information. 3167 We are only prepared to turn a few of the operands into 3168 relocs. */ 3169 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3170 | PPC_OPERAND_ABSOLUTE)) != 0 3171 && operand->bitm == 0x3fffffc 3172 && operand->shift == 0) 3173 reloc = BFD_RELOC_PPC_B26; 3174 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3175 | PPC_OPERAND_ABSOLUTE)) != 0 3176 && operand->bitm == 0xfffc 3177 && operand->shift == 0) 3178 reloc = BFD_RELOC_PPC_B16; 3179 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3180 && operand->bitm == 0x1fe 3181 && operand->shift == -1) 3182 reloc = BFD_RELOC_PPC_VLE_REL8; 3183 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3184 && operand->bitm == 0xfffe 3185 && operand->shift == 0) 3186 reloc = BFD_RELOC_PPC_VLE_REL15; 3187 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3188 && operand->bitm == 0x1fffffe 3189 && operand->shift == 0) 3190 reloc = BFD_RELOC_PPC_VLE_REL24; 3191 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0 3192 && (operand->bitm & 0xfff0) == 0xfff0 3193 && operand->shift == 0) 3194 { 3195 reloc = BFD_RELOC_16; 3196#if defined OBJ_XCOFF || defined OBJ_ELF 3197 /* Note: the symbol may be not yet defined. */ 3198 if ((operand->flags & PPC_OPERAND_PARENS) != 0 3199 && ppc_is_toc_sym (ex.X_add_symbol)) 3200 { 3201 reloc = BFD_RELOC_PPC_TOC16; 3202#ifdef OBJ_ELF 3203 as_warn (_("assuming %s on symbol"), 3204 ppc_obj64 ? "@toc" : "@xgot"); 3205#endif 3206 } 3207#endif 3208 } 3209 3210 /* For the absolute forms of branches, convert the PC 3211 relative form back into the absolute. */ 3212 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) 3213 { 3214 switch (reloc) 3215 { 3216 case BFD_RELOC_PPC_B26: 3217 reloc = BFD_RELOC_PPC_BA26; 3218 break; 3219 case BFD_RELOC_PPC_B16: 3220 reloc = BFD_RELOC_PPC_BA16; 3221 break; 3222#ifdef OBJ_ELF 3223 case BFD_RELOC_PPC_B16_BRTAKEN: 3224 reloc = BFD_RELOC_PPC_BA16_BRTAKEN; 3225 break; 3226 case BFD_RELOC_PPC_B16_BRNTAKEN: 3227 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; 3228 break; 3229#endif 3230 default: 3231 break; 3232 } 3233 } 3234 3235#ifdef OBJ_ELF 3236 switch (reloc) 3237 { 3238 case BFD_RELOC_PPC_TOC16: 3239 toc_reloc_types |= has_small_toc_reloc; 3240 break; 3241 case BFD_RELOC_PPC64_TOC16_LO: 3242 case BFD_RELOC_PPC64_TOC16_HI: 3243 case BFD_RELOC_PPC64_TOC16_HA: 3244 toc_reloc_types |= has_large_toc_reloc; 3245 break; 3246 default: 3247 break; 3248 } 3249 3250 if (ppc_obj64 3251 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) 3252 { 3253 switch (reloc) 3254 { 3255 case BFD_RELOC_16: 3256 reloc = BFD_RELOC_PPC64_ADDR16_DS; 3257 break; 3258 case BFD_RELOC_LO16: 3259 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; 3260 break; 3261 case BFD_RELOC_16_GOTOFF: 3262 reloc = BFD_RELOC_PPC64_GOT16_DS; 3263 break; 3264 case BFD_RELOC_LO16_GOTOFF: 3265 reloc = BFD_RELOC_PPC64_GOT16_LO_DS; 3266 break; 3267 case BFD_RELOC_LO16_PLTOFF: 3268 reloc = BFD_RELOC_PPC64_PLT16_LO_DS; 3269 break; 3270 case BFD_RELOC_16_BASEREL: 3271 reloc = BFD_RELOC_PPC64_SECTOFF_DS; 3272 break; 3273 case BFD_RELOC_LO16_BASEREL: 3274 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; 3275 break; 3276 case BFD_RELOC_PPC_TOC16: 3277 reloc = BFD_RELOC_PPC64_TOC16_DS; 3278 break; 3279 case BFD_RELOC_PPC64_TOC16_LO: 3280 reloc = BFD_RELOC_PPC64_TOC16_LO_DS; 3281 break; 3282 case BFD_RELOC_PPC64_PLTGOT16: 3283 reloc = BFD_RELOC_PPC64_PLTGOT16_DS; 3284 break; 3285 case BFD_RELOC_PPC64_PLTGOT16_LO: 3286 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; 3287 break; 3288 case BFD_RELOC_PPC_DTPREL16: 3289 reloc = BFD_RELOC_PPC64_DTPREL16_DS; 3290 break; 3291 case BFD_RELOC_PPC_DTPREL16_LO: 3292 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; 3293 break; 3294 case BFD_RELOC_PPC_TPREL16: 3295 reloc = BFD_RELOC_PPC64_TPREL16_DS; 3296 break; 3297 case BFD_RELOC_PPC_TPREL16_LO: 3298 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; 3299 break; 3300 case BFD_RELOC_PPC_GOT_DTPREL16: 3301 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 3302 case BFD_RELOC_PPC_GOT_TPREL16: 3303 case BFD_RELOC_PPC_GOT_TPREL16_LO: 3304 break; 3305 default: 3306 as_bad (_("unsupported relocation for DS offset field")); 3307 break; 3308 } 3309 } 3310#endif 3311 3312 /* We need to generate a fixup for this expression. */ 3313 if (fc >= MAX_INSN_FIXUPS) 3314 as_fatal (_("too many fixups")); 3315 fixups[fc].exp = ex; 3316 fixups[fc].opindex = *opindex_ptr; 3317 fixups[fc].reloc = reloc; 3318 ++fc; 3319 } 3320 3321 if (need_paren) 3322 { 3323 endc = ')'; 3324 need_paren = 0; 3325 /* If expecting more operands, then we want to see "),". */ 3326 if (*str == endc && opindex_ptr[1] != 0) 3327 { 3328 do 3329 ++str; 3330 while (ISSPACE (*str)); 3331 endc = ','; 3332 } 3333 } 3334 else if ((operand->flags & PPC_OPERAND_PARENS) != 0) 3335 { 3336 endc = '('; 3337 need_paren = 1; 3338 } 3339 else 3340 endc = ','; 3341 3342 /* The call to expression should have advanced str past any 3343 whitespace. */ 3344 if (*str != endc 3345 && (endc != ',' || *str != '\0')) 3346 { 3347 if (*str == '\0') 3348 as_bad (_("syntax error; end of line, expected `%c'"), endc); 3349 else 3350 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); 3351 break; 3352 } 3353 3354 if (*str != '\0') 3355 ++str; 3356 } 3357 3358 while (ISSPACE (*str)) 3359 ++str; 3360 3361 if (*str != '\0') 3362 as_bad (_("junk at end of line: `%s'"), str); 3363 3364#ifdef OBJ_ELF 3365 /* Do we need/want an APUinfo section? */ 3366 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0 3367 && !ppc_obj64) 3368 { 3369 /* These are all version "1". */ 3370 if (opcode->flags & PPC_OPCODE_SPE) 3371 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); 3372 if (opcode->flags & PPC_OPCODE_ISEL) 3373 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); 3374 if (opcode->flags & PPC_OPCODE_EFS) 3375 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); 3376 if (opcode->flags & PPC_OPCODE_BRLOCK) 3377 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); 3378 if (opcode->flags & PPC_OPCODE_PMR) 3379 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); 3380 if (opcode->flags & PPC_OPCODE_CACHELCK) 3381 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); 3382 if (opcode->flags & PPC_OPCODE_RFMCI) 3383 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); 3384 /* Only set the VLE flag if the instruction has been pulled via 3385 the VLE instruction set. This way the flag is guaranteed to 3386 be set for VLE-only instructions or for VLE-only processors, 3387 however it'll remain clear for dual-mode instructions on 3388 dual-mode and, more importantly, standard-mode processors. */ 3389 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE) 3390 { 3391 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); 3392 if (elf_section_data (now_seg) != NULL) 3393 elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE; 3394 } 3395 } 3396#endif 3397 3398 /* Write out the instruction. */ 3399 /* Differentiate between two and four byte insns. */ 3400 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 3401 { 3402 if (PPC_OP_SE_VLE (insn)) 3403 insn_length = 2; 3404 else 3405 insn_length = 4; 3406 addr_mod = frag_now_fix () & 1; 3407 } 3408 else 3409 { 3410 insn_length = 4; 3411 addr_mod = frag_now_fix () & 3; 3412 } 3413 /* All instructions can start on a 2 byte boundary for VLE. */ 3414 f = frag_more (insn_length); 3415 if (frag_now->has_code && frag_now->insn_addr != addr_mod) 3416 { 3417 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 3418 as_bad (_("instruction address is not a multiple of 2")); 3419 else 3420 as_bad (_("instruction address is not a multiple of 4")); 3421 } 3422 frag_now->insn_addr = addr_mod; 3423 frag_now->has_code = 1; 3424 md_number_to_chars (f, insn, insn_length); 3425 last_insn = insn; 3426 last_seg = now_seg; 3427 last_subseg = now_subseg; 3428 3429#ifdef OBJ_ELF 3430 dwarf2_emit_insn (insn_length); 3431#endif 3432 3433 /* Create any fixups. */ 3434 for (i = 0; i < fc; i++) 3435 { 3436 fixS *fixP; 3437 if (fixups[i].reloc != BFD_RELOC_NONE) 3438 { 3439 reloc_howto_type *reloc_howto; 3440 int size; 3441 int offset; 3442 3443 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); 3444 if (!reloc_howto) 3445 abort (); 3446 3447 size = bfd_get_reloc_size (reloc_howto); 3448 offset = target_big_endian ? (insn_length - size) : 0; 3449 3450 fixP = fix_new_exp (frag_now, 3451 f - frag_now->fr_literal + offset, 3452 size, 3453 &fixups[i].exp, 3454 reloc_howto->pc_relative, 3455 fixups[i].reloc); 3456 } 3457 else 3458 { 3459 const struct powerpc_operand *operand; 3460 3461 operand = &powerpc_operands[fixups[i].opindex]; 3462 fixP = fix_new_exp (frag_now, 3463 f - frag_now->fr_literal, 3464 insn_length, 3465 &fixups[i].exp, 3466 (operand->flags & PPC_OPERAND_RELATIVE) != 0, 3467 BFD_RELOC_NONE); 3468 } 3469 fixP->fx_pcrel_adjust = fixups[i].opindex; 3470 } 3471} 3472 3473/* Handle a macro. Gather all the operands, transform them as 3474 described by the macro, and call md_assemble recursively. All the 3475 operands are separated by commas; we don't accept parentheses 3476 around operands here. */ 3477 3478static void 3479ppc_macro (char *str, const struct powerpc_macro *macro) 3480{ 3481 char *operands[10]; 3482 unsigned int count; 3483 char *s; 3484 unsigned int len; 3485 const char *format; 3486 unsigned int arg; 3487 char *send; 3488 char *complete; 3489 3490 /* Gather the users operands into the operands array. */ 3491 count = 0; 3492 s = str; 3493 while (1) 3494 { 3495 if (count >= sizeof operands / sizeof operands[0]) 3496 break; 3497 operands[count++] = s; 3498 s = strchr (s, ','); 3499 if (s == (char *) NULL) 3500 break; 3501 *s++ = '\0'; 3502 } 3503 3504 if (count != macro->operands) 3505 { 3506 as_bad (_("wrong number of operands")); 3507 return; 3508 } 3509 3510 /* Work out how large the string must be (the size is unbounded 3511 because it includes user input). */ 3512 len = 0; 3513 format = macro->format; 3514 while (*format != '\0') 3515 { 3516 if (*format != '%') 3517 { 3518 ++len; 3519 ++format; 3520 } 3521 else 3522 { 3523 arg = strtol (format + 1, &send, 10); 3524 know (send != format && arg < count); 3525 len += strlen (operands[arg]); 3526 format = send; 3527 } 3528 } 3529 3530 /* Put the string together. */ 3531 complete = s = XNEWVEC (char, len + 1); 3532 format = macro->format; 3533 while (*format != '\0') 3534 { 3535 if (*format != '%') 3536 *s++ = *format++; 3537 else 3538 { 3539 arg = strtol (format + 1, &send, 10); 3540 strcpy (s, operands[arg]); 3541 s += strlen (s); 3542 format = send; 3543 } 3544 } 3545 *s = '\0'; 3546 3547 /* Assemble the constructed instruction. */ 3548 md_assemble (complete); 3549 free (complete); 3550} 3551 3552#ifdef OBJ_ELF 3553/* For ELF, add support for SHT_ORDERED. */ 3554 3555int 3556ppc_section_type (char *str, size_t len) 3557{ 3558 if (len == 7 && strncmp (str, "ordered", 7) == 0) 3559 return SHT_ORDERED; 3560 3561 return -1; 3562} 3563 3564int 3565ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) 3566{ 3567 if (type == SHT_ORDERED) 3568 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; 3569 3570 return flags; 3571} 3572#endif /* OBJ_ELF */ 3573 3574 3575/* Pseudo-op handling. */ 3576 3577/* The .byte pseudo-op. This is similar to the normal .byte 3578 pseudo-op, but it can also take a single ASCII string. */ 3579 3580static void 3581ppc_byte (int ignore ATTRIBUTE_UNUSED) 3582{ 3583 int count = 0; 3584 3585 if (*input_line_pointer != '\"') 3586 { 3587 cons (1); 3588 return; 3589 } 3590 3591 /* Gather characters. A real double quote is doubled. Unusual 3592 characters are not permitted. */ 3593 ++input_line_pointer; 3594 while (1) 3595 { 3596 char c; 3597 3598 c = *input_line_pointer++; 3599 3600 if (c == '\"') 3601 { 3602 if (*input_line_pointer != '\"') 3603 break; 3604 ++input_line_pointer; 3605 } 3606 3607 FRAG_APPEND_1_CHAR (c); 3608 ++count; 3609 } 3610 3611 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0) 3612 as_warn (_("data in executable section")); 3613 demand_empty_rest_of_line (); 3614} 3615 3616#ifdef OBJ_XCOFF 3617 3618/* XCOFF specific pseudo-op handling. */ 3619 3620/* This is set if we are creating a .stabx symbol, since we don't want 3621 to handle symbol suffixes for such symbols. */ 3622static bfd_boolean ppc_stab_symbol; 3623 3624/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common 3625 symbols in the .bss segment as though they were local common 3626 symbols, and uses a different smclas. The native Aix 4.3.3 assembler 3627 aligns .comm and .lcomm to 4 bytes. */ 3628 3629static void 3630ppc_comm (int lcomm) 3631{ 3632 asection *current_seg = now_seg; 3633 subsegT current_subseg = now_subseg; 3634 char *name; 3635 char endc; 3636 char *end_name; 3637 offsetT size; 3638 offsetT align; 3639 symbolS *lcomm_sym = NULL; 3640 symbolS *sym; 3641 char *pfrag; 3642 3643 endc = get_symbol_name (&name); 3644 end_name = input_line_pointer; 3645 (void) restore_line_pointer (endc); 3646 3647 if (*input_line_pointer != ',') 3648 { 3649 as_bad (_("missing size")); 3650 ignore_rest_of_line (); 3651 return; 3652 } 3653 ++input_line_pointer; 3654 3655 size = get_absolute_expression (); 3656 if (size < 0) 3657 { 3658 as_bad (_("negative size")); 3659 ignore_rest_of_line (); 3660 return; 3661 } 3662 3663 if (! lcomm) 3664 { 3665 /* The third argument to .comm is the alignment. */ 3666 if (*input_line_pointer != ',') 3667 align = 2; 3668 else 3669 { 3670 ++input_line_pointer; 3671 align = get_absolute_expression (); 3672 if (align <= 0) 3673 { 3674 as_warn (_("ignoring bad alignment")); 3675 align = 2; 3676 } 3677 } 3678 } 3679 else 3680 { 3681 char *lcomm_name; 3682 char lcomm_endc; 3683 3684 /* The third argument to .lcomm appears to be the real local 3685 common symbol to create. References to the symbol named in 3686 the first argument are turned into references to the third 3687 argument. */ 3688 if (*input_line_pointer != ',') 3689 { 3690 as_bad (_("missing real symbol name")); 3691 ignore_rest_of_line (); 3692 return; 3693 } 3694 ++input_line_pointer; 3695 3696 lcomm_endc = get_symbol_name (&lcomm_name); 3697 3698 lcomm_sym = symbol_find_or_make (lcomm_name); 3699 3700 (void) restore_line_pointer (lcomm_endc); 3701 3702 /* The fourth argument to .lcomm is the alignment. */ 3703 if (*input_line_pointer != ',') 3704 { 3705 if (size <= 4) 3706 align = 2; 3707 else 3708 align = 3; 3709 } 3710 else 3711 { 3712 ++input_line_pointer; 3713 align = get_absolute_expression (); 3714 if (align <= 0) 3715 { 3716 as_warn (_("ignoring bad alignment")); 3717 align = 2; 3718 } 3719 } 3720 } 3721 3722 *end_name = '\0'; 3723 sym = symbol_find_or_make (name); 3724 *end_name = endc; 3725 3726 if (S_IS_DEFINED (sym) 3727 || S_GET_VALUE (sym) != 0) 3728 { 3729 as_bad (_("attempt to redefine symbol")); 3730 ignore_rest_of_line (); 3731 return; 3732 } 3733 3734 record_alignment (bss_section, align); 3735 3736 if (! lcomm 3737 || ! S_IS_DEFINED (lcomm_sym)) 3738 { 3739 symbolS *def_sym; 3740 offsetT def_size; 3741 3742 if (! lcomm) 3743 { 3744 def_sym = sym; 3745 def_size = size; 3746 S_SET_EXTERNAL (sym); 3747 } 3748 else 3749 { 3750 symbol_get_tc (lcomm_sym)->output = 1; 3751 def_sym = lcomm_sym; 3752 def_size = 0; 3753 } 3754 3755 subseg_set (bss_section, 1); 3756 frag_align (align, 0, 0); 3757 3758 symbol_set_frag (def_sym, frag_now); 3759 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, 3760 def_size, (char *) NULL); 3761 *pfrag = 0; 3762 S_SET_SEGMENT (def_sym, bss_section); 3763 symbol_get_tc (def_sym)->align = align; 3764 } 3765 else if (lcomm) 3766 { 3767 /* Align the size of lcomm_sym. */ 3768 symbol_get_frag (lcomm_sym)->fr_offset = 3769 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) 3770 &~ ((1 << align) - 1)); 3771 if (align > symbol_get_tc (lcomm_sym)->align) 3772 symbol_get_tc (lcomm_sym)->align = align; 3773 } 3774 3775 if (lcomm) 3776 { 3777 /* Make sym an offset from lcomm_sym. */ 3778 S_SET_SEGMENT (sym, bss_section); 3779 symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); 3780 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); 3781 symbol_get_frag (lcomm_sym)->fr_offset += size; 3782 } 3783 3784 subseg_set (current_seg, current_subseg); 3785 3786 demand_empty_rest_of_line (); 3787} 3788 3789/* The .csect pseudo-op. This switches us into a different 3790 subsegment. The first argument is a symbol whose value is the 3791 start of the .csect. In COFF, csect symbols get special aux 3792 entries defined by the x_csect field of union internal_auxent. The 3793 optional second argument is the alignment (the default is 2). */ 3794 3795static void 3796ppc_csect (int ignore ATTRIBUTE_UNUSED) 3797{ 3798 char *name; 3799 char endc; 3800 symbolS *sym; 3801 offsetT align; 3802 3803 endc = get_symbol_name (&name); 3804 3805 sym = symbol_find_or_make (name); 3806 3807 (void) restore_line_pointer (endc); 3808 3809 if (S_GET_NAME (sym)[0] == '\0') 3810 { 3811 /* An unnamed csect is assumed to be [PR]. */ 3812 symbol_get_tc (sym)->symbol_class = XMC_PR; 3813 } 3814 3815 align = 2; 3816 if (*input_line_pointer == ',') 3817 { 3818 ++input_line_pointer; 3819 align = get_absolute_expression (); 3820 } 3821 3822 ppc_change_csect (sym, align); 3823 3824 demand_empty_rest_of_line (); 3825} 3826 3827/* Change to a different csect. */ 3828 3829static void 3830ppc_change_csect (symbolS *sym, offsetT align) 3831{ 3832 if (S_IS_DEFINED (sym)) 3833 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); 3834 else 3835 { 3836 symbolS **list_ptr; 3837 int after_toc; 3838 int hold_chunksize; 3839 symbolS *list; 3840 int is_code; 3841 segT sec; 3842 3843 /* This is a new csect. We need to look at the symbol class to 3844 figure out whether it should go in the text section or the 3845 data section. */ 3846 after_toc = 0; 3847 is_code = 0; 3848 switch (symbol_get_tc (sym)->symbol_class) 3849 { 3850 case XMC_PR: 3851 case XMC_RO: 3852 case XMC_DB: 3853 case XMC_GL: 3854 case XMC_XO: 3855 case XMC_SV: 3856 case XMC_TI: 3857 case XMC_TB: 3858 S_SET_SEGMENT (sym, text_section); 3859 symbol_get_tc (sym)->subseg = ppc_text_subsegment; 3860 ++ppc_text_subsegment; 3861 list_ptr = &ppc_text_csects; 3862 is_code = 1; 3863 break; 3864 case XMC_RW: 3865 case XMC_TC0: 3866 case XMC_TC: 3867 case XMC_DS: 3868 case XMC_UA: 3869 case XMC_BS: 3870 case XMC_UC: 3871 if (ppc_toc_csect != NULL 3872 && (symbol_get_tc (ppc_toc_csect)->subseg + 1 3873 == ppc_data_subsegment)) 3874 after_toc = 1; 3875 S_SET_SEGMENT (sym, data_section); 3876 symbol_get_tc (sym)->subseg = ppc_data_subsegment; 3877 ++ppc_data_subsegment; 3878 list_ptr = &ppc_data_csects; 3879 break; 3880 default: 3881 abort (); 3882 } 3883 3884 /* We set the obstack chunk size to a small value before 3885 changing subsegments, so that we don't use a lot of memory 3886 space for what may be a small section. */ 3887 hold_chunksize = chunksize; 3888 chunksize = 64; 3889 3890 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), 3891 symbol_get_tc (sym)->subseg); 3892 3893 chunksize = hold_chunksize; 3894 3895 if (after_toc) 3896 ppc_after_toc_frag = frag_now; 3897 3898 record_alignment (sec, align); 3899 if (is_code) 3900 frag_align_code (align, 0); 3901 else 3902 frag_align (align, 0, 0); 3903 3904 symbol_set_frag (sym, frag_now); 3905 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 3906 3907 symbol_get_tc (sym)->align = align; 3908 symbol_get_tc (sym)->output = 1; 3909 symbol_get_tc (sym)->within = sym; 3910 3911 for (list = *list_ptr; 3912 symbol_get_tc (list)->next != (symbolS *) NULL; 3913 list = symbol_get_tc (list)->next) 3914 ; 3915 symbol_get_tc (list)->next = sym; 3916 3917 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 3918 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 3919 &symbol_lastP); 3920 } 3921 3922 ppc_current_csect = sym; 3923} 3924 3925static void 3926ppc_change_debug_section (unsigned int idx, subsegT subseg) 3927{ 3928 segT sec; 3929 flagword oldflags; 3930 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; 3931 3932 sec = subseg_new (dw->name, subseg); 3933 oldflags = bfd_get_section_flags (stdoutput, sec); 3934 if (oldflags == SEC_NO_FLAGS) 3935 { 3936 /* Just created section. */ 3937 gas_assert (dw_sections[idx].sect == NULL); 3938 3939 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING); 3940 bfd_set_section_alignment (stdoutput, sec, 0); 3941 dw_sections[idx].sect = sec; 3942 } 3943 3944 /* Not anymore in a csect. */ 3945 ppc_current_csect = NULL; 3946} 3947 3948/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: 3949 .dwsect flag [, opt-label ] 3950*/ 3951 3952static void 3953ppc_dwsect (int ignore ATTRIBUTE_UNUSED) 3954{ 3955 offsetT flag; 3956 symbolS *opt_label; 3957 const struct xcoff_dwsect_name *dw; 3958 struct dw_subsection *subseg; 3959 struct dw_section *dws; 3960 int i; 3961 3962 /* Find section. */ 3963 flag = get_absolute_expression (); 3964 dw = NULL; 3965 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 3966 if (xcoff_dwsect_names[i].flag == flag) 3967 { 3968 dw = &xcoff_dwsect_names[i]; 3969 break; 3970 } 3971 3972 /* Parse opt-label. */ 3973 if (*input_line_pointer == ',') 3974 { 3975 char *label; 3976 char c; 3977 3978 ++input_line_pointer; 3979 3980 c = get_symbol_name (&label); 3981 opt_label = symbol_find_or_make (label); 3982 (void) restore_line_pointer (c); 3983 } 3984 else 3985 opt_label = NULL; 3986 3987 demand_empty_rest_of_line (); 3988 3989 /* Return now in case of unknown subsection. */ 3990 if (dw == NULL) 3991 { 3992 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), 3993 (unsigned)flag); 3994 return; 3995 } 3996 3997 /* Find the subsection. */ 3998 dws = &dw_sections[i]; 3999 subseg = NULL; 4000 if (opt_label != NULL && S_IS_DEFINED (opt_label)) 4001 { 4002 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ 4003 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) 4004 { 4005 as_bad (_("label %s was not defined in this dwarf section"), 4006 S_GET_NAME (opt_label)); 4007 subseg = dws->anon_subseg; 4008 opt_label = NULL; 4009 } 4010 else 4011 subseg = symbol_get_tc (opt_label)->u.dw; 4012 } 4013 4014 if (subseg != NULL) 4015 { 4016 /* Switch to the subsection. */ 4017 ppc_change_debug_section (i, subseg->subseg); 4018 } 4019 else 4020 { 4021 /* Create a new dw subsection. */ 4022 subseg = XNEW (struct dw_subsection); 4023 4024 if (opt_label == NULL) 4025 { 4026 /* The anonymous one. */ 4027 subseg->subseg = 0; 4028 subseg->link = NULL; 4029 dws->anon_subseg = subseg; 4030 } 4031 else 4032 { 4033 /* A named one. */ 4034 if (dws->list_subseg != NULL) 4035 subseg->subseg = dws->list_subseg->subseg + 1; 4036 else 4037 subseg->subseg = 1; 4038 4039 subseg->link = dws->list_subseg; 4040 dws->list_subseg = subseg; 4041 symbol_get_tc (opt_label)->u.dw = subseg; 4042 } 4043 4044 ppc_change_debug_section (i, subseg->subseg); 4045 4046 if (dw->def_size) 4047 { 4048 /* Add the length field. */ 4049 expressionS *exp = &subseg->end_exp; 4050 int sz; 4051 4052 if (opt_label != NULL) 4053 symbol_set_value_now (opt_label); 4054 4055 /* Add the length field. Note that according to the AIX assembler 4056 manual, the size of the length field is 4 for powerpc32 but 4057 12 for powerpc64. */ 4058 if (ppc_obj64) 4059 { 4060 /* Write the 64bit marker. */ 4061 md_number_to_chars (frag_more (4), -1, 4); 4062 } 4063 4064 exp->X_op = O_subtract; 4065 exp->X_op_symbol = symbol_temp_new_now (); 4066 exp->X_add_symbol = symbol_temp_make (); 4067 4068 sz = ppc_obj64 ? 8 : 4; 4069 exp->X_add_number = -sz; 4070 emit_expr (exp, sz); 4071 } 4072 } 4073} 4074 4075/* This function handles the .text and .data pseudo-ops. These 4076 pseudo-ops aren't really used by XCOFF; we implement them for the 4077 convenience of people who aren't used to XCOFF. */ 4078 4079static void 4080ppc_section (int type) 4081{ 4082 const char *name; 4083 symbolS *sym; 4084 4085 if (type == 't') 4086 name = ".text[PR]"; 4087 else if (type == 'd') 4088 name = ".data[RW]"; 4089 else 4090 abort (); 4091 4092 sym = symbol_find_or_make (name); 4093 4094 ppc_change_csect (sym, 2); 4095 4096 demand_empty_rest_of_line (); 4097} 4098 4099/* This function handles the .section pseudo-op. This is mostly to 4100 give an error, since XCOFF only supports .text, .data and .bss, but 4101 we do permit the user to name the text or data section. */ 4102 4103static void 4104ppc_named_section (int ignore ATTRIBUTE_UNUSED) 4105{ 4106 char *user_name; 4107 const char *real_name; 4108 char c; 4109 symbolS *sym; 4110 4111 c = get_symbol_name (&user_name); 4112 4113 if (strcmp (user_name, ".text") == 0) 4114 real_name = ".text[PR]"; 4115 else if (strcmp (user_name, ".data") == 0) 4116 real_name = ".data[RW]"; 4117 else 4118 { 4119 as_bad (_("the XCOFF file format does not support arbitrary sections")); 4120 (void) restore_line_pointer (c); 4121 ignore_rest_of_line (); 4122 return; 4123 } 4124 4125 (void) restore_line_pointer (c); 4126 4127 sym = symbol_find_or_make (real_name); 4128 4129 ppc_change_csect (sym, 2); 4130 4131 demand_empty_rest_of_line (); 4132} 4133 4134/* The .extern pseudo-op. We create an undefined symbol. */ 4135 4136static void 4137ppc_extern (int ignore ATTRIBUTE_UNUSED) 4138{ 4139 char *name; 4140 char endc; 4141 4142 endc = get_symbol_name (&name); 4143 4144 (void) symbol_find_or_make (name); 4145 4146 (void) restore_line_pointer (endc); 4147 4148 demand_empty_rest_of_line (); 4149} 4150 4151/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ 4152 4153static void 4154ppc_lglobl (int ignore ATTRIBUTE_UNUSED) 4155{ 4156 char *name; 4157 char endc; 4158 symbolS *sym; 4159 4160 endc = get_symbol_name (&name); 4161 4162 sym = symbol_find_or_make (name); 4163 4164 (void) restore_line_pointer (endc); 4165 4166 symbol_get_tc (sym)->output = 1; 4167 4168 demand_empty_rest_of_line (); 4169} 4170 4171/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF 4172 relocations at the beginning of the current csect. 4173 4174 (In principle, there's no reason why the relocations _have_ to be at 4175 the beginning. Anywhere in the csect would do. However, inserting 4176 at the beginning is what the native assmebler does, and it helps to 4177 deal with cases where the .ref statements follow the section contents.) 4178 4179 ??? .refs don't work for empty .csects. However, the native assembler 4180 doesn't report an error in this case, and neither yet do we. */ 4181 4182static void 4183ppc_ref (int ignore ATTRIBUTE_UNUSED) 4184{ 4185 char *name; 4186 char c; 4187 4188 if (ppc_current_csect == NULL) 4189 { 4190 as_bad (_(".ref outside .csect")); 4191 ignore_rest_of_line (); 4192 return; 4193 } 4194 4195 do 4196 { 4197 c = get_symbol_name (&name); 4198 4199 fix_at_start (symbol_get_frag (ppc_current_csect), 0, 4200 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE); 4201 4202 *input_line_pointer = c; 4203 SKIP_WHITESPACE_AFTER_NAME (); 4204 c = *input_line_pointer; 4205 if (c == ',') 4206 { 4207 input_line_pointer++; 4208 SKIP_WHITESPACE (); 4209 if (is_end_of_line[(unsigned char) *input_line_pointer]) 4210 { 4211 as_bad (_("missing symbol name")); 4212 ignore_rest_of_line (); 4213 return; 4214 } 4215 } 4216 } 4217 while (c == ','); 4218 4219 demand_empty_rest_of_line (); 4220} 4221 4222/* The .rename pseudo-op. The RS/6000 assembler can rename symbols, 4223 although I don't know why it bothers. */ 4224 4225static void 4226ppc_rename (int ignore ATTRIBUTE_UNUSED) 4227{ 4228 char *name; 4229 char endc; 4230 symbolS *sym; 4231 int len; 4232 4233 endc = get_symbol_name (&name); 4234 4235 sym = symbol_find_or_make (name); 4236 4237 (void) restore_line_pointer (endc); 4238 4239 if (*input_line_pointer != ',') 4240 { 4241 as_bad (_("missing rename string")); 4242 ignore_rest_of_line (); 4243 return; 4244 } 4245 ++input_line_pointer; 4246 4247 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); 4248 4249 demand_empty_rest_of_line (); 4250} 4251 4252/* The .stabx pseudo-op. This is similar to a normal .stabs 4253 pseudo-op, but slightly different. A sample is 4254 .stabx "main:F-1",.main,142,0 4255 The first argument is the symbol name to create. The second is the 4256 value, and the third is the storage class. The fourth seems to be 4257 always zero, and I am assuming it is the type. */ 4258 4259static void 4260ppc_stabx (int ignore ATTRIBUTE_UNUSED) 4261{ 4262 char *name; 4263 int len; 4264 symbolS *sym; 4265 expressionS exp; 4266 4267 name = demand_copy_C_string (&len); 4268 4269 if (*input_line_pointer != ',') 4270 { 4271 as_bad (_("missing value")); 4272 return; 4273 } 4274 ++input_line_pointer; 4275 4276 ppc_stab_symbol = TRUE; 4277 sym = symbol_make (name); 4278 ppc_stab_symbol = FALSE; 4279 4280 symbol_get_tc (sym)->real_name = name; 4281 4282 (void) expression (&exp); 4283 4284 switch (exp.X_op) 4285 { 4286 case O_illegal: 4287 case O_absent: 4288 case O_big: 4289 as_bad (_("illegal .stabx expression; zero assumed")); 4290 exp.X_add_number = 0; 4291 /* Fall through. */ 4292 case O_constant: 4293 S_SET_VALUE (sym, (valueT) exp.X_add_number); 4294 symbol_set_frag (sym, &zero_address_frag); 4295 break; 4296 4297 case O_symbol: 4298 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) 4299 symbol_set_value_expression (sym, &exp); 4300 else 4301 { 4302 S_SET_VALUE (sym, 4303 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); 4304 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); 4305 } 4306 break; 4307 4308 default: 4309 /* The value is some complex expression. This will probably 4310 fail at some later point, but this is probably the right 4311 thing to do here. */ 4312 symbol_set_value_expression (sym, &exp); 4313 break; 4314 } 4315 4316 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4317 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4318 4319 if (*input_line_pointer != ',') 4320 { 4321 as_bad (_("missing class")); 4322 return; 4323 } 4324 ++input_line_pointer; 4325 4326 S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); 4327 4328 if (*input_line_pointer != ',') 4329 { 4330 as_bad (_("missing type")); 4331 return; 4332 } 4333 ++input_line_pointer; 4334 4335 S_SET_DATA_TYPE (sym, get_absolute_expression ()); 4336 4337 symbol_get_tc (sym)->output = 1; 4338 4339 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 4340 { 4341 /* In this case : 4342 4343 .bs name 4344 .stabx "z",arrays_,133,0 4345 .es 4346 4347 .comm arrays_,13768,3 4348 4349 resolve_symbol_value will copy the exp's "within" into sym's when the 4350 offset is 0. Since this seems to be corner case problem, 4351 only do the correction for storage class C_STSYM. A better solution 4352 would be to have the tc field updated in ppc_symbol_new_hook. */ 4353 4354 if (exp.X_op == O_symbol) 4355 { 4356 if (ppc_current_block == NULL) 4357 as_bad (_(".stabx of storage class stsym must be within .bs/.es")); 4358 4359 symbol_get_tc (sym)->within = ppc_current_block; 4360 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; 4361 } 4362 } 4363 4364 if (exp.X_op != O_symbol 4365 || ! S_IS_EXTERNAL (exp.X_add_symbol) 4366 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) 4367 ppc_frob_label (sym); 4368 else 4369 { 4370 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4371 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); 4372 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) 4373 symbol_get_tc (ppc_current_csect)->within = sym; 4374 } 4375 4376 demand_empty_rest_of_line (); 4377} 4378 4379/* The .function pseudo-op. This takes several arguments. The first 4380 argument seems to be the external name of the symbol. The second 4381 argument seems to be the label for the start of the function. gcc 4382 uses the same name for both. I have no idea what the third and 4383 fourth arguments are meant to be. The optional fifth argument is 4384 an expression for the size of the function. In COFF this symbol 4385 gets an aux entry like that used for a csect. */ 4386 4387static void 4388ppc_function (int ignore ATTRIBUTE_UNUSED) 4389{ 4390 char *name; 4391 char endc; 4392 char *s; 4393 symbolS *ext_sym; 4394 symbolS *lab_sym; 4395 4396 endc = get_symbol_name (&name); 4397 4398 /* Ignore any [PR] suffix. */ 4399 name = ppc_canonicalize_symbol_name (name); 4400 s = strchr (name, '['); 4401 if (s != (char *) NULL 4402 && strcmp (s + 1, "PR]") == 0) 4403 *s = '\0'; 4404 4405 ext_sym = symbol_find_or_make (name); 4406 4407 (void) restore_line_pointer (endc); 4408 4409 if (*input_line_pointer != ',') 4410 { 4411 as_bad (_("missing symbol name")); 4412 ignore_rest_of_line (); 4413 return; 4414 } 4415 ++input_line_pointer; 4416 4417 endc = get_symbol_name (&name); 4418 4419 lab_sym = symbol_find_or_make (name); 4420 4421 (void) restore_line_pointer (endc); 4422 4423 if (ext_sym != lab_sym) 4424 { 4425 expressionS exp; 4426 4427 exp.X_op = O_symbol; 4428 exp.X_add_symbol = lab_sym; 4429 exp.X_op_symbol = NULL; 4430 exp.X_add_number = 0; 4431 exp.X_unsigned = 0; 4432 symbol_set_value_expression (ext_sym, &exp); 4433 } 4434 4435 if (symbol_get_tc (ext_sym)->symbol_class == -1) 4436 symbol_get_tc (ext_sym)->symbol_class = XMC_PR; 4437 symbol_get_tc (ext_sym)->output = 1; 4438 4439 if (*input_line_pointer == ',') 4440 { 4441 expressionS exp; 4442 4443 /* Ignore the third argument. */ 4444 ++input_line_pointer; 4445 expression (& exp); 4446 if (*input_line_pointer == ',') 4447 { 4448 /* Ignore the fourth argument. */ 4449 ++input_line_pointer; 4450 expression (& exp); 4451 if (*input_line_pointer == ',') 4452 { 4453 /* The fifth argument is the function size. */ 4454 ++input_line_pointer; 4455 symbol_get_tc (ext_sym)->u.size = symbol_new 4456 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag); 4457 pseudo_set (symbol_get_tc (ext_sym)->u.size); 4458 } 4459 } 4460 } 4461 4462 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 4463 SF_SET_FUNCTION (ext_sym); 4464 SF_SET_PROCESS (ext_sym); 4465 coff_add_linesym (ext_sym); 4466 4467 demand_empty_rest_of_line (); 4468} 4469 4470/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named 4471 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym 4472 with the correct line number */ 4473 4474static symbolS *saved_bi_sym = 0; 4475 4476static void 4477ppc_bf (int ignore ATTRIBUTE_UNUSED) 4478{ 4479 symbolS *sym; 4480 4481 sym = symbol_make (".bf"); 4482 S_SET_SEGMENT (sym, text_section); 4483 symbol_set_frag (sym, frag_now); 4484 S_SET_VALUE (sym, frag_now_fix ()); 4485 S_SET_STORAGE_CLASS (sym, C_FCN); 4486 4487 coff_line_base = get_absolute_expression (); 4488 4489 S_SET_NUMBER_AUXILIARY (sym, 1); 4490 SA_SET_SYM_LNNO (sym, coff_line_base); 4491 4492 /* Line number for bi. */ 4493 if (saved_bi_sym) 4494 { 4495 S_SET_VALUE (saved_bi_sym, coff_n_line_nos); 4496 saved_bi_sym = 0; 4497 } 4498 4499 4500 symbol_get_tc (sym)->output = 1; 4501 4502 ppc_frob_label (sym); 4503 4504 demand_empty_rest_of_line (); 4505} 4506 4507/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named 4508 ".ef", except that the line number is absolute, not relative to the 4509 most recent ".bf" symbol. */ 4510 4511static void 4512ppc_ef (int ignore ATTRIBUTE_UNUSED) 4513{ 4514 symbolS *sym; 4515 4516 sym = symbol_make (".ef"); 4517 S_SET_SEGMENT (sym, text_section); 4518 symbol_set_frag (sym, frag_now); 4519 S_SET_VALUE (sym, frag_now_fix ()); 4520 S_SET_STORAGE_CLASS (sym, C_FCN); 4521 S_SET_NUMBER_AUXILIARY (sym, 1); 4522 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4523 symbol_get_tc (sym)->output = 1; 4524 4525 ppc_frob_label (sym); 4526 4527 demand_empty_rest_of_line (); 4528} 4529 4530/* The .bi and .ei pseudo-ops. These take a string argument and 4531 generates a C_BINCL or C_EINCL symbol, which goes at the start of 4532 the symbol list. The value of .bi will be know when the next .bf 4533 is encountered. */ 4534 4535static void 4536ppc_biei (int ei) 4537{ 4538 static symbolS *last_biei; 4539 4540 char *name; 4541 int len; 4542 symbolS *sym; 4543 symbolS *look; 4544 4545 name = demand_copy_C_string (&len); 4546 4547 /* The value of these symbols is actually file offset. Here we set 4548 the value to the index into the line number entries. In 4549 ppc_frob_symbols we set the fix_line field, which will cause BFD 4550 to do the right thing. */ 4551 4552 sym = symbol_make (name); 4553 /* obj-coff.c currently only handles line numbers correctly in the 4554 .text section. */ 4555 S_SET_SEGMENT (sym, text_section); 4556 S_SET_VALUE (sym, coff_n_line_nos); 4557 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4558 4559 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); 4560 symbol_get_tc (sym)->output = 1; 4561 4562 /* Save bi. */ 4563 if (ei) 4564 saved_bi_sym = 0; 4565 else 4566 saved_bi_sym = sym; 4567 4568 for (look = last_biei ? last_biei : symbol_rootP; 4569 (look != (symbolS *) NULL 4570 && (S_GET_STORAGE_CLASS (look) == C_FILE 4571 || S_GET_STORAGE_CLASS (look) == C_BINCL 4572 || S_GET_STORAGE_CLASS (look) == C_EINCL)); 4573 look = symbol_next (look)) 4574 ; 4575 if (look != (symbolS *) NULL) 4576 { 4577 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4578 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); 4579 last_biei = sym; 4580 } 4581 4582 demand_empty_rest_of_line (); 4583} 4584 4585/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". 4586 There is one argument, which is a csect symbol. The value of the 4587 .bs symbol is the index of this csect symbol. */ 4588 4589static void 4590ppc_bs (int ignore ATTRIBUTE_UNUSED) 4591{ 4592 char *name; 4593 char endc; 4594 symbolS *csect; 4595 symbolS *sym; 4596 4597 if (ppc_current_block != NULL) 4598 as_bad (_("nested .bs blocks")); 4599 4600 endc = get_symbol_name (&name); 4601 4602 csect = symbol_find_or_make (name); 4603 4604 (void) restore_line_pointer (endc); 4605 4606 sym = symbol_make (".bs"); 4607 S_SET_SEGMENT (sym, now_seg); 4608 S_SET_STORAGE_CLASS (sym, C_BSTAT); 4609 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4610 symbol_get_tc (sym)->output = 1; 4611 4612 symbol_get_tc (sym)->within = csect; 4613 4614 ppc_frob_label (sym); 4615 4616 ppc_current_block = sym; 4617 4618 demand_empty_rest_of_line (); 4619} 4620 4621/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ 4622 4623static void 4624ppc_es (int ignore ATTRIBUTE_UNUSED) 4625{ 4626 symbolS *sym; 4627 4628 if (ppc_current_block == NULL) 4629 as_bad (_(".es without preceding .bs")); 4630 4631 sym = symbol_make (".es"); 4632 S_SET_SEGMENT (sym, now_seg); 4633 S_SET_STORAGE_CLASS (sym, C_ESTAT); 4634 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4635 symbol_get_tc (sym)->output = 1; 4636 4637 ppc_frob_label (sym); 4638 4639 ppc_current_block = NULL; 4640 4641 demand_empty_rest_of_line (); 4642} 4643 4644/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a 4645 line number. */ 4646 4647static void 4648ppc_bb (int ignore ATTRIBUTE_UNUSED) 4649{ 4650 symbolS *sym; 4651 4652 sym = symbol_make (".bb"); 4653 S_SET_SEGMENT (sym, text_section); 4654 symbol_set_frag (sym, frag_now); 4655 S_SET_VALUE (sym, frag_now_fix ()); 4656 S_SET_STORAGE_CLASS (sym, C_BLOCK); 4657 4658 S_SET_NUMBER_AUXILIARY (sym, 1); 4659 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4660 4661 symbol_get_tc (sym)->output = 1; 4662 4663 SF_SET_PROCESS (sym); 4664 4665 ppc_frob_label (sym); 4666 4667 demand_empty_rest_of_line (); 4668} 4669 4670/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a 4671 line number. */ 4672 4673static void 4674ppc_eb (int ignore ATTRIBUTE_UNUSED) 4675{ 4676 symbolS *sym; 4677 4678 sym = symbol_make (".eb"); 4679 S_SET_SEGMENT (sym, text_section); 4680 symbol_set_frag (sym, frag_now); 4681 S_SET_VALUE (sym, frag_now_fix ()); 4682 S_SET_STORAGE_CLASS (sym, C_BLOCK); 4683 S_SET_NUMBER_AUXILIARY (sym, 1); 4684 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4685 symbol_get_tc (sym)->output = 1; 4686 4687 SF_SET_PROCESS (sym); 4688 4689 ppc_frob_label (sym); 4690 4691 demand_empty_rest_of_line (); 4692} 4693 4694/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a 4695 specified name. */ 4696 4697static void 4698ppc_bc (int ignore ATTRIBUTE_UNUSED) 4699{ 4700 char *name; 4701 int len; 4702 symbolS *sym; 4703 4704 name = demand_copy_C_string (&len); 4705 sym = symbol_make (name); 4706 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4707 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4708 S_SET_STORAGE_CLASS (sym, C_BCOMM); 4709 S_SET_VALUE (sym, 0); 4710 symbol_get_tc (sym)->output = 1; 4711 4712 ppc_frob_label (sym); 4713 4714 demand_empty_rest_of_line (); 4715} 4716 4717/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ 4718 4719static void 4720ppc_ec (int ignore ATTRIBUTE_UNUSED) 4721{ 4722 symbolS *sym; 4723 4724 sym = symbol_make (".ec"); 4725 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4726 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4727 S_SET_STORAGE_CLASS (sym, C_ECOMM); 4728 S_SET_VALUE (sym, 0); 4729 symbol_get_tc (sym)->output = 1; 4730 4731 ppc_frob_label (sym); 4732 4733 demand_empty_rest_of_line (); 4734} 4735 4736/* The .toc pseudo-op. Switch to the .toc subsegment. */ 4737 4738static void 4739ppc_toc (int ignore ATTRIBUTE_UNUSED) 4740{ 4741 if (ppc_toc_csect != (symbolS *) NULL) 4742 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); 4743 else 4744 { 4745 subsegT subseg; 4746 symbolS *sym; 4747 symbolS *list; 4748 4749 subseg = ppc_data_subsegment; 4750 ++ppc_data_subsegment; 4751 4752 subseg_new (segment_name (data_section), subseg); 4753 ppc_toc_frag = frag_now; 4754 4755 sym = symbol_find_or_make ("TOC[TC0]"); 4756 symbol_set_frag (sym, frag_now); 4757 S_SET_SEGMENT (sym, data_section); 4758 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4759 symbol_get_tc (sym)->subseg = subseg; 4760 symbol_get_tc (sym)->output = 1; 4761 symbol_get_tc (sym)->within = sym; 4762 4763 ppc_toc_csect = sym; 4764 4765 for (list = ppc_data_csects; 4766 symbol_get_tc (list)->next != (symbolS *) NULL; 4767 list = symbol_get_tc (list)->next) 4768 ; 4769 symbol_get_tc (list)->next = sym; 4770 4771 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4772 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 4773 &symbol_lastP); 4774 } 4775 4776 ppc_current_csect = ppc_toc_csect; 4777 4778 demand_empty_rest_of_line (); 4779} 4780 4781/* The AIX assembler automatically aligns the operands of a .long or 4782 .short pseudo-op, and we want to be compatible. */ 4783 4784static void 4785ppc_xcoff_cons (int log_size) 4786{ 4787 frag_align (log_size, 0, 0); 4788 record_alignment (now_seg, log_size); 4789 cons (1 << log_size); 4790} 4791 4792static void 4793ppc_vbyte (int dummy ATTRIBUTE_UNUSED) 4794{ 4795 expressionS exp; 4796 int byte_count; 4797 4798 (void) expression (&exp); 4799 4800 if (exp.X_op != O_constant) 4801 { 4802 as_bad (_("non-constant byte count")); 4803 return; 4804 } 4805 4806 byte_count = exp.X_add_number; 4807 4808 if (*input_line_pointer != ',') 4809 { 4810 as_bad (_("missing value")); 4811 return; 4812 } 4813 4814 ++input_line_pointer; 4815 cons (byte_count); 4816} 4817 4818void 4819ppc_xcoff_end (void) 4820{ 4821 int i; 4822 4823 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 4824 { 4825 struct dw_section *dws = &dw_sections[i]; 4826 struct dw_subsection *dwss; 4827 4828 if (dws->anon_subseg) 4829 { 4830 dwss = dws->anon_subseg; 4831 dwss->link = dws->list_subseg; 4832 } 4833 else 4834 dwss = dws->list_subseg; 4835 4836 for (; dwss != NULL; dwss = dwss->link) 4837 if (dwss->end_exp.X_add_symbol != NULL) 4838 { 4839 subseg_set (dws->sect, dwss->subseg); 4840 symbol_set_value_now (dwss->end_exp.X_add_symbol); 4841 } 4842 } 4843} 4844 4845#endif /* OBJ_XCOFF */ 4846#if defined (OBJ_XCOFF) || defined (OBJ_ELF) 4847 4848/* The .tc pseudo-op. This is used when generating either XCOFF or 4849 ELF. This takes two or more arguments. 4850 4851 When generating XCOFF output, the first argument is the name to 4852 give to this location in the toc; this will be a symbol with class 4853 TC. The rest of the arguments are N-byte values to actually put at 4854 this location in the TOC; often there is just one more argument, a 4855 relocatable symbol reference. The size of the value to store 4856 depends on target word size. A 32-bit target uses 4-byte values, a 4857 64-bit target uses 8-byte values. 4858 4859 When not generating XCOFF output, the arguments are the same, but 4860 the first argument is simply ignored. */ 4861 4862static void 4863ppc_tc (int ignore ATTRIBUTE_UNUSED) 4864{ 4865#ifdef OBJ_XCOFF 4866 4867 /* Define the TOC symbol name. */ 4868 { 4869 char *name; 4870 char endc; 4871 symbolS *sym; 4872 4873 if (ppc_toc_csect == (symbolS *) NULL 4874 || ppc_toc_csect != ppc_current_csect) 4875 { 4876 as_bad (_(".tc not in .toc section")); 4877 ignore_rest_of_line (); 4878 return; 4879 } 4880 4881 endc = get_symbol_name (&name); 4882 4883 sym = symbol_find_or_make (name); 4884 4885 (void) restore_line_pointer (endc); 4886 4887 if (S_IS_DEFINED (sym)) 4888 { 4889 symbolS *label; 4890 4891 label = symbol_get_tc (ppc_current_csect)->within; 4892 if (symbol_get_tc (label)->symbol_class != XMC_TC0) 4893 { 4894 as_bad (_(".tc with no label")); 4895 ignore_rest_of_line (); 4896 return; 4897 } 4898 4899 S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); 4900 symbol_set_frag (label, symbol_get_frag (sym)); 4901 S_SET_VALUE (label, S_GET_VALUE (sym)); 4902 4903 while (! is_end_of_line[(unsigned char) *input_line_pointer]) 4904 ++input_line_pointer; 4905 4906 return; 4907 } 4908 4909 S_SET_SEGMENT (sym, now_seg); 4910 symbol_set_frag (sym, frag_now); 4911 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4912 symbol_get_tc (sym)->symbol_class = XMC_TC; 4913 symbol_get_tc (sym)->output = 1; 4914 4915 ppc_frob_label (sym); 4916 } 4917 4918#endif /* OBJ_XCOFF */ 4919#ifdef OBJ_ELF 4920 int align; 4921 4922 /* Skip the TOC symbol name. */ 4923 while (is_part_of_name (*input_line_pointer) 4924 || *input_line_pointer == ' ' 4925 || *input_line_pointer == '[' 4926 || *input_line_pointer == ']' 4927 || *input_line_pointer == '{' 4928 || *input_line_pointer == '}') 4929 ++input_line_pointer; 4930 4931 /* Align to a four/eight byte boundary. */ 4932 align = ppc_obj64 ? 3 : 2; 4933 frag_align (align, 0, 0); 4934 record_alignment (now_seg, align); 4935#endif /* OBJ_ELF */ 4936 4937 if (*input_line_pointer != ',') 4938 demand_empty_rest_of_line (); 4939 else 4940 { 4941 ++input_line_pointer; 4942 cons (ppc_obj64 ? 8 : 4); 4943 } 4944} 4945 4946/* Pseudo-op .machine. */ 4947 4948static void 4949ppc_machine (int ignore ATTRIBUTE_UNUSED) 4950{ 4951 char c; 4952 char *cpu_string; 4953#define MAX_HISTORY 100 4954 static ppc_cpu_t *cpu_history; 4955 static int curr_hist; 4956 4957 SKIP_WHITESPACE (); 4958 4959 c = get_symbol_name (&cpu_string); 4960 cpu_string = xstrdup (cpu_string); 4961 (void) restore_line_pointer (c); 4962 4963 if (cpu_string != NULL) 4964 { 4965 ppc_cpu_t old_cpu = ppc_cpu; 4966 ppc_cpu_t new_cpu; 4967 char *p; 4968 4969 for (p = cpu_string; *p != 0; p++) 4970 *p = TOLOWER (*p); 4971 4972 if (strcmp (cpu_string, "push") == 0) 4973 { 4974 if (cpu_history == NULL) 4975 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY); 4976 4977 if (curr_hist >= MAX_HISTORY) 4978 as_bad (_(".machine stack overflow")); 4979 else 4980 cpu_history[curr_hist++] = ppc_cpu; 4981 } 4982 else if (strcmp (cpu_string, "pop") == 0) 4983 { 4984 if (curr_hist <= 0) 4985 as_bad (_(".machine stack underflow")); 4986 else 4987 ppc_cpu = cpu_history[--curr_hist]; 4988 } 4989 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0) 4990 ppc_cpu = new_cpu; 4991 else 4992 as_bad (_("invalid machine `%s'"), cpu_string); 4993 4994 if (ppc_cpu != old_cpu) 4995 ppc_setup_opcodes (); 4996 } 4997 4998 demand_empty_rest_of_line (); 4999} 5000#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 5001 5002#ifdef TE_PE 5003 5004/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ 5005 5006/* Set the current section. */ 5007static void 5008ppc_set_current_section (segT new) 5009{ 5010 ppc_previous_section = ppc_current_section; 5011 ppc_current_section = new; 5012} 5013 5014/* pseudo-op: .previous 5015 behaviour: toggles the current section with the previous section. 5016 errors: None 5017 warnings: "No previous section" */ 5018 5019static void 5020ppc_previous (int ignore ATTRIBUTE_UNUSED) 5021{ 5022 if (ppc_previous_section == NULL) 5023 { 5024 as_warn (_("no previous section to return to, ignored.")); 5025 return; 5026 } 5027 5028 subseg_set (ppc_previous_section, 0); 5029 5030 ppc_set_current_section (ppc_previous_section); 5031} 5032 5033/* pseudo-op: .pdata 5034 behaviour: predefined read only data section 5035 double word aligned 5036 errors: None 5037 warnings: None 5038 initial: .section .pdata "adr3" 5039 a - don't know -- maybe a misprint 5040 d - initialized data 5041 r - readable 5042 3 - double word aligned (that would be 4 byte boundary) 5043 5044 commentary: 5045 Tag index tables (also known as the function table) for exception 5046 handling, debugging, etc. */ 5047 5048static void 5049ppc_pdata (int ignore ATTRIBUTE_UNUSED) 5050{ 5051 if (pdata_section == 0) 5052 { 5053 pdata_section = subseg_new (".pdata", 0); 5054 5055 bfd_set_section_flags (stdoutput, pdata_section, 5056 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5057 | SEC_READONLY | SEC_DATA )); 5058 5059 bfd_set_section_alignment (stdoutput, pdata_section, 2); 5060 } 5061 else 5062 { 5063 pdata_section = subseg_new (".pdata", 0); 5064 } 5065 ppc_set_current_section (pdata_section); 5066} 5067 5068/* pseudo-op: .ydata 5069 behaviour: predefined read only data section 5070 double word aligned 5071 errors: None 5072 warnings: None 5073 initial: .section .ydata "drw3" 5074 a - don't know -- maybe a misprint 5075 d - initialized data 5076 r - readable 5077 3 - double word aligned (that would be 4 byte boundary) 5078 commentary: 5079 Tag tables (also known as the scope table) for exception handling, 5080 debugging, etc. */ 5081 5082static void 5083ppc_ydata (int ignore ATTRIBUTE_UNUSED) 5084{ 5085 if (ydata_section == 0) 5086 { 5087 ydata_section = subseg_new (".ydata", 0); 5088 bfd_set_section_flags (stdoutput, ydata_section, 5089 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5090 | SEC_READONLY | SEC_DATA )); 5091 5092 bfd_set_section_alignment (stdoutput, ydata_section, 3); 5093 } 5094 else 5095 { 5096 ydata_section = subseg_new (".ydata", 0); 5097 } 5098 ppc_set_current_section (ydata_section); 5099} 5100 5101/* pseudo-op: .reldata 5102 behaviour: predefined read write data section 5103 double word aligned (4-byte) 5104 FIXME: relocation is applied to it 5105 FIXME: what's the difference between this and .data? 5106 errors: None 5107 warnings: None 5108 initial: .section .reldata "drw3" 5109 d - initialized data 5110 r - readable 5111 w - writeable 5112 3 - double word aligned (that would be 8 byte boundary) 5113 5114 commentary: 5115 Like .data, but intended to hold data subject to relocation, such as 5116 function descriptors, etc. */ 5117 5118static void 5119ppc_reldata (int ignore ATTRIBUTE_UNUSED) 5120{ 5121 if (reldata_section == 0) 5122 { 5123 reldata_section = subseg_new (".reldata", 0); 5124 5125 bfd_set_section_flags (stdoutput, reldata_section, 5126 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5127 | SEC_DATA)); 5128 5129 bfd_set_section_alignment (stdoutput, reldata_section, 2); 5130 } 5131 else 5132 { 5133 reldata_section = subseg_new (".reldata", 0); 5134 } 5135 ppc_set_current_section (reldata_section); 5136} 5137 5138/* pseudo-op: .rdata 5139 behaviour: predefined read only data section 5140 double word aligned 5141 errors: None 5142 warnings: None 5143 initial: .section .rdata "dr3" 5144 d - initialized data 5145 r - readable 5146 3 - double word aligned (that would be 4 byte boundary) */ 5147 5148static void 5149ppc_rdata (int ignore ATTRIBUTE_UNUSED) 5150{ 5151 if (rdata_section == 0) 5152 { 5153 rdata_section = subseg_new (".rdata", 0); 5154 bfd_set_section_flags (stdoutput, rdata_section, 5155 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5156 | SEC_READONLY | SEC_DATA )); 5157 5158 bfd_set_section_alignment (stdoutput, rdata_section, 2); 5159 } 5160 else 5161 { 5162 rdata_section = subseg_new (".rdata", 0); 5163 } 5164 ppc_set_current_section (rdata_section); 5165} 5166 5167/* pseudo-op: .ualong 5168 behaviour: much like .int, with the exception that no alignment is 5169 performed. 5170 FIXME: test the alignment statement 5171 errors: None 5172 warnings: None */ 5173 5174static void 5175ppc_ualong (int ignore ATTRIBUTE_UNUSED) 5176{ 5177 /* Try for long. */ 5178 cons (4); 5179} 5180 5181/* pseudo-op: .znop <symbol name> 5182 behaviour: Issue a nop instruction 5183 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using 5184 the supplied symbol name. 5185 errors: None 5186 warnings: Missing symbol name */ 5187 5188static void 5189ppc_znop (int ignore ATTRIBUTE_UNUSED) 5190{ 5191 unsigned long insn; 5192 const struct powerpc_opcode *opcode; 5193 char *f; 5194 symbolS *sym; 5195 char *symbol_name; 5196 char c; 5197 char *name; 5198 5199 /* Strip out the symbol name. */ 5200 c = get_symbol_name (&symbol_name); 5201 5202 name = xstrdup (symbol_name); 5203 5204 sym = symbol_find_or_make (name); 5205 5206 *input_line_pointer = c; 5207 5208 SKIP_WHITESPACE_AFTER_NAME (); 5209 5210 /* Look up the opcode in the hash table. */ 5211 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); 5212 5213 /* Stick in the nop. */ 5214 insn = opcode->opcode; 5215 5216 /* Write out the instruction. */ 5217 f = frag_more (4); 5218 md_number_to_chars (f, insn, 4); 5219 fix_new (frag_now, 5220 f - frag_now->fr_literal, 5221 4, 5222 sym, 5223 0, 5224 0, 5225 BFD_RELOC_16_GOT_PCREL); 5226 5227} 5228 5229/* pseudo-op: 5230 behaviour: 5231 errors: 5232 warnings: */ 5233 5234static void 5235ppc_pe_comm (int lcomm) 5236{ 5237 char *name; 5238 char c; 5239 char *p; 5240 offsetT temp; 5241 symbolS *symbolP; 5242 offsetT align; 5243 5244 c = get_symbol_name (&name); 5245 5246 /* just after name is now '\0'. */ 5247 p = input_line_pointer; 5248 *p = c; 5249 SKIP_WHITESPACE_AFTER_NAME (); 5250 if (*input_line_pointer != ',') 5251 { 5252 as_bad (_("expected comma after symbol-name: rest of line ignored.")); 5253 ignore_rest_of_line (); 5254 return; 5255 } 5256 5257 input_line_pointer++; /* skip ',' */ 5258 if ((temp = get_absolute_expression ()) < 0) 5259 { 5260 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); 5261 ignore_rest_of_line (); 5262 return; 5263 } 5264 5265 if (! lcomm) 5266 { 5267 /* The third argument to .comm is the alignment. */ 5268 if (*input_line_pointer != ',') 5269 align = 3; 5270 else 5271 { 5272 ++input_line_pointer; 5273 align = get_absolute_expression (); 5274 if (align <= 0) 5275 { 5276 as_warn (_("ignoring bad alignment")); 5277 align = 3; 5278 } 5279 } 5280 } 5281 5282 *p = 0; 5283 symbolP = symbol_find_or_make (name); 5284 5285 *p = c; 5286 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 5287 { 5288 as_bad (_("ignoring attempt to re-define symbol `%s'."), 5289 S_GET_NAME (symbolP)); 5290 ignore_rest_of_line (); 5291 return; 5292 } 5293 5294 if (S_GET_VALUE (symbolP)) 5295 { 5296 if (S_GET_VALUE (symbolP) != (valueT) temp) 5297 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."), 5298 S_GET_NAME (symbolP), 5299 (long) S_GET_VALUE (symbolP), 5300 (long) temp); 5301 } 5302 else 5303 { 5304 S_SET_VALUE (symbolP, (valueT) temp); 5305 S_SET_EXTERNAL (symbolP); 5306 S_SET_SEGMENT (symbolP, bfd_com_section_ptr); 5307 } 5308 5309 demand_empty_rest_of_line (); 5310} 5311 5312/* 5313 * implement the .section pseudo op: 5314 * .section name {, "flags"} 5315 * ^ ^ 5316 * | +--- optional flags: 'b' for bss 5317 * | 'i' for info 5318 * +-- section name 'l' for lib 5319 * 'n' for noload 5320 * 'o' for over 5321 * 'w' for data 5322 * 'd' (apparently m88k for data) 5323 * 'x' for text 5324 * But if the argument is not a quoted string, treat it as a 5325 * subsegment number. 5326 * 5327 * FIXME: this is a copy of the section processing from obj-coff.c, with 5328 * additions/changes for the moto-pas assembler support. There are three 5329 * categories: 5330 * 5331 * FIXME: I just noticed this. This doesn't work at all really. It it 5332 * setting bits that bfd probably neither understands or uses. The 5333 * correct approach (?) will have to incorporate extra fields attached 5334 * to the section to hold the system specific stuff. (krk) 5335 * 5336 * Section Contents: 5337 * 'a' - unknown - referred to in documentation, but no definition supplied 5338 * 'c' - section has code 5339 * 'd' - section has initialized data 5340 * 'u' - section has uninitialized data 5341 * 'i' - section contains directives (info) 5342 * 'n' - section can be discarded 5343 * 'R' - remove section at link time 5344 * 5345 * Section Protection: 5346 * 'r' - section is readable 5347 * 'w' - section is writeable 5348 * 'x' - section is executable 5349 * 's' - section is sharable 5350 * 5351 * Section Alignment: 5352 * '0' - align to byte boundary 5353 * '1' - align to halfword undary 5354 * '2' - align to word boundary 5355 * '3' - align to doubleword boundary 5356 * '4' - align to quadword boundary 5357 * '5' - align to 32 byte boundary 5358 * '6' - align to 64 byte boundary 5359 * 5360 */ 5361 5362void 5363ppc_pe_section (int ignore ATTRIBUTE_UNUSED) 5364{ 5365 /* Strip out the section name. */ 5366 char *section_name; 5367 char c; 5368 char *name; 5369 unsigned int exp; 5370 flagword flags; 5371 segT sec; 5372 int align; 5373 5374 c = get_symbol_name (§ion_name); 5375 5376 name = xstrdup (section_name); 5377 5378 *input_line_pointer = c; 5379 5380 SKIP_WHITESPACE_AFTER_NAME (); 5381 5382 exp = 0; 5383 flags = SEC_NO_FLAGS; 5384 5385 if (strcmp (name, ".idata$2") == 0) 5386 { 5387 align = 0; 5388 } 5389 else if (strcmp (name, ".idata$3") == 0) 5390 { 5391 align = 0; 5392 } 5393 else if (strcmp (name, ".idata$4") == 0) 5394 { 5395 align = 2; 5396 } 5397 else if (strcmp (name, ".idata$5") == 0) 5398 { 5399 align = 2; 5400 } 5401 else if (strcmp (name, ".idata$6") == 0) 5402 { 5403 align = 1; 5404 } 5405 else 5406 /* Default alignment to 16 byte boundary. */ 5407 align = 4; 5408 5409 if (*input_line_pointer == ',') 5410 { 5411 ++input_line_pointer; 5412 SKIP_WHITESPACE (); 5413 if (*input_line_pointer != '"') 5414 exp = get_absolute_expression (); 5415 else 5416 { 5417 ++input_line_pointer; 5418 while (*input_line_pointer != '"' 5419 && ! is_end_of_line[(unsigned char) *input_line_pointer]) 5420 { 5421 switch (*input_line_pointer) 5422 { 5423 /* Section Contents */ 5424 case 'a': /* unknown */ 5425 as_bad (_("unsupported section attribute -- 'a'")); 5426 break; 5427 case 'c': /* code section */ 5428 flags |= SEC_CODE; 5429 break; 5430 case 'd': /* section has initialized data */ 5431 flags |= SEC_DATA; 5432 break; 5433 case 'u': /* section has uninitialized data */ 5434 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA 5435 in winnt.h */ 5436 flags |= SEC_ROM; 5437 break; 5438 case 'i': /* section contains directives (info) */ 5439 /* FIXME: This is IMAGE_SCN_LNK_INFO 5440 in winnt.h */ 5441 flags |= SEC_HAS_CONTENTS; 5442 break; 5443 case 'n': /* section can be discarded */ 5444 flags &=~ SEC_LOAD; 5445 break; 5446 case 'R': /* Remove section at link time */ 5447 flags |= SEC_NEVER_LOAD; 5448 break; 5449#if IFLICT_BRAIN_DAMAGE 5450 /* Section Protection */ 5451 case 'r': /* section is readable */ 5452 flags |= IMAGE_SCN_MEM_READ; 5453 break; 5454 case 'w': /* section is writeable */ 5455 flags |= IMAGE_SCN_MEM_WRITE; 5456 break; 5457 case 'x': /* section is executable */ 5458 flags |= IMAGE_SCN_MEM_EXECUTE; 5459 break; 5460 case 's': /* section is sharable */ 5461 flags |= IMAGE_SCN_MEM_SHARED; 5462 break; 5463 5464 /* Section Alignment */ 5465 case '0': /* align to byte boundary */ 5466 flags |= IMAGE_SCN_ALIGN_1BYTES; 5467 align = 0; 5468 break; 5469 case '1': /* align to halfword boundary */ 5470 flags |= IMAGE_SCN_ALIGN_2BYTES; 5471 align = 1; 5472 break; 5473 case '2': /* align to word boundary */ 5474 flags |= IMAGE_SCN_ALIGN_4BYTES; 5475 align = 2; 5476 break; 5477 case '3': /* align to doubleword boundary */ 5478 flags |= IMAGE_SCN_ALIGN_8BYTES; 5479 align = 3; 5480 break; 5481 case '4': /* align to quadword boundary */ 5482 flags |= IMAGE_SCN_ALIGN_16BYTES; 5483 align = 4; 5484 break; 5485 case '5': /* align to 32 byte boundary */ 5486 flags |= IMAGE_SCN_ALIGN_32BYTES; 5487 align = 5; 5488 break; 5489 case '6': /* align to 64 byte boundary */ 5490 flags |= IMAGE_SCN_ALIGN_64BYTES; 5491 align = 6; 5492 break; 5493#endif 5494 default: 5495 as_bad (_("unknown section attribute '%c'"), 5496 *input_line_pointer); 5497 break; 5498 } 5499 ++input_line_pointer; 5500 } 5501 if (*input_line_pointer == '"') 5502 ++input_line_pointer; 5503 } 5504 } 5505 5506 sec = subseg_new (name, (subsegT) exp); 5507 5508 ppc_set_current_section (sec); 5509 5510 if (flags != SEC_NO_FLAGS) 5511 { 5512 if (! bfd_set_section_flags (stdoutput, sec, flags)) 5513 as_bad (_("error setting flags for \"%s\": %s"), 5514 bfd_section_name (stdoutput, sec), 5515 bfd_errmsg (bfd_get_error ())); 5516 } 5517 5518 bfd_set_section_alignment (stdoutput, sec, align); 5519} 5520 5521static void 5522ppc_pe_function (int ignore ATTRIBUTE_UNUSED) 5523{ 5524 char *name; 5525 char endc; 5526 symbolS *ext_sym; 5527 5528 endc = get_symbol_name (&name); 5529 5530 ext_sym = symbol_find_or_make (name); 5531 5532 (void) restore_line_pointer (endc); 5533 5534 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 5535 SF_SET_FUNCTION (ext_sym); 5536 SF_SET_PROCESS (ext_sym); 5537 coff_add_linesym (ext_sym); 5538 5539 demand_empty_rest_of_line (); 5540} 5541 5542static void 5543ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) 5544{ 5545 if (tocdata_section == 0) 5546 { 5547 tocdata_section = subseg_new (".tocd", 0); 5548 /* FIXME: section flags won't work. */ 5549 bfd_set_section_flags (stdoutput, tocdata_section, 5550 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5551 | SEC_READONLY | SEC_DATA)); 5552 5553 bfd_set_section_alignment (stdoutput, tocdata_section, 2); 5554 } 5555 else 5556 { 5557 rdata_section = subseg_new (".tocd", 0); 5558 } 5559 5560 ppc_set_current_section (tocdata_section); 5561 5562 demand_empty_rest_of_line (); 5563} 5564 5565/* Don't adjust TOC relocs to use the section symbol. */ 5566 5567int 5568ppc_pe_fix_adjustable (fixS *fix) 5569{ 5570 return fix->fx_r_type != BFD_RELOC_PPC_TOC16; 5571} 5572 5573#endif 5574 5575#ifdef OBJ_XCOFF 5576 5577/* XCOFF specific symbol and file handling. */ 5578 5579/* Canonicalize the symbol name. We use the to force the suffix, if 5580 any, to use square brackets, and to be in upper case. */ 5581 5582char * 5583ppc_canonicalize_symbol_name (char *name) 5584{ 5585 char *s; 5586 5587 if (ppc_stab_symbol) 5588 return name; 5589 5590 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) 5591 ; 5592 if (*s != '\0') 5593 { 5594 char brac; 5595 5596 if (*s == '[') 5597 brac = ']'; 5598 else 5599 { 5600 *s = '['; 5601 brac = '}'; 5602 } 5603 5604 for (s++; *s != '\0' && *s != brac; s++) 5605 *s = TOUPPER (*s); 5606 5607 if (*s == '\0' || s[1] != '\0') 5608 as_bad (_("bad symbol suffix")); 5609 5610 *s = ']'; 5611 } 5612 5613 return name; 5614} 5615 5616/* Set the class of a symbol based on the suffix, if any. This is 5617 called whenever a new symbol is created. */ 5618 5619void 5620ppc_symbol_new_hook (symbolS *sym) 5621{ 5622 struct ppc_tc_sy *tc; 5623 const char *s; 5624 5625 tc = symbol_get_tc (sym); 5626 tc->next = NULL; 5627 tc->output = 0; 5628 tc->symbol_class = -1; 5629 tc->real_name = NULL; 5630 tc->subseg = 0; 5631 tc->align = 0; 5632 tc->u.size = NULL; 5633 tc->u.dw = NULL; 5634 tc->within = NULL; 5635 5636 if (ppc_stab_symbol) 5637 return; 5638 5639 s = strchr (S_GET_NAME (sym), '['); 5640 if (s == (const char *) NULL) 5641 { 5642 /* There is no suffix. */ 5643 return; 5644 } 5645 5646 ++s; 5647 5648 switch (s[0]) 5649 { 5650 case 'B': 5651 if (strcmp (s, "BS]") == 0) 5652 tc->symbol_class = XMC_BS; 5653 break; 5654 case 'D': 5655 if (strcmp (s, "DB]") == 0) 5656 tc->symbol_class = XMC_DB; 5657 else if (strcmp (s, "DS]") == 0) 5658 tc->symbol_class = XMC_DS; 5659 break; 5660 case 'G': 5661 if (strcmp (s, "GL]") == 0) 5662 tc->symbol_class = XMC_GL; 5663 break; 5664 case 'P': 5665 if (strcmp (s, "PR]") == 0) 5666 tc->symbol_class = XMC_PR; 5667 break; 5668 case 'R': 5669 if (strcmp (s, "RO]") == 0) 5670 tc->symbol_class = XMC_RO; 5671 else if (strcmp (s, "RW]") == 0) 5672 tc->symbol_class = XMC_RW; 5673 break; 5674 case 'S': 5675 if (strcmp (s, "SV]") == 0) 5676 tc->symbol_class = XMC_SV; 5677 break; 5678 case 'T': 5679 if (strcmp (s, "TC]") == 0) 5680 tc->symbol_class = XMC_TC; 5681 else if (strcmp (s, "TI]") == 0) 5682 tc->symbol_class = XMC_TI; 5683 else if (strcmp (s, "TB]") == 0) 5684 tc->symbol_class = XMC_TB; 5685 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) 5686 tc->symbol_class = XMC_TC0; 5687 break; 5688 case 'U': 5689 if (strcmp (s, "UA]") == 0) 5690 tc->symbol_class = XMC_UA; 5691 else if (strcmp (s, "UC]") == 0) 5692 tc->symbol_class = XMC_UC; 5693 break; 5694 case 'X': 5695 if (strcmp (s, "XO]") == 0) 5696 tc->symbol_class = XMC_XO; 5697 break; 5698 } 5699 5700 if (tc->symbol_class == -1) 5701 as_bad (_("unrecognized symbol suffix")); 5702} 5703 5704/* Set the class of a label based on where it is defined. This 5705 handles symbols without suffixes. Also, move the symbol so that it 5706 follows the csect symbol. */ 5707 5708void 5709ppc_frob_label (symbolS *sym) 5710{ 5711 if (ppc_current_csect != (symbolS *) NULL) 5712 { 5713 if (symbol_get_tc (sym)->symbol_class == -1) 5714 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; 5715 5716 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5717 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, 5718 &symbol_rootP, &symbol_lastP); 5719 symbol_get_tc (ppc_current_csect)->within = sym; 5720 symbol_get_tc (sym)->within = ppc_current_csect; 5721 } 5722 5723#ifdef OBJ_ELF 5724 dwarf2_emit_label (sym); 5725#endif 5726} 5727 5728/* This variable is set by ppc_frob_symbol if any absolute symbols are 5729 seen. It tells ppc_adjust_symtab whether it needs to look through 5730 the symbols. */ 5731 5732static bfd_boolean ppc_saw_abs; 5733 5734/* Change the name of a symbol just before writing it out. Set the 5735 real name if the .rename pseudo-op was used. Otherwise, remove any 5736 class suffix. Return 1 if the symbol should not be included in the 5737 symbol table. */ 5738 5739int 5740ppc_frob_symbol (symbolS *sym) 5741{ 5742 static symbolS *ppc_last_function; 5743 static symbolS *set_end; 5744 5745 /* Discard symbols that should not be included in the output symbol 5746 table. */ 5747 if (! symbol_used_in_reloc_p (sym) 5748 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 5749 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 5750 && ! symbol_get_tc (sym)->output 5751 && S_GET_STORAGE_CLASS (sym) != C_FILE))) 5752 return 1; 5753 5754 /* This one will disappear anyway. Don't make a csect sym for it. */ 5755 if (sym == abs_section_sym) 5756 return 1; 5757 5758 if (symbol_get_tc (sym)->real_name != (char *) NULL) 5759 S_SET_NAME (sym, symbol_get_tc (sym)->real_name); 5760 else 5761 { 5762 const char *name; 5763 const char *s; 5764 5765 name = S_GET_NAME (sym); 5766 s = strchr (name, '['); 5767 if (s != (char *) NULL) 5768 { 5769 unsigned int len; 5770 char *snew; 5771 5772 len = s - name; 5773 snew = xstrndup (name, len); 5774 5775 S_SET_NAME (sym, snew); 5776 } 5777 } 5778 5779 if (set_end != (symbolS *) NULL) 5780 { 5781 SA_SET_SYM_ENDNDX (set_end, sym); 5782 set_end = NULL; 5783 } 5784 5785 if (SF_GET_FUNCTION (sym)) 5786 { 5787 if (ppc_last_function != (symbolS *) NULL) 5788 as_bad (_("two .function pseudo-ops with no intervening .ef")); 5789 ppc_last_function = sym; 5790 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) 5791 { 5792 resolve_symbol_value (symbol_get_tc (sym)->u.size); 5793 SA_SET_SYM_FSIZE (sym, 5794 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); 5795 } 5796 } 5797 else if (S_GET_STORAGE_CLASS (sym) == C_FCN 5798 && strcmp (S_GET_NAME (sym), ".ef") == 0) 5799 { 5800 if (ppc_last_function == (symbolS *) NULL) 5801 as_bad (_(".ef with no preceding .function")); 5802 else 5803 { 5804 set_end = ppc_last_function; 5805 ppc_last_function = NULL; 5806 5807 /* We don't have a C_EFCN symbol, but we need to force the 5808 COFF backend to believe that it has seen one. */ 5809 coff_last_function = NULL; 5810 } 5811 } 5812 5813 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 5814 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 5815 && S_GET_STORAGE_CLASS (sym) != C_FILE 5816 && S_GET_STORAGE_CLASS (sym) != C_FCN 5817 && S_GET_STORAGE_CLASS (sym) != C_BLOCK 5818 && S_GET_STORAGE_CLASS (sym) != C_BSTAT 5819 && S_GET_STORAGE_CLASS (sym) != C_ESTAT 5820 && S_GET_STORAGE_CLASS (sym) != C_BINCL 5821 && S_GET_STORAGE_CLASS (sym) != C_EINCL 5822 && S_GET_SEGMENT (sym) != ppc_coff_debug_section) 5823 S_SET_STORAGE_CLASS (sym, C_HIDEXT); 5824 5825 if (S_GET_STORAGE_CLASS (sym) == C_EXT 5826 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT 5827 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) 5828 { 5829 int i; 5830 union internal_auxent *a; 5831 5832 /* Create a csect aux. */ 5833 i = S_GET_NUMBER_AUXILIARY (sym); 5834 S_SET_NUMBER_AUXILIARY (sym, i + 1); 5835 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; 5836 if (symbol_get_tc (sym)->symbol_class == XMC_TC0) 5837 { 5838 /* This is the TOC table. */ 5839 know (strcmp (S_GET_NAME (sym), "TOC") == 0); 5840 a->x_csect.x_scnlen.l = 0; 5841 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 5842 } 5843 else if (symbol_get_tc (sym)->subseg != 0) 5844 { 5845 /* This is a csect symbol. x_scnlen is the size of the 5846 csect. */ 5847 if (symbol_get_tc (sym)->next == (symbolS *) NULL) 5848 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, 5849 S_GET_SEGMENT (sym)) 5850 - S_GET_VALUE (sym)); 5851 else 5852 { 5853 resolve_symbol_value (symbol_get_tc (sym)->next); 5854 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) 5855 - S_GET_VALUE (sym)); 5856 } 5857 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; 5858 } 5859 else if (S_GET_SEGMENT (sym) == bss_section) 5860 { 5861 /* This is a common symbol. */ 5862 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; 5863 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; 5864 if (S_IS_EXTERNAL (sym)) 5865 symbol_get_tc (sym)->symbol_class = XMC_RW; 5866 else 5867 symbol_get_tc (sym)->symbol_class = XMC_BS; 5868 } 5869 else if (S_GET_SEGMENT (sym) == absolute_section) 5870 { 5871 /* This is an absolute symbol. The csect will be created by 5872 ppc_adjust_symtab. */ 5873 ppc_saw_abs = TRUE; 5874 a->x_csect.x_smtyp = XTY_LD; 5875 if (symbol_get_tc (sym)->symbol_class == -1) 5876 symbol_get_tc (sym)->symbol_class = XMC_XO; 5877 } 5878 else if (! S_IS_DEFINED (sym)) 5879 { 5880 /* This is an external symbol. */ 5881 a->x_csect.x_scnlen.l = 0; 5882 a->x_csect.x_smtyp = XTY_ER; 5883 } 5884 else if (symbol_get_tc (sym)->symbol_class == XMC_TC) 5885 { 5886 symbolS *next; 5887 5888 /* This is a TOC definition. x_scnlen is the size of the 5889 TOC entry. */ 5890 next = symbol_next (sym); 5891 while (symbol_get_tc (next)->symbol_class == XMC_TC0) 5892 next = symbol_next (next); 5893 if (next == (symbolS *) NULL 5894 || symbol_get_tc (next)->symbol_class != XMC_TC) 5895 { 5896 if (ppc_after_toc_frag == (fragS *) NULL) 5897 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, 5898 data_section) 5899 - S_GET_VALUE (sym)); 5900 else 5901 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address 5902 - S_GET_VALUE (sym)); 5903 } 5904 else 5905 { 5906 resolve_symbol_value (next); 5907 a->x_csect.x_scnlen.l = (S_GET_VALUE (next) 5908 - S_GET_VALUE (sym)); 5909 } 5910 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 5911 } 5912 else 5913 { 5914 symbolS *csect; 5915 5916 /* This is a normal symbol definition. x_scnlen is the 5917 symbol index of the containing csect. */ 5918 if (S_GET_SEGMENT (sym) == text_section) 5919 csect = ppc_text_csects; 5920 else if (S_GET_SEGMENT (sym) == data_section) 5921 csect = ppc_data_csects; 5922 else 5923 abort (); 5924 5925 /* Skip the initial dummy symbol. */ 5926 csect = symbol_get_tc (csect)->next; 5927 5928 if (csect == (symbolS *) NULL) 5929 { 5930 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); 5931 a->x_csect.x_scnlen.l = 0; 5932 } 5933 else 5934 { 5935 while (symbol_get_tc (csect)->next != (symbolS *) NULL) 5936 { 5937 resolve_symbol_value (symbol_get_tc (csect)->next); 5938 if (S_GET_VALUE (symbol_get_tc (csect)->next) 5939 > S_GET_VALUE (sym)) 5940 break; 5941 csect = symbol_get_tc (csect)->next; 5942 } 5943 5944 a->x_csect.x_scnlen.p = 5945 coffsymbol (symbol_get_bfdsym (csect))->native; 5946 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = 5947 1; 5948 } 5949 a->x_csect.x_smtyp = XTY_LD; 5950 } 5951 5952 a->x_csect.x_parmhash = 0; 5953 a->x_csect.x_snhash = 0; 5954 if (symbol_get_tc (sym)->symbol_class == -1) 5955 a->x_csect.x_smclas = XMC_PR; 5956 else 5957 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; 5958 a->x_csect.x_stab = 0; 5959 a->x_csect.x_snstab = 0; 5960 5961 /* Don't let the COFF backend resort these symbols. */ 5962 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; 5963 } 5964 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) 5965 { 5966 /* We want the value to be the symbol index of the referenced 5967 csect symbol. BFD will do that for us if we set the right 5968 flags. */ 5969 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); 5970 combined_entry_type *c = coffsymbol (bsym)->native; 5971 5972 S_SET_VALUE (sym, (valueT) (size_t) c); 5973 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; 5974 } 5975 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 5976 { 5977 symbolS *block; 5978 valueT base; 5979 5980 block = symbol_get_tc (sym)->within; 5981 if (block) 5982 { 5983 /* The value is the offset from the enclosing csect. */ 5984 symbolS *csect; 5985 5986 csect = symbol_get_tc (block)->within; 5987 resolve_symbol_value (csect); 5988 base = S_GET_VALUE (csect); 5989 } 5990 else 5991 base = 0; 5992 5993 S_SET_VALUE (sym, S_GET_VALUE (sym) - base); 5994 } 5995 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL 5996 || S_GET_STORAGE_CLASS (sym) == C_EINCL) 5997 { 5998 /* We want the value to be a file offset into the line numbers. 5999 BFD will do that for us if we set the right flags. We have 6000 already set the value correctly. */ 6001 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; 6002 } 6003 6004 return 0; 6005} 6006 6007/* Adjust the symbol table. This creates csect symbols for all 6008 absolute symbols. */ 6009 6010void 6011ppc_adjust_symtab (void) 6012{ 6013 symbolS *sym; 6014 6015 if (! ppc_saw_abs) 6016 return; 6017 6018 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) 6019 { 6020 symbolS *csect; 6021 int i; 6022 union internal_auxent *a; 6023 6024 if (S_GET_SEGMENT (sym) != absolute_section) 6025 continue; 6026 6027 csect = symbol_create (".abs[XO]", absolute_section, 6028 S_GET_VALUE (sym), &zero_address_frag); 6029 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); 6030 S_SET_STORAGE_CLASS (csect, C_HIDEXT); 6031 i = S_GET_NUMBER_AUXILIARY (csect); 6032 S_SET_NUMBER_AUXILIARY (csect, i + 1); 6033 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; 6034 a->x_csect.x_scnlen.l = 0; 6035 a->x_csect.x_smtyp = XTY_SD; 6036 a->x_csect.x_parmhash = 0; 6037 a->x_csect.x_snhash = 0; 6038 a->x_csect.x_smclas = XMC_XO; 6039 a->x_csect.x_stab = 0; 6040 a->x_csect.x_snstab = 0; 6041 6042 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); 6043 6044 i = S_GET_NUMBER_AUXILIARY (sym); 6045 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; 6046 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; 6047 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; 6048 } 6049 6050 ppc_saw_abs = FALSE; 6051} 6052 6053/* Set the VMA for a section. This is called on all the sections in 6054 turn. */ 6055 6056void 6057ppc_frob_section (asection *sec) 6058{ 6059 static bfd_vma vma = 0; 6060 6061 /* Dwarf sections start at 0. */ 6062 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING) 6063 return; 6064 6065 vma = md_section_align (sec, vma); 6066 bfd_set_section_vma (stdoutput, sec, vma); 6067 vma += bfd_section_size (stdoutput, sec); 6068} 6069 6070#endif /* OBJ_XCOFF */ 6071 6072const char * 6073md_atof (int type, char *litp, int *sizep) 6074{ 6075 return ieee_md_atof (type, litp, sizep, target_big_endian); 6076} 6077 6078/* Write a value out to the object file, using the appropriate 6079 endianness. */ 6080 6081void 6082md_number_to_chars (char *buf, valueT val, int n) 6083{ 6084 if (target_big_endian) 6085 number_to_chars_bigendian (buf, val, n); 6086 else 6087 number_to_chars_littleendian (buf, val, n); 6088} 6089 6090/* Align a section (I don't know why this is machine dependent). */ 6091 6092valueT 6093md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) 6094{ 6095#ifdef OBJ_ELF 6096 return addr; 6097#else 6098 int align = bfd_get_section_alignment (stdoutput, seg); 6099 6100 return ((addr + (1 << align) - 1) & -(1 << align)); 6101#endif 6102} 6103 6104/* We don't have any form of relaxing. */ 6105 6106int 6107md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 6108 asection *seg ATTRIBUTE_UNUSED) 6109{ 6110 abort (); 6111 return 0; 6112} 6113 6114/* Convert a machine dependent frag. We never generate these. */ 6115 6116void 6117md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 6118 asection *sec ATTRIBUTE_UNUSED, 6119 fragS *fragp ATTRIBUTE_UNUSED) 6120{ 6121 abort (); 6122} 6123 6124/* We have no need to default values of symbols. */ 6125 6126symbolS * 6127md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 6128{ 6129 return 0; 6130} 6131 6132/* Functions concerning relocs. */ 6133 6134/* The location from which a PC relative jump should be calculated, 6135 given a PC relative reloc. */ 6136 6137long 6138md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) 6139{ 6140 return fixp->fx_frag->fr_address + fixp->fx_where; 6141} 6142 6143#ifdef OBJ_XCOFF 6144 6145/* This is called to see whether a fixup should be adjusted to use a 6146 section symbol. We take the opportunity to change a fixup against 6147 a symbol in the TOC subsegment into a reloc against the 6148 corresponding .tc symbol. */ 6149 6150int 6151ppc_fix_adjustable (fixS *fix) 6152{ 6153 valueT val = resolve_symbol_value (fix->fx_addsy); 6154 segT symseg = S_GET_SEGMENT (fix->fx_addsy); 6155 TC_SYMFIELD_TYPE *tc; 6156 6157 if (symseg == absolute_section) 6158 return 0; 6159 6160 /* Always adjust symbols in debugging sections. */ 6161 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING) 6162 return 1; 6163 6164 if (ppc_toc_csect != (symbolS *) NULL 6165 && fix->fx_addsy != ppc_toc_csect 6166 && symseg == data_section 6167 && val >= ppc_toc_frag->fr_address 6168 && (ppc_after_toc_frag == (fragS *) NULL 6169 || val < ppc_after_toc_frag->fr_address)) 6170 { 6171 symbolS *sy; 6172 6173 for (sy = symbol_next (ppc_toc_csect); 6174 sy != (symbolS *) NULL; 6175 sy = symbol_next (sy)) 6176 { 6177 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); 6178 6179 if (sy_tc->symbol_class == XMC_TC0) 6180 continue; 6181 if (sy_tc->symbol_class != XMC_TC) 6182 break; 6183 if (val == resolve_symbol_value (sy)) 6184 { 6185 fix->fx_addsy = sy; 6186 fix->fx_addnumber = val - ppc_toc_frag->fr_address; 6187 return 0; 6188 } 6189 } 6190 6191 as_bad_where (fix->fx_file, fix->fx_line, 6192 _("symbol in .toc does not match any .tc")); 6193 } 6194 6195 /* Possibly adjust the reloc to be against the csect. */ 6196 tc = symbol_get_tc (fix->fx_addsy); 6197 if (tc->subseg == 0 6198 && tc->symbol_class != XMC_TC0 6199 && tc->symbol_class != XMC_TC 6200 && symseg != bss_section 6201 /* Don't adjust if this is a reloc in the toc section. */ 6202 && (symseg != data_section 6203 || ppc_toc_csect == NULL 6204 || val < ppc_toc_frag->fr_address 6205 || (ppc_after_toc_frag != NULL 6206 && val >= ppc_after_toc_frag->fr_address))) 6207 { 6208 symbolS *csect = tc->within; 6209 6210 /* If the symbol was not declared by a label (eg: a section symbol), 6211 use the section instead of the csect. This doesn't happen in 6212 normal AIX assembly code. */ 6213 if (csect == NULL) 6214 csect = seg_info (symseg)->sym; 6215 6216 fix->fx_offset += val - symbol_get_frag (csect)->fr_address; 6217 fix->fx_addsy = csect; 6218 6219 return 0; 6220 } 6221 6222 /* Adjust a reloc against a .lcomm symbol to be against the base 6223 .lcomm. */ 6224 if (symseg == bss_section 6225 && ! S_IS_EXTERNAL (fix->fx_addsy)) 6226 { 6227 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; 6228 6229 fix->fx_offset += val - resolve_symbol_value (sy); 6230 fix->fx_addsy = sy; 6231 } 6232 6233 return 0; 6234} 6235 6236/* A reloc from one csect to another must be kept. The assembler 6237 will, of course, keep relocs between sections, and it will keep 6238 absolute relocs, but we need to force it to keep PC relative relocs 6239 between two csects in the same section. */ 6240 6241int 6242ppc_force_relocation (fixS *fix) 6243{ 6244 /* At this point fix->fx_addsy should already have been converted to 6245 a csect symbol. If the csect does not include the fragment, then 6246 we need to force the relocation. */ 6247 if (fix->fx_pcrel 6248 && fix->fx_addsy != NULL 6249 && symbol_get_tc (fix->fx_addsy)->subseg != 0 6250 && ((symbol_get_frag (fix->fx_addsy)->fr_address 6251 > fix->fx_frag->fr_address) 6252 || (symbol_get_tc (fix->fx_addsy)->next != NULL 6253 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address 6254 <= fix->fx_frag->fr_address)))) 6255 return 1; 6256 6257 return generic_force_reloc (fix); 6258} 6259 6260void 6261ppc_new_dot_label (symbolS *sym) 6262{ 6263 /* Anchor this label to the current csect for relocations. */ 6264 symbol_get_tc (sym)->within = ppc_current_csect; 6265} 6266 6267#endif /* OBJ_XCOFF */ 6268 6269#ifdef OBJ_ELF 6270/* If this function returns non-zero, it guarantees that a relocation 6271 will be emitted for a fixup. */ 6272 6273int 6274ppc_force_relocation (fixS *fix) 6275{ 6276 /* Branch prediction relocations must force a relocation, as must 6277 the vtable description relocs. */ 6278 switch (fix->fx_r_type) 6279 { 6280 case BFD_RELOC_PPC_B16_BRTAKEN: 6281 case BFD_RELOC_PPC_B16_BRNTAKEN: 6282 case BFD_RELOC_PPC_BA16_BRTAKEN: 6283 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6284 case BFD_RELOC_24_PLT_PCREL: 6285 case BFD_RELOC_PPC64_TOC: 6286 return 1; 6287 case BFD_RELOC_PPC_B26: 6288 case BFD_RELOC_PPC_BA26: 6289 case BFD_RELOC_PPC_B16: 6290 case BFD_RELOC_PPC_BA16: 6291 /* All branch fixups targeting a localentry symbol must 6292 force a relocation. */ 6293 if (fix->fx_addsy) 6294 { 6295 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 6296 elf_symbol_type *elfsym 6297 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 6298 gas_assert (elfsym); 6299 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 6300 return 1; 6301 } 6302 break; 6303 default: 6304 break; 6305 } 6306 6307 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS 6308 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) 6309 return 1; 6310 6311 return generic_force_reloc (fix); 6312} 6313 6314int 6315ppc_fix_adjustable (fixS *fix) 6316{ 6317 switch (fix->fx_r_type) 6318 { 6319 /* All branch fixups targeting a localentry symbol must 6320 continue using the symbol. */ 6321 case BFD_RELOC_PPC_B26: 6322 case BFD_RELOC_PPC_BA26: 6323 case BFD_RELOC_PPC_B16: 6324 case BFD_RELOC_PPC_BA16: 6325 case BFD_RELOC_PPC_B16_BRTAKEN: 6326 case BFD_RELOC_PPC_B16_BRNTAKEN: 6327 case BFD_RELOC_PPC_BA16_BRTAKEN: 6328 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6329 if (fix->fx_addsy) 6330 { 6331 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 6332 elf_symbol_type *elfsym 6333 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 6334 gas_assert (elfsym); 6335 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 6336 return 0; 6337 } 6338 break; 6339 default: 6340 break; 6341 } 6342 6343 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF 6344 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF 6345 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF 6346 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 6347 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS 6348 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS 6349 && fix->fx_r_type != BFD_RELOC_GPREL16 6350 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT 6351 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY 6352 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS 6353 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); 6354} 6355#endif 6356 6357void 6358ppc_frag_check (struct frag *fragP) 6359{ 6360 if (!fragP->has_code) 6361 return; 6362 6363 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 6364 { 6365 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0) 6366 as_bad (_("instruction address is not a multiple of 2")); 6367 } 6368 else 6369 { 6370 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0) 6371 as_bad (_("instruction address is not a multiple of 4")); 6372 } 6373} 6374 6375/* Implement HANDLE_ALIGN. This writes the NOP pattern into an 6376 rs_align_code frag. */ 6377 6378void 6379ppc_handle_align (struct frag *fragP) 6380{ 6381 valueT count = (fragP->fr_next->fr_address 6382 - (fragP->fr_address + fragP->fr_fix)); 6383 6384 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && count != 0 && (count & 1) == 0) 6385 { 6386 char *dest = fragP->fr_literal + fragP->fr_fix; 6387 6388 fragP->fr_var = 2; 6389 md_number_to_chars (dest, 0x4400, 2); 6390 } 6391 else if (count != 0 && (count & 3) == 0) 6392 { 6393 char *dest = fragP->fr_literal + fragP->fr_fix; 6394 6395 fragP->fr_var = 4; 6396 6397 if (count > 4 * nop_limit && count < 0x2000000) 6398 { 6399 struct frag *rest; 6400 6401 /* Make a branch, then follow with nops. Insert another 6402 frag to handle the nops. */ 6403 md_number_to_chars (dest, 0x48000000 + count, 4); 6404 count -= 4; 6405 if (count == 0) 6406 return; 6407 6408 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); 6409 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); 6410 fragP->fr_next = rest; 6411 fragP = rest; 6412 rest->fr_address += rest->fr_fix + 4; 6413 rest->fr_fix = 0; 6414 /* If we leave the next frag as rs_align_code we'll come here 6415 again, resulting in a bunch of branches rather than a 6416 branch followed by nops. */ 6417 rest->fr_type = rs_align; 6418 dest = rest->fr_literal; 6419 } 6420 6421 md_number_to_chars (dest, 0x60000000, 4); 6422 6423 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0 6424 || (ppc_cpu & PPC_OPCODE_POWER7) != 0 6425 || (ppc_cpu & PPC_OPCODE_POWER8) != 0 6426 || (ppc_cpu & PPC_OPCODE_POWER9) != 0) 6427 { 6428 /* For power6, power7, power8 and power9, we want the last nop to be 6429 a group terminating one. Do this by inserting an rs_fill frag 6430 immediately after this one, with its address set to the last nop 6431 location. This will automatically reduce the number of nops in 6432 the current frag by one. */ 6433 if (count > 4) 6434 { 6435 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); 6436 6437 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); 6438 group_nop->fr_address = group_nop->fr_next->fr_address - 4; 6439 group_nop->fr_fix = 0; 6440 group_nop->fr_offset = 1; 6441 group_nop->fr_type = rs_fill; 6442 fragP->fr_next = group_nop; 6443 dest = group_nop->fr_literal; 6444 } 6445 6446 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0 6447 || (ppc_cpu & PPC_OPCODE_POWER8) != 0 6448 || (ppc_cpu & PPC_OPCODE_POWER9) != 0) 6449 { 6450 if (ppc_cpu & PPC_OPCODE_E500MC) 6451 /* e500mc group terminating nop: "ori 0,0,0". */ 6452 md_number_to_chars (dest, 0x60000000, 4); 6453 else 6454 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */ 6455 md_number_to_chars (dest, 0x60420000, 4); 6456 } 6457 else 6458 /* power6 group terminating nop: "ori 1,1,0". */ 6459 md_number_to_chars (dest, 0x60210000, 4); 6460 } 6461 } 6462} 6463 6464/* Apply a fixup to the object code. This is called for all the 6465 fixups we generated by the calls to fix_new_exp, above. */ 6466 6467void 6468md_apply_fix (fixS *fixP, valueT *valP, segT seg) 6469{ 6470 valueT value = * valP; 6471 offsetT fieldval; 6472 const struct powerpc_operand *operand; 6473 6474#ifdef OBJ_ELF 6475 if (fixP->fx_addsy != NULL) 6476 { 6477 /* Hack around bfd_install_relocation brain damage. */ 6478 if (fixP->fx_pcrel) 6479 value += fixP->fx_frag->fr_address + fixP->fx_where; 6480 6481 if (fixP->fx_addsy == abs_section_sym) 6482 fixP->fx_done = 1; 6483 } 6484 else 6485 fixP->fx_done = 1; 6486#else 6487 /* FIXME FIXME FIXME: The value we are passed in *valP includes 6488 the symbol values. If we are doing this relocation the code in 6489 write.c is going to call bfd_install_relocation, which is also 6490 going to use the symbol value. That means that if the reloc is 6491 fully resolved we want to use *valP since bfd_install_relocation is 6492 not being used. 6493 However, if the reloc is not fully resolved we do not want to 6494 use *valP, and must use fx_offset instead. If the relocation 6495 is PC-relative, we then need to re-apply md_pcrel_from_section 6496 to this new relocation value. */ 6497 if (fixP->fx_addsy == (symbolS *) NULL) 6498 fixP->fx_done = 1; 6499 6500 else 6501 { 6502 value = fixP->fx_offset; 6503 if (fixP->fx_pcrel) 6504 value -= md_pcrel_from_section (fixP, seg); 6505 } 6506#endif 6507 6508 /* We are only able to convert some relocs to pc-relative. */ 6509 if (fixP->fx_pcrel) 6510 { 6511 switch (fixP->fx_r_type) 6512 { 6513 case BFD_RELOC_LO16: 6514 fixP->fx_r_type = BFD_RELOC_LO16_PCREL; 6515 break; 6516 6517 case BFD_RELOC_HI16: 6518 fixP->fx_r_type = BFD_RELOC_HI16_PCREL; 6519 break; 6520 6521 case BFD_RELOC_HI16_S: 6522 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; 6523 break; 6524 6525 case BFD_RELOC_64: 6526 fixP->fx_r_type = BFD_RELOC_64_PCREL; 6527 break; 6528 6529 case BFD_RELOC_32: 6530 fixP->fx_r_type = BFD_RELOC_32_PCREL; 6531 break; 6532 6533 case BFD_RELOC_16: 6534 fixP->fx_r_type = BFD_RELOC_16_PCREL; 6535 break; 6536 6537 case BFD_RELOC_PPC_16DX_HA: 6538 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA; 6539 break; 6540 6541 default: 6542 break; 6543 } 6544 } 6545 else if (!fixP->fx_done 6546 && fixP->fx_r_type == BFD_RELOC_PPC_16DX_HA) 6547 { 6548 /* addpcis is relative to next insn address. */ 6549 value -= 4; 6550 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA; 6551 fixP->fx_pcrel = 1; 6552 } 6553 6554 operand = NULL; 6555 if (fixP->fx_pcrel_adjust != 0) 6556 { 6557 /* This is a fixup on an instruction. */ 6558 int opindex = fixP->fx_pcrel_adjust & 0xff; 6559 6560 operand = &powerpc_operands[opindex]; 6561#ifdef OBJ_XCOFF 6562 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol 6563 does not generate a reloc. It uses the offset of `sym' within its 6564 csect. Other usages, such as `.long sym', generate relocs. This 6565 is the documented behaviour of non-TOC symbols. */ 6566 if ((operand->flags & PPC_OPERAND_PARENS) != 0 6567 && (operand->bitm & 0xfff0) == 0xfff0 6568 && operand->shift == 0 6569 && (operand->insert == NULL || ppc_obj64) 6570 && fixP->fx_addsy != NULL 6571 && symbol_get_tc (fixP->fx_addsy)->subseg != 0 6572 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC 6573 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0 6574 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) 6575 { 6576 value = fixP->fx_offset; 6577 fixP->fx_done = 1; 6578 } 6579 6580 /* During parsing of instructions, a TOC16 reloc is generated for 6581 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined 6582 in the toc. But at parse time, SYM may be not yet defined, so 6583 check again here. */ 6584 if (fixP->fx_r_type == BFD_RELOC_16 6585 && fixP->fx_addsy != NULL 6586 && ppc_is_toc_sym (fixP->fx_addsy)) 6587 fixP->fx_r_type = BFD_RELOC_PPC_TOC16; 6588#endif 6589 } 6590 6591 /* Calculate value to be stored in field. */ 6592 fieldval = value; 6593 switch (fixP->fx_r_type) 6594 { 6595#ifdef OBJ_ELF 6596 case BFD_RELOC_PPC64_ADDR16_LO_DS: 6597 case BFD_RELOC_PPC_VLE_LO16A: 6598 case BFD_RELOC_PPC_VLE_LO16D: 6599#endif 6600 case BFD_RELOC_LO16: 6601 case BFD_RELOC_LO16_PCREL: 6602 fieldval = value & 0xffff; 6603 sign_extend_16: 6604 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 6605 fieldval = SEX16 (fieldval); 6606 fixP->fx_no_overflow = 1; 6607 break; 6608 6609 case BFD_RELOC_HI16: 6610 case BFD_RELOC_HI16_PCREL: 6611#ifdef OBJ_ELF 6612 if (REPORT_OVERFLOW_HI && ppc_obj64) 6613 { 6614 fieldval = value >> 16; 6615 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 6616 { 6617 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 6618 fieldval = ((valueT) fieldval ^ sign) - sign; 6619 } 6620 break; 6621 } 6622 /* Fallthru */ 6623 6624 case BFD_RELOC_PPC_VLE_HI16A: 6625 case BFD_RELOC_PPC_VLE_HI16D: 6626 case BFD_RELOC_PPC64_ADDR16_HIGH: 6627#endif 6628 fieldval = PPC_HI (value); 6629 goto sign_extend_16; 6630 6631 case BFD_RELOC_HI16_S: 6632 case BFD_RELOC_HI16_S_PCREL: 6633 case BFD_RELOC_PPC_16DX_HA: 6634 case BFD_RELOC_PPC_REL16DX_HA: 6635#ifdef OBJ_ELF 6636 if (REPORT_OVERFLOW_HI && ppc_obj64) 6637 { 6638 fieldval = (value + 0x8000) >> 16; 6639 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 6640 { 6641 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 6642 fieldval = ((valueT) fieldval ^ sign) - sign; 6643 } 6644 break; 6645 } 6646 /* Fallthru */ 6647 6648 case BFD_RELOC_PPC_VLE_HA16A: 6649 case BFD_RELOC_PPC_VLE_HA16D: 6650 case BFD_RELOC_PPC64_ADDR16_HIGHA: 6651#endif 6652 fieldval = PPC_HA (value); 6653 goto sign_extend_16; 6654 6655#ifdef OBJ_ELF 6656 case BFD_RELOC_PPC64_HIGHER: 6657 fieldval = PPC_HIGHER (value); 6658 goto sign_extend_16; 6659 6660 case BFD_RELOC_PPC64_HIGHER_S: 6661 fieldval = PPC_HIGHERA (value); 6662 goto sign_extend_16; 6663 6664 case BFD_RELOC_PPC64_HIGHEST: 6665 fieldval = PPC_HIGHEST (value); 6666 goto sign_extend_16; 6667 6668 case BFD_RELOC_PPC64_HIGHEST_S: 6669 fieldval = PPC_HIGHESTA (value); 6670 goto sign_extend_16; 6671#endif 6672 6673 default: 6674 break; 6675 } 6676 6677 if (operand != NULL) 6678 { 6679 /* Handle relocs in an insn. */ 6680 switch (fixP->fx_r_type) 6681 { 6682#ifdef OBJ_ELF 6683 /* The following relocs can't be calculated by the assembler. 6684 Leave the field zero. */ 6685 case BFD_RELOC_PPC_TPREL16: 6686 case BFD_RELOC_PPC_TPREL16_LO: 6687 case BFD_RELOC_PPC_TPREL16_HI: 6688 case BFD_RELOC_PPC_TPREL16_HA: 6689 case BFD_RELOC_PPC_DTPREL16: 6690 case BFD_RELOC_PPC_DTPREL16_LO: 6691 case BFD_RELOC_PPC_DTPREL16_HI: 6692 case BFD_RELOC_PPC_DTPREL16_HA: 6693 case BFD_RELOC_PPC_GOT_TLSGD16: 6694 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 6695 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 6696 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 6697 case BFD_RELOC_PPC_GOT_TLSLD16: 6698 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 6699 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 6700 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 6701 case BFD_RELOC_PPC_GOT_TPREL16: 6702 case BFD_RELOC_PPC_GOT_TPREL16_LO: 6703 case BFD_RELOC_PPC_GOT_TPREL16_HI: 6704 case BFD_RELOC_PPC_GOT_TPREL16_HA: 6705 case BFD_RELOC_PPC_GOT_DTPREL16: 6706 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 6707 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 6708 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 6709 case BFD_RELOC_PPC64_TPREL16_DS: 6710 case BFD_RELOC_PPC64_TPREL16_LO_DS: 6711 case BFD_RELOC_PPC64_TPREL16_HIGH: 6712 case BFD_RELOC_PPC64_TPREL16_HIGHA: 6713 case BFD_RELOC_PPC64_TPREL16_HIGHER: 6714 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 6715 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 6716 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 6717 case BFD_RELOC_PPC64_DTPREL16_HIGH: 6718 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 6719 case BFD_RELOC_PPC64_DTPREL16_DS: 6720 case BFD_RELOC_PPC64_DTPREL16_LO_DS: 6721 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 6722 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 6723 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 6724 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 6725 gas_assert (fixP->fx_addsy != NULL); 6726 S_SET_THREAD_LOCAL (fixP->fx_addsy); 6727 fieldval = 0; 6728 break; 6729 6730 /* These also should leave the field zero for the same 6731 reason. Note that older versions of gas wrote values 6732 here. If we want to go back to the old behaviour, then 6733 all _LO and _LO_DS cases will need to be treated like 6734 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */ 6735 case BFD_RELOC_16_GOTOFF: 6736 case BFD_RELOC_LO16_GOTOFF: 6737 case BFD_RELOC_HI16_GOTOFF: 6738 case BFD_RELOC_HI16_S_GOTOFF: 6739 case BFD_RELOC_LO16_PLTOFF: 6740 case BFD_RELOC_HI16_PLTOFF: 6741 case BFD_RELOC_HI16_S_PLTOFF: 6742 case BFD_RELOC_GPREL16: 6743 case BFD_RELOC_16_BASEREL: 6744 case BFD_RELOC_LO16_BASEREL: 6745 case BFD_RELOC_HI16_BASEREL: 6746 case BFD_RELOC_HI16_S_BASEREL: 6747 case BFD_RELOC_PPC_TOC16: 6748 case BFD_RELOC_PPC64_TOC16_LO: 6749 case BFD_RELOC_PPC64_TOC16_HI: 6750 case BFD_RELOC_PPC64_TOC16_HA: 6751 case BFD_RELOC_PPC64_PLTGOT16: 6752 case BFD_RELOC_PPC64_PLTGOT16_LO: 6753 case BFD_RELOC_PPC64_PLTGOT16_HI: 6754 case BFD_RELOC_PPC64_PLTGOT16_HA: 6755 case BFD_RELOC_PPC64_GOT16_DS: 6756 case BFD_RELOC_PPC64_GOT16_LO_DS: 6757 case BFD_RELOC_PPC64_PLT16_LO_DS: 6758 case BFD_RELOC_PPC64_SECTOFF_DS: 6759 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 6760 case BFD_RELOC_PPC64_TOC16_DS: 6761 case BFD_RELOC_PPC64_TOC16_LO_DS: 6762 case BFD_RELOC_PPC64_PLTGOT16_DS: 6763 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 6764 case BFD_RELOC_PPC_EMB_NADDR16: 6765 case BFD_RELOC_PPC_EMB_NADDR16_LO: 6766 case BFD_RELOC_PPC_EMB_NADDR16_HI: 6767 case BFD_RELOC_PPC_EMB_NADDR16_HA: 6768 case BFD_RELOC_PPC_EMB_SDAI16: 6769 case BFD_RELOC_PPC_EMB_SDA2I16: 6770 case BFD_RELOC_PPC_EMB_SDA2REL: 6771 case BFD_RELOC_PPC_EMB_SDA21: 6772 case BFD_RELOC_PPC_EMB_MRKREF: 6773 case BFD_RELOC_PPC_EMB_RELSEC16: 6774 case BFD_RELOC_PPC_EMB_RELST_LO: 6775 case BFD_RELOC_PPC_EMB_RELST_HI: 6776 case BFD_RELOC_PPC_EMB_RELST_HA: 6777 case BFD_RELOC_PPC_EMB_BIT_FLD: 6778 case BFD_RELOC_PPC_EMB_RELSDA: 6779 case BFD_RELOC_PPC_VLE_SDA21: 6780 case BFD_RELOC_PPC_VLE_SDA21_LO: 6781 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 6782 case BFD_RELOC_PPC_VLE_SDAREL_LO16D: 6783 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 6784 case BFD_RELOC_PPC_VLE_SDAREL_HI16D: 6785 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 6786 case BFD_RELOC_PPC_VLE_SDAREL_HA16D: 6787 gas_assert (fixP->fx_addsy != NULL); 6788 /* Fallthru */ 6789 6790 case BFD_RELOC_PPC_TLS: 6791 case BFD_RELOC_PPC_TLSGD: 6792 case BFD_RELOC_PPC_TLSLD: 6793 fieldval = 0; 6794 break; 6795#endif 6796 6797#ifdef OBJ_XCOFF 6798 case BFD_RELOC_PPC_B16: 6799 /* Adjust the offset to the instruction boundary. */ 6800 fieldval += 2; 6801 break; 6802#endif 6803 6804 case BFD_RELOC_VTABLE_INHERIT: 6805 case BFD_RELOC_VTABLE_ENTRY: 6806 case BFD_RELOC_PPC_DTPMOD: 6807 case BFD_RELOC_PPC_TPREL: 6808 case BFD_RELOC_PPC_DTPREL: 6809 case BFD_RELOC_PPC_COPY: 6810 case BFD_RELOC_PPC_GLOB_DAT: 6811 case BFD_RELOC_32_PLT_PCREL: 6812 case BFD_RELOC_PPC_EMB_NADDR32: 6813 case BFD_RELOC_PPC64_TOC: 6814 case BFD_RELOC_CTOR: 6815 case BFD_RELOC_32: 6816 case BFD_RELOC_32_PCREL: 6817 case BFD_RELOC_RVA: 6818 case BFD_RELOC_64: 6819 case BFD_RELOC_64_PCREL: 6820 case BFD_RELOC_PPC64_ADDR64_LOCAL: 6821 as_bad_where (fixP->fx_file, fixP->fx_line, 6822 _("%s unsupported as instruction fixup"), 6823 bfd_get_reloc_code_name (fixP->fx_r_type)); 6824 fixP->fx_done = 1; 6825 return; 6826 6827 default: 6828 break; 6829 } 6830 6831#ifdef OBJ_ELF 6832/* powerpc uses RELA style relocs, so if emitting a reloc the field 6833 contents can stay at zero. */ 6834#define APPLY_RELOC fixP->fx_done 6835#else 6836#define APPLY_RELOC 1 6837#endif 6838 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL) 6839 { 6840 unsigned long insn; 6841 unsigned char *where; 6842 6843 /* Fetch the instruction, insert the fully resolved operand 6844 value, and stuff the instruction back again. */ 6845 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; 6846 if (target_big_endian) 6847 { 6848 if (fixP->fx_size == 4) 6849 insn = bfd_getb32 (where); 6850 else 6851 insn = bfd_getb16 (where); 6852 } 6853 else 6854 { 6855 if (fixP->fx_size == 4) 6856 insn = bfd_getl32 (where); 6857 else 6858 insn = bfd_getl16 (where); 6859 } 6860 insn = ppc_insert_operand (insn, operand, fieldval, 6861 fixP->tc_fix_data.ppc_cpu, 6862 fixP->fx_file, fixP->fx_line); 6863 if (target_big_endian) 6864 { 6865 if (fixP->fx_size == 4) 6866 bfd_putb32 (insn, where); 6867 else 6868 bfd_putb16 (insn, where); 6869 } 6870 else 6871 { 6872 if (fixP->fx_size == 4) 6873 bfd_putl32 (insn, where); 6874 else 6875 bfd_putl16 (insn, where); 6876 } 6877 } 6878 6879 if (fixP->fx_done) 6880 /* Nothing else to do here. */ 6881 return; 6882 6883 gas_assert (fixP->fx_addsy != NULL); 6884 if (fixP->fx_r_type == BFD_RELOC_NONE) 6885 { 6886 const char *sfile; 6887 unsigned int sline; 6888 6889 /* Use expr_symbol_where to see if this is an expression 6890 symbol. */ 6891 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) 6892 as_bad_where (fixP->fx_file, fixP->fx_line, 6893 _("unresolved expression that must be resolved")); 6894 else 6895 as_bad_where (fixP->fx_file, fixP->fx_line, 6896 _("unsupported relocation against %s"), 6897 S_GET_NAME (fixP->fx_addsy)); 6898 fixP->fx_done = 1; 6899 return; 6900 } 6901 } 6902 else 6903 { 6904 /* Handle relocs in data. */ 6905 switch (fixP->fx_r_type) 6906 { 6907 case BFD_RELOC_VTABLE_INHERIT: 6908 if (fixP->fx_addsy 6909 && !S_IS_DEFINED (fixP->fx_addsy) 6910 && !S_IS_WEAK (fixP->fx_addsy)) 6911 S_SET_WEAK (fixP->fx_addsy); 6912 /* Fallthru */ 6913 6914 case BFD_RELOC_VTABLE_ENTRY: 6915 fixP->fx_done = 0; 6916 break; 6917 6918#ifdef OBJ_ELF 6919 /* These can appear with @l etc. in data. */ 6920 case BFD_RELOC_LO16: 6921 case BFD_RELOC_LO16_PCREL: 6922 case BFD_RELOC_HI16: 6923 case BFD_RELOC_HI16_PCREL: 6924 case BFD_RELOC_HI16_S: 6925 case BFD_RELOC_HI16_S_PCREL: 6926 case BFD_RELOC_PPC64_HIGHER: 6927 case BFD_RELOC_PPC64_HIGHER_S: 6928 case BFD_RELOC_PPC64_HIGHEST: 6929 case BFD_RELOC_PPC64_HIGHEST_S: 6930 case BFD_RELOC_PPC64_ADDR16_HIGH: 6931 case BFD_RELOC_PPC64_ADDR16_HIGHA: 6932 case BFD_RELOC_PPC64_ADDR64_LOCAL: 6933 break; 6934 6935 case BFD_RELOC_PPC_DTPMOD: 6936 case BFD_RELOC_PPC_TPREL: 6937 case BFD_RELOC_PPC_DTPREL: 6938 S_SET_THREAD_LOCAL (fixP->fx_addsy); 6939 break; 6940 6941 /* Just punt all of these to the linker. */ 6942 case BFD_RELOC_PPC_B16_BRTAKEN: 6943 case BFD_RELOC_PPC_B16_BRNTAKEN: 6944 case BFD_RELOC_16_GOTOFF: 6945 case BFD_RELOC_LO16_GOTOFF: 6946 case BFD_RELOC_HI16_GOTOFF: 6947 case BFD_RELOC_HI16_S_GOTOFF: 6948 case BFD_RELOC_LO16_PLTOFF: 6949 case BFD_RELOC_HI16_PLTOFF: 6950 case BFD_RELOC_HI16_S_PLTOFF: 6951 case BFD_RELOC_PPC_COPY: 6952 case BFD_RELOC_PPC_GLOB_DAT: 6953 case BFD_RELOC_16_BASEREL: 6954 case BFD_RELOC_LO16_BASEREL: 6955 case BFD_RELOC_HI16_BASEREL: 6956 case BFD_RELOC_HI16_S_BASEREL: 6957 case BFD_RELOC_PPC_TLS: 6958 case BFD_RELOC_PPC_DTPREL16_LO: 6959 case BFD_RELOC_PPC_DTPREL16_HI: 6960 case BFD_RELOC_PPC_DTPREL16_HA: 6961 case BFD_RELOC_PPC_TPREL16_LO: 6962 case BFD_RELOC_PPC_TPREL16_HI: 6963 case BFD_RELOC_PPC_TPREL16_HA: 6964 case BFD_RELOC_PPC_GOT_TLSGD16: 6965 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 6966 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 6967 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 6968 case BFD_RELOC_PPC_GOT_TLSLD16: 6969 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 6970 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 6971 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 6972 case BFD_RELOC_PPC_GOT_DTPREL16: 6973 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 6974 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 6975 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 6976 case BFD_RELOC_PPC_GOT_TPREL16: 6977 case BFD_RELOC_PPC_GOT_TPREL16_LO: 6978 case BFD_RELOC_PPC_GOT_TPREL16_HI: 6979 case BFD_RELOC_PPC_GOT_TPREL16_HA: 6980 case BFD_RELOC_24_PLT_PCREL: 6981 case BFD_RELOC_PPC_LOCAL24PC: 6982 case BFD_RELOC_32_PLT_PCREL: 6983 case BFD_RELOC_GPREL16: 6984 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 6985 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 6986 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 6987 case BFD_RELOC_PPC_EMB_NADDR32: 6988 case BFD_RELOC_PPC_EMB_NADDR16: 6989 case BFD_RELOC_PPC_EMB_NADDR16_LO: 6990 case BFD_RELOC_PPC_EMB_NADDR16_HI: 6991 case BFD_RELOC_PPC_EMB_NADDR16_HA: 6992 case BFD_RELOC_PPC_EMB_SDAI16: 6993 case BFD_RELOC_PPC_EMB_SDA2REL: 6994 case BFD_RELOC_PPC_EMB_SDA2I16: 6995 case BFD_RELOC_PPC_EMB_SDA21: 6996 case BFD_RELOC_PPC_VLE_SDA21_LO: 6997 case BFD_RELOC_PPC_EMB_MRKREF: 6998 case BFD_RELOC_PPC_EMB_RELSEC16: 6999 case BFD_RELOC_PPC_EMB_RELST_LO: 7000 case BFD_RELOC_PPC_EMB_RELST_HI: 7001 case BFD_RELOC_PPC_EMB_RELST_HA: 7002 case BFD_RELOC_PPC_EMB_BIT_FLD: 7003 case BFD_RELOC_PPC_EMB_RELSDA: 7004 case BFD_RELOC_PPC64_TOC: 7005 case BFD_RELOC_PPC_TOC16: 7006 case BFD_RELOC_PPC64_TOC16_LO: 7007 case BFD_RELOC_PPC64_TOC16_HI: 7008 case BFD_RELOC_PPC64_TOC16_HA: 7009 case BFD_RELOC_PPC64_DTPREL16_HIGH: 7010 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 7011 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 7012 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 7013 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 7014 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 7015 case BFD_RELOC_PPC64_TPREL16_HIGH: 7016 case BFD_RELOC_PPC64_TPREL16_HIGHA: 7017 case BFD_RELOC_PPC64_TPREL16_HIGHER: 7018 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 7019 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 7020 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 7021 fixP->fx_done = 0; 7022 break; 7023#endif 7024 7025#ifdef OBJ_XCOFF 7026 case BFD_RELOC_NONE: 7027#endif 7028 case BFD_RELOC_CTOR: 7029 case BFD_RELOC_32: 7030 case BFD_RELOC_32_PCREL: 7031 case BFD_RELOC_RVA: 7032 case BFD_RELOC_64: 7033 case BFD_RELOC_64_PCREL: 7034 case BFD_RELOC_16: 7035 case BFD_RELOC_16_PCREL: 7036 case BFD_RELOC_8: 7037 break; 7038 7039 default: 7040 fprintf (stderr, 7041 _("Gas failure, reloc value %d\n"), fixP->fx_r_type); 7042 fflush (stderr); 7043 abort (); 7044 } 7045 7046 if (fixP->fx_size && APPLY_RELOC) 7047 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 7048 fieldval, fixP->fx_size); 7049 if (warn_476 7050 && (seg->flags & SEC_CODE) != 0 7051 && fixP->fx_size == 4 7052 && fixP->fx_done 7053 && !fixP->fx_tcbit 7054 && (fixP->fx_r_type == BFD_RELOC_32 7055 || fixP->fx_r_type == BFD_RELOC_CTOR 7056 || fixP->fx_r_type == BFD_RELOC_32_PCREL)) 7057 as_warn_where (fixP->fx_file, fixP->fx_line, 7058 _("data in executable section")); 7059 } 7060 7061#ifdef OBJ_ELF 7062 ppc_elf_validate_fix (fixP, seg); 7063 fixP->fx_addnumber = value; 7064 7065 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately 7066 from the section contents. If we are going to be emitting a reloc 7067 then the section contents are immaterial, so don't warn if they 7068 happen to overflow. Leave such warnings to ld. */ 7069 if (!fixP->fx_done) 7070 { 7071 fixP->fx_no_overflow = 1; 7072 7073 /* Arrange to emit .TOC. as a normal symbol if used in anything 7074 but .TOC.@tocbase. */ 7075 if (ppc_obj64 7076 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC 7077 && fixP->fx_addsy != NULL 7078 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0) 7079 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP; 7080 } 7081#else 7082 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) 7083 fixP->fx_addnumber = 0; 7084 else 7085 { 7086#ifdef TE_PE 7087 fixP->fx_addnumber = 0; 7088#else 7089 /* We want to use the offset within the toc, not the actual VMA 7090 of the symbol. */ 7091 fixP->fx_addnumber = 7092 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) 7093 - S_GET_VALUE (ppc_toc_csect); 7094 /* Set *valP to avoid errors. */ 7095 *valP = value; 7096#endif 7097 } 7098#endif 7099} 7100 7101/* Generate a reloc for a fixup. */ 7102 7103arelent * 7104tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 7105{ 7106 arelent *reloc; 7107 7108 reloc = XNEW (arelent); 7109 7110 reloc->sym_ptr_ptr = XNEW (asymbol *); 7111 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 7112 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 7113 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 7114 if (reloc->howto == (reloc_howto_type *) NULL) 7115 { 7116 as_bad_where (fixp->fx_file, fixp->fx_line, 7117 _("reloc %d not supported by object file format"), 7118 (int) fixp->fx_r_type); 7119 return NULL; 7120 } 7121 reloc->addend = fixp->fx_addnumber; 7122 7123 return reloc; 7124} 7125 7126void 7127ppc_cfi_frame_initial_instructions (void) 7128{ 7129 cfi_add_CFA_def_cfa (1, 0); 7130} 7131 7132int 7133tc_ppc_regname_to_dw2regnum (char *regname) 7134{ 7135 unsigned int regnum = -1; 7136 unsigned int i; 7137 const char *p; 7138 char *q; 7139 static struct { const char *name; int dw2regnum; } regnames[] = 7140 { 7141 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, 7142 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, 7143 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, 7144 { "spe_acc", 111 }, { "spefscr", 112 } 7145 }; 7146 7147 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 7148 if (strcmp (regnames[i].name, regname) == 0) 7149 return regnames[i].dw2regnum; 7150 7151 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') 7152 { 7153 p = regname + 1 + (regname[1] == '.'); 7154 regnum = strtoul (p, &q, 10); 7155 if (p == q || *q || regnum >= 32) 7156 return -1; 7157 if (regname[0] == 'f') 7158 regnum += 32; 7159 else if (regname[0] == 'v') 7160 regnum += 77; 7161 } 7162 else if (regname[0] == 'c' && regname[1] == 'r') 7163 { 7164 p = regname + 2 + (regname[2] == '.'); 7165 if (p[0] < '0' || p[0] > '7' || p[1]) 7166 return -1; 7167 regnum = p[0] - '0' + 68; 7168 } 7169 return regnum; 7170} 7171