1/* tc-mcore.c -- Assemble code for M*Core 2 Copyright (C) 1999-2017 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to the Free 18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 19 02110-1301, USA. */ 20 21#include "as.h" 22#include "subsegs.h" 23#define DEFINE_TABLE 24#include "../opcodes/mcore-opc.h" 25#include "safe-ctype.h" 26 27#ifdef OBJ_ELF 28#include "elf/mcore.h" 29#endif 30 31#ifndef streq 32#define streq(a,b) (strcmp (a, b) == 0) 33#endif 34 35/* Forward declarations for dumb compilers. */ 36 37/* Several places in this file insert raw instructions into the 38 object. They should use MCORE_INST_XXX macros to get the opcodes 39 and then use these two macros to crack the MCORE_INST value into 40 the appropriate byte values. */ 41#define INST_BYTE0(x) (target_big_endian ? (((x) >> 8) & 0xFF) : ((x) & 0xFF)) 42#define INST_BYTE1(x) (target_big_endian ? ((x) & 0xFF) : (((x) >> 8) & 0xFF)) 43 44const char comment_chars[] = "#/"; 45const char line_separator_chars[] = ";"; 46const char line_comment_chars[] = "#/"; 47 48static int do_jsri2bsr = 0; /* Change here from 1 by Cruess 19 August 97. */ 49static int sifilter_mode = 0; 50 51const char EXP_CHARS[] = "eE"; 52 53/* Chars that mean this number is a floating point constant 54 As in 0f12.456 55 or 0d1.2345e12 */ 56const char FLT_CHARS[] = "rRsSfFdDxXpP"; 57 58#define C(what,length) (((what) << 2) + (length)) 59#define GET_WHAT(x) ((x >> 2)) 60 61/* These are the two types of relaxable instruction. */ 62#define COND_JUMP 1 63#define UNCD_JUMP 2 64 65#define UNDEF_DISP 0 66#define DISP12 1 67#define DISP32 2 68#define UNDEF_WORD_DISP 3 69 70#define C12_LEN 2 71#define C32_LEN 10 /* Allow for align. */ 72#define U12_LEN 2 73#define U32_LEN 8 /* Allow for align. */ 74 75typedef enum 76{ 77 M210, 78 M340 79} 80cpu_type; 81 82cpu_type cpu = M340; 83 84/* Initialize the relax table. */ 85const relax_typeS md_relax_table[] = 86{ 87 { 0, 0, 0, 0 }, 88 { 0, 0, 0, 0 }, 89 { 0, 0, 0, 0 }, 90 { 0, 0, 0, 0 }, 91 92 /* COND_JUMP */ 93 { 0, 0, 0, 0 }, /* UNDEF_DISP */ 94 { 2048, -2046, C12_LEN, C(COND_JUMP, DISP32) }, /* DISP12 */ 95 { 0, 0, C32_LEN, 0 }, /* DISP32 */ 96 { 0, 0, C32_LEN, 0 }, /* UNDEF_WORD_DISP */ 97 98 /* UNCD_JUMP */ 99 { 0, 0, 0, 0 }, /* UNDEF_DISP */ 100 { 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */ 101 { 0, 0, U32_LEN, 0 }, /* DISP32 */ 102 { 0, 0, U32_LEN, 0 } /* UNDEF_WORD_DISP */ 103 104}; 105 106/* Literal pool data structures. */ 107struct literal 108{ 109 unsigned short refcnt; 110 unsigned char ispcrel; 111 unsigned char unused; 112 expressionS e; 113}; 114 115#define MAX_POOL_SIZE (1024/4) 116static struct literal litpool [MAX_POOL_SIZE]; 117static unsigned poolsize; 118static unsigned poolnumber; 119static unsigned long poolspan; 120 121/* SPANPANIC: the point at which we get too scared and force a dump 122 of the literal pool, and perhaps put a branch in place. 123 Calculated as: 124 1024 span of lrw/jmpi/jsri insn (actually span+1) 125 -2 possible alignment at the insn. 126 -2 possible alignment to get the table aligned. 127 -2 an inserted branch around the table. 128 == 1018 129 at 1018, we might be in trouble. 130 -- so we have to be smaller than 1018 and since we deal with 2-byte 131 instructions, the next good choice is 1016. 132 -- Note we have a test case that fails when we've got 1018 here. */ 133#define SPANPANIC (1016) /* 1024 - 1 entry - 2 byte rounding. */ 134#define SPANCLOSE (900) 135#define SPANEXIT (600) 136static symbolS * poolsym; /* Label for current pool. */ 137static char poolname[8]; 138static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ 139 140#define POOL_END_LABEL ".LE" 141#define POOL_START_LABEL ".LS" 142 143static void 144make_name (char * s, const char * p, int n) 145{ 146 static const char hex[] = "0123456789ABCDEF"; 147 148 s[0] = p[0]; 149 s[1] = p[1]; 150 s[2] = p[2]; 151 s[3] = hex[(n >> 12) & 0xF]; 152 s[4] = hex[(n >> 8) & 0xF]; 153 s[5] = hex[(n >> 4) & 0xF]; 154 s[6] = hex[(n) & 0xF]; 155 s[7] = 0; 156} 157 158static void 159dump_literals (int isforce) 160{ 161 unsigned int i; 162 struct literal * p; 163 symbolS * brarsym = NULL; 164 165 if (poolsize == 0) 166 return; 167 168 /* Must we branch around the literal table? */ 169 if (isforce) 170 { 171 char * output; 172 char brarname[8]; 173 174 make_name (brarname, POOL_END_LABEL, poolnumber); 175 176 brarsym = symbol_make (brarname); 177 178 symbol_table_insert (brarsym); 179 180 output = frag_var (rs_machine_dependent, 181 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, 182 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, 183 C (UNCD_JUMP, 0), brarsym, 0, 0); 184 output[0] = INST_BYTE0 (MCORE_INST_BR); /* br .+xxx */ 185 output[1] = INST_BYTE1 (MCORE_INST_BR); 186 } 187 188 /* Make sure that the section is sufficiently aligned and that 189 the literal table is aligned within it. */ 190 record_alignment (now_seg, 2); 191 frag_align (2, 0, 0); 192 193 colon (S_GET_NAME (poolsym)); 194 195 for (i = 0, p = litpool; i < poolsize; i++, p++) 196 emit_expr (& p->e, 4); 197 198 if (brarsym != NULL) 199 colon (S_GET_NAME (brarsym)); 200 201 poolsize = 0; 202} 203 204static void 205mcore_s_literals (int ignore ATTRIBUTE_UNUSED) 206{ 207 dump_literals (0); 208 demand_empty_rest_of_line (); 209} 210 211/* Perform FUNC (ARG), and track number of bytes added to frag. */ 212 213static void 214mcore_pool_count (void (*func) (int), int arg) 215{ 216 const fragS *curr_frag = frag_now; 217 offsetT added = -frag_now_fix_octets (); 218 219 (*func) (arg); 220 221 while (curr_frag != frag_now) 222 { 223 added += curr_frag->fr_fix; 224 curr_frag = curr_frag->fr_next; 225 } 226 227 added += frag_now_fix_octets (); 228 poolspan += added; 229} 230 231static void 232check_literals (int kind, int offset) 233{ 234 poolspan += offset; 235 236 /* SPANCLOSE and SPANEXIT are smaller numbers than SPANPANIC. 237 SPANPANIC means that we must dump now. 238 kind == 0 is any old instruction. 239 kind > 0 means we just had a control transfer instruction. 240 kind == 1 means within a function 241 kind == 2 means we just left a function 242 243 The dump_literals (1) call inserts a branch around the table, so 244 we first look to see if its a situation where we won't have to 245 insert a branch (e.g., the previous instruction was an unconditional 246 branch). 247 248 SPANPANIC is the point where we must dump a single-entry pool. 249 it accounts for alignments and an inserted branch. 250 the 'poolsize*2' accounts for the scenario where we do: 251 lrw r1,lit1; lrw r2,lit2; lrw r3,lit3 252 Note that the 'lit2' reference is 2 bytes further along 253 but the literal it references will be 4 bytes further along, 254 so we must consider the poolsize into this equation. 255 This is slightly over-cautious, but guarantees that we won't 256 panic because a relocation is too distant. */ 257 258 if (poolspan > SPANCLOSE && kind > 0) 259 dump_literals (0); 260 else if (poolspan > SPANEXIT && kind > 1) 261 dump_literals (0); 262 else if (poolspan >= (SPANPANIC - poolsize * 2)) 263 dump_literals (1); 264} 265 266static void 267mcore_cons (int nbytes) 268{ 269 if (now_seg == text_section) 270 mcore_pool_count (cons, nbytes); 271 else 272 cons (nbytes); 273 274 /* In theory we ought to call check_literals (2,0) here in case 275 we need to dump the literal table. We cannot do this however, 276 as the directives that we are intercepting may be being used 277 to build a switch table, and we must not interfere with its 278 contents. Instead we cross our fingers and pray... */ 279} 280 281static void 282mcore_float_cons (int float_type) 283{ 284 if (now_seg == text_section) 285 mcore_pool_count (float_cons, float_type); 286 else 287 float_cons (float_type); 288 289 /* See the comment in mcore_cons () about calling check_literals. 290 It is unlikely that a switch table will be constructed using 291 floating point values, but it is still likely that an indexed 292 table of floating point constants is being created by these 293 directives, so again we must not interfere with their placement. */ 294} 295 296static void 297mcore_stringer (int append_zero) 298{ 299 if (now_seg == text_section) 300 mcore_pool_count (stringer, append_zero); 301 else 302 stringer (append_zero); 303 304 /* We call check_literals here in case a large number of strings are 305 being placed into the text section with a sequence of stringer 306 directives. In theory we could be upsetting something if these 307 strings are actually in an indexed table instead of referenced by 308 individual labels. Let us hope that that never happens. */ 309 check_literals (2, 0); 310} 311 312static void 313mcore_fill (int unused) 314{ 315 if (now_seg == text_section) 316 mcore_pool_count (s_fill, unused); 317 else 318 s_fill (unused); 319 320 check_literals (2, 0); 321} 322 323/* Handle the section changing pseudo-ops. These call through to the 324 normal implementations, but they dump the literal pool first. */ 325 326static void 327mcore_s_text (int ignore) 328{ 329 dump_literals (0); 330 331#ifdef OBJ_ELF 332 obj_elf_text (ignore); 333#else 334 s_text (ignore); 335#endif 336} 337 338static void 339mcore_s_data (int ignore) 340{ 341 dump_literals (0); 342 343#ifdef OBJ_ELF 344 obj_elf_data (ignore); 345#else 346 s_data (ignore); 347#endif 348} 349 350static void 351mcore_s_section (int ignore) 352{ 353 /* Scan forwards to find the name of the section. If the section 354 being switched to is ".line" then this is a DWARF1 debug section 355 which is arbitrarily placed inside generated code. In this case 356 do not dump the literal pool because it is a) inefficient and 357 b) would require the generation of extra code to jump around the 358 pool. */ 359 char * ilp = input_line_pointer; 360 361 while (*ilp != 0 && ISSPACE (*ilp)) 362 ++ ilp; 363 364 if (strncmp (ilp, ".line", 5) == 0 365 && (ISSPACE (ilp[5]) || *ilp == '\n' || *ilp == '\r')) 366 ; 367 else 368 dump_literals (0); 369 370#ifdef OBJ_ELF 371 obj_elf_section (ignore); 372#endif 373#ifdef OBJ_COFF 374 obj_coff_section (ignore); 375#endif 376} 377 378static void 379mcore_s_bss (int needs_align) 380{ 381 dump_literals (0); 382 383 s_lcomm_bytes (needs_align); 384} 385 386#ifdef OBJ_ELF 387static void 388mcore_s_comm (int needs_align) 389{ 390 dump_literals (0); 391 392 obj_elf_common (needs_align); 393} 394#endif 395 396/* This table describes all the machine specific pseudo-ops the assembler 397 has to support. The fields are: 398 Pseudo-op name without dot 399 Function to call to execute this pseudo-op 400 Integer arg to pass to the function. */ 401const pseudo_typeS md_pseudo_table[] = 402{ 403 { "export", s_globl, 0 }, 404 { "import", s_ignore, 0 }, 405 { "literals", mcore_s_literals, 0 }, 406 { "page", listing_eject, 0 }, 407 408 /* The following are to intercept the placement of data into the text 409 section (eg addresses for a switch table), so that the space they 410 occupy can be taken into account when deciding whether or not to 411 dump the current literal pool. 412 XXX - currently we do not cope with the .space and .dcb.d directives. */ 413 { "ascii", mcore_stringer, 8 + 0 }, 414 { "asciz", mcore_stringer, 8 + 1 }, 415 { "byte", mcore_cons, 1 }, 416 { "dc", mcore_cons, 2 }, 417 { "dc.b", mcore_cons, 1 }, 418 { "dc.d", mcore_float_cons, 'd'}, 419 { "dc.l", mcore_cons, 4 }, 420 { "dc.s", mcore_float_cons, 'f'}, 421 { "dc.w", mcore_cons, 2 }, 422 { "dc.x", mcore_float_cons, 'x'}, 423 { "double", mcore_float_cons, 'd'}, 424 { "float", mcore_float_cons, 'f'}, 425 { "hword", mcore_cons, 2 }, 426 { "int", mcore_cons, 4 }, 427 { "long", mcore_cons, 4 }, 428 { "octa", mcore_cons, 16 }, 429 { "quad", mcore_cons, 8 }, 430 { "short", mcore_cons, 2 }, 431 { "single", mcore_float_cons, 'f'}, 432 { "string", mcore_stringer, 8 + 1 }, 433 { "word", mcore_cons, 2 }, 434 { "fill", mcore_fill, 0 }, 435 436 /* Allow for the effect of section changes. */ 437 { "text", mcore_s_text, 0 }, 438 { "data", mcore_s_data, 0 }, 439 { "bss", mcore_s_bss, 1 }, 440#ifdef OBJ_ELF 441 { "comm", mcore_s_comm, 0 }, 442#endif 443 { "section", mcore_s_section, 0 }, 444 { "section.s", mcore_s_section, 0 }, 445 { "sect", mcore_s_section, 0 }, 446 { "sect.s", mcore_s_section, 0 }, 447 448 { 0, 0, 0 } 449}; 450 451/* This function is called once, at assembler startup time. This should 452 set up all the tables, etc that the MD part of the assembler needs. */ 453 454void 455md_begin (void) 456{ 457 const char * prev_name = ""; 458 unsigned int i; 459 460 opcode_hash_control = hash_new (); 461 462 /* Insert unique names into hash table. */ 463 for (i = 0; i < ARRAY_SIZE (mcore_table); i++) 464 { 465 if (! streq (prev_name, mcore_table[i].name)) 466 { 467 prev_name = mcore_table[i].name; 468 hash_insert (opcode_hash_control, mcore_table[i].name, (char *) &mcore_table[i]); 469 } 470 } 471} 472 473/* Get a log2(val). */ 474 475static int 476mylog2 (unsigned int val) 477{ 478 int log = -1; 479 480 while (val != 0) 481 { 482 log ++; 483 val >>= 1; 484 } 485 486 return log; 487} 488 489/* Try to parse a reg name. */ 490 491static char * 492parse_reg (char * s, unsigned * reg) 493{ 494 /* Strip leading whitespace. */ 495 while (ISSPACE (* s)) 496 ++ s; 497 498 if (TOLOWER (s[0]) == 'r') 499 { 500 if (s[1] == '1' && s[2] >= '0' && s[2] <= '5') 501 { 502 *reg = 10 + s[2] - '0'; 503 return s + 3; 504 } 505 506 if (s[1] >= '0' && s[1] <= '9') 507 { 508 *reg = s[1] - '0'; 509 return s + 2; 510 } 511 } 512 else if ( TOLOWER (s[0]) == 's' 513 && TOLOWER (s[1]) == 'p' 514 && ! ISALNUM (s[2])) 515 { 516 * reg = 0; 517 return s + 2; 518 } 519 520 as_bad (_("register expected, but saw '%.6s'"), s); 521 return s; 522} 523 524static struct Cregs 525{ 526 const char * name; 527 unsigned int crnum; 528} 529cregs[] = 530{ 531 { "psr", 0}, 532 { "vbr", 1}, 533 { "epsr", 2}, 534 { "fpsr", 3}, 535 { "epc", 4}, 536 { "fpc", 5}, 537 { "ss0", 6}, 538 { "ss1", 7}, 539 { "ss2", 8}, 540 { "ss3", 9}, 541 { "ss4", 10}, 542 { "gcr", 11}, 543 { "gsr", 12}, 544 { "", 0} 545}; 546 547static char * 548parse_creg (char * s, unsigned * reg) 549{ 550 int i; 551 552 /* Strip leading whitespace. */ 553 while (ISSPACE (* s)) 554 ++s; 555 556 if ((TOLOWER (s[0]) == 'c' && TOLOWER (s[1]) == 'r')) 557 { 558 if (s[2] == '3' && s[3] >= '0' && s[3] <= '1') 559 { 560 *reg = 30 + s[3] - '0'; 561 return s + 4; 562 } 563 564 if (s[2] == '2' && s[3] >= '0' && s[3] <= '9') 565 { 566 *reg = 20 + s[3] - '0'; 567 return s + 4; 568 } 569 570 if (s[2] == '1' && s[3] >= '0' && s[3] <= '9') 571 { 572 *reg = 10 + s[3] - '0'; 573 return s + 4; 574 } 575 576 if (s[2] >= '0' && s[2] <= '9') 577 { 578 *reg = s[2] - '0'; 579 return s + 3; 580 } 581 } 582 583 /* Look at alternate creg names before giving error. */ 584 for (i = 0; cregs[i].name[0] != '\0'; i++) 585 { 586 char buf [10]; 587 int length; 588 int j; 589 590 length = strlen (cregs[i].name); 591 592 for (j = 0; j < length; j++) 593 buf[j] = TOLOWER (s[j]); 594 595 if (strncmp (cregs[i].name, buf, length) == 0) 596 { 597 *reg = cregs[i].crnum; 598 return s + length; 599 } 600 } 601 602 as_bad (_("control register expected, but saw '%.6s'"), s); 603 604 return s; 605} 606 607static char * 608parse_psrmod (char * s, unsigned * reg) 609{ 610 int i; 611 char buf[10]; 612 static struct psrmods 613 { 614 const char * name; 615 unsigned int value; 616 } 617 psrmods[] = 618 { 619 { "ie", 1 }, 620 { "fe", 2 }, 621 { "ee", 4 }, 622 { "af", 8 } /* Really 0 and non-combinable. */ 623 }; 624 625 for (i = 0; i < 2; i++) 626 buf[i] = TOLOWER (s[i]); 627 628 for (i = sizeof (psrmods) / sizeof (psrmods[0]); i--;) 629 { 630 if (! strncmp (psrmods[i].name, buf, 2)) 631 { 632 * reg = psrmods[i].value; 633 634 return s + 2; 635 } 636 } 637 638 as_bad (_("bad/missing psr specifier")); 639 640 * reg = 0; 641 642 return s; 643} 644 645static char * 646parse_exp (char * s, expressionS * e) 647{ 648 char * save; 649 char * new_pointer; 650 651 /* Skip whitespace. */ 652 while (ISSPACE (* s)) 653 ++ s; 654 655 save = input_line_pointer; 656 input_line_pointer = s; 657 658 expression (e); 659 660 if (e->X_op == O_absent) 661 as_bad (_("missing operand")); 662 663 new_pointer = input_line_pointer; 664 input_line_pointer = save; 665 666 return new_pointer; 667} 668 669static int 670enter_literal (expressionS * e, int ispcrel) 671{ 672 unsigned int i; 673 struct literal * p; 674 675 if (poolsize >= MAX_POOL_SIZE - 2) 676 /* The literal pool is as full as we can handle. We have 677 to be 2 entries shy of the 1024/4=256 entries because we 678 have to allow for the branch (2 bytes) and the alignment 679 (2 bytes before the first insn referencing the pool and 680 2 bytes before the pool itself) == 6 bytes, rounds up 681 to 2 entries. */ 682 dump_literals (1); 683 684 if (poolsize == 0) 685 { 686 /* Create new literal pool. */ 687 if (++ poolnumber > 0xFFFF) 688 as_fatal (_("more than 65K literal pools")); 689 690 make_name (poolname, POOL_START_LABEL, poolnumber); 691 poolsym = symbol_make (poolname); 692 symbol_table_insert (poolsym); 693 poolspan = 0; 694 } 695 696 /* Search pool for value so we don't have duplicates. */ 697 for (p = litpool, i = 0; i < poolsize; i++, p++) 698 { 699 if (e->X_op == p->e.X_op 700 && e->X_add_symbol == p->e.X_add_symbol 701 && e->X_add_number == p->e.X_add_number 702 && ispcrel == p->ispcrel) 703 { 704 p->refcnt ++; 705 return i; 706 } 707 } 708 709 p->refcnt = 1; 710 p->ispcrel = ispcrel; 711 p->e = * e; 712 713 poolsize ++; 714 715 return i; 716} 717 718/* Parse a literal specification. -- either new or old syntax. 719 old syntax: the user supplies the label and places the literal. 720 new syntax: we put it into the literal pool. */ 721 722static char * 723parse_rt (char * s, 724 char ** outputp, 725 int ispcrel, 726 expressionS * ep) 727{ 728 expressionS e; 729 int n; 730 731 if (ep) 732 /* Indicate nothing there. */ 733 ep->X_op = O_absent; 734 735 if (*s == '[') 736 { 737 s = parse_exp (s + 1, & e); 738 739 if (*s == ']') 740 s++; 741 else 742 as_bad (_("missing ']'")); 743 } 744 else 745 { 746 s = parse_exp (s, & e); 747 748 n = enter_literal (& e, ispcrel); 749 750 if (ep) 751 *ep = e; 752 753 /* Create a reference to pool entry. */ 754 e.X_op = O_symbol; 755 e.X_add_symbol = poolsym; 756 e.X_add_number = n << 2; 757 } 758 759 * outputp = frag_more (2); 760 761 fix_new_exp (frag_now, (*outputp) - frag_now->fr_literal, 2, & e, 1, 762 BFD_RELOC_MCORE_PCREL_IMM8BY4); 763 764 return s; 765} 766 767static char * 768parse_imm (char * s, 769 unsigned * val, 770 unsigned min, 771 unsigned max) 772{ 773 char * new_pointer; 774 expressionS e; 775 776 new_pointer = parse_exp (s, & e); 777 778 if (e.X_op == O_absent) 779 ; /* An error message has already been emitted. */ 780 else if (e.X_op != O_constant) 781 as_bad (_("operand must be a constant")); 782 else if ((addressT) e.X_add_number < min || (addressT) e.X_add_number > max) 783 as_bad (_("operand must be absolute in range %u..%u, not %ld"), 784 min, max, (long) e.X_add_number); 785 786 * val = e.X_add_number; 787 788 return new_pointer; 789} 790 791static char * 792parse_mem (char * s, 793 unsigned * reg, 794 unsigned * off, 795 unsigned siz) 796{ 797 * off = 0; 798 799 while (ISSPACE (* s)) 800 ++ s; 801 802 if (* s == '(') 803 { 804 s = parse_reg (s + 1, reg); 805 806 while (ISSPACE (* s)) 807 ++ s; 808 809 if (* s == ',') 810 { 811 s = parse_imm (s + 1, off, 0, 63); 812 813 if (siz > 1) 814 { 815 if (siz > 2) 816 { 817 if (* off & 0x3) 818 as_bad (_("operand must be a multiple of 4")); 819 820 * off >>= 2; 821 } 822 else 823 { 824 if (* off & 0x1) 825 as_bad (_("operand must be a multiple of 2")); 826 827 * off >>= 1; 828 } 829 } 830 } 831 832 while (ISSPACE (* s)) 833 ++ s; 834 835 if (* s == ')') 836 s ++; 837 } 838 else 839 as_bad (_("base register expected")); 840 841 return s; 842} 843 844/* This is the guts of the machine-dependent assembler. STR points to a 845 machine dependent instruction. This function is supposed to emit 846 the frags/bytes it assembles to. */ 847 848void 849md_assemble (char * str) 850{ 851 char * op_start; 852 char * op_end; 853 mcore_opcode_info * opcode; 854 char * output; 855 int nlen = 0; 856 unsigned short inst; 857 unsigned reg; 858 unsigned off; 859 unsigned isize; 860 expressionS e; 861 char name[21]; 862 863 /* Drop leading whitespace. */ 864 while (ISSPACE (* str)) 865 str ++; 866 867 /* Find the op code end. */ 868 for (op_start = op_end = str; 869 nlen < 20 && !is_end_of_line [(unsigned char) *op_end] && *op_end != ' '; 870 op_end++) 871 { 872 name[nlen] = op_start[nlen]; 873 nlen++; 874 } 875 876 name [nlen] = 0; 877 878 if (nlen == 0) 879 { 880 as_bad (_("can't find opcode ")); 881 return; 882 } 883 884 opcode = (mcore_opcode_info *) hash_find (opcode_hash_control, name); 885 if (opcode == NULL) 886 { 887 as_bad (_("unknown opcode \"%s\""), name); 888 return; 889 } 890 891 inst = opcode->inst; 892 isize = 2; 893 894 switch (opcode->opclass) 895 { 896 case O0: 897 output = frag_more (2); 898 break; 899 900 case OT: 901 op_end = parse_imm (op_end + 1, & reg, 0, 3); 902 inst |= reg; 903 output = frag_more (2); 904 break; 905 906 case O1: 907 op_end = parse_reg (op_end + 1, & reg); 908 inst |= reg; 909 output = frag_more (2); 910 break; 911 912 case JMP: 913 op_end = parse_reg (op_end + 1, & reg); 914 inst |= reg; 915 output = frag_more (2); 916 /* In a sifilter mode, we emit this insn 2 times, 917 fixes problem of an interrupt during a jmp.. */ 918 if (sifilter_mode) 919 { 920 output[0] = INST_BYTE0 (inst); 921 output[1] = INST_BYTE1 (inst); 922 output = frag_more (2); 923 } 924 break; 925 926 case JSR: 927 op_end = parse_reg (op_end + 1, & reg); 928 929 if (reg == 15) 930 as_bad (_("invalid register: r15 illegal")); 931 932 inst |= reg; 933 output = frag_more (2); 934 935 if (sifilter_mode) 936 { 937 /* Replace with: bsr .+2 ; addi r15,6; jmp rx ; jmp rx. */ 938 inst = MCORE_INST_BSR; /* With 0 displacement. */ 939 output[0] = INST_BYTE0 (inst); 940 output[1] = INST_BYTE1 (inst); 941 942 output = frag_more (2); 943 inst = MCORE_INST_ADDI; 944 inst |= 15; /* addi r15,6 */ 945 inst |= (6 - 1) << 4; /* Over the jmp's. */ 946 output[0] = INST_BYTE0 (inst); 947 output[1] = INST_BYTE1 (inst); 948 949 output = frag_more (2); 950 inst = MCORE_INST_JMP | reg; 951 output[0] = INST_BYTE0 (inst); 952 output[1] = INST_BYTE1 (inst); 953 954 /* 2nd emitted in fallthrough. */ 955 output = frag_more (2); 956 } 957 break; 958 959 case OC: 960 op_end = parse_reg (op_end + 1, & reg); 961 inst |= reg; 962 963 /* Skip whitespace. */ 964 while (ISSPACE (* op_end)) 965 ++ op_end; 966 967 if (*op_end == ',') 968 { 969 op_end = parse_creg (op_end + 1, & reg); 970 inst |= reg << 4; 971 } 972 973 output = frag_more (2); 974 break; 975 976 case MULSH: 977 if (cpu == M210) 978 { 979 as_bad (_("M340 specific opcode used when assembling for M210")); 980 break; 981 } 982 /* Fall through. */ 983 case O2: 984 op_end = parse_reg (op_end + 1, & reg); 985 inst |= reg; 986 987 /* Skip whitespace. */ 988 while (ISSPACE (* op_end)) 989 ++ op_end; 990 991 if (* op_end == ',') 992 { 993 op_end = parse_reg (op_end + 1, & reg); 994 inst |= reg << 4; 995 } 996 else 997 as_bad (_("second operand missing")); 998 999 output = frag_more (2); 1000 break; 1001 1002 case X1: 1003 /* Handle both syntax-> xtrb- r1,rx OR xtrb- rx. */ 1004 op_end = parse_reg (op_end + 1, & reg); 1005 1006 /* Skip whitespace. */ 1007 while (ISSPACE (* op_end)) 1008 ++ op_end; 1009 1010 if (* op_end == ',') /* xtrb- r1,rx. */ 1011 { 1012 if (reg != 1) 1013 as_bad (_("destination register must be r1")); 1014 1015 op_end = parse_reg (op_end + 1, & reg); 1016 } 1017 1018 inst |= reg; 1019 output = frag_more (2); 1020 break; 1021 1022 case O1R1: /* div- rx,r1. */ 1023 op_end = parse_reg (op_end + 1, & reg); 1024 inst |= reg; 1025 1026 /* Skip whitespace. */ 1027 while (ISSPACE (* op_end)) 1028 ++ op_end; 1029 1030 if (* op_end == ',') 1031 { 1032 op_end = parse_reg (op_end + 1, & reg); 1033 if (reg != 1) 1034 as_bad (_("source register must be r1")); 1035 } 1036 else 1037 as_bad (_("second operand missing")); 1038 1039 output = frag_more (2); 1040 break; 1041 1042 case OI: 1043 op_end = parse_reg (op_end + 1, & reg); 1044 inst |= reg; 1045 1046 /* Skip whitespace. */ 1047 while (ISSPACE (* op_end)) 1048 ++ op_end; 1049 1050 if (* op_end == ',') 1051 { 1052 op_end = parse_imm (op_end + 1, & reg, 1, 32); 1053 inst |= (reg - 1) << 4; 1054 } 1055 else 1056 as_bad (_("second operand missing")); 1057 1058 output = frag_more (2); 1059 break; 1060 1061 case OB: 1062 op_end = parse_reg (op_end + 1, & reg); 1063 inst |= reg; 1064 1065 /* Skip whitespace. */ 1066 while (ISSPACE (* op_end)) 1067 ++ op_end; 1068 1069 if (* op_end == ',') 1070 { 1071 op_end = parse_imm (op_end + 1, & reg, 0, 31); 1072 inst |= reg << 4; 1073 } 1074 else 1075 as_bad (_("second operand missing")); 1076 1077 output = frag_more (2); 1078 break; 1079 1080 case OB2: 1081 /* Like OB, but arg is 2^n instead of n. */ 1082 op_end = parse_reg (op_end + 1, & reg); 1083 inst |= reg; 1084 1085 /* Skip whitespace. */ 1086 while (ISSPACE (* op_end)) 1087 ++ op_end; 1088 1089 if (* op_end == ',') 1090 { 1091 op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); 1092 /* Further restrict the immediate to a power of two. */ 1093 if ((reg & (reg - 1)) == 0) 1094 reg = mylog2 (reg); 1095 else 1096 { 1097 reg = 0; 1098 as_bad (_("immediate is not a power of two")); 1099 } 1100 inst |= (reg) << 4; 1101 } 1102 else 1103 as_bad (_("second operand missing")); 1104 1105 output = frag_more (2); 1106 break; 1107 1108 case OBRa: /* Specific for bgeni: imm of 0->6 translate to movi. */ 1109 case OBRb: 1110 case OBRc: 1111 op_end = parse_reg (op_end + 1, & reg); 1112 inst |= reg; 1113 1114 /* Skip whitespace. */ 1115 while (ISSPACE (* op_end)) 1116 ++ op_end; 1117 1118 if (* op_end == ',') 1119 { 1120 op_end = parse_imm (op_end + 1, & reg, 0, 31); 1121 /* Immediate values of 0 -> 6 translate to movi. */ 1122 if (reg <= 6) 1123 { 1124 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; 1125 reg = 0x1 << reg; 1126 as_warn (_("translating bgeni to movi")); 1127 } 1128 inst &= ~ 0x01f0; 1129 inst |= reg << 4; 1130 } 1131 else 1132 as_bad (_("second operand missing")); 1133 1134 output = frag_more (2); 1135 break; 1136 1137 case OBR2: /* Like OBR, but arg is 2^n instead of n. */ 1138 op_end = parse_reg (op_end + 1, & reg); 1139 inst |= reg; 1140 1141 /* Skip whitespace. */ 1142 while (ISSPACE (* op_end)) 1143 ++ op_end; 1144 1145 if (* op_end == ',') 1146 { 1147 op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); 1148 1149 /* Further restrict the immediate to a power of two. */ 1150 if ((reg & (reg - 1)) == 0) 1151 reg = mylog2 (reg); 1152 else 1153 { 1154 reg = 0; 1155 as_bad (_("immediate is not a power of two")); 1156 } 1157 1158 /* Immediate values of 0 -> 6 translate to movi. */ 1159 if (reg <= 6) 1160 { 1161 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; 1162 reg = 0x1 << reg; 1163 as_warn (_("translating mgeni to movi")); 1164 } 1165 1166 inst |= reg << 4; 1167 } 1168 else 1169 as_bad (_("second operand missing")); 1170 1171 output = frag_more (2); 1172 break; 1173 1174 case OMa: /* Specific for bmaski: imm 1->7 translate to movi. */ 1175 case OMb: 1176 case OMc: 1177 op_end = parse_reg (op_end + 1, & reg); 1178 inst |= reg; 1179 1180 /* Skip whitespace. */ 1181 while (ISSPACE (* op_end)) 1182 ++ op_end; 1183 1184 if (* op_end == ',') 1185 { 1186 op_end = parse_imm (op_end + 1, & reg, 1, 32); 1187 1188 /* Immediate values of 1 -> 7 translate to movi. */ 1189 if (reg <= 7) 1190 { 1191 inst = (inst & 0xF) | MCORE_INST_BMASKI_ALT; 1192 reg = (0x1 << reg) - 1; 1193 inst |= reg << 4; 1194 1195 as_warn (_("translating bmaski to movi")); 1196 } 1197 else 1198 { 1199 inst &= ~ 0x01F0; 1200 inst |= (reg & 0x1F) << 4; 1201 } 1202 } 1203 else 1204 as_bad (_("second operand missing")); 1205 1206 output = frag_more (2); 1207 break; 1208 1209 case SI: 1210 op_end = parse_reg (op_end + 1, & reg); 1211 inst |= reg; 1212 1213 /* Skip whitespace. */ 1214 while (ISSPACE (* op_end)) 1215 ++ op_end; 1216 1217 if (* op_end == ',') 1218 { 1219 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1220 inst |= reg << 4; 1221 } 1222 else 1223 as_bad (_("second operand missing")); 1224 1225 output = frag_more (2); 1226 break; 1227 1228 case I7: 1229 op_end = parse_reg (op_end + 1, & reg); 1230 inst |= reg; 1231 1232 /* Skip whitespace. */ 1233 while (ISSPACE (* op_end)) 1234 ++ op_end; 1235 1236 if (* op_end == ',') 1237 { 1238 op_end = parse_imm (op_end + 1, & reg, 0, 0x7F); 1239 inst |= reg << 4; 1240 } 1241 else 1242 as_bad (_("second operand missing")); 1243 1244 output = frag_more (2); 1245 break; 1246 1247 case LS: 1248 op_end = parse_reg (op_end + 1, & reg); 1249 inst |= reg << 8; 1250 1251 /* Skip whitespace. */ 1252 while (ISSPACE (* op_end)) 1253 ++ op_end; 1254 1255 if (* op_end == ',') 1256 { 1257 int size; 1258 1259 if ((inst & 0x6000) == 0) 1260 size = 4; 1261 else if ((inst & 0x6000) == 0x4000) 1262 size = 2; 1263 else if ((inst & 0x6000) == 0x2000) 1264 size = 1; 1265 else 1266 abort (); 1267 1268 op_end = parse_mem (op_end + 1, & reg, & off, size); 1269 1270 if (off > 16) 1271 as_bad (_("displacement too large (%d)"), off); 1272 else 1273 inst |= (reg) | (off << 4); 1274 } 1275 else 1276 as_bad (_("second operand missing")); 1277 1278 output = frag_more (2); 1279 break; 1280 1281 case LR: 1282 op_end = parse_reg (op_end + 1, & reg); 1283 1284 if (reg == 0 || reg == 15) 1285 as_bad (_("Invalid register: r0 and r15 illegal")); 1286 1287 inst |= (reg << 8); 1288 1289 /* Skip whitespace. */ 1290 while (ISSPACE (* op_end)) 1291 ++ op_end; 1292 1293 if (* op_end == ',') 1294 { 1295 /* parse_rt calls frag_more() for us. */ 1296 input_line_pointer = parse_rt (op_end + 1, & output, 0, 0); 1297 op_end = input_line_pointer; 1298 } 1299 else 1300 { 1301 as_bad (_("second operand missing")); 1302 output = frag_more (2); /* save its space */ 1303 } 1304 break; 1305 1306 case LJ: 1307 input_line_pointer = parse_rt (op_end + 1, & output, 1, 0); 1308 /* parse_rt() calls frag_more() for us. */ 1309 op_end = input_line_pointer; 1310 break; 1311 1312 case RM: 1313 op_end = parse_reg (op_end + 1, & reg); 1314 1315 if (reg == 0 || reg == 15) 1316 as_bad (_("bad starting register: r0 and r15 invalid")); 1317 1318 inst |= reg; 1319 1320 /* Skip whitespace. */ 1321 while (ISSPACE (* op_end)) 1322 ++ op_end; 1323 1324 if (* op_end == '-') 1325 { 1326 op_end = parse_reg (op_end + 1, & reg); 1327 1328 if (reg != 15) 1329 as_bad (_("ending register must be r15")); 1330 1331 /* Skip whitespace. */ 1332 while (ISSPACE (* op_end)) 1333 ++ op_end; 1334 } 1335 1336 if (* op_end == ',') 1337 { 1338 op_end ++; 1339 1340 /* Skip whitespace. */ 1341 while (ISSPACE (* op_end)) 1342 ++ op_end; 1343 1344 if (* op_end == '(') 1345 { 1346 op_end = parse_reg (op_end + 1, & reg); 1347 1348 if (reg != 0) 1349 as_bad (_("bad base register: must be r0")); 1350 1351 if (* op_end == ')') 1352 op_end ++; 1353 } 1354 else 1355 as_bad (_("base register expected")); 1356 } 1357 else 1358 as_bad (_("second operand missing")); 1359 1360 output = frag_more (2); 1361 break; 1362 1363 case RQ: 1364 op_end = parse_reg (op_end + 1, & reg); 1365 1366 if (reg != 4) 1367 as_fatal (_("first register must be r4")); 1368 1369 /* Skip whitespace. */ 1370 while (ISSPACE (* op_end)) 1371 ++ op_end; 1372 1373 if (* op_end == '-') 1374 { 1375 op_end = parse_reg (op_end + 1, & reg); 1376 1377 if (reg != 7) 1378 as_fatal (_("last register must be r7")); 1379 1380 /* Skip whitespace. */ 1381 while (ISSPACE (* op_end)) 1382 ++ op_end; 1383 1384 if (* op_end == ',') 1385 { 1386 op_end ++; 1387 1388 /* Skip whitespace. */ 1389 while (ISSPACE (* op_end)) 1390 ++ op_end; 1391 1392 if (* op_end == '(') 1393 { 1394 op_end = parse_reg (op_end + 1, & reg); 1395 1396 if (reg >= 4 && reg <= 7) 1397 as_fatal ("base register cannot be r4, r5, r6, or r7"); 1398 1399 inst |= reg; 1400 1401 /* Skip whitespace. */ 1402 while (ISSPACE (* op_end)) 1403 ++ op_end; 1404 1405 if (* op_end == ')') 1406 op_end ++; 1407 } 1408 else 1409 as_bad (_("base register expected")); 1410 } 1411 else 1412 as_bad (_("second operand missing")); 1413 } 1414 else 1415 as_bad (_("reg-reg expected")); 1416 1417 output = frag_more (2); 1418 break; 1419 1420 case BR: 1421 input_line_pointer = parse_exp (op_end + 1, & e); 1422 op_end = input_line_pointer; 1423 1424 output = frag_more (2); 1425 1426 fix_new_exp (frag_now, output-frag_now->fr_literal, 1427 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM11BY2); 1428 break; 1429 1430 case BL: 1431 op_end = parse_reg (op_end + 1, & reg); 1432 inst |= reg << 4; 1433 1434 /* Skip whitespace. */ 1435 while (ISSPACE (* op_end)) 1436 ++ op_end; 1437 1438 if (* op_end == ',') 1439 { 1440 op_end = parse_exp (op_end + 1, & e); 1441 output = frag_more (2); 1442 1443 fix_new_exp (frag_now, output-frag_now->fr_literal, 1444 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM4BY2); 1445 } 1446 else 1447 { 1448 as_bad (_("second operand missing")); 1449 output = frag_more (2); 1450 } 1451 break; 1452 1453 case JC: 1454 input_line_pointer = parse_exp (op_end + 1, & e); 1455 op_end = input_line_pointer; 1456 1457 output = frag_var (rs_machine_dependent, 1458 md_relax_table[C (COND_JUMP, DISP32)].rlx_length, 1459 md_relax_table[C (COND_JUMP, DISP12)].rlx_length, 1460 C (COND_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); 1461 isize = C32_LEN; 1462 break; 1463 1464 case JU: 1465 input_line_pointer = parse_exp (op_end + 1, & e); 1466 op_end = input_line_pointer; 1467 1468 output = frag_var (rs_machine_dependent, 1469 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, 1470 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, 1471 C (UNCD_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); 1472 isize = U32_LEN; 1473 break; 1474 1475 case JL: 1476 inst = MCORE_INST_JSRI; /* jsri */ 1477 input_line_pointer = parse_rt (op_end + 1, & output, 1, & e); 1478 /* parse_rt() calls frag_more for us. */ 1479 op_end = input_line_pointer; 1480 1481 /* Only do this if we know how to do it ... */ 1482 if (e.X_op != O_absent && do_jsri2bsr) 1483 { 1484 /* Look at adding the R_PCREL_JSRIMM11BY2. */ 1485 fix_new_exp (frag_now, output-frag_now->fr_literal, 1486 2, & e, 1, BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2); 1487 } 1488 break; 1489 1490 case RSI: 1491 /* SI, but imm becomes 32-imm. */ 1492 op_end = parse_reg (op_end + 1, & reg); 1493 inst |= reg; 1494 1495 /* Skip whitespace. */ 1496 while (ISSPACE (* op_end)) 1497 ++ op_end; 1498 1499 if (* op_end == ',') 1500 { 1501 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1502 1503 reg = 32 - reg; 1504 inst |= reg << 4; 1505 } 1506 else 1507 as_bad (_("second operand missing")); 1508 1509 output = frag_more (2); 1510 break; 1511 1512 case DO21: /* O2, dup rd, lit must be 1 */ 1513 op_end = parse_reg (op_end + 1, & reg); 1514 inst |= reg; 1515 inst |= reg << 4; 1516 1517 /* Skip whitespace. */ 1518 while (ISSPACE (* op_end)) 1519 ++ op_end; 1520 1521 if (* op_end == ',') 1522 { 1523 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1524 1525 if (reg != 1) 1526 as_bad (_("second operand must be 1")); 1527 } 1528 else 1529 as_bad (_("second operand missing")); 1530 1531 output = frag_more (2); 1532 break; 1533 1534 case SIa: 1535 op_end = parse_reg (op_end + 1, & reg); 1536 inst |= reg; 1537 1538 /* Skip whitespace. */ 1539 while (ISSPACE (* op_end)) 1540 ++ op_end; 1541 1542 if (* op_end == ',') 1543 { 1544 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1545 1546 if (reg == 0) 1547 as_bad (_("zero used as immediate value")); 1548 1549 inst |= reg << 4; 1550 } 1551 else 1552 as_bad (_("second operand missing")); 1553 1554 output = frag_more (2); 1555 break; 1556 1557 case OPSR: 1558 if (cpu == M210) 1559 { 1560 as_bad (_("M340 specific opcode used when assembling for M210")); 1561 break; 1562 } 1563 1564 op_end = parse_psrmod (op_end + 1, & reg); 1565 1566 /* Look for further selectors. */ 1567 while (* op_end == ',') 1568 { 1569 unsigned value; 1570 1571 op_end = parse_psrmod (op_end + 1, & value); 1572 1573 if (value & reg) 1574 as_bad (_("duplicated psr bit specifier")); 1575 1576 reg |= value; 1577 } 1578 1579 if (reg > 8) 1580 as_bad (_("`af' must appear alone")); 1581 1582 inst |= (reg & 0x7); 1583 output = frag_more (2); 1584 break; 1585 1586 default: 1587 as_bad (_("unimplemented opcode \"%s\""), name); 1588 } 1589 1590 /* Drop whitespace after all the operands have been parsed. */ 1591 while (ISSPACE (* op_end)) 1592 op_end ++; 1593 1594 /* Give warning message if the insn has more operands than required. */ 1595 if (strcmp (op_end, opcode->name) && strcmp (op_end, "")) 1596 as_warn (_("ignoring operands: %s "), op_end); 1597 1598 output[0] = INST_BYTE0 (inst); 1599 output[1] = INST_BYTE1 (inst); 1600 1601#ifdef OBJ_ELF 1602 dwarf2_emit_insn (2); 1603#endif 1604 check_literals (opcode->transfer, isize); 1605} 1606 1607symbolS * 1608md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 1609{ 1610 return 0; 1611} 1612 1613void 1614md_mcore_end (void) 1615{ 1616 dump_literals (0); 1617 subseg_set (text_section, 0); 1618} 1619 1620/* Various routines to kill one day. */ 1621 1622const char * 1623md_atof (int type, char * litP, int * sizeP) 1624{ 1625 return ieee_md_atof (type, litP, sizeP, target_big_endian); 1626} 1627 1628const char * md_shortopts = ""; 1629 1630enum options 1631{ 1632 OPTION_JSRI2BSR_ON = OPTION_MD_BASE, 1633 OPTION_JSRI2BSR_OFF, 1634 OPTION_SIFILTER_ON, 1635 OPTION_SIFILTER_OFF, 1636 OPTION_CPU, 1637 OPTION_EB, 1638 OPTION_EL, 1639}; 1640 1641struct option md_longopts[] = 1642{ 1643 { "no-jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_OFF}, 1644 { "jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_ON}, 1645 { "sifilter", no_argument, NULL, OPTION_SIFILTER_ON}, 1646 { "no-sifilter", no_argument, NULL, OPTION_SIFILTER_OFF}, 1647 { "cpu", required_argument, NULL, OPTION_CPU}, 1648 { "EB", no_argument, NULL, OPTION_EB}, 1649 { "EL", no_argument, NULL, OPTION_EL}, 1650 { NULL, no_argument, NULL, 0} 1651}; 1652 1653size_t md_longopts_size = sizeof (md_longopts); 1654 1655int 1656md_parse_option (int c, const char * arg) 1657{ 1658 switch (c) 1659 { 1660 case OPTION_CPU: 1661 if (streq (arg, "210")) 1662 { 1663 cpu = M210; 1664 target_big_endian = 1; 1665 } 1666 else if (streq (arg, "340")) 1667 cpu = M340; 1668 else 1669 as_warn (_("unrecognised cpu type '%s'"), arg); 1670 break; 1671 1672 case OPTION_EB: target_big_endian = 1; break; 1673 case OPTION_EL: target_big_endian = 0; cpu = M340; break; 1674 case OPTION_JSRI2BSR_ON: do_jsri2bsr = 1; break; 1675 case OPTION_JSRI2BSR_OFF: do_jsri2bsr = 0; break; 1676 case OPTION_SIFILTER_ON: sifilter_mode = 1; break; 1677 case OPTION_SIFILTER_OFF: sifilter_mode = 0; break; 1678 default: return 0; 1679 } 1680 1681 return 1; 1682} 1683 1684void 1685md_show_usage (FILE * stream) 1686{ 1687 fprintf (stream, _("\ 1688MCORE specific options:\n\ 1689 -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis)\n\ 1690 -{no-}sifilter {dis}able silicon filter behavior (def: dis)\n\ 1691 -cpu=[210|340] select CPU type\n\ 1692 -EB assemble for a big endian system (default)\n\ 1693 -EL assemble for a little endian system\n")); 1694} 1695 1696int md_short_jump_size; 1697 1698void 1699md_create_short_jump (char * ptr ATTRIBUTE_UNUSED, 1700 addressT from_Nddr ATTRIBUTE_UNUSED, 1701 addressT to_Nddr ATTRIBUTE_UNUSED, 1702 fragS * frag ATTRIBUTE_UNUSED, 1703 symbolS * to_symbol ATTRIBUTE_UNUSED) 1704{ 1705 as_fatal (_("failed sanity check: short_jump")); 1706} 1707 1708void 1709md_create_long_jump (char * ptr ATTRIBUTE_UNUSED, 1710 addressT from_Nddr ATTRIBUTE_UNUSED, 1711 addressT to_Nddr ATTRIBUTE_UNUSED, 1712 fragS * frag ATTRIBUTE_UNUSED, 1713 symbolS * to_symbol ATTRIBUTE_UNUSED) 1714{ 1715 as_fatal (_("failed sanity check: long_jump")); 1716} 1717 1718/* Called after relaxing, change the frags so they know how big they are. */ 1719 1720void 1721md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, 1722 segT sec ATTRIBUTE_UNUSED, 1723 fragS * fragP) 1724{ 1725 char *buffer; 1726 int targ_addr = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; 1727 1728 buffer = fragP->fr_fix + fragP->fr_literal; 1729 1730 switch (fragP->fr_subtype) 1731 { 1732 case C (COND_JUMP, DISP12): 1733 case C (UNCD_JUMP, DISP12): 1734 { 1735 /* Get the address of the end of the instruction. */ 1736 int next_inst = fragP->fr_fix + fragP->fr_address + 2; 1737 unsigned char t0; 1738 int disp = targ_addr - next_inst; 1739 1740 if (disp & 1) 1741 as_bad (_("odd displacement at %x"), next_inst - 2); 1742 1743 disp >>= 1; 1744 1745 if (! target_big_endian) 1746 { 1747 t0 = buffer[1] & 0xF8; 1748 1749 md_number_to_chars (buffer, disp, 2); 1750 1751 buffer[1] = (buffer[1] & 0x07) | t0; 1752 } 1753 else 1754 { 1755 t0 = buffer[0] & 0xF8; 1756 1757 md_number_to_chars (buffer, disp, 2); 1758 1759 buffer[0] = (buffer[0] & 0x07) | t0; 1760 } 1761 1762 fragP->fr_fix += 2; 1763 } 1764 break; 1765 1766 case C (COND_JUMP, DISP32): 1767 case C (COND_JUMP, UNDEF_WORD_DISP): 1768 { 1769 /* A conditional branch won't fit into 12 bits so: 1770 b!cond 1f 1771 jmpi 0f 1772 .align 2 1773 0: .long disp 1774 1: 1775 1776 If the b!cond is 4 byte aligned, the literal which would 1777 go at x+4 will also be aligned. */ 1778 int first_inst = fragP->fr_fix + fragP->fr_address; 1779 int needpad = (first_inst & 3); 1780 1781 if (! target_big_endian) 1782 buffer[1] ^= 0x08; 1783 else 1784 buffer[0] ^= 0x08; /* Toggle T/F bit. */ 1785 1786 buffer[2] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ 1787 buffer[3] = INST_BYTE1 (MCORE_INST_JMPI); 1788 1789 if (needpad) 1790 { 1791 if (! target_big_endian) 1792 { 1793 buffer[0] = 4; /* Branch over jmpi, pad, and ptr. */ 1794 buffer[2] = 1; /* Jmpi offset of 1 gets the pointer. */ 1795 } 1796 else 1797 { 1798 buffer[1] = 4; /* Branch over jmpi, pad, and ptr. */ 1799 buffer[3] = 1; /* Jmpi offset of 1 gets the pointer. */ 1800 } 1801 1802 buffer[4] = 0; /* Alignment/pad. */ 1803 buffer[5] = 0; 1804 buffer[6] = 0; /* Space for 32 bit address. */ 1805 buffer[7] = 0; 1806 buffer[8] = 0; 1807 buffer[9] = 0; 1808 1809 /* Make reloc for the long disp. */ 1810 fix_new (fragP, fragP->fr_fix + 6, 4, 1811 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1812 1813 fragP->fr_fix += C32_LEN; 1814 } 1815 else 1816 { 1817 /* See comment below about this given gas' limitations for 1818 shrinking the fragment. '3' is the amount of code that 1819 we inserted here, but '4' is right for the space we reserved 1820 for this fragment. */ 1821 if (! target_big_endian) 1822 { 1823 buffer[0] = 3; /* Branch over jmpi, and ptr. */ 1824 buffer[2] = 0; /* Jmpi offset of 0 gets the pointer. */ 1825 } 1826 else 1827 { 1828 buffer[1] = 3; /* Branch over jmpi, and ptr. */ 1829 buffer[3] = 0; /* Jmpi offset of 0 gets the pointer. */ 1830 } 1831 1832 buffer[4] = 0; /* Space for 32 bit address. */ 1833 buffer[5] = 0; 1834 buffer[6] = 0; 1835 buffer[7] = 0; 1836 1837 /* Make reloc for the long disp. */ 1838 fix_new (fragP, fragP->fr_fix + 4, 4, 1839 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1840 fragP->fr_fix += C32_LEN; 1841 1842 /* Frag is actually shorter (see the other side of this ifdef) 1843 but gas isn't prepared for that. We have to re-adjust 1844 the branch displacement so that it goes beyond the 1845 full length of the fragment, not just what we actually 1846 filled in. */ 1847 if (! target_big_endian) 1848 buffer[0] = 4; /* Jmpi, ptr, and the 'tail pad'. */ 1849 else 1850 buffer[1] = 4; /* Jmpi, ptr, and the 'tail pad'. */ 1851 } 1852 } 1853 break; 1854 1855 case C (UNCD_JUMP, DISP32): 1856 case C (UNCD_JUMP, UNDEF_WORD_DISP): 1857 { 1858 /* An unconditional branch will not fit in 12 bits, make code which 1859 looks like: 1860 jmpi 0f 1861 .align 2 1862 0: .long disp 1863 we need a pad if "first_inst" is 4 byte aligned. 1864 [because the natural literal place is x + 2]. */ 1865 int first_inst = fragP->fr_fix + fragP->fr_address; 1866 int needpad = !(first_inst & 3); 1867 1868 buffer[0] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ 1869 buffer[1] = INST_BYTE1 (MCORE_INST_JMPI); 1870 1871 if (needpad) 1872 { 1873 if (! target_big_endian) 1874 buffer[0] = 1; /* Jmpi offset of 1 since padded. */ 1875 else 1876 buffer[1] = 1; /* Jmpi offset of 1 since padded. */ 1877 buffer[2] = 0; /* Alignment. */ 1878 buffer[3] = 0; 1879 buffer[4] = 0; /* Space for 32 bit address. */ 1880 buffer[5] = 0; 1881 buffer[6] = 0; 1882 buffer[7] = 0; 1883 1884 /* Make reloc for the long disp. */ 1885 fix_new (fragP, fragP->fr_fix + 4, 4, 1886 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1887 1888 fragP->fr_fix += U32_LEN; 1889 } 1890 else 1891 { 1892 if (! target_big_endian) 1893 buffer[0] = 0; /* Jmpi offset of 0 if no pad. */ 1894 else 1895 buffer[1] = 0; /* Jmpi offset of 0 if no pad. */ 1896 buffer[2] = 0; /* Space for 32 bit address. */ 1897 buffer[3] = 0; 1898 buffer[4] = 0; 1899 buffer[5] = 0; 1900 1901 /* Make reloc for the long disp. */ 1902 fix_new (fragP, fragP->fr_fix + 2, 4, 1903 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1904 fragP->fr_fix += U32_LEN; 1905 } 1906 } 1907 break; 1908 1909 default: 1910 abort (); 1911 } 1912} 1913 1914/* Applies the desired value to the specified location. 1915 Also sets up addends for 'rela' type relocations. */ 1916 1917void 1918md_apply_fix (fixS * fixP, 1919 valueT * valP, 1920 segT segment ATTRIBUTE_UNUSED) 1921{ 1922 char * buf = fixP->fx_where + fixP->fx_frag->fr_literal; 1923 const char * file = fixP->fx_file ? fixP->fx_file : _("unknown"); 1924 const char * symname; 1925 /* Note: use offsetT because it is signed, valueT is unsigned. */ 1926 offsetT val = *valP; 1927 1928 symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>"); 1929 /* Save this for the addend in the relocation record. */ 1930 fixP->fx_addnumber = val; 1931 1932 if (fixP->fx_addsy != NULL) 1933 { 1934#ifdef OBJ_ELF 1935 /* For ELF we can just return and let the reloc that will be generated 1936 take care of everything. For COFF we still have to insert 'val' 1937 into the insn since the addend field will be ignored. */ 1938 return; 1939#endif 1940 } 1941 else 1942 fixP->fx_done = 1; 1943 1944 switch (fixP->fx_r_type) 1945 { 1946 /* Second byte of 2 byte opcode. */ 1947 case BFD_RELOC_MCORE_PCREL_IMM11BY2: 1948 if ((val & 1) != 0) 1949 as_bad_where (file, fixP->fx_line, 1950 _("odd distance branch (0x%lx bytes)"), (long) val); 1951 val /= 2; 1952 if (((val & ~0x3ff) != 0) && ((val | 0x3ff) != -1)) 1953 as_bad_where (file, fixP->fx_line, 1954 _("pcrel for branch to %s too far (0x%lx)"), 1955 symname, (long) val); 1956 if (target_big_endian) 1957 { 1958 buf[0] |= ((val >> 8) & 0x7); 1959 buf[1] |= (val & 0xff); 1960 } 1961 else 1962 { 1963 buf[1] |= ((val >> 8) & 0x7); 1964 buf[0] |= (val & 0xff); 1965 } 1966 break; 1967 1968 /* Lower 8 bits of 2 byte opcode. */ 1969 case BFD_RELOC_MCORE_PCREL_IMM8BY4: 1970 val += 3; 1971 val /= 4; 1972 if (val & ~0xff) 1973 as_bad_where (file, fixP->fx_line, 1974 _("pcrel for lrw/jmpi/jsri to %s too far (0x%lx)"), 1975 symname, (long) val); 1976 else if (! target_big_endian) 1977 buf[0] |= (val & 0xff); 1978 else 1979 buf[1] |= (val & 0xff); 1980 break; 1981 1982 /* Loopt instruction. */ 1983 case BFD_RELOC_MCORE_PCREL_IMM4BY2: 1984 if ((val < -32) || (val > -2)) 1985 as_bad_where (file, fixP->fx_line, 1986 _("pcrel for loopt too far (0x%lx)"), (long) val); 1987 val /= 2; 1988 if (! target_big_endian) 1989 buf[0] |= (val & 0xf); 1990 else 1991 buf[1] |= (val & 0xf); 1992 break; 1993 1994 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: 1995 /* Conditional linker map jsri to bsr. */ 1996 /* If its a local target and close enough, fix it. 1997 NB: >= -2k for backwards bsr; < 2k for forwards... */ 1998 if (fixP->fx_addsy == 0 && val >= -2048 && val < 2048) 1999 { 2000 long nval = (val / 2) & 0x7ff; 2001 nval |= MCORE_INST_BSR; 2002 2003 /* REPLACE the instruction, don't just modify it. */ 2004 buf[0] = INST_BYTE0 (nval); 2005 buf[1] = INST_BYTE1 (nval); 2006 } 2007 else 2008 fixP->fx_done = 0; 2009 break; 2010 2011 case BFD_RELOC_MCORE_PCREL_32: 2012 case BFD_RELOC_VTABLE_INHERIT: 2013 case BFD_RELOC_VTABLE_ENTRY: 2014 fixP->fx_done = 0; 2015 break; 2016 2017 default: 2018 if (fixP->fx_addsy != NULL) 2019 { 2020 /* If the fix is an absolute reloc based on a symbol's 2021 address, then it cannot be resolved until the final link. */ 2022 fixP->fx_done = 0; 2023 } 2024#ifdef OBJ_ELF 2025 else 2026#endif 2027 { 2028 if (fixP->fx_size == 4) 2029 ; 2030 else if (fixP->fx_size == 2 && val >= -32768 && val <= 32767) 2031 ; 2032 else if (fixP->fx_size == 1 && val >= -256 && val <= 255) 2033 ; 2034 else 2035 abort (); 2036 md_number_to_chars (buf, val, fixP->fx_size); 2037 } 2038 break; 2039 } 2040} 2041 2042void 2043md_operand (expressionS * expressionP) 2044{ 2045 /* Ignore leading hash symbol, if poresent. */ 2046 if (* input_line_pointer == '#') 2047 { 2048 input_line_pointer ++; 2049 expression (expressionP); 2050 } 2051} 2052 2053int md_long_jump_size; 2054 2055/* Called just before address relaxation, return the length 2056 by which a fragment must grow to reach it's destination. */ 2057int 2058md_estimate_size_before_relax (fragS * fragP, segT segment_type) 2059{ 2060 switch (fragP->fr_subtype) 2061 { 2062 default: 2063 abort (); 2064 2065 case C (UNCD_JUMP, UNDEF_DISP): 2066 /* Used to be a branch to somewhere which was unknown. */ 2067 if (!fragP->fr_symbol) 2068 fragP->fr_subtype = C (UNCD_JUMP, DISP12); 2069 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 2070 fragP->fr_subtype = C (UNCD_JUMP, DISP12); 2071 else 2072 fragP->fr_subtype = C (UNCD_JUMP, UNDEF_WORD_DISP); 2073 break; 2074 2075 case C (COND_JUMP, UNDEF_DISP): 2076 /* Used to be a branch to somewhere which was unknown. */ 2077 if (fragP->fr_symbol 2078 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 2079 /* Got a symbol and it's defined in this segment, become byte 2080 sized - maybe it will fix up */ 2081 fragP->fr_subtype = C (COND_JUMP, DISP12); 2082 else if (fragP->fr_symbol) 2083 /* Its got a segment, but its not ours, so it will always be long. */ 2084 fragP->fr_subtype = C (COND_JUMP, UNDEF_WORD_DISP); 2085 else 2086 /* We know the abs value. */ 2087 fragP->fr_subtype = C (COND_JUMP, DISP12); 2088 break; 2089 2090 case C (UNCD_JUMP, DISP12): 2091 case C (UNCD_JUMP, DISP32): 2092 case C (UNCD_JUMP, UNDEF_WORD_DISP): 2093 case C (COND_JUMP, DISP12): 2094 case C (COND_JUMP, DISP32): 2095 case C (COND_JUMP, UNDEF_WORD_DISP): 2096 /* When relaxing a section for the second time, we don't need to 2097 do anything besides return the current size. */ 2098 break; 2099 } 2100 2101 return md_relax_table[fragP->fr_subtype].rlx_length; 2102} 2103 2104/* Put number into target byte order. */ 2105 2106void 2107md_number_to_chars (char * ptr, valueT use, int nbytes) 2108{ 2109 if (target_big_endian) 2110 number_to_chars_bigendian (ptr, use, nbytes); 2111 else 2112 number_to_chars_littleendian (ptr, use, nbytes); 2113} 2114 2115/* Round up a section size to the appropriate boundary. */ 2116 2117valueT 2118md_section_align (segT segment ATTRIBUTE_UNUSED, 2119 valueT size) 2120{ 2121 /* Byte alignment is fine. */ 2122 return size; 2123} 2124 2125/* The location from which a PC relative jump should be calculated, 2126 given a PC relative reloc. */ 2127 2128long 2129md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) 2130{ 2131#ifdef OBJ_ELF 2132 /* If the symbol is undefined or defined in another section 2133 we leave the add number alone for the linker to fix it later. 2134 Only account for the PC pre-bump (which is 2 bytes on the MCore). */ 2135 if (fixp->fx_addsy != (symbolS *) NULL 2136 && (! S_IS_DEFINED (fixp->fx_addsy) 2137 || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) 2138 2139 { 2140 gas_assert (fixp->fx_size == 2); /* must be an insn */ 2141 return fixp->fx_size; 2142 } 2143#endif 2144 2145 /* The case where we are going to resolve things... */ 2146 return fixp->fx_size + fixp->fx_where + fixp->fx_frag->fr_address; 2147} 2148 2149#define F(SZ,PCREL) (((SZ) << 1) + (PCREL)) 2150#define MAP(SZ,PCREL,TYPE) case F (SZ, PCREL): code = (TYPE); break 2151 2152arelent * 2153tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) 2154{ 2155 arelent * rel; 2156 bfd_reloc_code_real_type code; 2157 2158 switch (fixp->fx_r_type) 2159 { 2160 /* These confuse the size/pcrel macro approach. */ 2161 case BFD_RELOC_VTABLE_INHERIT: 2162 case BFD_RELOC_VTABLE_ENTRY: 2163 case BFD_RELOC_MCORE_PCREL_IMM4BY2: 2164 case BFD_RELOC_MCORE_PCREL_IMM8BY4: 2165 case BFD_RELOC_MCORE_PCREL_IMM11BY2: 2166 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: 2167 case BFD_RELOC_RVA: 2168 code = fixp->fx_r_type; 2169 break; 2170 2171 default: 2172 switch (F (fixp->fx_size, fixp->fx_pcrel)) 2173 { 2174 MAP (1, 0, BFD_RELOC_8); 2175 MAP (2, 0, BFD_RELOC_16); 2176 MAP (4, 0, BFD_RELOC_32); 2177 MAP (1, 1, BFD_RELOC_8_PCREL); 2178 MAP (2, 1, BFD_RELOC_16_PCREL); 2179 MAP (4, 1, BFD_RELOC_32_PCREL); 2180 default: 2181 code = fixp->fx_r_type; 2182 as_bad (_("Can not do %d byte %srelocation"), 2183 fixp->fx_size, 2184 fixp->fx_pcrel ? _("pc-relative") : ""); 2185 } 2186 break; 2187 } 2188 2189 rel = XNEW (arelent); 2190 rel->sym_ptr_ptr = XNEW (asymbol *); 2191 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 2192 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 2193 /* Always pass the addend along! */ 2194 rel->addend = fixp->fx_addnumber; 2195 2196 rel->howto = bfd_reloc_type_lookup (stdoutput, code); 2197 2198 if (rel->howto == NULL) 2199 { 2200 as_bad_where (fixp->fx_file, fixp->fx_line, 2201 _("Cannot represent relocation type %s"), 2202 bfd_get_reloc_code_name (code)); 2203 2204 /* Set howto to a garbage value so that we can keep going. */ 2205 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 2206 gas_assert (rel->howto != NULL); 2207 } 2208 2209 return rel; 2210} 2211 2212#ifdef OBJ_ELF 2213/* See whether we need to force a relocation into the output file. 2214 This is used to force out switch and PC relative relocations when 2215 relaxing. */ 2216int 2217mcore_force_relocation (fixS * fix) 2218{ 2219 if (fix->fx_r_type == BFD_RELOC_RVA) 2220 return 1; 2221 2222 return generic_force_reloc (fix); 2223} 2224 2225/* Return true if the fix can be handled by GAS, false if it must 2226 be passed through to the linker. */ 2227 2228bfd_boolean 2229mcore_fix_adjustable (fixS * fixP) 2230{ 2231 /* We need the symbol name for the VTABLE entries. */ 2232 if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 2233 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 2234 return 0; 2235 2236 return 1; 2237} 2238#endif /* OBJ_ELF */ 2239