1/* tc-ip2k.c -- Assembler for the Scenix IP2xxx. 2 Copyright (C) 2000-2017 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 19 Boston, MA 02110-1301, USA. */ 20 21#include "as.h" 22#include "subsegs.h" 23#include "symcat.h" 24#include "opcodes/ip2k-desc.h" 25#include "opcodes/ip2k-opc.h" 26#include "cgen.h" 27#include "elf/common.h" 28#include "elf/ip2k.h" 29 30/* Structure to hold all of the different components describing 31 an individual instruction. */ 32typedef struct 33{ 34 const CGEN_INSN * insn; 35 const CGEN_INSN * orig_insn; 36 CGEN_FIELDS fields; 37#if CGEN_INT_INSN_P 38 CGEN_INSN_INT buffer [1]; 39#define INSN_VALUE(buf) (*(buf)) 40#else 41 unsigned char buffer [CGEN_MAX_INSN_SIZE]; 42#define INSN_VALUE(buf) (buf) 43#endif 44 char * addr; 45 fragS * frag; 46 int num_fixups; 47 fixS * fixups [GAS_CGEN_MAX_FIXUPS]; 48 int indices [MAX_OPERAND_INSTANCES]; 49} 50ip2k_insn; 51 52const char comment_chars[] = ";"; 53const char line_comment_chars[] = "#"; 54const char line_separator_chars[] = ""; 55const char EXP_CHARS[] = "eE"; 56const char FLT_CHARS[] = "dD"; 57 58/* Flag to detect when switching to code section where insn alignment is 59 implied. */ 60static int force_code_align = 0; 61 62/* Mach selected from command line. */ 63static int ip2k_mach = 0; 64static unsigned ip2k_mach_bitmask = 0; 65 66 67static void 68ip2k_elf_section_rtn (int i) 69{ 70 obj_elf_section(i); 71 72 if (force_code_align) 73 { 74 do_align (1, NULL, 0, 0); 75 force_code_align = 0; 76 } 77} 78 79static void 80ip2k_elf_section_text (int i) 81{ 82 obj_elf_text(i); 83 84 do_align (1, NULL, 0, 0); 85 force_code_align = 0; 86} 87 88/* The target specific pseudo-ops which we support. */ 89const pseudo_typeS md_pseudo_table[] = 90{ 91 { "text", ip2k_elf_section_text, 0 }, 92 { "sect", ip2k_elf_section_rtn, 0 }, 93 { NULL, NULL, 0 } 94}; 95 96 97 98enum options 99{ 100 OPTION_CPU_IP2022 = OPTION_MD_BASE, 101 OPTION_CPU_IP2022EXT 102}; 103 104struct option md_longopts[] = 105{ 106 { "mip2022", no_argument, NULL, OPTION_CPU_IP2022 }, 107 { "mip2022ext", no_argument, NULL, OPTION_CPU_IP2022EXT }, 108 { NULL, no_argument, NULL, 0 }, 109}; 110size_t md_longopts_size = sizeof (md_longopts); 111 112const char * md_shortopts = ""; 113 114int 115md_parse_option (int c ATTRIBUTE_UNUSED, const char * arg ATTRIBUTE_UNUSED) 116{ 117 switch (c) 118 { 119 case OPTION_CPU_IP2022: 120 ip2k_mach = bfd_mach_ip2022; 121 ip2k_mach_bitmask = 1 << MACH_IP2022; 122 break; 123 124 case OPTION_CPU_IP2022EXT: 125 ip2k_mach = bfd_mach_ip2022ext; 126 ip2k_mach_bitmask = 1 << MACH_IP2022EXT; 127 break; 128 129 default: 130 return 0; 131 } 132 133 return 1; 134} 135 136void 137md_show_usage (FILE * stream) 138{ 139 fprintf (stream, _("IP2K specific command line options:\n")); 140 fprintf (stream, _(" -mip2022 restrict to IP2022 insns \n")); 141 fprintf (stream, _(" -mip2022ext permit extended IP2022 insn\n")); 142} 143 144 145void 146md_begin (void) 147{ 148 /* Initialize the `cgen' interface. */ 149 150 /* Set the machine number and endian. */ 151 gas_cgen_cpu_desc = ip2k_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 152 ip2k_mach_bitmask, 153 CGEN_CPU_OPEN_ENDIAN, 154 CGEN_ENDIAN_BIG, 155 CGEN_CPU_OPEN_END); 156 ip2k_cgen_init_asm (gas_cgen_cpu_desc); 157 158 /* This is a callback from cgen to gas to parse operands. */ 159 cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand); 160 161 /* Set the machine type. */ 162 bfd_default_set_arch_mach (stdoutput, bfd_arch_ip2k, ip2k_mach); 163} 164 165 166void 167md_assemble (char * str) 168{ 169 ip2k_insn insn; 170 char * errmsg; 171 172 /* Initialize GAS's cgen interface for a new instruction. */ 173 gas_cgen_init_parse (); 174 175 insn.insn = ip2k_cgen_assemble_insn 176 (gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg); 177 178 if (!insn.insn) 179 { 180 as_bad ("%s", errmsg); 181 return; 182 } 183 184 /* Check for special relocation required by SKIP instructions. */ 185 if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_SKIPA)) 186 /* Unconditional skip has a 1-bit relocation of the current pc, so 187 that we emit either sb pcl.0 or snb pcl.0 depending on whether 188 the PCL (pc + 2) >> 1 is odd or even. */ 189 { 190 enum cgen_parse_operand_result result_type; 191 bfd_vma value; 192 const char *curpc_plus_2 = ".+2"; 193 const char *err; 194 195 err = cgen_parse_address (gas_cgen_cpu_desc, & curpc_plus_2, 196 IP2K_OPERAND_ADDR16CJP, 197 BFD_RELOC_IP2K_PC_SKIP, 198 & result_type, & value); 199 if (err) 200 { 201 as_bad ("%s", err); 202 return; 203 } 204 } 205 206 /* Doesn't really matter what we pass for RELAX_P here. */ 207 gas_cgen_finish_insn (insn.insn, insn.buffer, 208 CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL); 209} 210 211valueT 212md_section_align (segT segment, valueT size) 213{ 214 int align = bfd_get_section_alignment (stdoutput, segment); 215 216 return ((size + (1 << align) - 1) & -(1 << align)); 217} 218 219 220symbolS * 221md_undefined_symbol (char * name ATTRIBUTE_UNUSED) 222{ 223 return 0; 224} 225 226int 227md_estimate_size_before_relax (fragS * fragP ATTRIBUTE_UNUSED, 228 segT segment ATTRIBUTE_UNUSED) 229{ 230 as_fatal (_("relaxation not supported\n")); 231 return 1; 232} 233 234 235/* *fragP has been relaxed to its final size, and now needs to have 236 the bytes inside it modified to conform to the new size. 237 238 Called after relaxation is finished. 239 fragP->fr_type == rs_machine_dependent. 240 fragP->fr_subtype is the subtype of what the address relaxed to. */ 241 242void 243md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, 244 segT sec ATTRIBUTE_UNUSED, 245 fragS * fragP ATTRIBUTE_UNUSED) 246{ 247} 248 249 250/* Functions concerning relocs. */ 251 252long 253md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED) 254{ 255 abort (); 256} 257 258 259/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP. 260 Returns BFD_RELOC_NONE if no reloc type can be found. 261 *FIXP may be modified if desired. */ 262 263bfd_reloc_code_real_type 264md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED, 265 const CGEN_OPERAND * operand, 266 fixS * fixP ATTRIBUTE_UNUSED) 267{ 268 bfd_reloc_code_real_type result; 269 270 result = BFD_RELOC_NONE; 271 272 switch (operand->type) 273 { 274 case IP2K_OPERAND_FR: 275 case IP2K_OPERAND_ADDR16L: 276 case IP2K_OPERAND_ADDR16H: 277 case IP2K_OPERAND_LIT8: 278 /* These may have been processed at parse time. */ 279 if (fixP->fx_cgen.opinfo != 0) 280 result = fixP->fx_cgen.opinfo; 281 fixP->fx_no_overflow = 1; 282 break; 283 284 case IP2K_OPERAND_ADDR16CJP: 285 result = fixP->fx_cgen.opinfo; 286 if (result == 0 || result == BFD_RELOC_NONE) 287 result = BFD_RELOC_IP2K_ADDR16CJP; 288 fixP->fx_no_overflow = 1; 289 break; 290 291 case IP2K_OPERAND_ADDR16P: 292 result = BFD_RELOC_IP2K_PAGE3; 293 fixP->fx_no_overflow = 1; 294 break; 295 296 default: 297 result = BFD_RELOC_NONE; 298 break; 299 } 300 301 return result; 302} 303 304 305/* Write a value out to the object file, using the appropriate endianness. */ 306 307void 308md_number_to_chars (char * buf, valueT val, int n) 309{ 310 number_to_chars_bigendian (buf, val, n); 311} 312 313const char * 314md_atof (int type, char * litP, int * sizeP) 315{ 316 return ieee_md_atof (type, litP, sizeP, TRUE); 317} 318 319 320/* See whether we need to force a relocation into the output file. 321 Force most of them, since the linker's bfd relocation engine 322 understands range limits better than gas' cgen fixup engine. 323 Consider the case of a fixup intermediate value being larger than 324 the instruction it will be eventually encoded within. */ 325 326int 327ip2k_force_relocation (fixS * fix) 328{ 329 switch (fix->fx_r_type) 330 { 331 case BFD_RELOC_IP2K_FR9: 332 case BFD_RELOC_IP2K_FR_OFFSET: 333 case BFD_RELOC_IP2K_BANK: 334 case BFD_RELOC_IP2K_ADDR16CJP: 335 case BFD_RELOC_IP2K_PAGE3: 336 case BFD_RELOC_IP2K_LO8DATA: 337 case BFD_RELOC_IP2K_HI8DATA: 338 case BFD_RELOC_IP2K_EX8DATA: 339 case BFD_RELOC_IP2K_LO8INSN: 340 case BFD_RELOC_IP2K_HI8INSN: 341 case BFD_RELOC_IP2K_PC_SKIP: 342 case BFD_RELOC_IP2K_TEXT: 343 return 1; 344 345 case BFD_RELOC_16: 346 if (fix->fx_subsy && S_IS_DEFINED (fix->fx_subsy) 347 && fix->fx_addsy && S_IS_DEFINED (fix->fx_addsy) 348 && (S_GET_SEGMENT (fix->fx_addsy)->flags & SEC_CODE)) 349 { 350 fix->fx_r_type = BFD_RELOC_IP2K_TEXT; 351 return 0; 352 } 353 break; 354 355 default: 356 break; 357 } 358 359 return generic_force_reloc (fix); 360} 361 362void 363ip2k_apply_fix (fixS *fixP, valueT *valueP, segT seg) 364{ 365 if (fixP->fx_r_type == BFD_RELOC_IP2K_TEXT 366 && ! fixP->fx_addsy 367 && ! fixP->fx_subsy) 368 { 369 *valueP = ((int)(* valueP)) / 2; 370 fixP->fx_r_type = BFD_RELOC_16; 371 } 372 else if (fixP->fx_r_type == BFD_RELOC_UNUSED + IP2K_OPERAND_FR) 373 { 374 /* Must be careful when we are fixing up an FR. We could be 375 fixing up an offset to (SP) or (DP) in which case we don't 376 want to step on the top 2 bits of the FR operand. The 377 gas_cgen_md_apply_fix doesn't know any better and overwrites 378 the entire operand. We counter this by adding the bits 379 to the new value. */ 380 char *where = fixP->fx_frag->fr_literal + fixP->fx_where; 381 382 /* Canonical name, since used a lot. */ 383 CGEN_CPU_DESC cd = gas_cgen_cpu_desc; 384 CGEN_INSN_INT insn_value 385 = cgen_get_insn_value (cd, (unsigned char *) where, 386 CGEN_INSN_BITSIZE (fixP->fx_cgen.insn)); 387 /* Preserve (DP) or (SP) specification. */ 388 *valueP += (insn_value & 0x180); 389 } 390 391 gas_cgen_md_apply_fix (fixP, valueP, seg); 392} 393 394int 395ip2k_elf_section_flags (flagword flags, 396 bfd_vma attr ATTRIBUTE_UNUSED, 397 int type ATTRIBUTE_UNUSED) 398{ 399 /* This is used to detect when the section changes to an executable section. 400 This function is called by the elf section processing. When we note an 401 executable section specifier we set an internal flag to denote when 402 word alignment should be forced. */ 403 if (flags & SEC_CODE) 404 force_code_align = 1; 405 406 return flags; 407} 408 409