1/* BFD back-end for ARM COFF files. 2 Copyright (C) 1990-2017 Free Software Foundation, Inc. 3 Written by Cygnus Support. 4 5 This file is part of BFD, the Binary File Descriptor library. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 20 MA 02110-1301, USA. */ 21 22#include "sysdep.h" 23#include "bfd.h" 24#include "libbfd.h" 25#include "coff/arm.h" 26#include "coff/internal.h" 27 28#ifdef COFF_WITH_PE 29#include "coff/pe.h" 30#endif 31 32#include "libcoff.h" 33 34/* Macros for manipulation the bits in the flags field of the coff data 35 structure. */ 36#define APCS_26_FLAG(abfd) \ 37 (coff_data (abfd)->flags & F_APCS_26) 38 39#define APCS_FLOAT_FLAG(abfd) \ 40 (coff_data (abfd)->flags & F_APCS_FLOAT) 41 42#define PIC_FLAG(abfd) \ 43 (coff_data (abfd)->flags & F_PIC) 44 45#define APCS_SET(abfd) \ 46 (coff_data (abfd)->flags & F_APCS_SET) 47 48#define SET_APCS_FLAGS(abfd, flgs) \ 49 do \ 50 { \ 51 coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \ 52 coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \ 53 } \ 54 while (0) 55 56#define INTERWORK_FLAG(abfd) \ 57 (coff_data (abfd)->flags & F_INTERWORK) 58 59#define INTERWORK_SET(abfd) \ 60 (coff_data (abfd)->flags & F_INTERWORK_SET) 61 62#define SET_INTERWORK_FLAG(abfd, flg) \ 63 do \ 64 { \ 65 coff_data (abfd)->flags &= ~F_INTERWORK; \ 66 coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \ 67 } \ 68 while (0) 69 70#ifndef NUM_ELEM 71#define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0])) 72#endif 73 74typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype; 75/* Some typedefs for holding instructions. */ 76typedef unsigned long int insn32; 77typedef unsigned short int insn16; 78 79/* The linker script knows the section names for placement. 80 The entry_names are used to do simple name mangling on the stubs. 81 Given a function name, and its type, the stub can be found. The 82 name can be changed. The only requirement is the %s be present. */ 83 84#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" 85#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" 86 87#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" 88#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" 89 90/* Used by the assembler. */ 91 92static bfd_reloc_status_type 93coff_arm_reloc (bfd *abfd, 94 arelent *reloc_entry, 95 asymbol *symbol ATTRIBUTE_UNUSED, 96 void * data, 97 asection *input_section ATTRIBUTE_UNUSED, 98 bfd *output_bfd, 99 char **error_message ATTRIBUTE_UNUSED) 100{ 101 symvalue diff; 102 103 if (output_bfd == NULL) 104 return bfd_reloc_continue; 105 106 diff = reloc_entry->addend; 107 108#define DOIT(x) \ 109 x = ((x & ~howto->dst_mask) \ 110 | (((x & howto->src_mask) + diff) & howto->dst_mask)) 111 112 if (diff != 0) 113 { 114 reloc_howto_type *howto = reloc_entry->howto; 115 unsigned char *addr = (unsigned char *) data + reloc_entry->address; 116 117 switch (howto->size) 118 { 119 case 0: 120 { 121 char x = bfd_get_8 (abfd, addr); 122 DOIT (x); 123 bfd_put_8 (abfd, x, addr); 124 } 125 break; 126 127 case 1: 128 { 129 short x = bfd_get_16 (abfd, addr); 130 DOIT (x); 131 bfd_put_16 (abfd, (bfd_vma) x, addr); 132 } 133 break; 134 135 case 2: 136 { 137 long x = bfd_get_32 (abfd, addr); 138 DOIT (x); 139 bfd_put_32 (abfd, (bfd_vma) x, addr); 140 } 141 break; 142 143 default: 144 abort (); 145 } 146 } 147 148 /* Now let bfd_perform_relocation finish everything up. */ 149 return bfd_reloc_continue; 150} 151 152/* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name() 153 in this file), then TARGET_UNDERSCORE should be defined, otherwise it 154 should not. */ 155#ifndef TARGET_UNDERSCORE 156#define TARGET_UNDERSCORE '_' 157#endif 158 159#ifndef PCRELOFFSET 160#define PCRELOFFSET TRUE 161#endif 162 163/* These most certainly belong somewhere else. Just had to get rid of 164 the manifest constants in the code. */ 165 166#ifdef ARM_WINCE 167 168#define ARM_26D 0 169#define ARM_32 1 170#define ARM_RVA32 2 171#define ARM_26 3 172#define ARM_THUMB12 4 173#define ARM_SECTION 14 174#define ARM_SECREL 15 175 176#else 177 178#define ARM_8 0 179#define ARM_16 1 180#define ARM_32 2 181#define ARM_26 3 182#define ARM_DISP8 4 183#define ARM_DISP16 5 184#define ARM_DISP32 6 185#define ARM_26D 7 186/* 8 is unused. */ 187#define ARM_NEG16 9 188#define ARM_NEG32 10 189#define ARM_RVA32 11 190#define ARM_THUMB9 12 191#define ARM_THUMB12 13 192#define ARM_THUMB23 14 193 194#endif 195 196static bfd_reloc_status_type aoutarm_fix_pcrel_26_done 197 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 198static bfd_reloc_status_type aoutarm_fix_pcrel_26 199 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 200static bfd_reloc_status_type coff_thumb_pcrel_12 201 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 202#ifndef ARM_WINCE 203static bfd_reloc_status_type coff_thumb_pcrel_9 204 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 205static bfd_reloc_status_type coff_thumb_pcrel_23 206 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 207#endif 208 209static reloc_howto_type aoutarm_std_reloc_howto[] = 210 { 211#ifdef ARM_WINCE 212 HOWTO (ARM_26D, 213 2, 214 2, 215 24, 216 TRUE, 217 0, 218 complain_overflow_dont, 219 aoutarm_fix_pcrel_26_done, 220 "ARM_26D", 221 TRUE, /* partial_inplace. */ 222 0x00ffffff, 223 0x0, 224 PCRELOFFSET), 225 HOWTO (ARM_32, 226 0, 227 2, 228 32, 229 FALSE, 230 0, 231 complain_overflow_bitfield, 232 coff_arm_reloc, 233 "ARM_32", 234 TRUE, /* partial_inplace. */ 235 0xffffffff, 236 0xffffffff, 237 PCRELOFFSET), 238 HOWTO (ARM_RVA32, 239 0, 240 2, 241 32, 242 FALSE, 243 0, 244 complain_overflow_bitfield, 245 coff_arm_reloc, 246 "ARM_RVA32", 247 TRUE, /* partial_inplace. */ 248 0xffffffff, 249 0xffffffff, 250 PCRELOFFSET), 251 HOWTO (ARM_26, 252 2, 253 2, 254 24, 255 TRUE, 256 0, 257 complain_overflow_signed, 258 aoutarm_fix_pcrel_26 , 259 "ARM_26", 260 FALSE, 261 0x00ffffff, 262 0x00ffffff, 263 PCRELOFFSET), 264 HOWTO (ARM_THUMB12, 265 1, 266 1, 267 11, 268 TRUE, 269 0, 270 complain_overflow_signed, 271 coff_thumb_pcrel_12 , 272 "ARM_THUMB12", 273 FALSE, 274 0x000007ff, 275 0x000007ff, 276 PCRELOFFSET), 277 EMPTY_HOWTO (-1), 278 EMPTY_HOWTO (-1), 279 EMPTY_HOWTO (-1), 280 EMPTY_HOWTO (-1), 281 EMPTY_HOWTO (-1), 282 EMPTY_HOWTO (-1), 283 EMPTY_HOWTO (-1), 284 EMPTY_HOWTO (-1), 285 EMPTY_HOWTO (-1), 286 HOWTO (ARM_SECTION, 287 0, 288 1, 289 16, 290 FALSE, 291 0, 292 complain_overflow_bitfield, 293 coff_arm_reloc, 294 "ARM_SECTION", 295 TRUE, /* partial_inplace. */ 296 0x0000ffff, 297 0x0000ffff, 298 PCRELOFFSET), 299 HOWTO (ARM_SECREL, 300 0, 301 2, 302 32, 303 FALSE, 304 0, 305 complain_overflow_bitfield, 306 coff_arm_reloc, 307 "ARM_SECREL", 308 TRUE, /* partial_inplace. */ 309 0xffffffff, 310 0xffffffff, 311 PCRELOFFSET), 312#else /* not ARM_WINCE */ 313 HOWTO (ARM_8, 314 0, 315 0, 316 8, 317 FALSE, 318 0, 319 complain_overflow_bitfield, 320 coff_arm_reloc, 321 "ARM_8", 322 TRUE, 323 0x000000ff, 324 0x000000ff, 325 PCRELOFFSET), 326 HOWTO (ARM_16, 327 0, 328 1, 329 16, 330 FALSE, 331 0, 332 complain_overflow_bitfield, 333 coff_arm_reloc, 334 "ARM_16", 335 TRUE, 336 0x0000ffff, 337 0x0000ffff, 338 PCRELOFFSET), 339 HOWTO (ARM_32, 340 0, 341 2, 342 32, 343 FALSE, 344 0, 345 complain_overflow_bitfield, 346 coff_arm_reloc, 347 "ARM_32", 348 TRUE, 349 0xffffffff, 350 0xffffffff, 351 PCRELOFFSET), 352 HOWTO (ARM_26, 353 2, 354 2, 355 24, 356 TRUE, 357 0, 358 complain_overflow_signed, 359 aoutarm_fix_pcrel_26 , 360 "ARM_26", 361 FALSE, 362 0x00ffffff, 363 0x00ffffff, 364 PCRELOFFSET), 365 HOWTO (ARM_DISP8, 366 0, 367 0, 368 8, 369 TRUE, 370 0, 371 complain_overflow_signed, 372 coff_arm_reloc, 373 "ARM_DISP8", 374 TRUE, 375 0x000000ff, 376 0x000000ff, 377 TRUE), 378 HOWTO (ARM_DISP16, 379 0, 380 1, 381 16, 382 TRUE, 383 0, 384 complain_overflow_signed, 385 coff_arm_reloc, 386 "ARM_DISP16", 387 TRUE, 388 0x0000ffff, 389 0x0000ffff, 390 TRUE), 391 HOWTO (ARM_DISP32, 392 0, 393 2, 394 32, 395 TRUE, 396 0, 397 complain_overflow_signed, 398 coff_arm_reloc, 399 "ARM_DISP32", 400 TRUE, 401 0xffffffff, 402 0xffffffff, 403 TRUE), 404 HOWTO (ARM_26D, 405 2, 406 2, 407 24, 408 FALSE, 409 0, 410 complain_overflow_dont, 411 aoutarm_fix_pcrel_26_done, 412 "ARM_26D", 413 TRUE, 414 0x00ffffff, 415 0x0, 416 FALSE), 417 /* 8 is unused */ 418 EMPTY_HOWTO (-1), 419 HOWTO (ARM_NEG16, 420 0, 421 -1, 422 16, 423 FALSE, 424 0, 425 complain_overflow_bitfield, 426 coff_arm_reloc, 427 "ARM_NEG16", 428 TRUE, 429 0x0000ffff, 430 0x0000ffff, 431 FALSE), 432 HOWTO (ARM_NEG32, 433 0, 434 -2, 435 32, 436 FALSE, 437 0, 438 complain_overflow_bitfield, 439 coff_arm_reloc, 440 "ARM_NEG32", 441 TRUE, 442 0xffffffff, 443 0xffffffff, 444 FALSE), 445 HOWTO (ARM_RVA32, 446 0, 447 2, 448 32, 449 FALSE, 450 0, 451 complain_overflow_bitfield, 452 coff_arm_reloc, 453 "ARM_RVA32", 454 TRUE, 455 0xffffffff, 456 0xffffffff, 457 PCRELOFFSET), 458 HOWTO (ARM_THUMB9, 459 1, 460 1, 461 8, 462 TRUE, 463 0, 464 complain_overflow_signed, 465 coff_thumb_pcrel_9 , 466 "ARM_THUMB9", 467 FALSE, 468 0x000000ff, 469 0x000000ff, 470 PCRELOFFSET), 471 HOWTO (ARM_THUMB12, 472 1, 473 1, 474 11, 475 TRUE, 476 0, 477 complain_overflow_signed, 478 coff_thumb_pcrel_12 , 479 "ARM_THUMB12", 480 FALSE, 481 0x000007ff, 482 0x000007ff, 483 PCRELOFFSET), 484 HOWTO (ARM_THUMB23, 485 1, 486 2, 487 22, 488 TRUE, 489 0, 490 complain_overflow_signed, 491 coff_thumb_pcrel_23 , 492 "ARM_THUMB23", 493 FALSE, 494 0x07ff07ff, 495 0x07ff07ff, 496 PCRELOFFSET) 497#endif /* not ARM_WINCE */ 498 }; 499 500#define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto) 501 502#ifdef COFF_WITH_PE 503/* Return TRUE if this relocation should 504 appear in the output .reloc section. */ 505 506static bfd_boolean 507in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED, 508 reloc_howto_type * howto) 509{ 510 return !howto->pc_relative && howto->type != ARM_RVA32; 511} 512#endif 513 514#define RTYPE2HOWTO(cache_ptr, dst) \ 515 (cache_ptr)->howto = \ 516 (dst)->r_type < NUM_RELOCS \ 517 ? aoutarm_std_reloc_howto + (dst)->r_type \ 518 : NULL 519 520#define coff_rtype_to_howto coff_arm_rtype_to_howto 521 522static reloc_howto_type * 523coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED, 524 asection *sec, 525 struct internal_reloc *rel, 526 struct coff_link_hash_entry *h ATTRIBUTE_UNUSED, 527 struct internal_syment *sym ATTRIBUTE_UNUSED, 528 bfd_vma *addendp) 529{ 530 reloc_howto_type * howto; 531 532 if (rel->r_type >= NUM_RELOCS) 533 return NULL; 534 535 howto = aoutarm_std_reloc_howto + rel->r_type; 536 537 if (rel->r_type == ARM_RVA32) 538 *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase; 539 540#if defined COFF_WITH_PE && defined ARM_WINCE 541 if (rel->r_type == ARM_SECREL) 542 { 543 bfd_vma osect_vma; 544 545 if (h && (h->type == bfd_link_hash_defined 546 || h->type == bfd_link_hash_defweak)) 547 osect_vma = h->root.u.def.section->output_section->vma; 548 else 549 { 550 int i; 551 552 /* Sigh, the only way to get the section to offset against 553 is to find it the hard way. */ 554 555 for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++) 556 sec = sec->next; 557 558 osect_vma = sec->output_section->vma; 559 } 560 561 *addendp -= osect_vma; 562 } 563#endif 564 565 return howto; 566} 567 568/* Used by the assembler. */ 569 570static bfd_reloc_status_type 571aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED, 572 arelent *reloc_entry ATTRIBUTE_UNUSED, 573 asymbol *symbol ATTRIBUTE_UNUSED, 574 void * data ATTRIBUTE_UNUSED, 575 asection *input_section ATTRIBUTE_UNUSED, 576 bfd *output_bfd ATTRIBUTE_UNUSED, 577 char **error_message ATTRIBUTE_UNUSED) 578{ 579 /* This is dead simple at present. */ 580 return bfd_reloc_ok; 581} 582 583/* Used by the assembler. */ 584 585static bfd_reloc_status_type 586aoutarm_fix_pcrel_26 (bfd *abfd, 587 arelent *reloc_entry, 588 asymbol *symbol, 589 void * data, 590 asection *input_section, 591 bfd *output_bfd, 592 char **error_message ATTRIBUTE_UNUSED) 593{ 594 bfd_vma relocation; 595 bfd_size_type addr = reloc_entry->address; 596 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr); 597 bfd_reloc_status_type flag = bfd_reloc_ok; 598 599 /* If this is an undefined symbol, return error. */ 600 if (bfd_is_und_section (symbol->section) 601 && (symbol->flags & BSF_WEAK) == 0) 602 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined; 603 604 /* If the sections are different, and we are doing a partial relocation, 605 just ignore it for now. */ 606 if (symbol->section->name != input_section->name 607 && output_bfd != (bfd *)NULL) 608 return bfd_reloc_continue; 609 610 relocation = (target & 0x00ffffff) << 2; 611 relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */ 612 relocation += symbol->value; 613 relocation += symbol->section->output_section->vma; 614 relocation += symbol->section->output_offset; 615 relocation += reloc_entry->addend; 616 relocation -= input_section->output_section->vma; 617 relocation -= input_section->output_offset; 618 relocation -= addr; 619 620 if (relocation & 3) 621 return bfd_reloc_overflow; 622 623 /* Check for overflow. */ 624 if (relocation & 0x02000000) 625 { 626 if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff) 627 flag = bfd_reloc_overflow; 628 } 629 else if (relocation & ~(bfd_vma) 0x03ffffff) 630 flag = bfd_reloc_overflow; 631 632 target &= ~0x00ffffff; 633 target |= (relocation >> 2) & 0x00ffffff; 634 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr); 635 636 /* Now the ARM magic... Change the reloc type so that it is marked as done. 637 Strictly this is only necessary if we are doing a partial relocation. */ 638 reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D]; 639 640 return flag; 641} 642 643static bfd_reloc_status_type 644coff_thumb_pcrel_common (bfd *abfd, 645 arelent *reloc_entry, 646 asymbol *symbol, 647 void * data, 648 asection *input_section, 649 bfd *output_bfd, 650 char **error_message ATTRIBUTE_UNUSED, 651 thumb_pcrel_branchtype btype) 652{ 653 bfd_vma relocation = 0; 654 bfd_size_type addr = reloc_entry->address; 655 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr); 656 bfd_reloc_status_type flag = bfd_reloc_ok; 657 bfd_vma dstmsk; 658 bfd_vma offmsk; 659 bfd_vma signbit; 660 661 /* NOTE: This routine is currently used by GAS, but not by the link 662 phase. */ 663 switch (btype) 664 { 665 case b9: 666 dstmsk = 0x000000ff; 667 offmsk = 0x000001fe; 668 signbit = 0x00000100; 669 break; 670 671 case b12: 672 dstmsk = 0x000007ff; 673 offmsk = 0x00000ffe; 674 signbit = 0x00000800; 675 break; 676 677 case b23: 678 dstmsk = 0x07ff07ff; 679 offmsk = 0x007fffff; 680 signbit = 0x00400000; 681 break; 682 683 default: 684 abort (); 685 } 686 687 /* If this is an undefined symbol, return error. */ 688 if (bfd_is_und_section (symbol->section) 689 && (symbol->flags & BSF_WEAK) == 0) 690 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined; 691 692 /* If the sections are different, and we are doing a partial relocation, 693 just ignore it for now. */ 694 if (symbol->section->name != input_section->name 695 && output_bfd != (bfd *)NULL) 696 return bfd_reloc_continue; 697 698 switch (btype) 699 { 700 case b9: 701 case b12: 702 relocation = ((target & dstmsk) << 1); 703 break; 704 705 case b23: 706 if (bfd_big_endian (abfd)) 707 relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4); 708 else 709 relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15); 710 break; 711 712 default: 713 abort (); 714 } 715 716 relocation = (relocation ^ signbit) - signbit; /* Sign extend. */ 717 relocation += symbol->value; 718 relocation += symbol->section->output_section->vma; 719 relocation += symbol->section->output_offset; 720 relocation += reloc_entry->addend; 721 relocation -= input_section->output_section->vma; 722 relocation -= input_section->output_offset; 723 relocation -= addr; 724 725 if (relocation & 1) 726 return bfd_reloc_overflow; 727 728 /* Check for overflow. */ 729 if (relocation & signbit) 730 { 731 if ((relocation & ~offmsk) != ~offmsk) 732 flag = bfd_reloc_overflow; 733 } 734 else if (relocation & ~offmsk) 735 flag = bfd_reloc_overflow; 736 737 target &= ~dstmsk; 738 switch (btype) 739 { 740 case b9: 741 case b12: 742 target |= (relocation >> 1); 743 break; 744 745 case b23: 746 if (bfd_big_endian (abfd)) 747 target |= (((relocation & 0xfff) >> 1) 748 | ((relocation << 4) & 0x07ff0000)); 749 else 750 target |= (((relocation & 0xffe) << 15) 751 | ((relocation >> 12) & 0x7ff)); 752 break; 753 754 default: 755 abort (); 756 } 757 758 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr); 759 760 /* Now the ARM magic... Change the reloc type so that it is marked as done. 761 Strictly this is only necessary if we are doing a partial relocation. */ 762 reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D]; 763 764 /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */ 765 return flag; 766} 767 768#ifndef ARM_WINCE 769static bfd_reloc_status_type 770coff_thumb_pcrel_23 (bfd *abfd, 771 arelent *reloc_entry, 772 asymbol *symbol, 773 void * data, 774 asection *input_section, 775 bfd *output_bfd, 776 char **error_message) 777{ 778 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, 779 input_section, output_bfd, error_message, 780 b23); 781} 782 783static bfd_reloc_status_type 784coff_thumb_pcrel_9 (bfd *abfd, 785 arelent *reloc_entry, 786 asymbol *symbol, 787 void * data, 788 asection *input_section, 789 bfd *output_bfd, 790 char **error_message) 791{ 792 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, 793 input_section, output_bfd, error_message, 794 b9); 795} 796#endif /* not ARM_WINCE */ 797 798static bfd_reloc_status_type 799coff_thumb_pcrel_12 (bfd *abfd, 800 arelent *reloc_entry, 801 asymbol *symbol, 802 void * data, 803 asection *input_section, 804 bfd *output_bfd, 805 char **error_message) 806{ 807 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, 808 input_section, output_bfd, error_message, 809 b12); 810} 811 812static const struct reloc_howto_struct * 813coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code) 814{ 815#define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j 816 817 if (code == BFD_RELOC_CTOR) 818 switch (bfd_arch_bits_per_address (abfd)) 819 { 820 case 32: 821 code = BFD_RELOC_32; 822 break; 823 default: 824 return NULL; 825 } 826 827 switch (code) 828 { 829#ifdef ARM_WINCE 830 ASTD (BFD_RELOC_32, ARM_32); 831 ASTD (BFD_RELOC_RVA, ARM_RVA32); 832 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); 833 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); 834 ASTD (BFD_RELOC_32_SECREL, ARM_SECREL); 835#else 836 ASTD (BFD_RELOC_8, ARM_8); 837 ASTD (BFD_RELOC_16, ARM_16); 838 ASTD (BFD_RELOC_32, ARM_32); 839 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); 840 ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26); 841 ASTD (BFD_RELOC_8_PCREL, ARM_DISP8); 842 ASTD (BFD_RELOC_16_PCREL, ARM_DISP16); 843 ASTD (BFD_RELOC_32_PCREL, ARM_DISP32); 844 ASTD (BFD_RELOC_RVA, ARM_RVA32); 845 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9); 846 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); 847 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23); 848 ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23); 849#endif 850 default: return NULL; 851 } 852} 853 854static reloc_howto_type * 855coff_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, 856 const char *r_name) 857{ 858 unsigned int i; 859 860 for (i = 0; 861 i < (sizeof (aoutarm_std_reloc_howto) 862 / sizeof (aoutarm_std_reloc_howto[0])); 863 i++) 864 if (aoutarm_std_reloc_howto[i].name != NULL 865 && strcasecmp (aoutarm_std_reloc_howto[i].name, r_name) == 0) 866 return &aoutarm_std_reloc_howto[i]; 867 868 return NULL; 869} 870 871#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2 872#define COFF_PAGE_SIZE 0x1000 873 874/* Turn a howto into a reloc nunmber. */ 875#define SELECT_RELOC(x,howto) { x.r_type = howto->type; } 876#define BADMAG(x) ARMBADMAG(x) 877#define ARM 1 /* Customize coffcode.h. */ 878 879#ifndef ARM_WINCE 880/* Make sure that the 'r_offset' field is copied properly 881 so that identical binaries will compare the same. */ 882#define SWAP_IN_RELOC_OFFSET H_GET_32 883#define SWAP_OUT_RELOC_OFFSET H_PUT_32 884#endif 885 886/* Extend the coff_link_hash_table structure with a few ARM specific fields. 887 This allows us to store global data here without actually creating any 888 global variables, which is a no-no in the BFD world. */ 889struct coff_arm_link_hash_table 890 { 891 /* The original coff_link_hash_table structure. MUST be first field. */ 892 struct coff_link_hash_table root; 893 894 /* The size in bytes of the section containing the Thumb-to-ARM glue. */ 895 bfd_size_type thumb_glue_size; 896 897 /* The size in bytes of the section containing the ARM-to-Thumb glue. */ 898 bfd_size_type arm_glue_size; 899 900 /* An arbitrary input BFD chosen to hold the glue sections. */ 901 bfd * bfd_of_glue_owner; 902 903 /* Support interworking with old, non-interworking aware ARM code. */ 904 int support_old_code; 905}; 906 907/* Get the ARM coff linker hash table from a link_info structure. */ 908#define coff_arm_hash_table(info) \ 909 ((struct coff_arm_link_hash_table *) ((info)->hash)) 910 911/* Create an ARM coff linker hash table. */ 912 913static struct bfd_link_hash_table * 914coff_arm_link_hash_table_create (bfd * abfd) 915{ 916 struct coff_arm_link_hash_table * ret; 917 bfd_size_type amt = sizeof (struct coff_arm_link_hash_table); 918 919 ret = bfd_zmalloc (amt); 920 if (ret == NULL) 921 return NULL; 922 923 if (!_bfd_coff_link_hash_table_init (&ret->root, 924 abfd, 925 _bfd_coff_link_hash_newfunc, 926 sizeof (struct coff_link_hash_entry))) 927 { 928 free (ret); 929 return NULL; 930 } 931 932 return & ret->root.root; 933} 934 935static bfd_boolean 936arm_emit_base_file_entry (struct bfd_link_info *info, 937 bfd *output_bfd, 938 asection *input_section, 939 bfd_vma reloc_offset) 940{ 941 bfd_vma addr = (reloc_offset 942 - input_section->vma 943 + input_section->output_offset 944 + input_section->output_section->vma); 945 946 if (coff_data (output_bfd)->pe) 947 addr -= pe_data (output_bfd)->pe_opthdr.ImageBase; 948 if (fwrite (&addr, sizeof (addr), 1, (FILE *) info->base_file) == 1) 949 return TRUE; 950 951 bfd_set_error (bfd_error_system_call); 952 return FALSE; 953} 954 955#ifndef ARM_WINCE 956/* The thumb form of a long branch is a bit finicky, because the offset 957 encoding is split over two fields, each in it's own instruction. They 958 can occur in any order. So given a thumb form of long branch, and an 959 offset, insert the offset into the thumb branch and return finished 960 instruction. 961 962 It takes two thumb instructions to encode the target address. Each has 963 11 bits to invest. The upper 11 bits are stored in one (identified by 964 H-0.. see below), the lower 11 bits are stored in the other (identified 965 by H-1). 966 967 Combine together and shifted left by 1 (it's a half word address) and 968 there you have it. 969 970 Op: 1111 = F, 971 H-0, upper address-0 = 000 972 Op: 1111 = F, 973 H-1, lower address-0 = 800 974 975 They can be ordered either way, but the arm tools I've seen always put 976 the lower one first. It probably doesn't matter. krk@cygnus.com 977 978 XXX: Actually the order does matter. The second instruction (H-1) 979 moves the computed address into the PC, so it must be the second one 980 in the sequence. The problem, however is that whilst little endian code 981 stores the instructions in HI then LOW order, big endian code does the 982 reverse. nickc@cygnus.com. */ 983 984#define LOW_HI_ORDER 0xF800F000 985#define HI_LOW_ORDER 0xF000F800 986 987static insn32 988insert_thumb_branch (insn32 br_insn, int rel_off) 989{ 990 unsigned int low_bits; 991 unsigned int high_bits; 992 993 BFD_ASSERT ((rel_off & 1) != 1); 994 995 rel_off >>= 1; /* Half word aligned address. */ 996 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */ 997 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */ 998 999 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER) 1000 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits; 1001 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER) 1002 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits; 1003 else 1004 /* FIXME: the BFD library should never abort except for internal errors 1005 - it should return an error status. */ 1006 abort (); /* Error - not a valid branch instruction form. */ 1007 1008 return br_insn; 1009} 1010 1011 1012static struct coff_link_hash_entry * 1013find_thumb_glue (struct bfd_link_info *info, 1014 const char *name, 1015 bfd *input_bfd) 1016{ 1017 char *tmp_name; 1018 struct coff_link_hash_entry *myh; 1019 bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1; 1020 1021 tmp_name = bfd_malloc (amt); 1022 1023 BFD_ASSERT (tmp_name); 1024 1025 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); 1026 1027 myh = coff_link_hash_lookup 1028 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); 1029 1030 if (myh == NULL) 1031 /* xgettext:c-format */ 1032 _bfd_error_handler (_("%B: unable to find THUMB glue '%s' for `%s'"), 1033 input_bfd, tmp_name, name); 1034 1035 free (tmp_name); 1036 1037 return myh; 1038} 1039#endif /* not ARM_WINCE */ 1040 1041static struct coff_link_hash_entry * 1042find_arm_glue (struct bfd_link_info *info, 1043 const char *name, 1044 bfd *input_bfd) 1045{ 1046 char *tmp_name; 1047 struct coff_link_hash_entry * myh; 1048 bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1; 1049 1050 tmp_name = bfd_malloc (amt); 1051 1052 BFD_ASSERT (tmp_name); 1053 1054 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); 1055 1056 myh = coff_link_hash_lookup 1057 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); 1058 1059 if (myh == NULL) 1060 /* xgettext:c-format */ 1061 _bfd_error_handler (_("%B: unable to find ARM glue '%s' for `%s'"), 1062 input_bfd, tmp_name, name); 1063 1064 free (tmp_name); 1065 1066 return myh; 1067} 1068 1069/* 1070 ARM->Thumb glue: 1071 1072 .arm 1073 __func_from_arm: 1074 ldr r12, __func_addr 1075 bx r12 1076 __func_addr: 1077 .word func @ behave as if you saw a ARM_32 reloc 1078*/ 1079 1080#define ARM2THUMB_GLUE_SIZE 12 1081static const insn32 a2t1_ldr_insn = 0xe59fc000; 1082static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; 1083static const insn32 a2t3_func_addr_insn = 0x00000001; 1084 1085/* 1086 Thumb->ARM: Thumb->(non-interworking aware) ARM 1087 1088 .thumb .thumb 1089 .align 2 .align 2 1090 __func_from_thumb: __func_from_thumb: 1091 bx pc push {r6, lr} 1092 nop ldr r6, __func_addr 1093 .arm mov lr, pc 1094 __func_change_to_arm: bx r6 1095 b func .arm 1096 __func_back_to_thumb: 1097 ldmia r13! {r6, lr} 1098 bx lr 1099 __func_addr: 1100 .word func 1101*/ 1102 1103#define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8) 1104#ifndef ARM_WINCE 1105static const insn16 t2a1_bx_pc_insn = 0x4778; 1106static const insn16 t2a2_noop_insn = 0x46c0; 1107static const insn32 t2a3_b_insn = 0xea000000; 1108 1109static const insn16 t2a1_push_insn = 0xb540; 1110static const insn16 t2a2_ldr_insn = 0x4e03; 1111static const insn16 t2a3_mov_insn = 0x46fe; 1112static const insn16 t2a4_bx_insn = 0x4730; 1113static const insn32 t2a5_pop_insn = 0xe8bd4040; 1114static const insn32 t2a6_bx_insn = 0xe12fff1e; 1115#endif 1116 1117/* TODO: 1118 We should really create new local (static) symbols in destination 1119 object for each stub we create. We should also create local 1120 (static) symbols within the stubs when switching between ARM and 1121 Thumb code. This will ensure that the debugger and disassembler 1122 can present a better view of stubs. 1123 1124 We can treat stubs like literal sections, and for the THUMB9 ones 1125 (short addressing range) we should be able to insert the stubs 1126 between sections. i.e. the simplest approach (since relocations 1127 are done on a section basis) is to dump the stubs at the end of 1128 processing a section. That way we can always try and minimise the 1129 offset to and from a stub. However, this does not map well onto 1130 the way that the linker/BFD does its work: mapping all input 1131 sections to output sections via the linker script before doing 1132 all the processing. 1133 1134 Unfortunately it may be easier to just to disallow short range 1135 Thumb->ARM stubs (i.e. no conditional inter-working branches, 1136 only branch-and-link (BL) calls. This will simplify the processing 1137 since we can then put all of the stubs into their own section. 1138 1139 TODO: 1140 On a different subject, rather than complaining when a 1141 branch cannot fit in the number of bits available for the 1142 instruction we should generate a trampoline stub (needed to 1143 address the complete 32bit address space). */ 1144 1145/* The standard COFF backend linker does not cope with the special 1146 Thumb BRANCH23 relocation. The alternative would be to split the 1147 BRANCH23 into seperate HI23 and LO23 relocations. However, it is a 1148 bit simpler simply providing our own relocation driver. */ 1149 1150/* The reloc processing routine for the ARM/Thumb COFF linker. NOTE: 1151 This code is a very slightly modified copy of 1152 _bfd_coff_generic_relocate_section. It would be a much more 1153 maintainable solution to have a MACRO that could be expanded within 1154 _bfd_coff_generic_relocate_section that would only be provided for 1155 ARM/Thumb builds. It is only the code marked THUMBEXTENSION that 1156 is different from the original. */ 1157 1158static bfd_boolean 1159coff_arm_relocate_section (bfd *output_bfd, 1160 struct bfd_link_info *info, 1161 bfd *input_bfd, 1162 asection *input_section, 1163 bfd_byte *contents, 1164 struct internal_reloc *relocs, 1165 struct internal_syment *syms, 1166 asection **sections) 1167{ 1168 struct internal_reloc * rel; 1169 struct internal_reloc * relend; 1170#ifndef ARM_WINCE 1171 bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section); 1172#endif 1173 1174 rel = relocs; 1175 relend = rel + input_section->reloc_count; 1176 1177 for (; rel < relend; rel++) 1178 { 1179 int done = 0; 1180 long symndx; 1181 struct coff_link_hash_entry * h; 1182 struct internal_syment * sym; 1183 bfd_vma addend; 1184 bfd_vma val; 1185 reloc_howto_type * howto; 1186 bfd_reloc_status_type rstat; 1187 bfd_vma h_val; 1188 1189 symndx = rel->r_symndx; 1190 1191 if (symndx == -1) 1192 { 1193 h = NULL; 1194 sym = NULL; 1195 } 1196 else 1197 { 1198 h = obj_coff_sym_hashes (input_bfd)[symndx]; 1199 sym = syms + symndx; 1200 } 1201 1202 /* COFF treats common symbols in one of two ways. Either the 1203 size of the symbol is included in the section contents, or it 1204 is not. We assume that the size is not included, and force 1205 the rtype_to_howto function to adjust the addend as needed. */ 1206 1207 if (sym != NULL && sym->n_scnum != 0) 1208 addend = - sym->n_value; 1209 else 1210 addend = 0; 1211 1212 howto = coff_rtype_to_howto (input_bfd, input_section, rel, h, 1213 sym, &addend); 1214 if (howto == NULL) 1215 return FALSE; 1216 1217 /* The relocation_section function will skip pcrel_offset relocs 1218 when doing a relocatable link. However, we want to convert 1219 ARM_26 to ARM_26D relocs if possible. We return a fake howto in 1220 this case without pcrel_offset set, and adjust the addend to 1221 compensate. 'partial_inplace' is also set, since we want 'done' 1222 relocations to be reflected in section's data. */ 1223 if (rel->r_type == ARM_26 1224 && h != NULL 1225 && bfd_link_relocatable (info) 1226 && (h->root.type == bfd_link_hash_defined 1227 || h->root.type == bfd_link_hash_defweak) 1228 && (h->root.u.def.section->output_section 1229 == input_section->output_section)) 1230 { 1231 static reloc_howto_type fake_arm26_reloc = 1232 HOWTO (ARM_26, 1233 2, 1234 2, 1235 24, 1236 TRUE, 1237 0, 1238 complain_overflow_signed, 1239 aoutarm_fix_pcrel_26 , 1240 "ARM_26", 1241 TRUE, 1242 0x00ffffff, 1243 0x00ffffff, 1244 FALSE); 1245 1246 addend -= rel->r_vaddr - input_section->vma; 1247#ifdef ARM_WINCE 1248 /* FIXME: I don't know why, but the hack is necessary for correct 1249 generation of bl's instruction offset. */ 1250 addend -= 8; 1251#endif 1252 howto = & fake_arm26_reloc; 1253 } 1254 1255#ifdef ARM_WINCE 1256 /* MS ARM-CE makes the reloc relative to the opcode's pc, not 1257 the next opcode's pc, so is off by one. */ 1258 if (howto->pc_relative && !bfd_link_relocatable (info)) 1259 addend -= 8; 1260#endif 1261 1262 /* If we are doing a relocatable link, then we can just ignore 1263 a PC relative reloc that is pcrel_offset. It will already 1264 have the correct value. If this is not a relocatable link, 1265 then we should ignore the symbol value. */ 1266 if (howto->pc_relative && howto->pcrel_offset) 1267 { 1268 if (bfd_link_relocatable (info)) 1269 continue; 1270 /* FIXME - it is not clear which targets need this next test 1271 and which do not. It is known that it is needed for the 1272 VxWorks and EPOC-PE targets, but it is also known that it 1273 was suppressed for other ARM targets. This ought to be 1274 sorted out one day. */ 1275#ifdef ARM_COFF_BUGFIX 1276 /* We must not ignore the symbol value. If the symbol is 1277 within the same section, the relocation should have already 1278 been fixed, but if it is not, we'll be handed a reloc into 1279 the beginning of the symbol's section, so we must not cancel 1280 out the symbol's value, otherwise we'll be adding it in 1281 twice. */ 1282 if (sym != NULL && sym->n_scnum != 0) 1283 addend += sym->n_value; 1284#endif 1285 } 1286 1287 val = 0; 1288 1289 if (h == NULL) 1290 { 1291 asection *sec; 1292 1293 if (symndx == -1) 1294 { 1295 sec = bfd_abs_section_ptr; 1296 val = 0; 1297 } 1298 else 1299 { 1300 sec = sections[symndx]; 1301 val = (sec->output_section->vma 1302 + sec->output_offset 1303 + sym->n_value 1304 - sec->vma); 1305 } 1306 } 1307 else 1308 { 1309 /* We don't output the stubs if we are generating a 1310 relocatable output file, since we may as well leave the 1311 stub generation to the final linker pass. If we fail to 1312 verify that the name is defined, we'll try to build stubs 1313 for an undefined name... */ 1314 if (! bfd_link_relocatable (info) 1315 && ( h->root.type == bfd_link_hash_defined 1316 || h->root.type == bfd_link_hash_defweak)) 1317 { 1318 asection * h_sec = h->root.u.def.section; 1319 const char * name = h->root.root.string; 1320 1321 /* h locates the symbol referenced in the reloc. */ 1322 h_val = (h->root.u.def.value 1323 + h_sec->output_section->vma 1324 + h_sec->output_offset); 1325 1326 if (howto->type == ARM_26) 1327 { 1328 if ( h->symbol_class == C_THUMBSTATFUNC 1329 || h->symbol_class == C_THUMBEXTFUNC) 1330 { 1331 /* Arm code calling a Thumb function. */ 1332 unsigned long int tmp; 1333 bfd_vma my_offset; 1334 asection * s; 1335 long int ret_offset; 1336 struct coff_link_hash_entry * myh; 1337 struct coff_arm_link_hash_table * globals; 1338 1339 myh = find_arm_glue (info, name, input_bfd); 1340 if (myh == NULL) 1341 return FALSE; 1342 1343 globals = coff_arm_hash_table (info); 1344 1345 BFD_ASSERT (globals != NULL); 1346 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1347 1348 my_offset = myh->root.u.def.value; 1349 1350 s = bfd_get_section_by_name (globals->bfd_of_glue_owner, 1351 ARM2THUMB_GLUE_SECTION_NAME); 1352 BFD_ASSERT (s != NULL); 1353 BFD_ASSERT (s->contents != NULL); 1354 BFD_ASSERT (s->output_section != NULL); 1355 1356 if ((my_offset & 0x01) == 0x01) 1357 { 1358 if (h_sec->owner != NULL 1359 && INTERWORK_SET (h_sec->owner) 1360 && ! INTERWORK_FLAG (h_sec->owner)) 1361 _bfd_error_handler 1362 /* xgettext:c-format */ 1363 (_("%B(%s): warning: interworking not enabled.\n" 1364 " first occurrence: %B: arm call to thumb"), 1365 h_sec->owner, input_bfd, name); 1366 1367 --my_offset; 1368 myh->root.u.def.value = my_offset; 1369 1370 bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn, 1371 s->contents + my_offset); 1372 1373 bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn, 1374 s->contents + my_offset + 4); 1375 1376 /* It's a thumb address. Add the low order bit. */ 1377 bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn, 1378 s->contents + my_offset + 8); 1379 1380 if (info->base_file 1381 && !arm_emit_base_file_entry (info, output_bfd, 1382 s, my_offset + 8)) 1383 return FALSE; 1384 } 1385 1386 BFD_ASSERT (my_offset <= globals->arm_glue_size); 1387 1388 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr 1389 - input_section->vma); 1390 1391 tmp = tmp & 0xFF000000; 1392 1393 /* Somehow these are both 4 too far, so subtract 8. */ 1394 ret_offset = 1395 s->output_offset 1396 + my_offset 1397 + s->output_section->vma 1398 - (input_section->output_offset 1399 + input_section->output_section->vma 1400 + rel->r_vaddr) 1401 - 8; 1402 1403 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); 1404 1405 bfd_put_32 (output_bfd, (bfd_vma) tmp, 1406 contents + rel->r_vaddr - input_section->vma); 1407 done = 1; 1408 } 1409 } 1410 1411#ifndef ARM_WINCE 1412 /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */ 1413 else if (howto->type == ARM_THUMB23) 1414 { 1415 if ( h->symbol_class == C_EXT 1416 || h->symbol_class == C_STAT 1417 || h->symbol_class == C_LABEL) 1418 { 1419 /* Thumb code calling an ARM function. */ 1420 asection * s = 0; 1421 bfd_vma my_offset; 1422 unsigned long int tmp; 1423 long int ret_offset; 1424 struct coff_link_hash_entry * myh; 1425 struct coff_arm_link_hash_table * globals; 1426 1427 myh = find_thumb_glue (info, name, input_bfd); 1428 if (myh == NULL) 1429 return FALSE; 1430 1431 globals = coff_arm_hash_table (info); 1432 1433 BFD_ASSERT (globals != NULL); 1434 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1435 1436 my_offset = myh->root.u.def.value; 1437 1438 s = bfd_get_section_by_name (globals->bfd_of_glue_owner, 1439 THUMB2ARM_GLUE_SECTION_NAME); 1440 1441 BFD_ASSERT (s != NULL); 1442 BFD_ASSERT (s->contents != NULL); 1443 BFD_ASSERT (s->output_section != NULL); 1444 1445 if ((my_offset & 0x01) == 0x01) 1446 { 1447 if (h_sec->owner != NULL 1448 && INTERWORK_SET (h_sec->owner) 1449 && ! INTERWORK_FLAG (h_sec->owner) 1450 && ! globals->support_old_code) 1451 _bfd_error_handler 1452 /* xgettext:c-format */ 1453 (_("%B(%s): warning: interworking not enabled.\n" 1454 " first occurrence: %B: thumb call to arm\n" 1455 " consider relinking with --support-old-code enabled"), 1456 h_sec->owner, input_bfd, name); 1457 1458 -- my_offset; 1459 myh->root.u.def.value = my_offset; 1460 1461 if (globals->support_old_code) 1462 { 1463 bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn, 1464 s->contents + my_offset); 1465 1466 bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn, 1467 s->contents + my_offset + 2); 1468 1469 bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn, 1470 s->contents + my_offset + 4); 1471 1472 bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn, 1473 s->contents + my_offset + 6); 1474 1475 bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn, 1476 s->contents + my_offset + 8); 1477 1478 bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn, 1479 s->contents + my_offset + 12); 1480 1481 /* Store the address of the function in the last word of the stub. */ 1482 bfd_put_32 (output_bfd, h_val, 1483 s->contents + my_offset + 16); 1484 1485 if (info->base_file 1486 && !arm_emit_base_file_entry (info, 1487 output_bfd, s, 1488 my_offset + 16)) 1489 return FALSE; 1490 } 1491 else 1492 { 1493 bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn, 1494 s->contents + my_offset); 1495 1496 bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn, 1497 s->contents + my_offset + 2); 1498 1499 ret_offset = 1500 /* Address of destination of the stub. */ 1501 ((bfd_signed_vma) h_val) 1502 - ((bfd_signed_vma) 1503 /* Offset from the start of the current section to the start of the stubs. */ 1504 (s->output_offset 1505 /* Offset of the start of this stub from the start of the stubs. */ 1506 + my_offset 1507 /* Address of the start of the current section. */ 1508 + s->output_section->vma) 1509 /* The branch instruction is 4 bytes into the stub. */ 1510 + 4 1511 /* ARM branches work from the pc of the instruction + 8. */ 1512 + 8); 1513 1514 bfd_put_32 (output_bfd, 1515 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), 1516 s->contents + my_offset + 4); 1517 1518 } 1519 } 1520 1521 BFD_ASSERT (my_offset <= globals->thumb_glue_size); 1522 1523 /* Now go back and fix up the original BL insn to point 1524 to here. */ 1525 ret_offset = 1526 s->output_offset 1527 + my_offset 1528 - (input_section->output_offset 1529 + rel->r_vaddr) 1530 -4; 1531 1532 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr 1533 - input_section->vma); 1534 1535 bfd_put_32 (output_bfd, 1536 (bfd_vma) insert_thumb_branch (tmp, 1537 ret_offset), 1538 contents + rel->r_vaddr - input_section->vma); 1539 1540 done = 1; 1541 } 1542 } 1543#endif 1544 } 1545 1546 /* If the relocation type and destination symbol does not 1547 fall into one of the above categories, then we can just 1548 perform a direct link. */ 1549 1550 if (done) 1551 rstat = bfd_reloc_ok; 1552 else 1553 if ( h->root.type == bfd_link_hash_defined 1554 || h->root.type == bfd_link_hash_defweak) 1555 { 1556 asection *sec; 1557 1558 sec = h->root.u.def.section; 1559 val = (h->root.u.def.value 1560 + sec->output_section->vma 1561 + sec->output_offset); 1562 } 1563 1564 else if (! bfd_link_relocatable (info)) 1565 (*info->callbacks->undefined_symbol) 1566 (info, h->root.root.string, input_bfd, input_section, 1567 rel->r_vaddr - input_section->vma, TRUE); 1568 } 1569 1570 /* Emit a reloc if the backend thinks it needs it. */ 1571 if (info->base_file 1572 && sym 1573 && pe_data(output_bfd)->in_reloc_p(output_bfd, howto) 1574 && !arm_emit_base_file_entry (info, output_bfd, input_section, 1575 rel->r_vaddr)) 1576 return FALSE; 1577 1578 if (done) 1579 rstat = bfd_reloc_ok; 1580#ifndef ARM_WINCE 1581 /* Only perform this fix during the final link, not a relocatable link. */ 1582 else if (! bfd_link_relocatable (info) 1583 && howto->type == ARM_THUMB23) 1584 { 1585 /* This is pretty much a copy of what the default 1586 _bfd_final_link_relocate and _bfd_relocate_contents 1587 routines do to perform a relocation, with special 1588 processing for the split addressing of the Thumb BL 1589 instruction. Again, it would probably be simpler adding a 1590 ThumbBRANCH23 specific macro expansion into the default 1591 code. */ 1592 1593 bfd_vma address = rel->r_vaddr - input_section->vma; 1594 1595 if (address > high_address) 1596 rstat = bfd_reloc_outofrange; 1597 else 1598 { 1599 bfd_vma relocation = val + addend; 1600 int size = bfd_get_reloc_size (howto); 1601 bfd_boolean overflow = FALSE; 1602 bfd_byte *location = contents + address; 1603 bfd_vma x = bfd_get_32 (input_bfd, location); 1604 bfd_vma src_mask = 0x007FFFFE; 1605 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; 1606 bfd_signed_vma reloc_signed_min = ~reloc_signed_max; 1607 bfd_vma check; 1608 bfd_signed_vma signed_check; 1609 bfd_vma add; 1610 bfd_signed_vma signed_add; 1611 1612 BFD_ASSERT (size == 4); 1613 1614 /* howto->pc_relative should be TRUE for type 14 BRANCH23. */ 1615 relocation -= (input_section->output_section->vma 1616 + input_section->output_offset); 1617 1618 /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */ 1619 relocation -= address; 1620 1621 /* No need to negate the relocation with BRANCH23. */ 1622 /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */ 1623 /* howto->rightshift == 1 */ 1624 1625 /* Drop unwanted bits from the value we are relocating to. */ 1626 check = relocation >> howto->rightshift; 1627 1628 /* If this is a signed value, the rightshift just dropped 1629 leading 1 bits (assuming twos complement). */ 1630 if ((bfd_signed_vma) relocation >= 0) 1631 signed_check = check; 1632 else 1633 signed_check = (check 1634 | ((bfd_vma) - 1 1635 & ~((bfd_vma) - 1 >> howto->rightshift))); 1636 1637 /* Get the value from the object file. */ 1638 if (bfd_big_endian (input_bfd)) 1639 add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1); 1640 else 1641 add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15)); 1642 1643 /* Get the value from the object file with an appropriate sign. 1644 The expression involving howto->src_mask isolates the upper 1645 bit of src_mask. If that bit is set in the value we are 1646 adding, it is negative, and we subtract out that number times 1647 two. If src_mask includes the highest possible bit, then we 1648 can not get the upper bit, but that does not matter since 1649 signed_add needs no adjustment to become negative in that 1650 case. */ 1651 signed_add = add; 1652 1653 if ((add & (((~ src_mask) >> 1) & src_mask)) != 0) 1654 signed_add -= (((~ src_mask) >> 1) & src_mask) << 1; 1655 1656 /* howto->bitpos == 0 */ 1657 /* Add the value from the object file, shifted so that it is a 1658 straight number. */ 1659 signed_check += signed_add; 1660 relocation += signed_add; 1661 1662 BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed); 1663 1664 /* Assumes two's complement. */ 1665 if ( signed_check > reloc_signed_max 1666 || signed_check < reloc_signed_min) 1667 overflow = TRUE; 1668 1669 /* Put the relocation into the correct bits. 1670 For a BLX instruction, make sure that the relocation is rounded up 1671 to a word boundary. This follows the semantics of the instruction 1672 which specifies that bit 1 of the target address will come from bit 1673 1 of the base address. */ 1674 if (bfd_big_endian (input_bfd)) 1675 { 1676 if ((x & 0x1800) == 0x0800 && (relocation & 0x02)) 1677 relocation += 2; 1678 relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000)); 1679 } 1680 else 1681 { 1682 if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02)) 1683 relocation += 2; 1684 relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff)); 1685 } 1686 1687 /* Add the relocation to the correct bits of X. */ 1688 x = ((x & ~howto->dst_mask) | relocation); 1689 1690 /* Put the relocated value back in the object file. */ 1691 bfd_put_32 (input_bfd, x, location); 1692 1693 rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok; 1694 } 1695 } 1696#endif 1697 else 1698 if (bfd_link_relocatable (info) && ! howto->partial_inplace) 1699 rstat = bfd_reloc_ok; 1700 else 1701 rstat = _bfd_final_link_relocate (howto, input_bfd, input_section, 1702 contents, 1703 rel->r_vaddr - input_section->vma, 1704 val, addend); 1705 /* Only perform this fix during the final link, not a relocatable link. */ 1706 if (! bfd_link_relocatable (info) 1707 && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32)) 1708 { 1709 /* Determine if we need to set the bottom bit of a relocated address 1710 because the address is the address of a Thumb code symbol. */ 1711 int patchit = FALSE; 1712 1713 if (h != NULL 1714 && ( h->symbol_class == C_THUMBSTATFUNC 1715 || h->symbol_class == C_THUMBEXTFUNC)) 1716 { 1717 patchit = TRUE; 1718 } 1719 else if (sym != NULL 1720 && sym->n_scnum > N_UNDEF) 1721 { 1722 /* No hash entry - use the symbol instead. */ 1723 if ( sym->n_sclass == C_THUMBSTATFUNC 1724 || sym->n_sclass == C_THUMBEXTFUNC) 1725 patchit = TRUE; 1726 } 1727 1728 if (patchit) 1729 { 1730 bfd_byte * location = contents + rel->r_vaddr - input_section->vma; 1731 bfd_vma x = bfd_get_32 (input_bfd, location); 1732 1733 bfd_put_32 (input_bfd, x | 1, location); 1734 } 1735 } 1736 1737 switch (rstat) 1738 { 1739 default: 1740 abort (); 1741 case bfd_reloc_ok: 1742 break; 1743 case bfd_reloc_outofrange: 1744 _bfd_error_handler 1745 /* xgettext:c-format */ 1746 (_("%B: bad reloc address 0x%lx in section `%A'"), 1747 input_bfd, input_section, (unsigned long) rel->r_vaddr); 1748 return FALSE; 1749 case bfd_reloc_overflow: 1750 { 1751 const char *name; 1752 char buf[SYMNMLEN + 1]; 1753 1754 if (symndx == -1) 1755 name = "*ABS*"; 1756 else if (h != NULL) 1757 name = NULL; 1758 else 1759 { 1760 name = _bfd_coff_internal_syment_name (input_bfd, sym, buf); 1761 if (name == NULL) 1762 return FALSE; 1763 } 1764 1765 (*info->callbacks->reloc_overflow) 1766 (info, (h ? &h->root : NULL), name, howto->name, 1767 (bfd_vma) 0, input_bfd, input_section, 1768 rel->r_vaddr - input_section->vma); 1769 } 1770 } 1771 } 1772 1773 return TRUE; 1774} 1775 1776#ifndef COFF_IMAGE_WITH_PE 1777 1778bfd_boolean 1779bfd_arm_allocate_interworking_sections (struct bfd_link_info * info) 1780{ 1781 asection * s; 1782 bfd_byte * foo; 1783 struct coff_arm_link_hash_table * globals; 1784 1785 globals = coff_arm_hash_table (info); 1786 1787 BFD_ASSERT (globals != NULL); 1788 1789 if (globals->arm_glue_size != 0) 1790 { 1791 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1792 1793 s = bfd_get_section_by_name 1794 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); 1795 1796 BFD_ASSERT (s != NULL); 1797 1798 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size); 1799 1800 s->size = globals->arm_glue_size; 1801 s->contents = foo; 1802 } 1803 1804 if (globals->thumb_glue_size != 0) 1805 { 1806 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1807 1808 s = bfd_get_section_by_name 1809 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME); 1810 1811 BFD_ASSERT (s != NULL); 1812 1813 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size); 1814 1815 s->size = globals->thumb_glue_size; 1816 s->contents = foo; 1817 } 1818 1819 return TRUE; 1820} 1821 1822static void 1823record_arm_to_thumb_glue (struct bfd_link_info * info, 1824 struct coff_link_hash_entry * h) 1825{ 1826 const char * name = h->root.root.string; 1827 register asection * s; 1828 char * tmp_name; 1829 struct coff_link_hash_entry * myh; 1830 struct bfd_link_hash_entry * bh; 1831 struct coff_arm_link_hash_table * globals; 1832 bfd_vma val; 1833 bfd_size_type amt; 1834 1835 globals = coff_arm_hash_table (info); 1836 1837 BFD_ASSERT (globals != NULL); 1838 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1839 1840 s = bfd_get_section_by_name 1841 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); 1842 1843 BFD_ASSERT (s != NULL); 1844 1845 amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1; 1846 tmp_name = bfd_malloc (amt); 1847 1848 BFD_ASSERT (tmp_name); 1849 1850 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); 1851 1852 myh = coff_link_hash_lookup 1853 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); 1854 1855 if (myh != NULL) 1856 { 1857 free (tmp_name); 1858 /* We've already seen this guy. */ 1859 return; 1860 } 1861 1862 /* The only trick here is using globals->arm_glue_size as the value. Even 1863 though the section isn't allocated yet, this is where we will be putting 1864 it. */ 1865 bh = NULL; 1866 val = globals->arm_glue_size + 1; 1867 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, 1868 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh); 1869 1870 free (tmp_name); 1871 1872 globals->arm_glue_size += ARM2THUMB_GLUE_SIZE; 1873 1874 return; 1875} 1876 1877#ifndef ARM_WINCE 1878static void 1879record_thumb_to_arm_glue (struct bfd_link_info * info, 1880 struct coff_link_hash_entry * h) 1881{ 1882 const char * name = h->root.root.string; 1883 asection * s; 1884 char * tmp_name; 1885 struct coff_link_hash_entry * myh; 1886 struct bfd_link_hash_entry * bh; 1887 struct coff_arm_link_hash_table * globals; 1888 bfd_vma val; 1889 bfd_size_type amt; 1890 1891 globals = coff_arm_hash_table (info); 1892 1893 BFD_ASSERT (globals != NULL); 1894 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1895 1896 s = bfd_get_section_by_name 1897 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME); 1898 1899 BFD_ASSERT (s != NULL); 1900 1901 amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1; 1902 tmp_name = bfd_malloc (amt); 1903 1904 BFD_ASSERT (tmp_name); 1905 1906 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); 1907 1908 myh = coff_link_hash_lookup 1909 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); 1910 1911 if (myh != NULL) 1912 { 1913 free (tmp_name); 1914 /* We've already seen this guy. */ 1915 return; 1916 } 1917 1918 bh = NULL; 1919 val = globals->thumb_glue_size + 1; 1920 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, 1921 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh); 1922 1923 /* If we mark it 'thumb', the disassembler will do a better job. */ 1924 myh = (struct coff_link_hash_entry *) bh; 1925 myh->symbol_class = C_THUMBEXTFUNC; 1926 1927 free (tmp_name); 1928 1929 /* Allocate another symbol to mark where we switch to arm mode. */ 1930 1931#define CHANGE_TO_ARM "__%s_change_to_arm" 1932#define BACK_FROM_ARM "__%s_back_from_arm" 1933 1934 amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1; 1935 tmp_name = bfd_malloc (amt); 1936 1937 BFD_ASSERT (tmp_name); 1938 1939 sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name); 1940 1941 bh = NULL; 1942 val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4); 1943 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, 1944 BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh); 1945 1946 free (tmp_name); 1947 1948 globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE; 1949 1950 return; 1951} 1952#endif /* not ARM_WINCE */ 1953 1954/* Select a BFD to be used to hold the sections used by the glue code. 1955 This function is called from the linker scripts in ld/emultempl/ 1956 {armcoff/pe}.em */ 1957 1958bfd_boolean 1959bfd_arm_get_bfd_for_interworking (bfd * abfd, 1960 struct bfd_link_info * info) 1961{ 1962 struct coff_arm_link_hash_table * globals; 1963 flagword flags; 1964 asection * sec; 1965 1966 /* If we are only performing a partial link do not bother 1967 getting a bfd to hold the glue. */ 1968 if (bfd_link_relocatable (info)) 1969 return TRUE; 1970 1971 globals = coff_arm_hash_table (info); 1972 1973 BFD_ASSERT (globals != NULL); 1974 1975 if (globals->bfd_of_glue_owner != NULL) 1976 return TRUE; 1977 1978 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME); 1979 1980 if (sec == NULL) 1981 { 1982 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY 1983 | SEC_CODE | SEC_READONLY); 1984 sec = bfd_make_section_with_flags (abfd, ARM2THUMB_GLUE_SECTION_NAME, 1985 flags); 1986 if (sec == NULL 1987 || ! bfd_set_section_alignment (abfd, sec, 2)) 1988 return FALSE; 1989 } 1990 1991 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME); 1992 1993 if (sec == NULL) 1994 { 1995 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY 1996 | SEC_CODE | SEC_READONLY); 1997 sec = bfd_make_section_with_flags (abfd, THUMB2ARM_GLUE_SECTION_NAME, 1998 flags); 1999 2000 if (sec == NULL 2001 || ! bfd_set_section_alignment (abfd, sec, 2)) 2002 return FALSE; 2003 } 2004 2005 /* Save the bfd for later use. */ 2006 globals->bfd_of_glue_owner = abfd; 2007 2008 return TRUE; 2009} 2010 2011bfd_boolean 2012bfd_arm_process_before_allocation (bfd * abfd, 2013 struct bfd_link_info * info, 2014 int support_old_code) 2015{ 2016 asection * sec; 2017 struct coff_arm_link_hash_table * globals; 2018 2019 /* If we are only performing a partial link do not bother 2020 to construct any glue. */ 2021 if (bfd_link_relocatable (info)) 2022 return TRUE; 2023 2024 /* Here we have a bfd that is to be included on the link. We have a hook 2025 to do reloc rummaging, before section sizes are nailed down. */ 2026 _bfd_coff_get_external_symbols (abfd); 2027 2028 globals = coff_arm_hash_table (info); 2029 2030 BFD_ASSERT (globals != NULL); 2031 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 2032 2033 globals->support_old_code = support_old_code; 2034 2035 /* Rummage around all the relocs and map the glue vectors. */ 2036 sec = abfd->sections; 2037 2038 if (sec == NULL) 2039 return TRUE; 2040 2041 for (; sec != NULL; sec = sec->next) 2042 { 2043 struct internal_reloc * i; 2044 struct internal_reloc * rel; 2045 2046 if (sec->reloc_count == 0) 2047 continue; 2048 2049 /* Load the relocs. */ 2050 /* FIXME: there may be a storage leak here. */ 2051 i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0); 2052 2053 BFD_ASSERT (i != 0); 2054 2055 for (rel = i; rel < i + sec->reloc_count; ++rel) 2056 { 2057 unsigned short r_type = rel->r_type; 2058 long symndx; 2059 struct coff_link_hash_entry * h; 2060 2061 symndx = rel->r_symndx; 2062 2063 /* If the relocation is not against a symbol it cannot concern us. */ 2064 if (symndx == -1) 2065 continue; 2066 2067 /* If the index is outside of the range of our table, something has gone wrong. */ 2068 if (symndx >= obj_conv_table_size (abfd)) 2069 { 2070 /* xgettext:c-format */ 2071 _bfd_error_handler (_("%B: illegal symbol index in reloc: %d"), 2072 abfd, symndx); 2073 continue; 2074 } 2075 2076 h = obj_coff_sym_hashes (abfd)[symndx]; 2077 2078 /* If the relocation is against a static symbol it must be within 2079 the current section and so cannot be a cross ARM/Thumb relocation. */ 2080 if (h == NULL) 2081 continue; 2082 2083 switch (r_type) 2084 { 2085 case ARM_26: 2086 /* This one is a call from arm code. We need to look up 2087 the target of the call. If it is a thumb target, we 2088 insert glue. */ 2089 2090 if (h->symbol_class == C_THUMBEXTFUNC) 2091 record_arm_to_thumb_glue (info, h); 2092 break; 2093 2094#ifndef ARM_WINCE 2095 case ARM_THUMB23: 2096 /* This one is a call from thumb code. We used to look 2097 for ARM_THUMB9 and ARM_THUMB12 as well. We need to look 2098 up the target of the call. If it is an arm target, we 2099 insert glue. If the symbol does not exist it will be 2100 given a class of C_EXT and so we will generate a stub 2101 for it. This is not really a problem, since the link 2102 is doomed anyway. */ 2103 2104 switch (h->symbol_class) 2105 { 2106 case C_EXT: 2107 case C_STAT: 2108 case C_LABEL: 2109 record_thumb_to_arm_glue (info, h); 2110 break; 2111 default: 2112 ; 2113 } 2114 break; 2115#endif 2116 2117 default: 2118 break; 2119 } 2120 } 2121 } 2122 2123 return TRUE; 2124} 2125 2126#endif /* ! defined (COFF_IMAGE_WITH_PE) */ 2127 2128#define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup 2129#define coff_bfd_reloc_name_lookup coff_arm_reloc_name_lookup 2130#define coff_relocate_section coff_arm_relocate_section 2131#define coff_bfd_is_local_label_name coff_arm_is_local_label_name 2132#define coff_adjust_symndx coff_arm_adjust_symndx 2133#define coff_link_output_has_begun coff_arm_link_output_has_begun 2134#define coff_final_link_postscript coff_arm_final_link_postscript 2135#define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data 2136#define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data 2137#define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags 2138#define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data 2139#define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create 2140 2141/* When doing a relocatable link, we want to convert ARM_26 relocs 2142 into ARM_26D relocs. */ 2143 2144static bfd_boolean 2145coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED, 2146 struct bfd_link_info *info ATTRIBUTE_UNUSED, 2147 bfd *ibfd, 2148 asection *sec, 2149 struct internal_reloc *irel, 2150 bfd_boolean *adjustedp) 2151{ 2152 if (irel->r_type == ARM_26) 2153 { 2154 struct coff_link_hash_entry *h; 2155 2156 h = obj_coff_sym_hashes (ibfd)[irel->r_symndx]; 2157 if (h != NULL 2158 && (h->root.type == bfd_link_hash_defined 2159 || h->root.type == bfd_link_hash_defweak) 2160 && h->root.u.def.section->output_section == sec->output_section) 2161 irel->r_type = ARM_26D; 2162 } 2163 *adjustedp = FALSE; 2164 return TRUE; 2165} 2166 2167/* Called when merging the private data areas of two BFDs. 2168 This is important as it allows us to detect if we are 2169 attempting to merge binaries compiled for different ARM 2170 targets, eg different CPUs or different APCS's. */ 2171 2172static bfd_boolean 2173coff_arm_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info) 2174{ 2175 bfd *obfd = info->output_bfd; 2176 BFD_ASSERT (ibfd != NULL && obfd != NULL); 2177 2178 if (ibfd == obfd) 2179 return TRUE; 2180 2181 /* If the two formats are different we cannot merge anything. 2182 This is not an error, since it is permissable to change the 2183 input and output formats. */ 2184 if ( ibfd->xvec->flavour != bfd_target_coff_flavour 2185 || obfd->xvec->flavour != bfd_target_coff_flavour) 2186 return TRUE; 2187 2188 /* Determine what should happen if the input ARM architecture 2189 does not match the output ARM architecture. */ 2190 if (! bfd_arm_merge_machines (ibfd, obfd)) 2191 return FALSE; 2192 2193 /* Verify that the APCS is the same for the two BFDs. */ 2194 if (APCS_SET (ibfd)) 2195 { 2196 if (APCS_SET (obfd)) 2197 { 2198 /* If the src and dest have different APCS flag bits set, fail. */ 2199 if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd)) 2200 { 2201 _bfd_error_handler 2202 /* xgettext: c-format */ 2203 (_("error: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"), 2204 ibfd, obfd, 2205 APCS_26_FLAG (ibfd) ? 26 : 32, 2206 APCS_26_FLAG (obfd) ? 26 : 32 2207 ); 2208 2209 bfd_set_error (bfd_error_wrong_format); 2210 return FALSE; 2211 } 2212 2213 if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd)) 2214 { 2215 if (APCS_FLOAT_FLAG (ibfd)) 2216 /* xgettext: c-format */ 2217 _bfd_error_handler (_("\ 2218error: %B passes floats in float registers, whereas %B passes them in integer registers"), 2219 ibfd, obfd); 2220 else 2221 /* xgettext: c-format */ 2222 _bfd_error_handler (_("\ 2223error: %B passes floats in integer registers, whereas %B passes them in float registers"), 2224 ibfd, obfd); 2225 2226 bfd_set_error (bfd_error_wrong_format); 2227 return FALSE; 2228 } 2229 2230 if (PIC_FLAG (obfd) != PIC_FLAG (ibfd)) 2231 { 2232 if (PIC_FLAG (ibfd)) 2233 /* xgettext: c-format */ 2234 _bfd_error_handler (_("\ 2235error: %B is compiled as position independent code, whereas target %B is absolute position"), 2236 ibfd, obfd); 2237 else 2238 /* xgettext: c-format */ 2239 _bfd_error_handler (_("\ 2240error: %B is compiled as absolute position code, whereas target %B is position independent"), 2241 ibfd, obfd); 2242 2243 bfd_set_error (bfd_error_wrong_format); 2244 return FALSE; 2245 } 2246 } 2247 else 2248 { 2249 SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd)); 2250 2251 /* Set up the arch and fields as well as these are probably wrong. */ 2252 bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); 2253 } 2254 } 2255 2256 /* Check the interworking support. */ 2257 if (INTERWORK_SET (ibfd)) 2258 { 2259 if (INTERWORK_SET (obfd)) 2260 { 2261 /* If the src and dest differ in their interworking issue a warning. */ 2262 if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd)) 2263 { 2264 if (INTERWORK_FLAG (ibfd)) 2265 /* xgettext: c-format */ 2266 _bfd_error_handler (_("\ 2267Warning: %B supports interworking, whereas %B does not"), 2268 ibfd, obfd); 2269 else 2270 /* xgettext: c-format */ 2271 _bfd_error_handler (_("\ 2272Warning: %B does not support interworking, whereas %B does"), 2273 ibfd, obfd); 2274 } 2275 } 2276 else 2277 { 2278 SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd)); 2279 } 2280 } 2281 2282 return TRUE; 2283} 2284 2285/* Display the flags field. */ 2286 2287static bfd_boolean 2288coff_arm_print_private_bfd_data (bfd * abfd, void * ptr) 2289{ 2290 FILE * file = (FILE *) ptr; 2291 2292 BFD_ASSERT (abfd != NULL && ptr != NULL); 2293 2294 fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags); 2295 2296 if (APCS_SET (abfd)) 2297 { 2298 /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */ 2299 fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32); 2300 2301 if (APCS_FLOAT_FLAG (abfd)) 2302 fprintf (file, _(" [floats passed in float registers]")); 2303 else 2304 fprintf (file, _(" [floats passed in integer registers]")); 2305 2306 if (PIC_FLAG (abfd)) 2307 fprintf (file, _(" [position independent]")); 2308 else 2309 fprintf (file, _(" [absolute position]")); 2310 } 2311 2312 if (! INTERWORK_SET (abfd)) 2313 fprintf (file, _(" [interworking flag not initialised]")); 2314 else if (INTERWORK_FLAG (abfd)) 2315 fprintf (file, _(" [interworking supported]")); 2316 else 2317 fprintf (file, _(" [interworking not supported]")); 2318 2319 fputc ('\n', file); 2320 2321 return TRUE; 2322} 2323 2324/* Copies the given flags into the coff_tdata.flags field. 2325 Typically these flags come from the f_flags[] field of 2326 the COFF filehdr structure, which contains important, 2327 target specific information. 2328 Note: Although this function is static, it is explicitly 2329 called from both coffcode.h and peicode.h. */ 2330 2331static bfd_boolean 2332_bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags) 2333{ 2334 flagword flag; 2335 2336 BFD_ASSERT (abfd != NULL); 2337 2338 flag = (flags & F_APCS26) ? F_APCS_26 : 0; 2339 2340 /* Make sure that the APCS field has not been initialised to the opposite 2341 value. */ 2342 if (APCS_SET (abfd) 2343 && ( (APCS_26_FLAG (abfd) != flag) 2344 || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT)) 2345 || (PIC_FLAG (abfd) != (flags & F_PIC)) 2346 )) 2347 return FALSE; 2348 2349 flag |= (flags & (F_APCS_FLOAT | F_PIC)); 2350 2351 SET_APCS_FLAGS (abfd, flag); 2352 2353 flag = (flags & F_INTERWORK); 2354 2355 /* If the BFD has already had its interworking flag set, but it 2356 is different from the value that we have been asked to set, 2357 then assume that that merged code will not support interworking 2358 and set the flag accordingly. */ 2359 if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag)) 2360 { 2361 if (flag) 2362 _bfd_error_handler (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"), 2363 abfd); 2364 else 2365 _bfd_error_handler (_("Warning: Clearing the interworking flag of %B due to outside request"), 2366 abfd); 2367 flag = 0; 2368 } 2369 2370 SET_INTERWORK_FLAG (abfd, flag); 2371 2372 return TRUE; 2373} 2374 2375/* Copy the important parts of the target specific data 2376 from one instance of a BFD to another. */ 2377 2378static bfd_boolean 2379coff_arm_copy_private_bfd_data (bfd * src, bfd * dest) 2380{ 2381 BFD_ASSERT (src != NULL && dest != NULL); 2382 2383 if (src == dest) 2384 return TRUE; 2385 2386 /* If the destination is not in the same format as the source, do not do 2387 the copy. */ 2388 if (src->xvec != dest->xvec) 2389 return TRUE; 2390 2391 /* Copy the flags field. */ 2392 if (APCS_SET (src)) 2393 { 2394 if (APCS_SET (dest)) 2395 { 2396 /* If the src and dest have different APCS flag bits set, fail. */ 2397 if (APCS_26_FLAG (dest) != APCS_26_FLAG (src)) 2398 return FALSE; 2399 2400 if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src)) 2401 return FALSE; 2402 2403 if (PIC_FLAG (dest) != PIC_FLAG (src)) 2404 return FALSE; 2405 } 2406 else 2407 SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src) 2408 | PIC_FLAG (src)); 2409 } 2410 2411 if (INTERWORK_SET (src)) 2412 { 2413 if (INTERWORK_SET (dest)) 2414 { 2415 /* If the src and dest have different interworking flags then turn 2416 off the interworking bit. */ 2417 if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src)) 2418 { 2419 if (INTERWORK_FLAG (dest)) 2420 { 2421 /* xgettext:c-format */ 2422 _bfd_error_handler (_("\ 2423Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"), 2424 dest, src); 2425 } 2426 2427 SET_INTERWORK_FLAG (dest, 0); 2428 } 2429 } 2430 else 2431 { 2432 SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src)); 2433 } 2434 } 2435 2436 return TRUE; 2437} 2438 2439/* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX 2440 *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */ 2441#ifndef LOCAL_LABEL_PREFIX 2442#define LOCAL_LABEL_PREFIX "" 2443#endif 2444#ifndef USER_LABEL_PREFIX 2445#define USER_LABEL_PREFIX "_" 2446#endif 2447 2448/* Like _bfd_coff_is_local_label_name, but 2449 a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be 2450 non-local. 2451 b) Allow other prefixes than ".", e.g. an empty prefix would cause all 2452 labels of the form Lxxx to be stripped. */ 2453 2454static bfd_boolean 2455coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED, 2456 const char * name) 2457{ 2458#ifdef USER_LABEL_PREFIX 2459 if (USER_LABEL_PREFIX[0] != 0) 2460 { 2461 size_t len = strlen (USER_LABEL_PREFIX); 2462 2463 if (strncmp (name, USER_LABEL_PREFIX, len) == 0) 2464 return FALSE; 2465 } 2466#endif 2467 2468#ifdef LOCAL_LABEL_PREFIX 2469 /* If there is a prefix for local labels then look for this. 2470 If the prefix exists, but it is empty, then ignore the test. */ 2471 2472 if (LOCAL_LABEL_PREFIX[0] != 0) 2473 { 2474 size_t len = strlen (LOCAL_LABEL_PREFIX); 2475 2476 if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0) 2477 return FALSE; 2478 2479 /* Perform the checks below for the rest of the name. */ 2480 name += len; 2481 } 2482#endif 2483 2484 return name[0] == 'L'; 2485} 2486 2487/* This piece of machinery exists only to guarantee that the bfd that holds 2488 the glue section is written last. 2489 2490 This does depend on bfd_make_section attaching a new section to the 2491 end of the section list for the bfd. */ 2492 2493static bfd_boolean 2494coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info) 2495{ 2496 return (sub->output_has_begun 2497 || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner); 2498} 2499 2500static bfd_boolean 2501coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED, 2502 struct coff_final_link_info * pfinfo) 2503{ 2504 struct coff_arm_link_hash_table * globals; 2505 2506 globals = coff_arm_hash_table (pfinfo->info); 2507 2508 BFD_ASSERT (globals != NULL); 2509 2510 if (globals->bfd_of_glue_owner != NULL) 2511 { 2512 if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner)) 2513 return FALSE; 2514 2515 globals->bfd_of_glue_owner->output_has_begun = TRUE; 2516 } 2517 2518 return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); 2519} 2520 2521#ifndef bfd_pe_print_pdata 2522#define bfd_pe_print_pdata NULL 2523#endif 2524 2525#include "coffcode.h" 2526 2527#ifndef TARGET_LITTLE_SYM 2528#define TARGET_LITTLE_SYM arm_coff_le_vec 2529#endif 2530#ifndef TARGET_LITTLE_NAME 2531#define TARGET_LITTLE_NAME "coff-arm-little" 2532#endif 2533#ifndef TARGET_BIG_SYM 2534#define TARGET_BIG_SYM arm_coff_be_vec 2535#endif 2536#ifndef TARGET_BIG_NAME 2537#define TARGET_BIG_NAME "coff-arm-big" 2538#endif 2539 2540#ifndef TARGET_UNDERSCORE 2541#define TARGET_UNDERSCORE 0 2542#endif 2543 2544#ifndef EXTRA_S_FLAGS 2545#ifdef COFF_WITH_PE 2546#define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES) 2547#else 2548#define EXTRA_S_FLAGS SEC_CODE 2549#endif 2550#endif 2551 2552/* Forward declaration for use initialising alternative_target field. */ 2553extern const bfd_target TARGET_BIG_SYM ; 2554 2555/* Target vectors. */ 2556CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE) 2557CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE) 2558