1/*-
2 * Copyright (c) 2020 Justin Hibbits
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26#include <sys/param.h>
27#include <sys/systm.h>
28#include <sys/conf.h>
29#include <sys/kernel.h>
30#include <sys/bus.h>
31#include <sys/limits.h>
32#include <sys/module.h>
33#include <sys/malloc.h>
34#include <sys/mutex.h>
35#include <sys/rman.h>
36#include <sys/sysctl.h>
37
38#include <machine/bus.h>
39
40#include <dev/ofw/ofw_bus.h>
41#include <dev/ofw/ofw_bus_subr.h>
42
43#include <sys/kdb.h>
44
45#include "cpld.h"
46
47/*
48 * A driver for the AmigaOne A1222 "Tabor" Main CPLD.
49 *
50 * The main CPLD is the interface between the CPU and the GPIO CPLD.
51 * Communication with the GPIO CPLD is over the main CPLD's mailbox interface,
52 * along with the dual-port RAM on the CPLD.
53 *
54 * Only one process can open the CPLD character device at a time.  The driver
55 * enforces this to simplify the communication protocol.
56 */
57
58/* Resource access addresses. */
59#define	CPLD_MEM_ADDR_H		0x00
60#define	CPLD_MEM_ADDR_L		0x01
61#define	CPLD_MEM_DATA		0x80
62
63#define	CPLD_MAX_DRAM_WORDS	0x800
64
65/* CPLD Registers. */
66#define	CPLD_REG_SIG1		0x00
67#define	CPLD_REG_SIG2		0x01
68#define	CPLD_REG_HWREV		0x02
69#define	CPLD_REG_CPLDREV	0x03
70#define	CPLD_REG_MBC2X		0x04
71#define	CPLD_REG_MBX2C		0x05
72#define	CPLD_REG_FAN1_TACHO_U	0x10
73#define	CPLD_REG_FAN1_TACHO_L	0x11
74#define	CPLD_REG_FAN2_TACHO_U	0x12
75#define	CPLD_REG_FAN2_TACHO_L	0x13
76#define	CPLD_REG_FAN3_TACHO_U	0x14
77#define	CPLD_REG_FAN3_TACHO_L	0x15
78#define	CPLD_REG_DATE_UU	0x20
79#define	CPLD_REG_DATE_UL	0x21
80#define	CPLD_REG_DATE_LU	0x22
81#define	CPLD_REG_DATE_LL	0x23
82#define	CPLD_REG_TIME_UU	0x24
83#define	CPLD_REG_TIME_UL	0x25
84#define	CPLD_REG_TIME_LU	0x26
85#define	CPLD_REG_TIME_LL	0x27
86#define	CPLD_REG_SCR1		0x5c
87#define	CPLD_REG_SCR2		0x6a
88#define	CPLD_REG_RAM		0x80
89
90struct cpld_softc {
91	device_t	 sc_dev;
92	struct resource	*sc_mem;
93	struct cdev	*sc_cdev;
94	struct mtx	 sc_mutex;
95	bool		 sc_isopen;
96};
97
98static d_open_t		cpld_open;
99static d_close_t	cpld_close;
100static d_ioctl_t	cpld_ioctl;
101
102static struct cdevsw cpld_cdevsw = {
103	.d_version =	D_VERSION,
104	.d_open =	cpld_open,
105	.d_close =	cpld_close,
106	.d_ioctl =	cpld_ioctl,
107	.d_name =	"nvram",
108};
109
110static device_probe_t	cpld_probe;
111static device_attach_t	cpld_attach;
112static int		cpld_fan_sysctl(SYSCTL_HANDLER_ARGS);
113
114static device_method_t cpld_methods[] = {
115	DEVMETHOD(device_probe,		cpld_probe),
116	DEVMETHOD(device_attach,	cpld_attach),
117
118	DEVMETHOD_END
119};
120
121static driver_t cpld_driver = {
122	"cpld",
123	cpld_methods,
124	sizeof(struct cpld_softc)
125};
126
127DRIVER_MODULE(cpld, lbc, cpld_driver, 0, 0);
128
129static void
130cpld_write(struct cpld_softc *sc, int addr, int data)
131{
132	if (addr >= CPLD_REG_RAM) {
133		bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
134		bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr);
135	} else
136		bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
137	bus_write_1(sc->sc_mem, CPLD_MEM_DATA, data);
138}
139
140static int
141cpld_read(struct cpld_softc *sc, int addr)
142{
143	if (addr >= CPLD_REG_RAM) {
144		bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
145		bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr);
146	} else
147		bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
148
149	return (bus_read_1(sc->sc_mem, CPLD_MEM_DATA));
150}
151
152/*
153 * This is only to read a register that's split into two 8-bit registers.
154 * Dual-port RAM is not accepted for this purpose.
155 */
156static int
157cpld_read_pair(struct cpld_softc *sc, int addr)
158{
159	int tmp;
160
161	KASSERT(addr <= 0xff, ("Invalid register-pair base address %x.", addr));
162	bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
163	tmp = bus_read_1(sc->sc_mem, CPLD_MEM_DATA) << 8;
164
165	bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr + 1);
166	tmp |= bus_read_1(sc->sc_mem, CPLD_MEM_DATA);
167
168	return (tmp);
169}
170
171static int
172cpld_probe(device_t dev)
173{
174	if (!ofw_bus_is_compatible(dev, "aeon,tabor-cpld"))
175		return (ENXIO);
176
177	device_set_desc(dev, "AmigaOne Tabor CPLD");
178
179	return (BUS_PROBE_GENERIC);
180}
181
182static int
183cpld_attach(device_t dev)
184{
185	struct make_dev_args mda;
186	struct cpld_softc *sc;
187	int rid;
188	int date, time, tmp;
189	int err;
190	struct sysctl_ctx_list *ctx;
191	struct sysctl_oid *tree;
192
193	sc = device_get_softc(dev);
194	sc->sc_dev = dev;
195
196	rid = 0;
197	sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
198	    RF_ACTIVE|RF_SHAREABLE);
199	if (sc->sc_mem == NULL) {
200		device_printf(dev, "Unable to allocate memory resource.\n");
201		return (ENXIO);
202	}
203	mtx_init(&sc->sc_mutex, "cpld", NULL, MTX_DEF);
204
205	if (bootverbose) {
206		date = (cpld_read_pair(sc, CPLD_REG_DATE_UU) << 16) |
207		    cpld_read_pair(sc, CPLD_REG_DATE_LU);
208		time = (cpld_read_pair(sc, CPLD_REG_TIME_UU) << 16) |
209		    cpld_read_pair(sc, CPLD_REG_TIME_LU);
210
211		device_printf(dev, "Build date: %04x-%02x-%02x\n",
212		    (date >> 16) & 0xffff, (date >> 8) & 0xff, date & 0xff);
213#if 0
214		/* Build time is nonsense on tested system. */
215		device_printf(dev, "Build time: %02x:%02x:%02x\n",
216		    (time >> 16) & 0xff, (time >> 8) & 0xff, time & 0xff);
217#endif
218	}
219
220	tmp = cpld_read(sc, CPLD_REG_HWREV);
221	device_printf(dev, "Hardware revision: %d\n", tmp);
222
223	ctx = device_get_sysctl_ctx(dev);
224	tree = device_get_sysctl_tree(dev);
225
226	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
227	    "cpu_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc,
228	    CPLD_REG_FAN1_TACHO_U, cpld_fan_sysctl, "I",
229	    "CPU Fan speed in RPM");
230
231	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
232	    "case_1_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc,
233	    CPLD_REG_FAN2_TACHO_U, cpld_fan_sysctl, "I",
234	    "Case fan 1 speed in RPM");
235
236	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
237	    "case_2_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc,
238	    CPLD_REG_FAN3_TACHO_U, cpld_fan_sysctl, "I",
239	    "Case fan 2 speed in RPM");
240
241	make_dev_args_init(&mda);
242	mda.mda_flags =  MAKEDEV_CHECKNAME;
243	mda.mda_devsw = &cpld_cdevsw;
244	mda.mda_uid = UID_ROOT;
245	mda.mda_gid = GID_WHEEL;
246	mda.mda_mode = 0660;
247	err = make_dev_s(&mda, &sc->sc_cdev, "cpld");
248	if (err != 0) {
249		device_printf(dev, "Error creating character device: %d\n", err);
250		device_printf(dev, "Only sysctl interfaces will be available.\n");
251	}
252
253	return (0);
254}
255
256static int
257cpld_fan_sysctl(SYSCTL_HANDLER_ARGS)
258{
259	struct cpld_softc *sc;
260	int error, old, rpm;
261	int fan_reg;
262
263	sc = arg1;
264	fan_reg = arg2;
265	mtx_lock(&sc->sc_mutex);
266	/* Read until we get some level of read stability. */
267	rpm = cpld_read(sc, fan_reg);
268	do {
269		old = rpm;
270		rpm = cpld_read_pair(sc, fan_reg);
271	} while (abs(rpm - old) > 10);
272	mtx_unlock(&sc->sc_mutex);
273
274	/* Convert RPS->RPM. */
275	rpm *= 60;
276	error = sysctl_handle_int(oidp, &rpm, 0, req);
277
278	return (error);
279}
280
281static int
282cpld_open(struct cdev *dev, int flags, int fmt, struct thread *td)
283{
284	struct cpld_softc *sc = dev->si_drv1;
285
286	if (sc->sc_isopen)
287		return (EBUSY);
288	sc->sc_isopen = 1;
289	return (0);
290}
291
292static int
293cpld_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
294{
295	struct cpld_softc *sc = dev->si_drv1;
296
297	sc->sc_isopen = 0;
298	return (0);
299}
300
301/*
302 * Send a command over the CPLD to the other side.
303 *
304 * This will first copy the data into the dual-port RAM, then signal the other
305 * side by writing to the mailbox.
306 */
307static int
308cpld_send(device_t dev, struct cpld_cmd_data *d)
309{
310	struct cpld_softc *sc;
311	uint16_t *word;
312	int i;
313
314	if (d->cmd > USHRT_MAX)
315		return (EINVAL);
316
317	sc = device_get_softc(dev);
318
319	mtx_lock(&sc->sc_mutex);
320	for (i = 0, word = d->words; i < d->len; i++, word++) {
321		if (i == 0)
322			cpld_write(sc, CPLD_REG_RAM + d->offset, *word);
323		else
324			bus_write_4(sc->sc_mem, CPLD_MEM_DATA, *word);
325	}
326
327	cpld_write(sc, CPLD_REG_MBC2X, d->cmd);
328	mtx_unlock(&sc->sc_mutex);
329
330	return (0);
331}
332
333static int
334cpld_recv(device_t dev, struct cpld_cmd_data *d)
335{
336	struct cpld_softc *sc;
337	uint16_t *word;
338	int i;
339
340	sc = device_get_softc(dev);
341
342	mtx_lock(&sc->sc_mutex);
343	d->cmd = cpld_read(sc, CPLD_REG_MBX2C);
344
345	for (i = 0, word = d->words; i < d->len; i++, word++) {
346		if (i == 0)
347			*word = cpld_read(sc, CPLD_REG_RAM + d->offset);
348		else
349			*word = bus_read_4(sc->sc_mem, CPLD_MEM_DATA);
350	}
351	mtx_unlock(&sc->sc_mutex);
352
353	return (0);
354}
355
356static int
357cpld_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
358    struct thread *td)
359{
360	struct cpld_softc *sc;
361	struct cpld_cmd_data *d;
362	void *xfer_data, *tmp;
363	int err;
364
365	sc = dev->si_drv1;
366
367	err = 0;
368	d = (struct cpld_cmd_data *)data;
369	if (d->len + d->offset > CPLD_MAX_DRAM_WORDS) {
370		return (EINVAL);
371	}
372	xfer_data = malloc(d->len * sizeof(uint16_t), M_TEMP, M_WAITOK);
373
374	switch (cmd) {
375	case IOCCPLDSEND:
376		err = copyin(d->words, xfer_data, d->len * sizeof(uint16_t));
377		d->words = xfer_data;
378		if (err == 0)
379			err = cpld_send(sc->sc_dev, d);
380		break;
381	case IOCCPLDRECV:
382		tmp = d->words;
383		d->words = xfer_data;
384		err = cpld_recv(sc->sc_dev, d);
385		d->words = tmp;
386		if (err == 0)
387			err = copyout(xfer_data, d->words,
388			    d->len * sizeof(uint16_t));
389		break;
390	default:
391		err = ENOTTY;
392		break;
393	}
394	free(xfer_data, M_TEMP);
395
396	return (err);
397}
398