1/* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright IBM Corp. 2007 5 * 6 * Authors: 7 * Anthony Liguori <aliguori@us.ibm.com> 8 * 9 * This header is BSD licensed so anyone can use the definitions to implement 10 * compatible drivers/servers. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. Neither the name of IBM nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36#ifndef _VIRTIO_PCI_MODERN_VAR_H 37#define _VIRTIO_PCI_MODERN_VAR_H 38 39#include <dev/virtio/pci/virtio_pci_var.h> 40 41/* IDs for different capabilities. Must all exist. */ 42/* Common configuration */ 43#define VIRTIO_PCI_CAP_COMMON_CFG 1 44/* Notifications */ 45#define VIRTIO_PCI_CAP_NOTIFY_CFG 2 46/* ISR access */ 47#define VIRTIO_PCI_CAP_ISR_CFG 3 48/* Device specific configuration */ 49#define VIRTIO_PCI_CAP_DEVICE_CFG 4 50/* PCI configuration access */ 51#define VIRTIO_PCI_CAP_PCI_CFG 5 52 53/* This is the PCI capability header: */ 54struct virtio_pci_cap { 55 uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */ 56 uint8_t cap_next; /* Generic PCI field: next ptr. */ 57 uint8_t cap_len; /* Generic PCI field: capability length */ 58 uint8_t cfg_type; /* Identifies the structure. */ 59 uint8_t bar; /* Where to find it. */ 60 uint8_t padding[3]; /* Pad to full dword. */ 61 uint32_t offset; /* Offset within bar. */ 62 uint32_t length; /* Length of the structure, in bytes. */ 63}; 64 65struct virtio_pci_notify_cap { 66 struct virtio_pci_cap cap; 67 uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */ 68}; 69 70/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */ 71struct virtio_pci_common_cfg { 72 /* About the whole device. */ 73 uint32_t device_feature_select; /* read-write */ 74 uint32_t device_feature; /* read-only */ 75 uint32_t guest_feature_select; /* read-write */ 76 uint32_t guest_feature; /* read-write */ 77 uint16_t msix_config; /* read-write */ 78 uint16_t num_queues; /* read-only */ 79 uint8_t device_status; /* read-write */ 80 uint8_t config_generation; /* read-only */ 81 82 /* About a specific virtqueue. */ 83 uint16_t queue_select; /* read-write */ 84 uint16_t queue_size; /* read-write, power of 2. */ 85 uint16_t queue_msix_vector; /* read-write */ 86 uint16_t queue_enable; /* read-write */ 87 uint16_t queue_notify_off; /* read-only */ 88 uint32_t queue_desc_lo; /* read-write */ 89 uint32_t queue_desc_hi; /* read-write */ 90 uint32_t queue_avail_lo; /* read-write */ 91 uint32_t queue_avail_hi; /* read-write */ 92 uint32_t queue_used_lo; /* read-write */ 93 uint32_t queue_used_hi; /* read-write */ 94}; 95 96/* Fields in VIRTIO_PCI_CAP_PCI_CFG: */ 97struct virtio_pci_cfg_cap { 98 struct virtio_pci_cap cap; 99 uint8_t pci_cfg_data[4]; /* Data for BAR access. */ 100}; 101 102/* Macro versions of offsets for the Old Timers! */ 103#define VIRTIO_PCI_CAP_VNDR 0 104#define VIRTIO_PCI_CAP_NEXT 1 105#define VIRTIO_PCI_CAP_LEN 2 106#define VIRTIO_PCI_CAP_CFG_TYPE 3 107#define VIRTIO_PCI_CAP_BAR 4 108#define VIRTIO_PCI_CAP_OFFSET 8 109#define VIRTIO_PCI_CAP_LENGTH 12 110 111#define VIRTIO_PCI_NOTIFY_CAP_MULT 16 112 113#define VIRTIO_PCI_COMMON_DFSELECT 0 114#define VIRTIO_PCI_COMMON_DF 4 115#define VIRTIO_PCI_COMMON_GFSELECT 8 116#define VIRTIO_PCI_COMMON_GF 12 117#define VIRTIO_PCI_COMMON_MSIX 16 118#define VIRTIO_PCI_COMMON_NUMQ 18 119#define VIRTIO_PCI_COMMON_STATUS 20 120#define VIRTIO_PCI_COMMON_CFGGENERATION 21 121#define VIRTIO_PCI_COMMON_Q_SELECT 22 122#define VIRTIO_PCI_COMMON_Q_SIZE 24 123#define VIRTIO_PCI_COMMON_Q_MSIX 26 124#define VIRTIO_PCI_COMMON_Q_ENABLE 28 125#define VIRTIO_PCI_COMMON_Q_NOFF 30 126#define VIRTIO_PCI_COMMON_Q_DESCLO 32 127#define VIRTIO_PCI_COMMON_Q_DESCHI 36 128#define VIRTIO_PCI_COMMON_Q_AVAILLO 40 129#define VIRTIO_PCI_COMMON_Q_AVAILHI 44 130#define VIRTIO_PCI_COMMON_Q_USEDLO 48 131#define VIRTIO_PCI_COMMON_Q_USEDHI 52 132 133#endif /* _VIRTIO_PCI_MODERN_VAR_H */ 134