1/*-
2 * Copyright (C) 2009 Nathan Whitehorn
3 * Copyright (C) 2015 The FreeBSD Foundation
4 * All rights reserved.
5 *
6 * Portions of this software were developed by Andrew Turner
7 * under sponsorship from the FreeBSD Foundation.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/module.h>
35#include <sys/malloc.h>
36#include <sys/bus.h>
37#include <sys/cpu.h>
38#include <machine/bus.h>
39
40#include <dev/ofw/openfirm.h>
41#include <dev/ofw/ofw_bus.h>
42#include <dev/ofw/ofw_bus_subr.h>
43#include <dev/ofw/ofw_cpu.h>
44
45#if defined(__arm__) || defined(__arm64__) || defined(__riscv__)
46#include <dev/clk/clk.h>
47#endif
48
49static int	ofw_cpulist_probe(device_t);
50static int	ofw_cpulist_attach(device_t);
51static const struct ofw_bus_devinfo *ofw_cpulist_get_devinfo(device_t dev,
52    device_t child);
53
54static MALLOC_DEFINE(M_OFWCPU, "ofwcpu", "OFW CPU device information");
55
56struct ofw_cpulist_softc {
57	pcell_t	 sc_addr_cells;
58};
59
60static device_method_t ofw_cpulist_methods[] = {
61	/* Device interface */
62	DEVMETHOD(device_probe,		ofw_cpulist_probe),
63	DEVMETHOD(device_attach,	ofw_cpulist_attach),
64
65	/* Bus interface */
66	DEVMETHOD(bus_add_child,	bus_generic_add_child),
67	DEVMETHOD(bus_child_pnpinfo,	ofw_bus_gen_child_pnpinfo),
68	DEVMETHOD(bus_get_device_path,  ofw_bus_gen_get_device_path),
69
70	/* ofw_bus interface */
71	DEVMETHOD(ofw_bus_get_devinfo,	ofw_cpulist_get_devinfo),
72	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
73	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
74	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
75	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
76	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
77
78	DEVMETHOD_END
79};
80
81static driver_t ofw_cpulist_driver = {
82	"cpulist",
83	ofw_cpulist_methods,
84	sizeof(struct ofw_cpulist_softc)
85};
86
87DRIVER_MODULE(ofw_cpulist, ofwbus, ofw_cpulist_driver, 0, 0);
88
89static int
90ofw_cpulist_probe(device_t dev)
91{
92	const char *name;
93
94	name = ofw_bus_get_name(dev);
95
96	if (name == NULL || strcmp(name, "cpus") != 0)
97		return (ENXIO);
98
99	device_set_desc(dev, "Open Firmware CPU Group");
100
101	return (0);
102}
103
104static int
105ofw_cpulist_attach(device_t dev)
106{
107	struct ofw_cpulist_softc *sc;
108	phandle_t root, child;
109	device_t cdev;
110	struct ofw_bus_devinfo *dinfo;
111
112	sc = device_get_softc(dev);
113	root = ofw_bus_get_node(dev);
114
115	sc->sc_addr_cells = 1;
116	OF_getencprop(root, "#address-cells", &sc->sc_addr_cells,
117	    sizeof(sc->sc_addr_cells));
118
119	for (child = OF_child(root); child != 0; child = OF_peer(child)) {
120		dinfo = malloc(sizeof(*dinfo), M_OFWCPU, M_WAITOK | M_ZERO);
121
122		if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) {
123			free(dinfo, M_OFWCPU);
124			continue;
125		}
126		cdev = device_add_child(dev, NULL, -1);
127		if (cdev == NULL) {
128			device_printf(dev, "<%s>: device_add_child failed\n",
129			    dinfo->obd_name);
130			ofw_bus_gen_destroy_devinfo(dinfo);
131			free(dinfo, M_OFWCPU);
132			continue;
133		}
134		device_set_ivars(cdev, dinfo);
135	}
136
137	return (bus_generic_attach(dev));
138}
139
140static const struct ofw_bus_devinfo *
141ofw_cpulist_get_devinfo(device_t dev, device_t child)
142{
143	return (device_get_ivars(child));
144}
145
146static int	ofw_cpu_probe(device_t);
147static int	ofw_cpu_attach(device_t);
148static int	ofw_cpu_read_ivar(device_t dev, device_t child, int index,
149    uintptr_t *result);
150
151struct ofw_cpu_softc {
152	struct pcpu	*sc_cpu_pcpu;
153	uint32_t	 sc_nominal_mhz;
154	boolean_t	 sc_reg_valid;
155	pcell_t		 sc_reg[2];
156};
157
158static device_method_t ofw_cpu_methods[] = {
159	/* Device interface */
160	DEVMETHOD(device_probe,		ofw_cpu_probe),
161	DEVMETHOD(device_attach,	ofw_cpu_attach),
162
163	/* Bus interface */
164	DEVMETHOD(bus_add_child,	bus_generic_add_child),
165	DEVMETHOD(bus_read_ivar,	ofw_cpu_read_ivar),
166	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
167	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
168	DEVMETHOD(bus_alloc_resource,	bus_generic_alloc_resource),
169	DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
170	DEVMETHOD(bus_activate_resource,bus_generic_activate_resource),
171
172	DEVMETHOD_END
173};
174
175static driver_t ofw_cpu_driver = {
176	"cpu",
177	ofw_cpu_methods,
178	sizeof(struct ofw_cpu_softc)
179};
180
181DRIVER_MODULE(ofw_cpu, cpulist, ofw_cpu_driver, 0, 0);
182
183static int
184ofw_cpu_probe(device_t dev)
185{
186	const char *type = ofw_bus_get_type(dev);
187
188	if (type == NULL || strcmp(type, "cpu") != 0)
189		return (ENXIO);
190
191	device_set_desc(dev, "Open Firmware CPU");
192	if (!bootverbose && device_get_unit(dev) != 0) {
193		device_quiet(dev);
194		device_quiet_children(dev);
195	}
196
197	return (0);
198}
199
200static int
201ofw_cpu_attach(device_t dev)
202{
203	struct ofw_cpulist_softc *psc;
204	struct ofw_cpu_softc *sc;
205	phandle_t node;
206	pcell_t cell;
207	int rv;
208#if defined(__arm__) || defined(__arm64__) || defined(__riscv__)
209	clk_t cpuclk;
210	uint64_t freq;
211#endif
212
213	sc = device_get_softc(dev);
214	psc = device_get_softc(device_get_parent(dev));
215
216	if (nitems(sc->sc_reg) < psc->sc_addr_cells) {
217		if (bootverbose)
218			device_printf(dev, "Too many address cells\n");
219		return (EINVAL);
220	}
221
222	node = ofw_bus_get_node(dev);
223
224	/* Read and validate the reg property for use later */
225	sc->sc_reg_valid = false;
226	rv = OF_getencprop(node, "reg", sc->sc_reg, sizeof(sc->sc_reg));
227	if (rv < 0)
228		device_printf(dev, "missing 'reg' property\n");
229	else if ((rv % 4) != 0) {
230		if (bootverbose)
231			device_printf(dev, "Malformed reg property\n");
232	} else if ((rv / 4) != psc->sc_addr_cells) {
233		if (bootverbose)
234			device_printf(dev, "Invalid reg size %u\n", rv);
235	} else
236		sc->sc_reg_valid = true;
237
238#ifdef __powerpc__
239	/*
240	 * On powerpc, "interrupt-servers" denotes a SMT CPU.  Look for any
241	 * thread on this CPU, and assign that.
242	 */
243	if (OF_hasprop(node, "ibm,ppc-interrupt-server#s")) {
244		struct cpuref cpuref;
245		cell_t *servers;
246		int i, nservers, rv;
247
248		if ((nservers = OF_getencprop_alloc(node,
249		    "ibm,ppc-interrupt-server#s", (void **)&servers)) < 0)
250			return (ENXIO);
251		nservers /= sizeof(cell_t);
252		for (i = 0; i < nservers; i++) {
253			for (rv = platform_smp_first_cpu(&cpuref); rv == 0;
254			    rv = platform_smp_next_cpu(&cpuref)) {
255				if (cpuref.cr_hwref == servers[i]) {
256					sc->sc_cpu_pcpu =
257					    pcpu_find(cpuref.cr_cpuid);
258					if (sc->sc_cpu_pcpu == NULL) {
259						OF_prop_free(servers);
260						return (ENXIO);
261					}
262					break;
263				}
264			}
265			if (rv != ENOENT)
266				break;
267		}
268		OF_prop_free(servers);
269		if (sc->sc_cpu_pcpu == NULL) {
270			device_printf(dev, "No CPU found for this device.\n");
271			return (ENXIO);
272		}
273	} else
274#endif
275	sc->sc_cpu_pcpu = pcpu_find(device_get_unit(dev));
276
277	if (OF_getencprop(node, "clock-frequency", &cell, sizeof(cell)) < 0) {
278#if defined(__arm__) || defined(__arm64__) || defined(__riscv__)
279		rv = clk_get_by_ofw_index(dev, 0, 0, &cpuclk);
280		if (rv == 0) {
281			rv = clk_get_freq(cpuclk, &freq);
282			if (rv != 0 && bootverbose)
283				device_printf(dev,
284				    "Cannot get freq of property clocks\n");
285			else
286				sc->sc_nominal_mhz = freq / 1000000;
287		} else
288#endif
289		{
290			if (bootverbose)
291				device_printf(dev,
292				    "missing 'clock-frequency' property\n");
293		}
294	} else
295		sc->sc_nominal_mhz = cell / 1000000; /* convert to MHz */
296
297	if (sc->sc_nominal_mhz != 0 && bootverbose)
298		device_printf(dev, "Nominal frequency %dMhz\n",
299		    sc->sc_nominal_mhz);
300	bus_generic_probe(dev);
301	return (bus_generic_attach(dev));
302}
303
304static int
305ofw_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
306{
307	struct ofw_cpulist_softc *psc;
308	struct ofw_cpu_softc *sc;
309
310	sc = device_get_softc(dev);
311
312	switch (index) {
313	case CPU_IVAR_PCPU:
314		*result = (uintptr_t)sc->sc_cpu_pcpu;
315		return (0);
316	case CPU_IVAR_NOMINAL_MHZ:
317		if (sc->sc_nominal_mhz > 0) {
318			*result = (uintptr_t)sc->sc_nominal_mhz;
319			return (0);
320		}
321		break;
322	case CPU_IVAR_CPUID_SIZE:
323		psc = device_get_softc(device_get_parent(dev));
324		*result = psc->sc_addr_cells;
325		return (0);
326	case CPU_IVAR_CPUID:
327		if (sc->sc_reg_valid) {
328			*result = (uintptr_t)sc->sc_reg;
329			return (0);
330		}
331		break;
332	}
333
334	return (ENOENT);
335}
336
337int
338ofw_cpu_early_foreach(ofw_cpu_foreach_cb callback, boolean_t only_runnable)
339{
340	phandle_t node, child;
341	pcell_t addr_cells, reg[2];
342	char status[16];
343	char device_type[16];
344	u_int id, next_id;
345	int count, rv;
346
347	count = 0;
348	id = 0;
349	next_id = 0;
350
351	node = OF_finddevice("/cpus");
352	if (node == -1)
353		return (-1);
354
355	/* Find the number of cells in the cpu register */
356	if (OF_getencprop(node, "#address-cells", &addr_cells,
357	    sizeof(addr_cells)) < 0)
358		return (-1);
359
360	for (child = OF_child(node); child != 0; child = OF_peer(child),
361	    id = next_id) {
362		/* Check if child is a CPU */
363		memset(device_type, 0, sizeof(device_type));
364		rv = OF_getprop(child, "device_type", device_type,
365		    sizeof(device_type) - 1);
366		if (rv < 0)
367			continue;
368		if (strcmp(device_type, "cpu") != 0)
369			continue;
370
371		/* We're processing CPU, update next_id used in the next iteration */
372		next_id++;
373
374		/*
375		 * If we are filtering by runnable then limit to only
376		 * those that have been enabled, or do provide a method
377		 * to enable them.
378		 */
379		if (only_runnable) {
380			status[0] = '\0';
381			OF_getprop(child, "status", status, sizeof(status));
382			if (status[0] != '\0' && strcmp(status, "okay") != 0 &&
383				strcmp(status, "ok") != 0 &&
384				!OF_hasprop(child, "enable-method"))
385					continue;
386		}
387
388		/*
389		 * Check we have a register to identify the cpu
390		 */
391		rv = OF_getencprop(child, "reg", reg,
392		    addr_cells * sizeof(cell_t));
393		if (rv != addr_cells * sizeof(cell_t))
394			continue;
395
396		if (callback == NULL || callback(id, child, addr_cells, reg))
397			count++;
398	}
399
400	return (only_runnable ? count : id);
401}
402