1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/leds/common.h>
10#include "rk3588-coolpi-cm5.dtsi"
11
12/ {
13	model = "RK3588 CoolPi CM5 EVB";
14	compatible = "coolpi,pi-cm5-evb", "coolpi,pi-cm5", "rockchip,rk3588";
15
16	backlight: backlight {
17		compatible = "pwm-backlight";
18		enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
19		pinctrl-names = "default";
20		pinctrl-0 = <&bl_en>;
21		power-supply = <&vcc12v_dcin>;
22		pwms = <&pwm2 0 25000 0>;
23	};
24
25	leds: leds {
26		compatible = "gpio-leds";
27
28		green_led: led-0 {
29			color = <LED_COLOR_ID_GREEN>;
30			function = LED_FUNCTION_STATUS;
31			gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
32			linux,default-trigger = "heartbeat";
33		};
34	};
35
36	vcc12v_dcin: vcc12v-dcin-regulator {
37		compatible = "regulator-fixed";
38		regulator-name = "vcc12v_dcin";
39		regulator-always-on;
40		regulator-boot-on;
41		regulator-min-microvolt = <12000000>;
42		regulator-max-microvolt = <12000000>;
43	};
44
45	vcc5v0_sys: vcc5v0-sys-regulator {
46		compatible = "regulator-fixed";
47		regulator-name = "vcc5v0_sys";
48		regulator-always-on;
49		regulator-boot-on;
50		regulator-min-microvolt = <5000000>;
51		regulator-max-microvolt = <5000000>;
52		vin-supply = <&vcc12v_dcin>;
53	};
54
55	vcc3v3_sys: vcc3v3-sys-regulator {
56		compatible = "regulator-fixed";
57		regulator-name = "vcc3v3_sys";
58		regulator-always-on;
59		regulator-boot-on;
60		regulator-min-microvolt = <3300000>;
61		regulator-max-microvolt = <3300000>;
62		vin-supply = <&vcc12v_dcin>;
63	};
64
65	vcc3v3_lcd: vcc3v3-lcd-regulator {
66		compatible = "regulator-fixed";
67		regulator-name = "vcc3v3_lcd";
68		enable-active-high;
69		gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
70		pinctrl-names = "default";
71		pinctrl-0 = <&lcdpwr_en>;
72		vin-supply = <&vcc3v3_sys>;
73	};
74
75	vcc5v0_usb_host1: vcc5v0_usb_host2: vcc5v0-usb-host-regulator {
76		compatible = "regulator-fixed";
77		regulator-name = "vcc5v0_host";
78		regulator-boot-on;
79		regulator-always-on;
80		enable-active-high;
81		regulator-min-microvolt = <5000000>;
82		regulator-max-microvolt = <5000000>;
83		gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
84		pinctrl-names = "default";
85		pinctrl-0 = <&usb_host_pwren>;
86		vin-supply = <&vcc5v0_sys>;
87	};
88
89	vcc5v0_usb30_otg: vcc5v0-usb30-otg-regulator {
90		compatible = "regulator-fixed";
91		regulator-name = "vcc5v0_otg";
92		regulator-boot-on;
93		regulator-always-on;
94		enable-active-high;
95		regulator-min-microvolt = <5000000>;
96		regulator-max-microvolt = <5000000>;
97		gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
98		pinctrl-names = "default";
99		pinctrl-0 = <&usb_otg_pwren>;
100		vin-supply = <&vcc5v0_sys>;
101	};
102};
103
104/* M.2 E-Key */
105&pcie2x1l1 {
106	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
107	vpcie3v3-supply = <&vcc3v3_sys>;
108	pinctrl-names = "default";
109	pinctrl-0 = <&pcie_clkreq &pcie_wake &pcie_rst &wifi_pwron &bt_pwron>;
110	status = "okay";
111};
112
113&pcie30phy {
114	status = "okay";
115};
116
117/* Standard pcie */
118&pcie3x2 {
119	reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
120	vpcie3v3-supply = <&vcc3v3_sys>;
121	status = "okay";
122};
123
124/* M.2 M-Key ssd */
125&pcie3x4 {
126	num-lanes = <2>;
127	reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
128	vpcie3v3-supply = <&vcc3v3_sys>;
129	status = "okay";
130};
131
132&pinctrl {
133	lcd {
134		lcdpwr_en: lcdpwr-en {
135			rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
136		};
137
138		bl_en: bl-en {
139			rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
140		};
141	};
142
143	usb {
144		usb_host_pwren: usb-host-pwren {
145			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
146		};
147
148		usb_otg_pwren: usb-otg-pwren {
149			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
150		};
151	};
152
153	wifi {
154		bt_pwron: bt-pwron {
155			rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
156		};
157
158		pcie_clkreq: pcie-clkreq {
159			rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
160		};
161
162		pcie_rst: pcie-rst {
163			rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
164		};
165
166		wifi_pwron: wifi-pwron {
167			rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
168		};
169
170		pcie_wake: pcie-wake {
171			rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
172		};
173	};
174};
175
176&pwm2 {
177	status = "okay";
178};
179
180&sata1 {
181	status = "okay";
182};
183
184&u2phy2 {
185	status = "okay";
186};
187
188&u2phy3 {
189	status = "okay";
190};
191
192&u2phy2_host {
193	phy-supply = <&vcc5v0_usb_host1>;
194	status = "okay";
195};
196
197&u2phy3_host {
198	phy-supply = <&vcc5v0_usb_host2>;
199	status = "okay";
200};
201
202&usb_host0_ehci {
203	status = "okay";
204};
205
206&usb_host0_ohci {
207	status = "okay";
208};
209
210&usb_host1_ehci {
211	status = "okay";
212};
213
214&usb_host1_ohci {
215	status = "okay";
216};
217