1/* 2 * Copyright 1996 Massachusetts Institute of Technology 3 * 4 * Permission to use, copy, modify, and distribute this software and 5 * its documentation for any purpose and without fee is hereby 6 * granted, provided that both the above copyright notice and this 7 * permission notice appear in all copies, that both the above 8 * copyright notice and this permission notice appear in all 9 * supporting documentation, and that the name of M.I.T. not be used 10 * in advertising or publicity pertaining to distribution of the 11 * software without specific, written prior permission. M.I.T. makes 12 * no representations about the suitability of this software for any 13 * purpose. It is provided "as is" without express or implied 14 * warranty. 15 * 16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS 17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, 18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT 20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#ifndef lint 31static const char rcsid[] = 32 "$FreeBSD$"; 33#endif /* not lint */ 34 35#include <sys/types.h> 36#include <sys/fcntl.h> 37#include <sys/mman.h> 38#include <sys/pciio.h> 39#include <sys/queue.h> 40 41#include <vm/vm.h> 42 43#include <dev/pci/pcireg.h> 44 45#include <assert.h> 46#include <ctype.h> 47#include <err.h> 48#include <inttypes.h> 49#include <stdbool.h> 50#include <stdlib.h> 51#include <stdio.h> 52#include <string.h> 53#include <unistd.h> 54 55#include "pathnames.h" 56#include "pciconf.h" 57 58struct pci_device_info 59{ 60 TAILQ_ENTRY(pci_device_info) link; 61 int id; 62 char *desc; 63}; 64 65struct pci_vendor_info 66{ 67 TAILQ_ENTRY(pci_vendor_info) link; 68 TAILQ_HEAD(,pci_device_info) devs; 69 int id; 70 char *desc; 71}; 72 73static TAILQ_HEAD(,pci_vendor_info) pci_vendors; 74 75static struct pcisel getsel(const char *str); 76static void list_bridge(int fd, struct pci_conf *p); 77static void list_bars(int fd, struct pci_conf *p); 78static void list_devs(const char *name, int verbose, int bars, int bridge, 79 int caps, int errors, int vpd); 80static void list_verbose(struct pci_conf *p); 81static void list_vpd(int fd, struct pci_conf *p); 82static const char *guess_class(struct pci_conf *p); 83static const char *guess_subclass(struct pci_conf *p); 84static int load_vendors(void); 85static void readit(const char *, const char *, int); 86static void writeit(const char *, const char *, const char *, int); 87static void chkattached(const char *); 88static void dump_bar(const char *name, const char *reg, const char *bar_start, 89 const char *bar_count, int width, int verbose); 90 91static int exitstatus = 0; 92 93static void 94usage(void) 95{ 96 97 fprintf(stderr, "%s", 98 "usage: pciconf -l [-BbcevV] [device]\n" 99 " pciconf -a device\n" 100 " pciconf -r [-b | -h] device addr[:addr2]\n" 101 " pciconf -w [-b | -h] device addr value\n" 102 " pciconf -D [-b | -h | -x] device bar [start [count]]" 103 "\n"); 104 exit(1); 105} 106 107int 108main(int argc, char **argv) 109{ 110 int c, width; 111 int listmode, readmode, writemode, attachedmode, dumpbarmode; 112 int bars, bridge, caps, errors, verbose, vpd; 113 114 listmode = readmode = writemode = attachedmode = dumpbarmode = 0; 115 bars = bridge = caps = errors = verbose = vpd= 0; 116 width = 4; 117 118 while ((c = getopt(argc, argv, "aBbcDehlrwVv")) != -1) { 119 switch(c) { 120 case 'a': 121 attachedmode = 1; 122 break; 123 124 case 'B': 125 bridge = 1; 126 break; 127 128 case 'b': 129 bars = 1; 130 width = 1; 131 break; 132 133 case 'c': 134 caps = 1; 135 break; 136 137 case 'D': 138 dumpbarmode = 1; 139 break; 140 141 case 'e': 142 errors = 1; 143 break; 144 145 case 'h': 146 width = 2; 147 break; 148 149 case 'l': 150 listmode = 1; 151 break; 152 153 case 'r': 154 readmode = 1; 155 break; 156 157 case 'w': 158 writemode = 1; 159 break; 160 161 case 'v': 162 verbose = 1; 163 break; 164 165 case 'V': 166 vpd = 1; 167 break; 168 169 case 'x': 170 width = 8; 171 break; 172 173 default: 174 usage(); 175 } 176 } 177 178 if ((listmode && optind >= argc + 1) 179 || (writemode && optind + 3 != argc) 180 || (readmode && optind + 2 != argc) 181 || (attachedmode && optind + 1 != argc) 182 || (dumpbarmode && (optind + 2 > argc || optind + 4 < argc)) 183 || (width == 8 && !dumpbarmode)) 184 usage(); 185 186 if (listmode) { 187 list_devs(optind + 1 == argc ? argv[optind] : NULL, verbose, 188 bars, bridge, caps, errors, vpd); 189 } else if (attachedmode) { 190 chkattached(argv[optind]); 191 } else if (readmode) { 192 readit(argv[optind], argv[optind + 1], width); 193 } else if (writemode) { 194 writeit(argv[optind], argv[optind + 1], argv[optind + 2], 195 width); 196 } else if (dumpbarmode) { 197 dump_bar(argv[optind], argv[optind + 1], 198 optind + 2 < argc ? argv[optind + 2] : NULL, 199 optind + 3 < argc ? argv[optind + 3] : NULL, 200 width, verbose); 201 } else { 202 usage(); 203 } 204 205 return (exitstatus); 206} 207 208static void 209list_devs(const char *name, int verbose, int bars, int bridge, int caps, 210 int errors, int vpd) 211{ 212 int fd; 213 struct pci_conf_io pc; 214 struct pci_conf conf[255], *p; 215 struct pci_match_conf patterns[1]; 216 int none_count = 0; 217 218 if (verbose) 219 load_vendors(); 220 221 fd = open(_PATH_DEVPCI, (bridge || caps || errors) ? O_RDWR : O_RDONLY, 222 0); 223 if (fd < 0) 224 err(1, "%s", _PATH_DEVPCI); 225 226 bzero(&pc, sizeof(struct pci_conf_io)); 227 pc.match_buf_len = sizeof(conf); 228 pc.matches = conf; 229 if (name != NULL) { 230 bzero(&patterns, sizeof(patterns)); 231 patterns[0].pc_sel = getsel(name); 232 patterns[0].flags = PCI_GETCONF_MATCH_DOMAIN | 233 PCI_GETCONF_MATCH_BUS | PCI_GETCONF_MATCH_DEV | 234 PCI_GETCONF_MATCH_FUNC; 235 pc.num_patterns = 1; 236 pc.pat_buf_len = sizeof(patterns); 237 pc.patterns = patterns; 238 } 239 240 do { 241 if (ioctl(fd, PCIOCGETCONF, &pc) == -1) 242 err(1, "ioctl(PCIOCGETCONF)"); 243 244 /* 245 * 255 entries should be more than enough for most people, 246 * but if someone has more devices, and then changes things 247 * around between ioctls, we'll do the cheesy thing and 248 * just bail. The alternative would be to go back to the 249 * beginning of the list, and print things twice, which may 250 * not be desirable. 251 */ 252 if (pc.status == PCI_GETCONF_LIST_CHANGED) { 253 warnx("PCI device list changed, please try again"); 254 exitstatus = 1; 255 close(fd); 256 return; 257 } else if (pc.status == PCI_GETCONF_ERROR) { 258 warnx("error returned from PCIOCGETCONF ioctl"); 259 exitstatus = 1; 260 close(fd); 261 return; 262 } 263 for (p = conf; p < &conf[pc.num_matches]; p++) { 264 printf("%s%d@pci%d:%d:%d:%d:\tclass=0x%06x card=0x%08x " 265 "chip=0x%08x rev=0x%02x hdr=0x%02x\n", 266 *p->pd_name ? p->pd_name : 267 "none", 268 *p->pd_name ? (int)p->pd_unit : 269 none_count++, p->pc_sel.pc_domain, 270 p->pc_sel.pc_bus, p->pc_sel.pc_dev, 271 p->pc_sel.pc_func, (p->pc_class << 16) | 272 (p->pc_subclass << 8) | p->pc_progif, 273 (p->pc_subdevice << 16) | p->pc_subvendor, 274 (p->pc_device << 16) | p->pc_vendor, 275 p->pc_revid, p->pc_hdr); 276 if (verbose) 277 list_verbose(p); 278 if (bars) 279 list_bars(fd, p); 280 if (bridge) 281 list_bridge(fd, p); 282 if (caps) 283 list_caps(fd, p); 284 if (errors) 285 list_errors(fd, p); 286 if (vpd) 287 list_vpd(fd, p); 288 } 289 } while (pc.status == PCI_GETCONF_MORE_DEVS); 290 291 close(fd); 292} 293 294static void 295print_bus_range(int fd, struct pci_conf *p, int secreg, int subreg) 296{ 297 uint8_t secbus, subbus; 298 299 secbus = read_config(fd, &p->pc_sel, secreg, 1); 300 subbus = read_config(fd, &p->pc_sel, subreg, 1); 301 printf(" bus range = %u-%u\n", secbus, subbus); 302} 303 304static void 305print_window(int reg, const char *type, int range, uint64_t base, 306 uint64_t limit) 307{ 308 309 printf(" window[%02x] = type %s, range %2d, addr %#jx-%#jx, %s\n", 310 reg, type, range, (uintmax_t)base, (uintmax_t)limit, 311 base < limit ? "enabled" : "disabled"); 312} 313 314static void 315print_special_decode(bool isa, bool vga, bool subtractive) 316{ 317 bool comma; 318 319 if (isa || vga || subtractive) { 320 comma = false; 321 printf(" decode = "); 322 if (isa) { 323 printf("ISA"); 324 comma = true; 325 } 326 if (vga) { 327 printf("%sVGA", comma ? ", " : ""); 328 comma = true; 329 } 330 if (subtractive) 331 printf("%ssubtractive", comma ? ", " : ""); 332 printf("\n"); 333 } 334} 335 336static void 337print_bridge_windows(int fd, struct pci_conf *p) 338{ 339 uint64_t base, limit; 340 uint32_t val; 341 uint16_t bctl; 342 bool subtractive; 343 int range; 344 345 /* 346 * XXX: This assumes that a window with a base and limit of 0 347 * is not implemented. In theory a window might be programmed 348 * at the smallest size with a base of 0, but those do not seem 349 * common in practice. 350 */ 351 val = read_config(fd, &p->pc_sel, PCIR_IOBASEL_1, 1); 352 if (val != 0 || read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1) != 0) { 353 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 354 base = PCI_PPBIOBASE( 355 read_config(fd, &p->pc_sel, PCIR_IOBASEH_1, 2), 356 val); 357 limit = PCI_PPBIOLIMIT( 358 read_config(fd, &p->pc_sel, PCIR_IOLIMITH_1, 2), 359 read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1)); 360 range = 32; 361 } else { 362 base = PCI_PPBIOBASE(0, val); 363 limit = PCI_PPBIOLIMIT(0, 364 read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1)); 365 range = 16; 366 } 367 print_window(PCIR_IOBASEL_1, "I/O Port", range, base, limit); 368 } 369 370 base = PCI_PPBMEMBASE(0, 371 read_config(fd, &p->pc_sel, PCIR_MEMBASE_1, 2)); 372 limit = PCI_PPBMEMLIMIT(0, 373 read_config(fd, &p->pc_sel, PCIR_MEMLIMIT_1, 2)); 374 print_window(PCIR_MEMBASE_1, "Memory", 32, base, limit); 375 376 val = read_config(fd, &p->pc_sel, PCIR_PMBASEL_1, 2); 377 if (val != 0 || read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2) != 0) { 378 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) { 379 base = PCI_PPBMEMBASE( 380 read_config(fd, &p->pc_sel, PCIR_PMBASEH_1, 4), 381 val); 382 limit = PCI_PPBMEMLIMIT( 383 read_config(fd, &p->pc_sel, PCIR_PMLIMITH_1, 4), 384 read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2)); 385 range = 64; 386 } else { 387 base = PCI_PPBMEMBASE(0, val); 388 limit = PCI_PPBMEMLIMIT(0, 389 read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2)); 390 range = 32; 391 } 392 print_window(PCIR_PMBASEL_1, "Prefetchable Memory", range, base, 393 limit); 394 } 395 396 /* 397 * XXX: This list of bridges that are subtractive but do not set 398 * progif to indicate it is copied from pci_pci.c. 399 */ 400 subtractive = p->pc_progif == PCIP_BRIDGE_PCI_SUBTRACTIVE; 401 switch (p->pc_device << 16 | p->pc_vendor) { 402 case 0xa002177d: /* Cavium ThunderX */ 403 case 0x124b8086: /* Intel 82380FB Mobile */ 404 case 0x060513d7: /* Toshiba ???? */ 405 subtractive = true; 406 } 407 if (p->pc_vendor == 0x8086 && (p->pc_device & 0xff00) == 0x2400) 408 subtractive = true; 409 410 bctl = read_config(fd, &p->pc_sel, PCIR_BRIDGECTL_1, 2); 411 print_special_decode(bctl & PCIB_BCR_ISA_ENABLE, 412 bctl & PCIB_BCR_VGA_ENABLE, subtractive); 413} 414 415static void 416print_cardbus_mem_window(int fd, struct pci_conf *p, int basereg, int limitreg, 417 bool prefetch) 418{ 419 420 print_window(basereg, prefetch ? "Prefetchable Memory" : "Memory", 32, 421 PCI_CBBMEMBASE(read_config(fd, &p->pc_sel, basereg, 4)), 422 PCI_CBBMEMLIMIT(read_config(fd, &p->pc_sel, limitreg, 4))); 423} 424 425static void 426print_cardbus_io_window(int fd, struct pci_conf *p, int basereg, int limitreg) 427{ 428 uint32_t base, limit; 429 uint32_t val; 430 int range; 431 432 val = read_config(fd, &p->pc_sel, basereg, 2); 433 if ((val & PCIM_CBBIO_MASK) == PCIM_CBBIO_32) { 434 base = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, basereg, 4)); 435 limit = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, limitreg, 4)); 436 range = 32; 437 } else { 438 base = PCI_CBBIOBASE(val); 439 limit = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, limitreg, 2)); 440 range = 16; 441 } 442 print_window(basereg, "I/O Port", range, base, limit); 443} 444 445static void 446print_cardbus_windows(int fd, struct pci_conf *p) 447{ 448 uint16_t bctl; 449 450 bctl = read_config(fd, &p->pc_sel, PCIR_BRIDGECTL_2, 2); 451 print_cardbus_mem_window(fd, p, PCIR_MEMBASE0_2, PCIR_MEMLIMIT0_2, 452 bctl & CBB_BCR_PREFETCH_0_ENABLE); 453 print_cardbus_mem_window(fd, p, PCIR_MEMBASE1_2, PCIR_MEMLIMIT1_2, 454 bctl & CBB_BCR_PREFETCH_1_ENABLE); 455 print_cardbus_io_window(fd, p, PCIR_IOBASE0_2, PCIR_IOLIMIT0_2); 456 print_cardbus_io_window(fd, p, PCIR_IOBASE1_2, PCIR_IOLIMIT1_2); 457 print_special_decode(bctl & CBB_BCR_ISA_ENABLE, 458 bctl & CBB_BCR_VGA_ENABLE, false); 459} 460 461static void 462list_bridge(int fd, struct pci_conf *p) 463{ 464 465 switch (p->pc_hdr & PCIM_HDRTYPE) { 466 case PCIM_HDRTYPE_BRIDGE: 467 print_bus_range(fd, p, PCIR_SECBUS_1, PCIR_SUBBUS_1); 468 print_bridge_windows(fd, p); 469 break; 470 case PCIM_HDRTYPE_CARDBUS: 471 print_bus_range(fd, p, PCIR_SECBUS_2, PCIR_SUBBUS_2); 472 print_cardbus_windows(fd, p); 473 break; 474 } 475} 476 477static void 478list_bars(int fd, struct pci_conf *p) 479{ 480 int i, max; 481 482 switch (p->pc_hdr & PCIM_HDRTYPE) { 483 case PCIM_HDRTYPE_NORMAL: 484 max = PCIR_MAX_BAR_0; 485 break; 486 case PCIM_HDRTYPE_BRIDGE: 487 max = PCIR_MAX_BAR_1; 488 break; 489 case PCIM_HDRTYPE_CARDBUS: 490 max = PCIR_MAX_BAR_2; 491 break; 492 default: 493 return; 494 } 495 496 for (i = 0; i <= max; i++) 497 print_bar(fd, p, "bar ", PCIR_BAR(i)); 498} 499 500void 501print_bar(int fd, struct pci_conf *p, const char *label, uint16_t bar_offset) 502{ 503 uint64_t base; 504 const char *type; 505 struct pci_bar_io bar; 506 int range; 507 508 bar.pbi_sel = p->pc_sel; 509 bar.pbi_reg = bar_offset; 510 if (ioctl(fd, PCIOCGETBAR, &bar) < 0) 511 return; 512 if (PCI_BAR_IO(bar.pbi_base)) { 513 type = "I/O Port"; 514 range = 32; 515 base = bar.pbi_base & PCIM_BAR_IO_BASE; 516 } else { 517 if (bar.pbi_base & PCIM_BAR_MEM_PREFETCH) 518 type = "Prefetchable Memory"; 519 else 520 type = "Memory"; 521 switch (bar.pbi_base & PCIM_BAR_MEM_TYPE) { 522 case PCIM_BAR_MEM_32: 523 range = 32; 524 break; 525 case PCIM_BAR_MEM_1MB: 526 range = 20; 527 break; 528 case PCIM_BAR_MEM_64: 529 range = 64; 530 break; 531 default: 532 range = -1; 533 } 534 base = bar.pbi_base & ~((uint64_t)0xf); 535 } 536 printf(" %s[%02x] = type %s, range %2d, base %#jx, ", 537 label, bar_offset, type, range, (uintmax_t)base); 538 printf("size %ju, %s\n", (uintmax_t)bar.pbi_length, 539 bar.pbi_enabled ? "enabled" : "disabled"); 540} 541 542static void 543list_verbose(struct pci_conf *p) 544{ 545 struct pci_vendor_info *vi; 546 struct pci_device_info *di; 547 const char *dp; 548 549 TAILQ_FOREACH(vi, &pci_vendors, link) { 550 if (vi->id == p->pc_vendor) { 551 printf(" vendor = '%s'\n", vi->desc); 552 break; 553 } 554 } 555 if (vi == NULL) { 556 di = NULL; 557 } else { 558 TAILQ_FOREACH(di, &vi->devs, link) { 559 if (di->id == p->pc_device) { 560 printf(" device = '%s'\n", di->desc); 561 break; 562 } 563 } 564 } 565 if ((dp = guess_class(p)) != NULL) 566 printf(" class = %s\n", dp); 567 if ((dp = guess_subclass(p)) != NULL) 568 printf(" subclass = %s\n", dp); 569} 570 571static void 572list_vpd(int fd, struct pci_conf *p) 573{ 574 struct pci_list_vpd_io list; 575 struct pci_vpd_element *vpd, *end; 576 577 list.plvi_sel = p->pc_sel; 578 list.plvi_len = 0; 579 list.plvi_data = NULL; 580 if (ioctl(fd, PCIOCLISTVPD, &list) < 0 || list.plvi_len == 0) 581 return; 582 583 list.plvi_data = malloc(list.plvi_len); 584 if (ioctl(fd, PCIOCLISTVPD, &list) < 0) { 585 free(list.plvi_data); 586 return; 587 } 588 589 vpd = list.plvi_data; 590 end = (struct pci_vpd_element *)((char *)vpd + list.plvi_len); 591 for (; vpd < end; vpd = PVE_NEXT(vpd)) { 592 if (vpd->pve_flags == PVE_FLAG_IDENT) { 593 printf(" VPD ident = '%.*s'\n", 594 (int)vpd->pve_datalen, vpd->pve_data); 595 continue; 596 } 597 598 /* Ignore the checksum keyword. */ 599 if (!(vpd->pve_flags & PVE_FLAG_RW) && 600 memcmp(vpd->pve_keyword, "RV", 2) == 0) 601 continue; 602 603 /* Ignore remaining read-write space. */ 604 if (vpd->pve_flags & PVE_FLAG_RW && 605 memcmp(vpd->pve_keyword, "RW", 2) == 0) 606 continue; 607 608 /* Handle extended capability keyword. */ 609 if (!(vpd->pve_flags & PVE_FLAG_RW) && 610 memcmp(vpd->pve_keyword, "CP", 2) == 0) { 611 printf(" VPD ro CP = ID %02x in map 0x%x[0x%x]\n", 612 (unsigned int)vpd->pve_data[0], 613 PCIR_BAR((unsigned int)vpd->pve_data[1]), 614 (unsigned int)vpd->pve_data[3] << 8 | 615 (unsigned int)vpd->pve_data[2]); 616 continue; 617 } 618 619 /* Remaining keywords should all have ASCII values. */ 620 printf(" VPD %s %c%c = '%.*s'\n", 621 vpd->pve_flags & PVE_FLAG_RW ? "rw" : "ro", 622 vpd->pve_keyword[0], vpd->pve_keyword[1], 623 (int)vpd->pve_datalen, vpd->pve_data); 624 } 625 free(list.plvi_data); 626} 627 628/* 629 * This is a direct cut-and-paste from the table in sys/dev/pci/pci.c. 630 */ 631static struct 632{ 633 int class; 634 int subclass; 635 const char *desc; 636} pci_nomatch_tab[] = { 637 {PCIC_OLD, -1, "old"}, 638 {PCIC_OLD, PCIS_OLD_NONVGA, "non-VGA display device"}, 639 {PCIC_OLD, PCIS_OLD_VGA, "VGA-compatible display device"}, 640 {PCIC_STORAGE, -1, "mass storage"}, 641 {PCIC_STORAGE, PCIS_STORAGE_SCSI, "SCSI"}, 642 {PCIC_STORAGE, PCIS_STORAGE_IDE, "ATA"}, 643 {PCIC_STORAGE, PCIS_STORAGE_FLOPPY, "floppy disk"}, 644 {PCIC_STORAGE, PCIS_STORAGE_IPI, "IPI"}, 645 {PCIC_STORAGE, PCIS_STORAGE_RAID, "RAID"}, 646 {PCIC_STORAGE, PCIS_STORAGE_ATA_ADMA, "ATA (ADMA)"}, 647 {PCIC_STORAGE, PCIS_STORAGE_SATA, "SATA"}, 648 {PCIC_STORAGE, PCIS_STORAGE_SAS, "SAS"}, 649 {PCIC_STORAGE, PCIS_STORAGE_NVM, "NVM"}, 650 {PCIC_STORAGE, PCIS_STORAGE_UFS, "UFS"}, 651 {PCIC_NETWORK, -1, "network"}, 652 {PCIC_NETWORK, PCIS_NETWORK_ETHERNET, "ethernet"}, 653 {PCIC_NETWORK, PCIS_NETWORK_TOKENRING, "token ring"}, 654 {PCIC_NETWORK, PCIS_NETWORK_FDDI, "fddi"}, 655 {PCIC_NETWORK, PCIS_NETWORK_ATM, "ATM"}, 656 {PCIC_NETWORK, PCIS_NETWORK_ISDN, "ISDN"}, 657 {PCIC_NETWORK, PCIS_NETWORK_WORLDFIP, "WorldFip"}, 658 {PCIC_NETWORK, PCIS_NETWORK_PICMG, "PICMG"}, 659 {PCIC_NETWORK, PCIS_NETWORK_INFINIBAND, "InfiniBand"}, 660 {PCIC_NETWORK, PCIS_NETWORK_HFC, "host fabric"}, 661 {PCIC_DISPLAY, -1, "display"}, 662 {PCIC_DISPLAY, PCIS_DISPLAY_VGA, "VGA"}, 663 {PCIC_DISPLAY, PCIS_DISPLAY_XGA, "XGA"}, 664 {PCIC_DISPLAY, PCIS_DISPLAY_3D, "3D"}, 665 {PCIC_MULTIMEDIA, -1, "multimedia"}, 666 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_VIDEO, "video"}, 667 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_AUDIO, "audio"}, 668 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_TELE, "telephony"}, 669 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_HDA, "HDA"}, 670 {PCIC_MEMORY, -1, "memory"}, 671 {PCIC_MEMORY, PCIS_MEMORY_RAM, "RAM"}, 672 {PCIC_MEMORY, PCIS_MEMORY_FLASH, "flash"}, 673 {PCIC_BRIDGE, -1, "bridge"}, 674 {PCIC_BRIDGE, PCIS_BRIDGE_HOST, "HOST-PCI"}, 675 {PCIC_BRIDGE, PCIS_BRIDGE_ISA, "PCI-ISA"}, 676 {PCIC_BRIDGE, PCIS_BRIDGE_EISA, "PCI-EISA"}, 677 {PCIC_BRIDGE, PCIS_BRIDGE_MCA, "PCI-MCA"}, 678 {PCIC_BRIDGE, PCIS_BRIDGE_PCI, "PCI-PCI"}, 679 {PCIC_BRIDGE, PCIS_BRIDGE_PCMCIA, "PCI-PCMCIA"}, 680 {PCIC_BRIDGE, PCIS_BRIDGE_NUBUS, "PCI-NuBus"}, 681 {PCIC_BRIDGE, PCIS_BRIDGE_CARDBUS, "PCI-CardBus"}, 682 {PCIC_BRIDGE, PCIS_BRIDGE_RACEWAY, "PCI-RACEway"}, 683 {PCIC_BRIDGE, PCIS_BRIDGE_PCI_TRANSPARENT, 684 "Semi-transparent PCI-to-PCI"}, 685 {PCIC_BRIDGE, PCIS_BRIDGE_INFINIBAND, "InfiniBand-PCI"}, 686 {PCIC_BRIDGE, PCIS_BRIDGE_AS_PCI, 687 "AdvancedSwitching-PCI"}, 688 {PCIC_SIMPLECOMM, -1, "simple comms"}, 689 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_UART, "UART"}, /* could detect 16550 */ 690 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_PAR, "parallel port"}, 691 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_MULSER, "multiport serial"}, 692 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_MODEM, "generic modem"}, 693 {PCIC_BASEPERIPH, -1, "base peripheral"}, 694 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PIC, "interrupt controller"}, 695 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_DMA, "DMA controller"}, 696 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_TIMER, "timer"}, 697 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_RTC, "realtime clock"}, 698 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PCIHOT, "PCI hot-plug controller"}, 699 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_SDHC, "SD host controller"}, 700 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_IOMMU, "IOMMU"}, 701 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_RCEC, 702 "Root Complex Event Collector"}, 703 {PCIC_INPUTDEV, -1, "input device"}, 704 {PCIC_INPUTDEV, PCIS_INPUTDEV_KEYBOARD, "keyboard"}, 705 {PCIC_INPUTDEV, PCIS_INPUTDEV_DIGITIZER,"digitizer"}, 706 {PCIC_INPUTDEV, PCIS_INPUTDEV_MOUSE, "mouse"}, 707 {PCIC_INPUTDEV, PCIS_INPUTDEV_SCANNER, "scanner"}, 708 {PCIC_INPUTDEV, PCIS_INPUTDEV_GAMEPORT, "gameport"}, 709 {PCIC_DOCKING, -1, "docking station"}, 710 {PCIC_PROCESSOR, -1, "processor"}, 711 {PCIC_SERIALBUS, -1, "serial bus"}, 712 {PCIC_SERIALBUS, PCIS_SERIALBUS_FW, "FireWire"}, 713 {PCIC_SERIALBUS, PCIS_SERIALBUS_ACCESS, "AccessBus"}, 714 {PCIC_SERIALBUS, PCIS_SERIALBUS_SSA, "SSA"}, 715 {PCIC_SERIALBUS, PCIS_SERIALBUS_USB, "USB"}, 716 {PCIC_SERIALBUS, PCIS_SERIALBUS_FC, "Fibre Channel"}, 717 {PCIC_SERIALBUS, PCIS_SERIALBUS_SMBUS, "SMBus"}, 718 {PCIC_SERIALBUS, PCIS_SERIALBUS_INFINIBAND, "InfiniBand"}, 719 {PCIC_SERIALBUS, PCIS_SERIALBUS_IPMI, "IPMI"}, 720 {PCIC_SERIALBUS, PCIS_SERIALBUS_SERCOS, "SERCOS"}, 721 {PCIC_SERIALBUS, PCIS_SERIALBUS_CANBUS, "CANbus"}, 722 {PCIC_SERIALBUS, PCIS_SERIALBUS_MIPI_I3C, "MIPI I3C"}, 723 {PCIC_WIRELESS, -1, "wireless controller"}, 724 {PCIC_WIRELESS, PCIS_WIRELESS_IRDA, "iRDA"}, 725 {PCIC_WIRELESS, PCIS_WIRELESS_IR, "IR"}, 726 {PCIC_WIRELESS, PCIS_WIRELESS_RF, "RF"}, 727 {PCIC_WIRELESS, PCIS_WIRELESS_BLUETOOTH, "bluetooth"}, 728 {PCIC_WIRELESS, PCIS_WIRELESS_BROADBAND, "broadband"}, 729 {PCIC_WIRELESS, PCIS_WIRELESS_80211A, "ethernet 802.11a"}, 730 {PCIC_WIRELESS, PCIS_WIRELESS_80211B, "ethernet 802.11b"}, 731 {PCIC_WIRELESS, PCIS_WIRELESS_CELL, 732 "cellular controller/modem"}, 733 {PCIC_WIRELESS, PCIS_WIRELESS_CELL_E, 734 "cellular controller/modem plus ethernet"}, 735 {PCIC_INTELLIIO, -1, "intelligent I/O controller"}, 736 {PCIC_INTELLIIO, PCIS_INTELLIIO_I2O, "I2O"}, 737 {PCIC_SATCOM, -1, "satellite communication"}, 738 {PCIC_SATCOM, PCIS_SATCOM_TV, "sat TV"}, 739 {PCIC_SATCOM, PCIS_SATCOM_AUDIO, "sat audio"}, 740 {PCIC_SATCOM, PCIS_SATCOM_VOICE, "sat voice"}, 741 {PCIC_SATCOM, PCIS_SATCOM_DATA, "sat data"}, 742 {PCIC_CRYPTO, -1, "encrypt/decrypt"}, 743 {PCIC_CRYPTO, PCIS_CRYPTO_NETCOMP, "network/computer crypto"}, 744 {PCIC_CRYPTO, PCIS_CRYPTO_NETCOMP, "entertainment crypto"}, 745 {PCIC_DASP, -1, "dasp"}, 746 {PCIC_DASP, PCIS_DASP_DPIO, "DPIO module"}, 747 {PCIC_DASP, PCIS_DASP_PERFCNTRS, "performance counters"}, 748 {PCIC_DASP, PCIS_DASP_COMM_SYNC, "communication synchronizer"}, 749 {PCIC_DASP, PCIS_DASP_MGMT_CARD, "signal processing management"}, 750 {PCIC_ACCEL, -1, "processing accelerators"}, 751 {PCIC_ACCEL, PCIS_ACCEL_PROCESSING, "processing accelerators"}, 752 {PCIC_INSTRUMENT, -1, "non-essential instrumentation"}, 753 {0, 0, NULL} 754}; 755 756static const char * 757guess_class(struct pci_conf *p) 758{ 759 int i; 760 761 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) { 762 if (pci_nomatch_tab[i].class == p->pc_class) 763 return(pci_nomatch_tab[i].desc); 764 } 765 return(NULL); 766} 767 768static const char * 769guess_subclass(struct pci_conf *p) 770{ 771 int i; 772 773 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) { 774 if ((pci_nomatch_tab[i].class == p->pc_class) && 775 (pci_nomatch_tab[i].subclass == p->pc_subclass)) 776 return(pci_nomatch_tab[i].desc); 777 } 778 return(NULL); 779} 780 781static int 782load_vendors(void) 783{ 784 const char *dbf; 785 FILE *db; 786 struct pci_vendor_info *cv; 787 struct pci_device_info *cd; 788 char buf[1024], str[1024]; 789 char *ch; 790 int id, error; 791 792 /* 793 * Locate the database and initialise. 794 */ 795 TAILQ_INIT(&pci_vendors); 796 if ((dbf = getenv("PCICONF_VENDOR_DATABASE")) == NULL) 797 dbf = _PATH_LPCIVDB; 798 if ((db = fopen(dbf, "r")) == NULL) { 799 dbf = _PATH_PCIVDB; 800 if ((db = fopen(dbf, "r")) == NULL) 801 return(1); 802 } 803 cv = NULL; 804 cd = NULL; 805 error = 0; 806 807 /* 808 * Scan input lines from the database 809 */ 810 for (;;) { 811 if (fgets(buf, sizeof(buf), db) == NULL) 812 break; 813 814 if ((ch = strchr(buf, '#')) != NULL) 815 *ch = '\0'; 816 ch = strchr(buf, '\0') - 1; 817 while (ch > buf && isspace(*ch)) 818 *ch-- = '\0'; 819 if (ch <= buf) 820 continue; 821 822 /* Can't handle subvendor / subdevice entries yet */ 823 if (buf[0] == '\t' && buf[1] == '\t') 824 continue; 825 826 /* Check for vendor entry */ 827 if (buf[0] != '\t' && sscanf(buf, "%04x %[^\n]", &id, str) == 2) { 828 if ((id == 0) || (strlen(str) < 1)) 829 continue; 830 if ((cv = malloc(sizeof(struct pci_vendor_info))) == NULL) { 831 warn("allocating vendor entry"); 832 error = 1; 833 break; 834 } 835 if ((cv->desc = strdup(str)) == NULL) { 836 free(cv); 837 warn("allocating vendor description"); 838 error = 1; 839 break; 840 } 841 cv->id = id; 842 TAILQ_INIT(&cv->devs); 843 TAILQ_INSERT_TAIL(&pci_vendors, cv, link); 844 continue; 845 } 846 847 /* Check for device entry */ 848 if (buf[0] == '\t' && sscanf(buf + 1, "%04x %[^\n]", &id, str) == 2) { 849 if ((id == 0) || (strlen(str) < 1)) 850 continue; 851 if (cv == NULL) { 852 warnx("device entry with no vendor!"); 853 continue; 854 } 855 if ((cd = malloc(sizeof(struct pci_device_info))) == NULL) { 856 warn("allocating device entry"); 857 error = 1; 858 break; 859 } 860 if ((cd->desc = strdup(str)) == NULL) { 861 free(cd); 862 warn("allocating device description"); 863 error = 1; 864 break; 865 } 866 cd->id = id; 867 TAILQ_INSERT_TAIL(&cv->devs, cd, link); 868 continue; 869 } 870 871 /* It's a comment or junk, ignore it */ 872 } 873 if (ferror(db)) 874 error = 1; 875 fclose(db); 876 877 return(error); 878} 879 880uint32_t 881read_config(int fd, struct pcisel *sel, long reg, int width) 882{ 883 struct pci_io pi; 884 885 pi.pi_sel = *sel; 886 pi.pi_reg = reg; 887 pi.pi_width = width; 888 889 if (ioctl(fd, PCIOCREAD, &pi) < 0) 890 err(1, "ioctl(PCIOCREAD)"); 891 892 return (pi.pi_data); 893} 894 895static struct pcisel 896getdevice(const char *name) 897{ 898 struct pci_conf_io pc; 899 struct pci_conf conf[1]; 900 struct pci_match_conf patterns[1]; 901 char *cp; 902 int fd; 903 904 fd = open(_PATH_DEVPCI, O_RDONLY, 0); 905 if (fd < 0) 906 err(1, "%s", _PATH_DEVPCI); 907 908 bzero(&pc, sizeof(struct pci_conf_io)); 909 pc.match_buf_len = sizeof(conf); 910 pc.matches = conf; 911 912 bzero(&patterns, sizeof(patterns)); 913 914 /* 915 * The pattern structure requires the unit to be split out from 916 * the driver name. Walk backwards from the end of the name to 917 * find the start of the unit. 918 */ 919 if (name[0] == '\0') 920 errx(1, "Empty device name"); 921 cp = strchr(name, '\0'); 922 assert(cp != NULL && cp != name); 923 cp--; 924 while (cp != name && isdigit(cp[-1])) 925 cp--; 926 if (cp == name || !isdigit(*cp)) 927 errx(1, "Invalid device name"); 928 if ((size_t)(cp - name) + 1 > sizeof(patterns[0].pd_name)) 929 errx(1, "Device name is too long"); 930 memcpy(patterns[0].pd_name, name, cp - name); 931 patterns[0].pd_unit = strtol(cp, &cp, 10); 932 if (*cp != '\0') 933 errx(1, "Invalid device name"); 934 patterns[0].flags = PCI_GETCONF_MATCH_NAME | PCI_GETCONF_MATCH_UNIT; 935 pc.num_patterns = 1; 936 pc.pat_buf_len = sizeof(patterns); 937 pc.patterns = patterns; 938 939 if (ioctl(fd, PCIOCGETCONF, &pc) == -1) 940 err(1, "ioctl(PCIOCGETCONF)"); 941 if (pc.status != PCI_GETCONF_LAST_DEVICE && 942 pc.status != PCI_GETCONF_MORE_DEVS) 943 errx(1, "error returned from PCIOCGETCONF ioctl"); 944 close(fd); 945 if (pc.num_matches == 0) 946 errx(1, "Device not found"); 947 return (conf[0].pc_sel); 948} 949 950static struct pcisel 951parsesel(const char *str) 952{ 953 const char *ep; 954 char *eppos; 955 struct pcisel sel; 956 unsigned long selarr[4]; 957 int i; 958 959 ep = strchr(str, '@'); 960 if (ep != NULL) 961 ep++; 962 else 963 ep = str; 964 965 if (strncmp(ep, "pci", 3) == 0) { 966 ep += 3; 967 i = 0; 968 while (isdigit(*ep) && i < 4) { 969 selarr[i++] = strtoul(ep, &eppos, 10); 970 ep = eppos; 971 if (*ep == ':') 972 ep++; 973 } 974 if (i > 0 && *ep == '\0') { 975 sel.pc_func = (i > 2) ? selarr[--i] : 0; 976 sel.pc_dev = (i > 0) ? selarr[--i] : 0; 977 sel.pc_bus = (i > 0) ? selarr[--i] : 0; 978 sel.pc_domain = (i > 0) ? selarr[--i] : 0; 979 return (sel); 980 } 981 } 982 errx(1, "cannot parse selector %s", str); 983} 984 985static struct pcisel 986getsel(const char *str) 987{ 988 989 /* 990 * No device names contain colons and selectors always contain 991 * at least one colon. 992 */ 993 if (strchr(str, ':') == NULL) 994 return (getdevice(str)); 995 else 996 return (parsesel(str)); 997} 998 999static void 1000readone(int fd, struct pcisel *sel, long reg, int width) 1001{ 1002 1003 printf("%0*x", width*2, read_config(fd, sel, reg, width)); 1004} 1005 1006static void 1007readit(const char *name, const char *reg, int width) 1008{ 1009 long rstart; 1010 long rend; 1011 long r; 1012 char *end; 1013 int i; 1014 int fd; 1015 struct pcisel sel; 1016 1017 fd = open(_PATH_DEVPCI, O_RDWR, 0); 1018 if (fd < 0) 1019 err(1, "%s", _PATH_DEVPCI); 1020 1021 rend = rstart = strtol(reg, &end, 0); 1022 if (end && *end == ':') { 1023 end++; 1024 rend = strtol(end, (char **) 0, 0); 1025 } 1026 sel = getsel(name); 1027 for (i = 1, r = rstart; r <= rend; i++, r += width) { 1028 readone(fd, &sel, r, width); 1029 if (i && !(i % 8)) 1030 putchar(' '); 1031 putchar(i % (16/width) ? ' ' : '\n'); 1032 } 1033 if (i % (16/width) != 1) 1034 putchar('\n'); 1035 close(fd); 1036} 1037 1038static void 1039writeit(const char *name, const char *reg, const char *data, int width) 1040{ 1041 int fd; 1042 struct pci_io pi; 1043 1044 pi.pi_sel = getsel(name); 1045 pi.pi_reg = strtoul(reg, (char **)0, 0); /* XXX error check */ 1046 pi.pi_width = width; 1047 pi.pi_data = strtoul(data, (char **)0, 0); /* XXX error check */ 1048 1049 fd = open(_PATH_DEVPCI, O_RDWR, 0); 1050 if (fd < 0) 1051 err(1, "%s", _PATH_DEVPCI); 1052 1053 if (ioctl(fd, PCIOCWRITE, &pi) < 0) 1054 err(1, "ioctl(PCIOCWRITE)"); 1055 close(fd); 1056} 1057 1058static void 1059chkattached(const char *name) 1060{ 1061 int fd; 1062 struct pci_io pi; 1063 1064 pi.pi_sel = getsel(name); 1065 1066 fd = open(_PATH_DEVPCI, O_RDWR, 0); 1067 if (fd < 0) 1068 err(1, "%s", _PATH_DEVPCI); 1069 1070 if (ioctl(fd, PCIOCATTACHED, &pi) < 0) 1071 err(1, "ioctl(PCIOCATTACHED)"); 1072 1073 exitstatus = pi.pi_data ? 0 : 2; /* exit(2), if NOT attached */ 1074 printf("%s: %s%s\n", name, pi.pi_data == 0 ? "not " : "", "attached"); 1075 close(fd); 1076} 1077 1078static void 1079dump_bar(const char *name, const char *reg, const char *bar_start, 1080 const char *bar_count, int width, int verbose) 1081{ 1082 struct pci_bar_mmap pbm; 1083 uint32_t *dd; 1084 uint16_t *dh; 1085 uint8_t *db; 1086 uint64_t *dx, a, start, count; 1087 char *el; 1088 size_t res; 1089 int fd; 1090 1091 start = 0; 1092 if (bar_start != NULL) { 1093 start = strtoul(bar_start, &el, 0); 1094 if (*el != '\0') 1095 errx(1, "Invalid bar start specification %s", 1096 bar_start); 1097 } 1098 count = 0; 1099 if (bar_count != NULL) { 1100 count = strtoul(bar_count, &el, 0); 1101 if (*el != '\0') 1102 errx(1, "Invalid count specification %s", 1103 bar_count); 1104 } 1105 1106 pbm.pbm_sel = getsel(name); 1107 pbm.pbm_reg = strtoul(reg, &el, 0); 1108 if (*reg == '\0' || *el != '\0') 1109 errx(1, "Invalid bar specification %s", reg); 1110 pbm.pbm_flags = 0; 1111 pbm.pbm_memattr = VM_MEMATTR_UNCACHEABLE; /* XXX */ 1112 1113 fd = open(_PATH_DEVPCI, O_RDWR, 0); 1114 if (fd < 0) 1115 err(1, "%s", _PATH_DEVPCI); 1116 1117 if (ioctl(fd, PCIOCBARMMAP, &pbm) < 0) 1118 err(1, "ioctl(PCIOCBARMMAP)"); 1119 1120 if (count == 0) 1121 count = pbm.pbm_bar_length / width; 1122 if (start + count < start || (start + count) * width < (uint64_t)width) 1123 errx(1, "(start + count) x width overflow"); 1124 if ((start + count) * width > pbm.pbm_bar_length) { 1125 if (start * width > pbm.pbm_bar_length) 1126 count = 0; 1127 else 1128 count = (pbm.pbm_bar_length - start * width) / width; 1129 } 1130 if (verbose) { 1131 fprintf(stderr, 1132 "Dumping pci%d:%d:%d:%d BAR %x mapped base %p " 1133 "off %#x length %#jx from %#jx count %#jx in %d-bytes\n", 1134 pbm.pbm_sel.pc_domain, pbm.pbm_sel.pc_bus, 1135 pbm.pbm_sel.pc_dev, pbm.pbm_sel.pc_func, 1136 pbm.pbm_reg, pbm.pbm_map_base, pbm.pbm_bar_off, 1137 pbm.pbm_bar_length, start, count, width); 1138 } 1139 switch (width) { 1140 case 1: 1141 db = (uint8_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base + 1142 pbm.pbm_bar_off + start * width); 1143 for (a = 0; a < count; a += width, db++) { 1144 res = fwrite(db, width, 1, stdout); 1145 if (res != 1) { 1146 errx(1, "error writing to stdout"); 1147 break; 1148 } 1149 } 1150 break; 1151 case 2: 1152 dh = (uint16_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base + 1153 pbm.pbm_bar_off + start * width); 1154 for (a = 0; a < count; a += width, dh++) { 1155 res = fwrite(dh, width, 1, stdout); 1156 if (res != 1) { 1157 errx(1, "error writing to stdout"); 1158 break; 1159 } 1160 } 1161 break; 1162 case 4: 1163 dd = (uint32_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base + 1164 pbm.pbm_bar_off + start * width); 1165 for (a = 0; a < count; a += width, dd++) { 1166 res = fwrite(dd, width, 1, stdout); 1167 if (res != 1) { 1168 errx(1, "error writing to stdout"); 1169 break; 1170 } 1171 } 1172 break; 1173 case 8: 1174 dx = (uint64_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base + 1175 pbm.pbm_bar_off + start * width); 1176 for (a = 0; a < count; a += width, dx++) { 1177 res = fwrite(dx, width, 1, stdout); 1178 if (res != 1) { 1179 errx(1, "error writing to stdout"); 1180 break; 1181 } 1182 } 1183 break; 1184 default: 1185 errx(1, "invalid access width"); 1186 } 1187 1188 munmap((void *)pbm.pbm_map_base, pbm.pbm_map_length); 1189 close(fd); 1190} 1191