1/*
2 * Copyright (c) 2014 Roger Pau Monn�� <roger.pau@citrix.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD$");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/kernel.h>
34
35#include <sys/pciio.h>
36#include <dev/pci/pcireg.h>
37#include <dev/pci/pcivar.h>
38#include <dev/pci/pci_private.h>
39
40#include <xen/xen-os.h>
41#include <xen/hypervisor.h>
42#include <xen/xen_pci.h>
43
44#include "pcib_if.h"
45#include "pci_if.h"
46
47void
48xen_pci_enable_msi_method(device_t dev, device_t child, uint64_t address,
49     uint16_t data)
50{
51	struct pci_devinfo *dinfo = device_get_ivars(child);
52	struct pcicfg_msi *msi = &dinfo->cfg.msi;
53
54	/* Enable MSI in the control register. */
55	msi->msi_ctrl |= PCIM_MSICTRL_MSI_ENABLE;
56	pci_write_config(child, msi->msi_location + PCIR_MSI_CTRL,
57	    msi->msi_ctrl, 2);
58}
59
60void
61xen_pci_disable_msi_method(device_t dev, device_t child)
62{
63	struct pci_devinfo *dinfo = device_get_ivars(child);
64	struct pcicfg_msi *msi = &dinfo->cfg.msi;
65
66	msi->msi_ctrl &= ~PCIM_MSICTRL_MSI_ENABLE;
67	pci_write_config(child, msi->msi_location + PCIR_MSI_CTRL,
68	    msi->msi_ctrl, 2);
69}
70
71void
72xen_pci_child_added_method(device_t dev, device_t child)
73{
74	struct pci_devinfo *dinfo;
75	struct physdev_pci_device_add add_pci;
76	int error;
77
78	dinfo = device_get_ivars(child);
79	KASSERT((dinfo != NULL),
80	    ("xen_pci_add_child_method called with NULL dinfo"));
81
82	bzero(&add_pci, sizeof(add_pci));
83	add_pci.seg = dinfo->cfg.domain;
84	add_pci.bus = dinfo->cfg.bus;
85	add_pci.devfn = (dinfo->cfg.slot << 3) | dinfo->cfg.func;
86	error = HYPERVISOR_physdev_op(PHYSDEVOP_pci_device_add, &add_pci);
87	if (error)
88		panic("unable to add device bus %u devfn %u error: %d\n",
89		    add_pci.bus, add_pci.devfn, error);
90}
91