1/*-
2 * Copyright (c) 2012 Advanced Computing Technologies LLC
3 * Written by: John H. Baldwin <jhb@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#ifndef lint
29static const char rcsid[] =
30    "$FreeBSD$";
31#endif /* not lint */
32
33#include <sys/param.h>
34#include <sys/pciio.h>
35
36#include <err.h>
37#include <stdio.h>
38
39#include <dev/pci/pcireg.h>
40
41#include "pciconf.h"
42
43struct bit_table {
44	uint32_t mask;
45	const char *desc;
46};
47
48/* Error indicators in the PCI status register (PCIR_STATUS). */
49static struct bit_table pci_status[] = {
50	{ PCIM_STATUS_MDPERR, "Master Data Parity Error" },
51	{ PCIM_STATUS_STABORT, "Sent Target-Abort" },
52	{ PCIM_STATUS_RTABORT, "Received Target-Abort" },
53	{ PCIM_STATUS_RMABORT, "Received Master-Abort" },
54	{ PCIM_STATUS_SERR, "Signalled System Error" },
55	{ PCIM_STATUS_PERR, "Detected Parity Error" },
56	{ 0, NULL },
57};
58
59/* Valid error indicator bits in PCIR_STATUS. */
60#define	PCI_ERRORS	(PCIM_STATUS_MDPERR | PCIM_STATUS_STABORT |	\
61			 PCIM_STATUS_RTABORT | PCIM_STATUS_RMABORT |	\
62			 PCIM_STATUS_SERR | PCIM_STATUS_PERR)
63
64/* Error indicators in the PCI-Express device status register. */
65static struct bit_table pcie_device_status[] = {
66	{ PCIEM_STA_CORRECTABLE_ERROR, "Correctable Error Detected" },
67	{ PCIEM_STA_NON_FATAL_ERROR, "Non-Fatal Error Detected" },
68	{ PCIEM_STA_FATAL_ERROR, "Fatal Error Detected" },
69	{ PCIEM_STA_UNSUPPORTED_REQ, "Unsupported Request Detected" },
70	{ 0, NULL },
71};
72
73/* Valid error indicator bits in the PCI-Express device status register. */
74#define	PCIE_ERRORS	(PCIEM_STA_CORRECTABLE_ERROR |		\
75			 PCIEM_STA_NON_FATAL_ERROR |			\
76			 PCIEM_STA_FATAL_ERROR |			\
77			 PCIEM_STA_UNSUPPORTED_REQ)
78
79/* AER Uncorrected errors. */
80static struct bit_table aer_uc[] = {
81	{ PCIM_AER_UC_TRAINING_ERROR, "Link Training Error" },
82	{ PCIM_AER_UC_DL_PROTOCOL_ERROR, "Data Link Protocol Error" },
83	{ PCIM_AER_UC_SURPRISE_LINK_DOWN, "Surprise Link Down Error" },
84	{ PCIM_AER_UC_POISONED_TLP, "Poisoned TLP" },
85	{ PCIM_AER_UC_FC_PROTOCOL_ERROR, "Flow Control Protocol Error" },
86	{ PCIM_AER_UC_COMPLETION_TIMEOUT, "Completion Timeout" },
87	{ PCIM_AER_UC_COMPLETER_ABORT, "Completer Abort" },
88	{ PCIM_AER_UC_UNEXPECTED_COMPLETION, "Unexpected Completion" },
89	{ PCIM_AER_UC_RECEIVER_OVERFLOW, "Receiver Overflow Error" },
90	{ PCIM_AER_UC_MALFORMED_TLP, "Malformed TLP" },
91	{ PCIM_AER_UC_ECRC_ERROR, "ECRC Error" },
92	{ PCIM_AER_UC_UNSUPPORTED_REQUEST, "Unsupported Request" },
93	{ PCIM_AER_UC_ACS_VIOLATION, "ACS Violation" },
94	{ PCIM_AER_UC_INTERNAL_ERROR, "Uncorrectable Internal Error" },
95	{ PCIM_AER_UC_MC_BLOCKED_TLP, "MC Blocked TLP" },
96	{ PCIM_AER_UC_ATOMIC_EGRESS_BLK, "AtomicOp Egress Blocked" },
97	{ PCIM_AER_UC_TLP_PREFIX_BLOCKED, "TLP Prefix Blocked Error" },
98	{ 0, NULL },
99};
100
101/* AER Corrected errors. */
102static struct bit_table aer_cor[] = {
103	{ PCIM_AER_COR_RECEIVER_ERROR, "Receiver Error" },
104	{ PCIM_AER_COR_BAD_TLP, "Bad TLP" },
105	{ PCIM_AER_COR_BAD_DLLP, "Bad DLLP" },
106	{ PCIM_AER_COR_REPLAY_ROLLOVER, "REPLAY_NUM Rollover" },
107	{ PCIM_AER_COR_REPLAY_TIMEOUT, "Replay Timer Timeout" },
108	{ PCIM_AER_COR_ADVISORY_NF_ERROR, "Advisory Non-Fatal Error" },
109	{ PCIM_AER_COR_INTERNAL_ERROR, "Corrected Internal Error" },
110	{ PCIM_AER_COR_HEADER_LOG_OVFLOW, "Header Log Overflow" },
111	{ 0, NULL },
112};
113
114static void
115print_bits(const char *header, struct bit_table *table, uint32_t mask)
116{
117	int first;
118
119	first = 1;
120	for (; table->desc != NULL; table++)
121		if (mask & table->mask) {
122			if (first) {
123				printf("%14s = ", header);
124				first = 0;
125			} else
126				printf("                 ");
127			printf("%s\n", table->desc);
128			mask &= ~table->mask;
129		}
130	if (mask != 0) {
131		if (first)
132			printf("%14s = ", header);
133		else
134			printf("                 ");
135		printf("Unknown: 0x%08x\n", mask);
136	}
137}
138
139void
140list_errors(int fd, struct pci_conf *p)
141{
142	uint32_t mask, severity;
143	uint16_t sta, aer;
144	uint8_t pcie;
145
146	/* First check for standard PCI errors. */
147	sta = read_config(fd, &p->pc_sel, PCIR_STATUS, 2);
148	print_bits("PCI errors", pci_status, sta & PCI_ERRORS);
149
150	/* See if this is a PCI-express device. */
151	pcie = pci_find_cap(fd, p, PCIY_EXPRESS);
152	if (pcie == 0)
153		return;
154
155	/* Check for PCI-e errors. */
156	sta = read_config(fd, &p->pc_sel, pcie + PCIER_DEVICE_STA, 2);
157	print_bits("PCI-e errors", pcie_device_status, sta & PCIE_ERRORS);
158
159	/* See if this device supports AER. */
160	aer = pcie_find_cap(fd, p, PCIZ_AER);
161	if (aer == 0)
162		return;
163
164	/* Check for uncorrected errors. */
165	mask = read_config(fd, &p->pc_sel, aer + PCIR_AER_UC_STATUS, 4);
166        severity = read_config(fd, &p->pc_sel, aer + PCIR_AER_UC_SEVERITY, 4);
167	print_bits("Fatal", aer_uc, mask & severity);
168	print_bits("Non-fatal", aer_uc, mask & ~severity);
169
170	/* Check for corrected errors. */
171	mask = read_config(fd, &p->pc_sel, aer + PCIR_AER_COR_STATUS, 4);
172	print_bits("Corrected", aer_cor, mask);
173}
174