ncr.c revision 27684
1/************************************************************************** 2** 3** $Id: ncr.c,v 1.99 1997/07/18 19:33:56 se Exp $ 4** 5** Device driver for the NCR 53C810 PCI-SCSI-Controller. 6** 7** FreeBSD / NetBSD 8** 9**------------------------------------------------------------------------- 10** 11** Written for 386bsd and FreeBSD by 12** Wolfgang Stanglmeier <wolf@cologne.de> 13** Stefan Esser <se@mi.Uni-Koeln.de> 14** 15** Ported to NetBSD by 16** Charles M. Hannum <mycroft@gnu.ai.mit.edu> 17** 18**------------------------------------------------------------------------- 19** 20** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved. 21** 22** Redistribution and use in source and binary forms, with or without 23** modification, are permitted provided that the following conditions 24** are met: 25** 1. Redistributions of source code must retain the above copyright 26** notice, this list of conditions and the following disclaimer. 27** 2. Redistributions in binary form must reproduce the above copyright 28** notice, this list of conditions and the following disclaimer in the 29** documentation and/or other materials provided with the distribution. 30** 3. The name of the author may not be used to endorse or promote products 31** derived from this software without specific prior written permission. 32** 33** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 34** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 35** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 36** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 37** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 38** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 39** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 40** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 41** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 42** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 43** 44*************************************************************************** 45*/ 46 47#define NCR_DATE "pl24 96/12/14" 48 49#define NCR_VERSION (2) 50#define MAX_UNITS (16) 51 52#define NCR_GETCC_WITHMSG 53 54#if defined (__FreeBSD__) && defined(KERNEL) 55#include "opt_ncr.h" 56#endif /* defined (__FreeBSD__) && defined(KERNEL) */ 57 58#ifdef FAILSAFE 59#ifndef SCSI_NCR_DFLT_TAGS 60#define SCSI_NCR_DFLT_TAGS (0) 61#endif /* SCSI_NCR_DFLT_TAGS */ 62#define CDROM_ASYNC 63#endif /* FAILSAFE */ 64 65/*========================================================== 66** 67** Configuration and Debugging 68** 69** May be overwritten in <arch/conf/xxxx> 70** 71**========================================================== 72*/ 73 74/* 75** SCSI address of this device. 76** The boot routines should have set it. 77** If not, use this. 78*/ 79 80#ifndef SCSI_NCR_MYADDR 81#define SCSI_NCR_MYADDR (7) 82#endif /* SCSI_NCR_MYADDR */ 83 84/* 85** The default synchronous period factor 86** (0=asynchronous) 87** If maximum synchronous frequency is defined, use it instead. 88*/ 89 90#ifndef SCSI_NCR_MAX_SYNC 91 92#ifndef SCSI_NCR_DFLT_SYNC 93#define SCSI_NCR_DFLT_SYNC (12) 94#endif /* SCSI_NCR_DFLT_SYNC */ 95 96#else 97 98#if SCSI_NCR_MAX_SYNC == 0 99#define SCSI_NCR_DFLT_SYNC 0 100#else 101#define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC) 102#endif 103 104#endif 105 106/* 107** The minimal asynchronous pre-scaler period (ns) 108** Shall be 40. 109*/ 110 111#ifndef SCSI_NCR_MIN_ASYNC 112#define SCSI_NCR_MIN_ASYNC (40) 113#endif /* SCSI_NCR_MIN_ASYNC */ 114 115/* 116** The maximal bus with (in log2 byte) 117** (0=8 bit, 1=16 bit) 118*/ 119 120#ifndef SCSI_NCR_MAX_WIDE 121#define SCSI_NCR_MAX_WIDE (1) 122#endif /* SCSI_NCR_MAX_WIDE */ 123 124/* 125** The maximum number of tags per logic unit. 126** Used only for disk devices that support tags. 127*/ 128 129#ifndef SCSI_NCR_DFLT_TAGS 130#define SCSI_NCR_DFLT_TAGS (4) 131#endif /* SCSI_NCR_DFLT_TAGS */ 132 133/*========================================================== 134** 135** Configuration and Debugging 136** 137**========================================================== 138*/ 139 140/* 141** Number of targets supported by the driver. 142** n permits target numbers 0..n-1. 143** Default is 7, meaning targets #0..#6. 144** #7 .. is myself. 145*/ 146 147#define MAX_TARGET (16) 148 149/* 150** Number of logic units supported by the driver. 151** n enables logic unit numbers 0..n-1. 152** The common SCSI devices require only 153** one lun, so take 1 as the default. 154*/ 155 156#ifndef MAX_LUN 157#define MAX_LUN (8) 158#endif /* MAX_LUN */ 159 160/* 161** The maximum number of jobs scheduled for starting. 162** There should be one slot per target, and one slot 163** for each tag of each target in use. 164** The calculation below is actually quite silly ... 165*/ 166 167#define MAX_START (MAX_TARGET + 7 * SCSI_NCR_DFLT_TAGS) 168 169/* 170** The maximum number of segments a transfer is split into. 171*/ 172 173#define MAX_SCATTER (33) 174 175/* 176** The maximum transfer length (should be >= 64k). 177** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE. 178*/ 179 180#define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE) 181 182/* 183** other 184*/ 185 186#define NCR_SNOOP_TIMEOUT (1000000) 187 188/*========================================================== 189** 190** Include files 191** 192**========================================================== 193*/ 194 195#ifdef __NetBSD__ 196#ifdef _KERNEL 197#define KERNEL 198#endif 199#endif 200#include <stddef.h> 201 202#include <sys/types.h> 203#include <sys/param.h> 204#include <sys/time.h> 205#include <sys/proc.h> 206 207#ifdef KERNEL 208#include <sys/systm.h> 209#include <sys/malloc.h> 210#include <sys/buf.h> 211#include <sys/kernel.h> 212#ifdef __NetBSD__ 213#define bootverbose 1 214#endif 215#include <sys/sysctl.h> 216#ifndef __NetBSD__ 217#include <machine/clock.h> 218#endif 219#include <vm/vm.h> 220#include <vm/vm_param.h> 221#include <vm/pmap.h> 222#include <vm/vm_extern.h> 223#endif /* KERNEL */ 224 225 226#ifndef __NetBSD__ 227#include <pci/pcivar.h> 228#include <pci/pcireg.h> 229#include <pci/ncrreg.h> 230#else 231#include <sys/device.h> 232#include <dev/pci/ncr_reg.h> 233#include <dev/pci/pcivar.h> 234#include <dev/pci/pcireg.h> 235#define DELAY(x) delay(x) 236#endif /* __NetBSD */ 237 238#include <scsi/scsi_all.h> 239#include <scsi/scsiconf.h> 240 241 242/*========================================================== 243** 244** Debugging tags 245** 246**========================================================== 247*/ 248 249#define DEBUG_ALLOC (0x0001) 250#define DEBUG_PHASE (0x0002) 251#define DEBUG_POLL (0x0004) 252#define DEBUG_QUEUE (0x0008) 253#define DEBUG_RESULT (0x0010) 254#define DEBUG_SCATTER (0x0020) 255#define DEBUG_SCRIPT (0x0040) 256#define DEBUG_TINY (0x0080) 257#define DEBUG_TIMING (0x0100) 258#define DEBUG_NEGO (0x0200) 259#define DEBUG_TAGS (0x0400) 260#define DEBUG_FREEZE (0x0800) 261#define DEBUG_RESTART (0x1000) 262 263/* 264** Enable/Disable debug messages. 265** Can be changed at runtime too. 266*/ 267 268#ifdef SCSI_NCR_DEBUG 269 #define DEBUG_FLAGS ncr_debug 270#else /* SCSI_NCR_DEBUG */ 271 #define SCSI_NCR_DEBUG 0 272 #define DEBUG_FLAGS 0 273#endif /* SCSI_NCR_DEBUG */ 274 275 276 277/*========================================================== 278** 279** assert () 280** 281**========================================================== 282** 283** modified copy from 386bsd:/usr/include/sys/assert.h 284** 285**---------------------------------------------------------- 286*/ 287 288#define assert(expression) { \ 289 if (!(expression)) { \ 290 (void)printf(\ 291 "assertion \"%s\" failed: file \"%s\", line %d\n", \ 292 #expression, \ 293 __FILE__, __LINE__); \ 294 } \ 295} 296 297/*========================================================== 298** 299** Access to the controller chip. 300** 301**========================================================== 302*/ 303 304#ifdef NCR_IOMAPPED 305 306#define INB(r) inb (np->port + offsetof(struct ncr_reg, r)) 307#define INW(r) inw (np->port + offsetof(struct ncr_reg, r)) 308#define INL(r) inl (np->port + offsetof(struct ncr_reg, r)) 309 310#define OUTB(r, val) outb (np->port+offsetof(struct ncr_reg,r),(val)) 311#define OUTW(r, val) outw (np->port+offsetof(struct ncr_reg,r),(val)) 312#define OUTL(r, val) outl (np->port+offsetof(struct ncr_reg,r),(val)) 313 314#else 315 316#define INB(r) (np->reg->r) 317#define INW(r) (np->reg->r) 318#define INL(r) (np->reg->r) 319 320#define OUTB(r, val) np->reg->r = (val) 321#define OUTW(r, val) np->reg->r = (val) 322#define OUTL(r, val) np->reg->r = (val) 323 324#endif 325 326/* 327** Set bit field ON, OFF 328*/ 329 330#define OUTONB(r, m) OUTB(r, INB(r) | (m)) 331#define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m)) 332#define OUTONW(r, m) OUTW(r, INW(r) | (m)) 333#define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m)) 334#define OUTONL(r, m) OUTL(r, INL(r) | (m)) 335#define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m)) 336 337/*========================================================== 338** 339** Command control block states. 340** 341**========================================================== 342*/ 343 344#define HS_IDLE (0) 345#define HS_BUSY (1) 346#define HS_NEGOTIATE (2) /* sync/wide data transfer*/ 347#define HS_DISCONNECT (3) /* Disconnected by target */ 348 349#define HS_COMPLETE (4) 350#define HS_SEL_TIMEOUT (5) /* Selection timeout */ 351#define HS_RESET (6) /* SCSI reset */ 352#define HS_ABORTED (7) /* Transfer aborted */ 353#define HS_TIMEOUT (8) /* Software timeout */ 354#define HS_FAIL (9) /* SCSI or PCI bus errors */ 355#define HS_UNEXPECTED (10) /* Unexpected disconnect */ 356 357#define HS_DONEMASK (0xfc) 358 359/*========================================================== 360** 361** Software Interrupt Codes 362** 363**========================================================== 364*/ 365 366#define SIR_SENSE_RESTART (1) 367#define SIR_SENSE_FAILED (2) 368#define SIR_STALL_RESTART (3) 369#define SIR_STALL_QUEUE (4) 370#define SIR_NEGO_SYNC (5) 371#define SIR_NEGO_WIDE (6) 372#define SIR_NEGO_FAILED (7) 373#define SIR_NEGO_PROTO (8) 374#define SIR_REJECT_RECEIVED (9) 375#define SIR_REJECT_SENT (10) 376#define SIR_IGN_RESIDUE (11) 377#define SIR_MISSING_SAVE (12) 378#define SIR_MAX (12) 379 380/*========================================================== 381** 382** Extended error codes. 383** xerr_status field of struct ccb. 384** 385**========================================================== 386*/ 387 388#define XE_OK (0) 389#define XE_EXTRA_DATA (1) /* unexpected data phase */ 390#define XE_BAD_PHASE (2) /* illegal phase (4/5) */ 391 392/*========================================================== 393** 394** Negotiation status. 395** nego_status field of struct ccb. 396** 397**========================================================== 398*/ 399 400#define NS_SYNC (1) 401#define NS_WIDE (2) 402 403/*========================================================== 404** 405** "Special features" of targets. 406** quirks field of struct tcb. 407** actualquirks field of struct ccb. 408** 409**========================================================== 410*/ 411 412#define QUIRK_AUTOSAVE (0x01) 413#define QUIRK_NOMSG (0x02) 414#define QUIRK_NOSYNC (0x10) 415#define QUIRK_NOWIDE16 (0x20) 416#define QUIRK_NOTAGS (0x40) 417#define QUIRK_UPDATE (0x80) 418 419/*========================================================== 420** 421** Capability bits in Inquire response byte 7. 422** 423**========================================================== 424*/ 425 426#define INQ7_QUEUE (0x02) 427#define INQ7_SYNC (0x10) 428#define INQ7_WIDE16 (0x20) 429 430/*========================================================== 431** 432** Misc. 433** 434**========================================================== 435*/ 436 437#define CCB_MAGIC (0xf2691ad2) 438#define MAX_TAGS (16) /* hard limit */ 439 440/*========================================================== 441** 442** OS dependencies. 443** 444**========================================================== 445*/ 446 447#define PRINT_ADDR(xp) sc_print_addr(xp->sc_link) 448 449/*========================================================== 450** 451** Declaration of structs. 452** 453**========================================================== 454*/ 455 456struct tcb; 457struct lcb; 458struct ccb; 459struct ncb; 460struct script; 461 462typedef struct ncb * ncb_p; 463typedef struct tcb * tcb_p; 464typedef struct lcb * lcb_p; 465typedef struct ccb * ccb_p; 466 467struct link { 468 u_long l_cmd; 469 u_long l_paddr; 470}; 471 472struct usrcmd { 473 u_long target; 474 u_long lun; 475 u_long data; 476 u_long cmd; 477}; 478 479#define UC_SETSYNC 10 480#define UC_SETTAGS 11 481#define UC_SETDEBUG 12 482#define UC_SETORDER 13 483#define UC_SETWIDE 14 484#define UC_SETFLAG 15 485 486#define UF_TRACE (0x01) 487 488/*--------------------------------------- 489** 490** Timestamps for profiling 491** 492**--------------------------------------- 493*/ 494 495struct tstamp { 496 struct timeval start; 497 struct timeval end; 498 struct timeval select; 499 struct timeval command; 500 struct timeval data; 501 struct timeval status; 502 struct timeval disconnect; 503 struct timeval reselect; 504}; 505 506/* 507** profiling data (per device) 508*/ 509 510struct profile { 511 u_long num_trans; 512 u_long num_bytes; 513 u_long num_disc; 514 u_long num_break; 515 u_long num_int; 516 u_long num_fly; 517 u_long ms_setup; 518 u_long ms_data; 519 u_long ms_disc; 520 u_long ms_post; 521}; 522 523/*========================================================== 524** 525** Declaration of structs: target control block 526** 527**========================================================== 528*/ 529 530struct tcb { 531 /* 532 ** during reselection the ncr jumps to this point 533 ** with SFBR set to the encoded target number 534 ** with bit 7 set. 535 ** if it's not this target, jump to the next. 536 ** 537 ** JUMP IF (SFBR != #target#) 538 ** @(next tcb) 539 */ 540 541 struct link jump_tcb; 542 543 /* 544 ** load the actual values for the sxfer and the scntl3 545 ** register (sync/wide mode). 546 ** 547 ** SCR_COPY (1); 548 ** @(sval field of this tcb) 549 ** @(sxfer register) 550 ** SCR_COPY (1); 551 ** @(wval field of this tcb) 552 ** @(scntl3 register) 553 */ 554 555 ncrcmd getscr[6]; 556 557 /* 558 ** if next message is "identify" 559 ** then load the message to SFBR, 560 ** else load 0 to SFBR. 561 ** 562 ** CALL 563 ** <RESEL_LUN> 564 */ 565 566 struct link call_lun; 567 568 /* 569 ** now look for the right lun. 570 ** 571 ** JUMP 572 ** @(first ccb of this lun) 573 */ 574 575 struct link jump_lcb; 576 577 /* 578 ** pointer to interrupted getcc ccb 579 */ 580 581 ccb_p hold_cp; 582 583 /* 584 ** pointer to ccb used for negotiating. 585 ** Avoid to start a nego for all queued commands 586 ** when tagged command queuing is enabled. 587 */ 588 589 ccb_p nego_cp; 590 591 /* 592 ** statistical data 593 */ 594 595 u_long transfers; 596 u_long bytes; 597 598 /* 599 ** user settable limits for sync transfer 600 ** and tagged commands. 601 */ 602 603 u_char usrsync; 604 u_char usrtags; 605 u_char usrwide; 606 u_char usrflag; 607 608 /* 609 ** negotiation of wide and synch transfer. 610 ** device quirks. 611 */ 612 613/*0*/ u_char minsync; 614/*1*/ u_char sval; 615/*2*/ u_short period; 616/*0*/ u_char maxoffs; 617 618/*1*/ u_char quirks; 619 620/*2*/ u_char widedone; 621/*3*/ u_char wval; 622 /* 623 ** inquire data 624 */ 625#define MAX_INQUIRE 36 626 u_char inqdata[MAX_INQUIRE]; 627 628 /* 629 ** the lcb's of this tcb 630 */ 631 632 lcb_p lp[MAX_LUN]; 633}; 634 635/*========================================================== 636** 637** Declaration of structs: lun control block 638** 639**========================================================== 640*/ 641 642struct lcb { 643 /* 644 ** during reselection the ncr jumps to this point 645 ** with SFBR set to the "Identify" message. 646 ** if it's not this lun, jump to the next. 647 ** 648 ** JUMP IF (SFBR != #lun#) 649 ** @(next lcb of this target) 650 */ 651 652 struct link jump_lcb; 653 654 /* 655 ** if next message is "simple tag", 656 ** then load the tag to SFBR, 657 ** else load 0 to SFBR. 658 ** 659 ** CALL 660 ** <RESEL_TAG> 661 */ 662 663 struct link call_tag; 664 665 /* 666 ** now look for the right ccb. 667 ** 668 ** JUMP 669 ** @(first ccb of this lun) 670 */ 671 672 struct link jump_ccb; 673 674 /* 675 ** start of the ccb chain 676 */ 677 678 ccb_p next_ccb; 679 680 /* 681 ** Control of tagged queueing 682 */ 683 684 u_char reqccbs; 685 u_char actccbs; 686 u_char reqlink; 687 u_char actlink; 688 u_char usetags; 689 u_char lasttag; 690}; 691 692/*========================================================== 693** 694** Declaration of structs: COMMAND control block 695** 696**========================================================== 697** 698** This substructure is copied from the ccb to a 699** global address after selection (or reselection) 700** and copied back before disconnect. 701** 702** These fields are accessible to the script processor. 703** 704**---------------------------------------------------------- 705*/ 706 707struct head { 708 /* 709 ** Execution of a ccb starts at this point. 710 ** It's a jump to the "SELECT" label 711 ** of the script. 712 ** 713 ** After successful selection the script 714 ** processor overwrites it with a jump to 715 ** the IDLE label of the script. 716 */ 717 718 struct link launch; 719 720 /* 721 ** Saved data pointer. 722 ** Points to the position in the script 723 ** responsible for the actual transfer 724 ** of data. 725 ** It's written after reception of a 726 ** "SAVE_DATA_POINTER" message. 727 ** The goalpointer points after 728 ** the last transfer command. 729 */ 730 731 u_long savep; 732 u_long lastp; 733 u_long goalp; 734 735 /* 736 ** The virtual address of the ccb 737 ** containing this header. 738 */ 739 740 ccb_p cp; 741 742 /* 743 ** space for some timestamps to gather 744 ** profiling data about devices and this driver. 745 */ 746 747 struct tstamp stamp; 748 749 /* 750 ** status fields. 751 */ 752 753 u_char status[8]; 754}; 755 756/* 757** The status bytes are used by the host and the script processor. 758** 759** The first four byte are copied to the scratchb register 760** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect, 761** and copied back just after disconnecting. 762** Inside the script the XX_REG are used. 763** 764** The last four bytes are used inside the script by "COPY" commands. 765** Because source and destination must have the same alignment 766** in a longword, the fields HAVE to be at the choosen offsets. 767** xerr_st (4) 0 (0x34) scratcha 768** sync_st (5) 1 (0x05) sxfer 769** wide_st (7) 3 (0x03) scntl3 770*/ 771 772/* 773** First four bytes (script) 774*/ 775#define QU_REG scr0 776#define HS_REG scr1 777#define HS_PRT nc_scr1 778#define SS_REG scr2 779#define PS_REG scr3 780 781/* 782** First four bytes (host) 783*/ 784#define actualquirks phys.header.status[0] 785#define host_status phys.header.status[1] 786#define scsi_status phys.header.status[2] 787#define parity_status phys.header.status[3] 788 789/* 790** Last four bytes (script) 791*/ 792#define xerr_st header.status[4] /* MUST be ==0 mod 4 */ 793#define sync_st header.status[5] /* MUST be ==1 mod 4 */ 794#define nego_st header.status[6] 795#define wide_st header.status[7] /* MUST be ==3 mod 4 */ 796 797/* 798** Last four bytes (host) 799*/ 800#define xerr_status phys.xerr_st 801#define sync_status phys.sync_st 802#define nego_status phys.nego_st 803#define wide_status phys.wide_st 804 805/*========================================================== 806** 807** Declaration of structs: Data structure block 808** 809**========================================================== 810** 811** During execution of a ccb by the script processor, 812** the DSA (data structure address) register points 813** to this substructure of the ccb. 814** This substructure contains the header with 815** the script-processor-changable data and 816** data blocks for the indirect move commands. 817** 818**---------------------------------------------------------- 819*/ 820 821struct dsb { 822 823 /* 824 ** Header. 825 ** Has to be the first entry, 826 ** because it's jumped to by the 827 ** script processor 828 */ 829 830 struct head header; 831 832 /* 833 ** Table data for Script 834 */ 835 836 struct scr_tblsel select; 837 struct scr_tblmove smsg ; 838 struct scr_tblmove smsg2 ; 839 struct scr_tblmove cmd ; 840 struct scr_tblmove scmd ; 841 struct scr_tblmove sense ; 842 struct scr_tblmove data [MAX_SCATTER]; 843}; 844 845/*========================================================== 846** 847** Declaration of structs: Command control block. 848** 849**========================================================== 850** 851** During execution of a ccb by the script processor, 852** the DSA (data structure address) register points 853** to this substructure of the ccb. 854** This substructure contains the header with 855** the script-processor-changable data and then 856** data blocks for the indirect move commands. 857** 858**---------------------------------------------------------- 859*/ 860 861 862struct ccb { 863 /* 864 ** This filler ensure that the global header is 865 ** cache line size aligned. 866 */ 867 ncrcmd filler[2]; 868 869 /* 870 ** during reselection the ncr jumps to this point. 871 ** If a "SIMPLE_TAG" message was received, 872 ** then SFBR is set to the tag. 873 ** else SFBR is set to 0 874 ** If looking for another tag, jump to the next ccb. 875 ** 876 ** JUMP IF (SFBR != #TAG#) 877 ** @(next ccb of this lun) 878 */ 879 880 struct link jump_ccb; 881 882 /* 883 ** After execution of this call, the return address 884 ** (in the TEMP register) points to the following 885 ** data structure block. 886 ** So copy it to the DSA register, and start 887 ** processing of this data structure. 888 ** 889 ** CALL 890 ** <RESEL_TMP> 891 */ 892 893 struct link call_tmp; 894 895 /* 896 ** This is the data structure which is 897 ** to be executed by the script processor. 898 */ 899 900 struct dsb phys; 901 902 /* 903 ** If a data transfer phase is terminated too early 904 ** (after reception of a message (i.e. DISCONNECT)), 905 ** we have to prepare a mini script to transfer 906 ** the rest of the data. 907 */ 908 909 u_long patch[8]; 910 911 /* 912 ** The general SCSI driver provides a 913 ** pointer to a control block. 914 */ 915 916 struct scsi_xfer *xfer; 917 918 /* 919 ** We prepare a message to be sent after selection, 920 ** and a second one to be sent after getcc selection. 921 ** Contents are IDENTIFY and SIMPLE_TAG. 922 ** While negotiating sync or wide transfer, 923 ** a SDTM or WDTM message is appended. 924 */ 925 926 u_char scsi_smsg [8]; 927 u_char scsi_smsg2[8]; 928 929 /* 930 ** Lock this ccb. 931 ** Flag is used while looking for a free ccb. 932 */ 933 934 u_long magic; 935 936 /* 937 ** Physical address of this instance of ccb 938 */ 939 940 u_long p_ccb; 941 942 /* 943 ** Completion time out for this job. 944 ** It's set to time of start + allowed number of seconds. 945 */ 946 947 u_long tlimit; 948 949 /* 950 ** All ccbs of one hostadapter are chained. 951 */ 952 953 ccb_p link_ccb; 954 955 /* 956 ** All ccbs of one target/lun are chained. 957 */ 958 959 ccb_p next_ccb; 960 961 /* 962 ** Sense command 963 */ 964 965 u_char sensecmd[6]; 966 967 /* 968 ** Tag for this transfer. 969 ** It's patched into jump_ccb. 970 ** If it's not zero, a SIMPLE_TAG 971 ** message is included in smsg. 972 */ 973 974 u_char tag; 975}; 976 977#define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl)) 978 979/*========================================================== 980** 981** Declaration of structs: NCR device descriptor 982** 983**========================================================== 984*/ 985 986struct ncb { 987 /* 988 ** The global header. 989 ** Accessible to both the host and the 990 ** script-processor. 991 ** We assume it is cache line size aligned. 992 */ 993 struct head header; 994 995#ifdef __NetBSD__ 996 struct device sc_dev; 997 void *sc_ih; 998#else /* !__NetBSD__ */ 999 int unit; 1000#endif /* __NetBSD__ */ 1001 1002 /*----------------------------------------------- 1003 ** Scripts .. 1004 **----------------------------------------------- 1005 ** 1006 ** During reselection the ncr jumps to this point. 1007 ** The SFBR register is loaded with the encoded target id. 1008 ** 1009 ** Jump to the first target. 1010 ** 1011 ** JUMP 1012 ** @(next tcb) 1013 */ 1014 struct link jump_tcb; 1015 1016 /*----------------------------------------------- 1017 ** Configuration .. 1018 **----------------------------------------------- 1019 ** 1020 ** virtual and physical addresses 1021 ** of the 53c810 chip. 1022 */ 1023 vm_offset_t vaddr; 1024 vm_offset_t paddr; 1025 1026 /* 1027 ** pointer to the chip's registers. 1028 */ 1029 volatile 1030 struct ncr_reg* reg; 1031 1032 /* 1033 ** A copy of the script, relocated for this ncb. 1034 */ 1035 struct script *script; 1036 1037 /* 1038 ** Physical address of this instance of ncb->script 1039 */ 1040 u_long p_script; 1041 1042 /* 1043 ** The SCSI address of the host adapter. 1044 */ 1045 u_char myaddr; 1046 1047 /* 1048 ** timing parameters 1049 */ 1050 u_char minsync; /* Minimum sync period factor */ 1051 u_char maxsync; /* Maximum sync period factor */ 1052 u_char maxoffs; /* Max scsi offset */ 1053 u_char clock_divn; /* Number of clock divisors */ 1054 u_long clock_khz; /* SCSI clock frequency in KHz */ 1055 u_long features; /* Chip features map */ 1056 u_char multiplier; /* Clock multiplier (1,2,4) */ 1057 1058 u_char maxburst; /* log base 2 of dwords burst */ 1059 1060 /* 1061 ** BIOS supplied PCI bus options 1062 */ 1063 u_char rv_scntl3; 1064 u_char rv_dcntl; 1065 u_char rv_dmode; 1066 u_char rv_ctest3; 1067 u_char rv_ctest4; 1068 u_char rv_ctest5; 1069 u_char rv_gpcntl; 1070 u_char rv_stest2; 1071 1072 /*----------------------------------------------- 1073 ** Link to the generic SCSI driver 1074 **----------------------------------------------- 1075 */ 1076 1077 struct scsi_link sc_link; 1078 1079 /*----------------------------------------------- 1080 ** Job control 1081 **----------------------------------------------- 1082 ** 1083 ** Commands from user 1084 */ 1085 struct usrcmd user; 1086 u_char order; 1087 1088 /* 1089 ** Target data 1090 */ 1091 struct tcb target[MAX_TARGET]; 1092 1093 /* 1094 ** Start queue. 1095 */ 1096 u_long squeue [MAX_START]; 1097 u_short squeueput; 1098 u_short actccbs; 1099 1100 /* 1101 ** Timeout handler 1102 */ 1103 u_long heartbeat; 1104 u_short ticks; 1105 u_short latetime; 1106 u_long lasttime; 1107 1108 /*----------------------------------------------- 1109 ** Debug and profiling 1110 **----------------------------------------------- 1111 ** 1112 ** register dump 1113 */ 1114 struct ncr_reg regdump; 1115 struct timeval regtime; 1116 1117 /* 1118 ** Profiling data 1119 */ 1120 struct profile profile; 1121 u_long disc_phys; 1122 u_long disc_ref; 1123 1124 /* 1125 ** The global control block. 1126 ** It's used only during the configuration phase. 1127 ** A target control block will be created 1128 ** after the first successful transfer. 1129 ** It is allocated separately in order to insure 1130 ** cache line size alignment. 1131 */ 1132 struct ccb *ccb; 1133 1134 /* 1135 ** message buffers. 1136 ** Should be longword aligned, 1137 ** because they're written with a 1138 ** COPY script command. 1139 */ 1140 u_char msgout[8]; 1141 u_char msgin [8]; 1142 u_long lastmsg; 1143 1144 /* 1145 ** Buffer for STATUS_IN phase. 1146 */ 1147 u_char scratch; 1148 1149 /* 1150 ** controller chip dependent maximal transfer width. 1151 */ 1152 u_char maxwide; 1153 1154 /* 1155 ** option for M_IDENTIFY message: enables disconnecting 1156 */ 1157 u_char disc; 1158 1159#ifdef NCR_IOMAPPED 1160 /* 1161 ** address of the ncr control registers in io space 1162 */ 1163 u_short port; 1164#endif 1165}; 1166 1167#define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl)) 1168 1169/*========================================================== 1170** 1171** 1172** Script for NCR-Processor. 1173** 1174** Use ncr_script_fill() to create the variable parts. 1175** Use ncr_script_copy_and_bind() to make a copy and 1176** bind to physical addresses. 1177** 1178** 1179**========================================================== 1180** 1181** We have to know the offsets of all labels before 1182** we reach them (for forward jumps). 1183** Therefore we declare a struct here. 1184** If you make changes inside the script, 1185** DONT FORGET TO CHANGE THE LENGTHS HERE! 1186** 1187**---------------------------------------------------------- 1188*/ 1189 1190struct script { 1191 ncrcmd start [ 7]; 1192 ncrcmd start0 [ 2]; 1193 ncrcmd start1 [ 3]; 1194 ncrcmd startpos [ 1]; 1195 ncrcmd tryloop [MAX_START*5+2]; 1196 ncrcmd trysel [ 8]; 1197 ncrcmd skip [ 8]; 1198 ncrcmd skip2 [ 3]; 1199 ncrcmd idle [ 2]; 1200 ncrcmd select [ 22]; 1201 ncrcmd prepare [ 4]; 1202 ncrcmd loadpos [ 14]; 1203 ncrcmd prepare2 [ 24]; 1204 ncrcmd setmsg [ 5]; 1205 ncrcmd clrack [ 2]; 1206 ncrcmd dispatch [ 33]; 1207 ncrcmd no_data [ 17]; 1208 ncrcmd checkatn [ 10]; 1209 ncrcmd command [ 15]; 1210 ncrcmd status [ 27]; 1211 ncrcmd msg_in [ 26]; 1212 ncrcmd msg_bad [ 6]; 1213 ncrcmd msg_parity [ 6]; 1214 ncrcmd msg_reject [ 8]; 1215 ncrcmd msg_ign_residue [ 32]; 1216 ncrcmd msg_extended [ 18]; 1217 ncrcmd msg_ext_2 [ 18]; 1218 ncrcmd msg_wdtr [ 27]; 1219 ncrcmd msg_ext_3 [ 18]; 1220 ncrcmd msg_sdtr [ 27]; 1221 ncrcmd complete [ 13]; 1222 ncrcmd cleanup [ 12]; 1223 ncrcmd cleanup0 [ 11]; 1224 ncrcmd signal [ 10]; 1225 ncrcmd save_dp [ 5]; 1226 ncrcmd restore_dp [ 5]; 1227 ncrcmd disconnect [ 12]; 1228 ncrcmd disconnect0 [ 5]; 1229 ncrcmd disconnect1 [ 23]; 1230 ncrcmd msg_out [ 9]; 1231 ncrcmd msg_out_done [ 7]; 1232 ncrcmd msg_out_abort [ 10]; 1233 ncrcmd getcc [ 4]; 1234 ncrcmd getcc1 [ 5]; 1235#ifdef NCR_GETCC_WITHMSG 1236 ncrcmd getcc2 [ 33]; 1237#else 1238 ncrcmd getcc2 [ 14]; 1239#endif 1240 ncrcmd getcc3 [ 10]; 1241 ncrcmd badgetcc [ 6]; 1242 ncrcmd reselect [ 8]; 1243 ncrcmd reselect1 [ 8]; 1244 ncrcmd reselect2 [ 8]; 1245 ncrcmd resel_tmp [ 5]; 1246 ncrcmd resel_lun [ 18]; 1247 ncrcmd resel_tag [ 24]; 1248 ncrcmd data_in [MAX_SCATTER * 4 + 7]; 1249 ncrcmd data_out [MAX_SCATTER * 4 + 7]; 1250 ncrcmd aborttag [ 4]; 1251 ncrcmd abort [ 22]; 1252 ncrcmd snooptest [ 9]; 1253 ncrcmd snoopend [ 2]; 1254}; 1255 1256/*========================================================== 1257** 1258** 1259** Function headers. 1260** 1261** 1262**========================================================== 1263*/ 1264 1265#ifdef KERNEL 1266static void ncr_alloc_ccb (ncb_p np, u_long target, u_long lun); 1267static void ncr_complete (ncb_p np, ccb_p cp); 1268static int ncr_delta (struct timeval * from, struct timeval * to); 1269static void ncr_exception (ncb_p np); 1270static void ncr_free_ccb (ncb_p np, ccb_p cp, int flags); 1271static void ncr_selectclock (ncb_p np, u_char scntl3); 1272static void ncr_getclock (ncb_p np, u_char multiplier); 1273static ccb_p ncr_get_ccb (ncb_p np, u_long flags, u_long t,u_long l); 1274static u_int32_t ncr_info (int unit); 1275static void ncr_init (ncb_p np, char * msg, u_long code); 1276static void ncr_intr (void *vnp); 1277static void ncr_int_ma (ncb_p np, u_char dstat); 1278static void ncr_int_sir (ncb_p np); 1279static void ncr_int_sto (ncb_p np); 1280static void ncr_min_phys (struct buf *bp); 1281static void ncr_negotiate (struct ncb* np, struct tcb* tp); 1282static void ncr_opennings (ncb_p np, lcb_p lp, struct scsi_xfer * xp); 1283static void ncb_profile (ncb_p np, ccb_p cp); 1284static void ncr_script_copy_and_bind 1285 (struct script * script, ncb_p np); 1286static void ncr_script_fill (struct script * scr); 1287static int ncr_scatter (struct dsb* phys, vm_offset_t vaddr, 1288 vm_size_t datalen); 1289static void ncr_setmaxtags (tcb_p tp, u_long usrtags); 1290static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp, 1291 u_char *scntl3p); 1292static void ncr_setsync (ncb_p np, ccb_p cp,u_char scntl3,u_char sxfer); 1293static void ncr_settags (tcb_p tp, lcb_p lp, u_long usrtags); 1294static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack); 1295static int ncr_show_msg (u_char * msg); 1296static int ncr_snooptest (ncb_p np); 1297static int32_t ncr_start (struct scsi_xfer *xp); 1298static void ncr_timeout (void *arg); 1299static void ncr_usercmd (ncb_p np); 1300static void ncr_wakeup (ncb_p np, u_long code); 1301 1302#ifdef __NetBSD__ 1303static int ncr_probe (struct device *, void *, void *); 1304static void ncr_attach (struct device *, struct device *, void *); 1305#else /* !__NetBSD */ 1306static char* ncr_probe (pcici_t tag, pcidi_t type); 1307static void ncr_attach (pcici_t tag, int unit); 1308#endif /* __NetBSD__ */ 1309 1310#endif /* KERNEL */ 1311 1312/*========================================================== 1313** 1314** 1315** Global static data. 1316** 1317** 1318**========================================================== 1319*/ 1320 1321 1322static char ident[] = 1323 "\n$Id: ncr.c,v 1.99 1997/07/18 19:33:56 se Exp $\n"; 1324 1325static const u_long ncr_version = NCR_VERSION * 11 1326 + (u_long) sizeof (struct ncb) * 7 1327 + (u_long) sizeof (struct ccb) * 5 1328 + (u_long) sizeof (struct lcb) * 3 1329 + (u_long) sizeof (struct tcb) * 2; 1330 1331#ifdef KERNEL 1332static const int nncr=MAX_UNITS; /* XXX to be replaced by SYSCTL */ 1333ncb_p ncrp [MAX_UNITS]; /* XXX to be replaced by SYSCTL */ 1334 1335static int ncr_debug = SCSI_NCR_DEBUG; 1336SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0, ""); 1337 1338static int ncr_cache; /* to be aligned _NOT_ static */ 1339 1340/*========================================================== 1341** 1342** 1343** Global static data: auto configure 1344** 1345** 1346**========================================================== 1347*/ 1348 1349#define NCR_810_ID (0x00011000ul) 1350#define NCR_815_ID (0x00041000ul) 1351#define NCR_820_ID (0x00021000ul) 1352#define NCR_825_ID (0x00031000ul) 1353#define NCR_860_ID (0x00061000ul) 1354#define NCR_875_ID (0x000f1000ul) 1355#define NCR_875_ID2 (0x008f1000ul) 1356#define NCR_885_ID (0x000d1000ul) 1357#define NCR_895_ID (0x000c1000ul) 1358#define NCR_896_ID (0x000b1000ul) 1359 1360#ifdef __NetBSD__ 1361 1362struct cfdriver ncrcd = { 1363 NULL, "ncr", ncr_probe, ncr_attach, DV_DISK, sizeof(struct ncb) 1364}; 1365 1366#else /* !__NetBSD__ */ 1367 1368static u_long ncr_count; 1369 1370static struct pci_device ncr_device = { 1371 "ncr", 1372 ncr_probe, 1373 ncr_attach, 1374 &ncr_count, 1375 NULL 1376}; 1377 1378DATA_SET (pcidevice_set, ncr_device); 1379 1380#endif /* !__NetBSD__ */ 1381 1382static struct scsi_adapter ncr_switch = 1383{ 1384 ncr_start, 1385 ncr_min_phys, 1386 0, 1387 0, 1388#ifndef __NetBSD__ 1389 ncr_info, 1390 "ncr", 1391#endif /* !__NetBSD__ */ 1392}; 1393 1394static struct scsi_device ncr_dev = 1395{ 1396 NULL, /* Use default error handler */ 1397 NULL, /* have a queue, served by this */ 1398 NULL, /* have no async handler */ 1399 NULL, /* Use default 'done' routine */ 1400#ifndef __NetBSD__ 1401 "ncr", 1402#endif /* !__NetBSD__ */ 1403}; 1404 1405#ifdef __NetBSD__ 1406 1407#define ncr_name(np) (np->sc_dev.dv_xname) 1408 1409#else /* !__NetBSD__ */ 1410 1411static char *ncr_name (ncb_p np) 1412{ 1413 static char name[10]; 1414 sprintf(name, "ncr%d", np->unit); 1415 return (name); 1416} 1417#endif 1418 1419/*========================================================== 1420** 1421** 1422** Scripts for NCR-Processor. 1423** 1424** Use ncr_script_bind for binding to physical addresses. 1425** 1426** 1427**========================================================== 1428** 1429** NADDR generates a reference to a field of the controller data. 1430** PADDR generates a reference to another part of the script. 1431** RADDR generates a reference to a script processor register. 1432** FADDR generates a reference to a script processor register 1433** with offset. 1434** 1435**---------------------------------------------------------- 1436*/ 1437 1438#define RELOC_SOFTC 0x40000000 1439#define RELOC_LABEL 0x50000000 1440#define RELOC_REGISTER 0x60000000 1441#define RELOC_MASK 0xf0000000 1442 1443#define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label)) 1444#define PADDR(label) (RELOC_LABEL | offsetof(struct script, label)) 1445#define RADDR(label) (RELOC_REGISTER | REG(label)) 1446#define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs))) 1447 1448static struct script script0 = { 1449/*--------------------------< START >-----------------------*/ { 1450 /* 1451 ** Claim to be still alive ... 1452 */ 1453 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)), 1454 (ncrcmd) &time.tv_sec, 1455 NADDR (heartbeat), 1456 /* 1457 ** Make data structure address invalid. 1458 ** clear SIGP. 1459 */ 1460 SCR_LOAD_REG (dsa, 0xff), 1461 0, 1462 SCR_FROM_REG (ctest2), 1463 0, 1464}/*-------------------------< START0 >----------------------*/,{ 1465 /* 1466 ** Hook for interrupted GetConditionCode. 1467 ** Will be patched to ... IFTRUE by 1468 ** the interrupt handler. 1469 */ 1470 SCR_INT ^ IFFALSE (0), 1471 SIR_SENSE_RESTART, 1472 1473}/*-------------------------< START1 >----------------------*/,{ 1474 /* 1475 ** Hook for stalled start queue. 1476 ** Will be patched to IFTRUE by the interrupt handler. 1477 */ 1478 SCR_INT ^ IFFALSE (0), 1479 SIR_STALL_RESTART, 1480 /* 1481 ** Then jump to a certain point in tryloop. 1482 ** Due to the lack of indirect addressing the code 1483 ** is self modifying here. 1484 */ 1485 SCR_JUMP, 1486}/*-------------------------< STARTPOS >--------------------*/,{ 1487 PADDR(tryloop), 1488}/*-------------------------< TRYLOOP >---------------------*/,{ 1489/* 1490** Load an entry of the start queue into dsa 1491** and try to start it by jumping to TRYSEL. 1492** 1493** Because the size depends on the 1494** #define MAX_START parameter, it is filled 1495** in at runtime. 1496** 1497**----------------------------------------------------------- 1498** 1499** ##===========< I=0; i<MAX_START >=========== 1500** || SCR_COPY (4), 1501** || NADDR (squeue[i]), 1502** || RADDR (dsa), 1503** || SCR_CALL, 1504** || PADDR (trysel), 1505** ##========================================== 1506** 1507** SCR_JUMP, 1508** PADDR(tryloop), 1509** 1510**----------------------------------------------------------- 1511*/ 15120 1513 1514}/*-------------------------< TRYSEL >----------------------*/,{ 1515 /* 1516 ** Now: 1517 ** DSA: Address of a Data Structure 1518 ** or Address of the IDLE-Label. 1519 ** 1520 ** TEMP: Address of a script, which tries to 1521 ** start the NEXT entry. 1522 ** 1523 ** Save the TEMP register into the SCRATCHA register. 1524 ** Then copy the DSA to TEMP and RETURN. 1525 ** This is kind of an indirect jump. 1526 ** (The script processor has NO stack, so the 1527 ** CALL is actually a jump and link, and the 1528 ** RETURN is an indirect jump.) 1529 ** 1530 ** If the slot was empty, DSA contains the address 1531 ** of the IDLE part of this script. The processor 1532 ** jumps to IDLE and waits for a reselect. 1533 ** It will wake up and try the same slot again 1534 ** after the SIGP bit becomes set by the host. 1535 ** 1536 ** If the slot was not empty, DSA contains 1537 ** the address of the phys-part of a ccb. 1538 ** The processor jumps to this address. 1539 ** phys starts with head, 1540 ** head starts with launch, 1541 ** so actually the processor jumps to 1542 ** the lauch part. 1543 ** If the entry is scheduled for execution, 1544 ** then launch contains a jump to SELECT. 1545 ** If it's not scheduled, it contains a jump to IDLE. 1546 */ 1547 SCR_COPY (4), 1548 RADDR (temp), 1549 RADDR (scratcha), 1550 SCR_COPY (4), 1551 RADDR (dsa), 1552 RADDR (temp), 1553 SCR_RETURN, 1554 0 1555 1556}/*-------------------------< SKIP >------------------------*/,{ 1557 /* 1558 ** This entry has been canceled. 1559 ** Next time use the next slot. 1560 */ 1561 SCR_COPY (4), 1562 RADDR (scratcha), 1563 PADDR (startpos), 1564 /* 1565 ** patch the launch field. 1566 ** should look like an idle process. 1567 */ 1568 SCR_COPY_F (4), 1569 RADDR (dsa), 1570 PADDR (skip2), 1571 SCR_COPY (8), 1572 PADDR (idle), 1573}/*-------------------------< SKIP2 >-----------------------*/,{ 1574 0, 1575 SCR_JUMP, 1576 PADDR(start), 1577}/*-------------------------< IDLE >------------------------*/,{ 1578 /* 1579 ** Nothing to do? 1580 ** Wait for reselect. 1581 */ 1582 SCR_JUMP, 1583 PADDR(reselect), 1584 1585}/*-------------------------< SELECT >----------------------*/,{ 1586 /* 1587 ** DSA contains the address of a scheduled 1588 ** data structure. 1589 ** 1590 ** SCRATCHA contains the address of the script, 1591 ** which starts the next entry. 1592 ** 1593 ** Set Initiator mode. 1594 ** 1595 ** (Target mode is left as an exercise for the reader) 1596 */ 1597 1598 SCR_CLR (SCR_TRG), 1599 0, 1600 SCR_LOAD_REG (HS_REG, 0xff), 1601 0, 1602 1603 /* 1604 ** And try to select this target. 1605 */ 1606 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), 1607 PADDR (reselect), 1608 1609 /* 1610 ** Now there are 4 possibilities: 1611 ** 1612 ** (1) The ncr looses arbitration. 1613 ** This is ok, because it will try again, 1614 ** when the bus becomes idle. 1615 ** (But beware of the timeout function!) 1616 ** 1617 ** (2) The ncr is reselected. 1618 ** Then the script processor takes the jump 1619 ** to the RESELECT label. 1620 ** 1621 ** (3) The ncr completes the selection. 1622 ** Then it will execute the next statement. 1623 ** 1624 ** (4) There is a selection timeout. 1625 ** Then the ncr should interrupt the host and stop. 1626 ** Unfortunately, it seems to continue execution 1627 ** of the script. But it will fail with an 1628 ** IID-interrupt on the next WHEN. 1629 */ 1630 1631 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)), 1632 0, 1633 1634 /* 1635 ** Save target id to ctest0 register 1636 */ 1637 1638 SCR_FROM_REG (sdid), 1639 0, 1640 SCR_TO_REG (ctest0), 1641 0, 1642 /* 1643 ** Send the IDENTIFY and SIMPLE_TAG messages 1644 ** (and the M_X_SYNC_REQ message) 1645 */ 1646 SCR_MOVE_TBL ^ SCR_MSG_OUT, 1647 offsetof (struct dsb, smsg), 1648#ifdef undef /* XXX better fail than try to deal with this ... */ 1649 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)), 1650 -16, 1651#endif 1652 SCR_CLR (SCR_ATN), 1653 0, 1654 SCR_COPY (1), 1655 RADDR (sfbr), 1656 NADDR (lastmsg), 1657 /* 1658 ** Selection complete. 1659 ** Next time use the next slot. 1660 */ 1661 SCR_COPY (4), 1662 RADDR (scratcha), 1663 PADDR (startpos), 1664}/*-------------------------< PREPARE >----------------------*/,{ 1665 /* 1666 ** The ncr doesn't have an indirect load 1667 ** or store command. So we have to 1668 ** copy part of the control block to a 1669 ** fixed place, where we can access it. 1670 ** 1671 ** We patch the address part of a 1672 ** COPY command with the DSA-register. 1673 */ 1674 SCR_COPY_F (4), 1675 RADDR (dsa), 1676 PADDR (loadpos), 1677 /* 1678 ** then we do the actual copy. 1679 */ 1680 SCR_COPY (sizeof (struct head)), 1681 /* 1682 ** continued after the next label ... 1683 */ 1684 1685}/*-------------------------< LOADPOS >---------------------*/,{ 1686 0, 1687 NADDR (header), 1688 /* 1689 ** Mark this ccb as not scheduled. 1690 */ 1691 SCR_COPY (8), 1692 PADDR (idle), 1693 NADDR (header.launch), 1694 /* 1695 ** Set a time stamp for this selection 1696 */ 1697 SCR_COPY (sizeof (struct timeval)), 1698 (ncrcmd) &time, 1699 NADDR (header.stamp.select), 1700 /* 1701 ** load the savep (saved pointer) into 1702 ** the TEMP register (actual pointer) 1703 */ 1704 SCR_COPY (4), 1705 NADDR (header.savep), 1706 RADDR (temp), 1707 /* 1708 ** Initialize the status registers 1709 */ 1710 SCR_COPY (4), 1711 NADDR (header.status), 1712 RADDR (scr0), 1713 1714}/*-------------------------< PREPARE2 >---------------------*/,{ 1715 /* 1716 ** Load the synchronous mode register 1717 */ 1718 SCR_COPY (1), 1719 NADDR (sync_st), 1720 RADDR (sxfer), 1721 /* 1722 ** Load the wide mode and timing register 1723 */ 1724 SCR_COPY (1), 1725 NADDR (wide_st), 1726 RADDR (scntl3), 1727 /* 1728 ** Initialize the msgout buffer with a NOOP message. 1729 */ 1730 SCR_LOAD_REG (scratcha, M_NOOP), 1731 0, 1732 SCR_COPY (1), 1733 RADDR (scratcha), 1734 NADDR (msgout), 1735 SCR_COPY (1), 1736 RADDR (scratcha), 1737 NADDR (msgin), 1738 /* 1739 ** Message in phase ? 1740 */ 1741 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 1742 PADDR (dispatch), 1743 /* 1744 ** Extended or reject message ? 1745 */ 1746 SCR_FROM_REG (sbdl), 1747 0, 1748 SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)), 1749 PADDR (msg_in), 1750 SCR_JUMP ^ IFTRUE (DATA (M_REJECT)), 1751 PADDR (msg_reject), 1752 /* 1753 ** normal processing 1754 */ 1755 SCR_JUMP, 1756 PADDR (dispatch), 1757}/*-------------------------< SETMSG >----------------------*/,{ 1758 SCR_COPY (1), 1759 RADDR (scratcha), 1760 NADDR (msgout), 1761 SCR_SET (SCR_ATN), 1762 0, 1763}/*-------------------------< CLRACK >----------------------*/,{ 1764 /* 1765 ** Terminate possible pending message phase. 1766 */ 1767 SCR_CLR (SCR_ACK), 1768 0, 1769 1770}/*-----------------------< DISPATCH >----------------------*/,{ 1771 SCR_FROM_REG (HS_REG), 1772 0, 1773 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 1774 SIR_NEGO_FAILED, 1775 /* 1776 ** remove bogus output signals 1777 */ 1778 SCR_REG_REG (socl, SCR_AND, CACK|CATN), 1779 0, 1780 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)), 1781 0, 1782 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)), 1783 0, 1784 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)), 1785 PADDR (msg_out), 1786 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)), 1787 PADDR (msg_in), 1788 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)), 1789 PADDR (command), 1790 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)), 1791 PADDR (status), 1792 /* 1793 ** Discard one illegal phase byte, if required. 1794 */ 1795 SCR_LOAD_REG (scratcha, XE_BAD_PHASE), 1796 0, 1797 SCR_COPY (1), 1798 RADDR (scratcha), 1799 NADDR (xerr_st), 1800 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)), 1801 8, 1802 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT, 1803 NADDR (scratch), 1804 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)), 1805 8, 1806 SCR_MOVE_ABS (1) ^ SCR_ILG_IN, 1807 NADDR (scratch), 1808 SCR_JUMP, 1809 PADDR (dispatch), 1810 1811}/*-------------------------< NO_DATA >--------------------*/,{ 1812 /* 1813 ** The target wants to tranfer too much data 1814 ** or in the wrong direction. 1815 ** Remember that in extended error. 1816 */ 1817 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA), 1818 0, 1819 SCR_COPY (1), 1820 RADDR (scratcha), 1821 NADDR (xerr_st), 1822 /* 1823 ** Discard one data byte, if required. 1824 */ 1825 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)), 1826 8, 1827 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT, 1828 NADDR (scratch), 1829 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 1830 8, 1831 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 1832 NADDR (scratch), 1833 /* 1834 ** .. and repeat as required. 1835 */ 1836 SCR_CALL, 1837 PADDR (dispatch), 1838 SCR_JUMP, 1839 PADDR (no_data), 1840}/*-------------------------< CHECKATN >--------------------*/,{ 1841 /* 1842 ** If AAP (bit 1 of scntl0 register) is set 1843 ** and a parity error is detected, 1844 ** the script processor asserts ATN. 1845 ** 1846 ** The target should switch to a MSG_OUT phase 1847 ** to get the message. 1848 */ 1849 SCR_FROM_REG (socl), 1850 0, 1851 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)), 1852 PADDR (dispatch), 1853 /* 1854 ** count it 1855 */ 1856 SCR_REG_REG (PS_REG, SCR_ADD, 1), 1857 0, 1858 /* 1859 ** Prepare a M_ID_ERROR message 1860 ** (initiator detected error). 1861 ** The target should retry the transfer. 1862 */ 1863 SCR_LOAD_REG (scratcha, M_ID_ERROR), 1864 0, 1865 SCR_JUMP, 1866 PADDR (setmsg), 1867 1868}/*-------------------------< COMMAND >--------------------*/,{ 1869 /* 1870 ** If this is not a GETCC transfer ... 1871 */ 1872 SCR_FROM_REG (SS_REG), 1873 0, 1874/*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (S_CHECK_COND)), 1875 28, 1876 /* 1877 ** ... set a timestamp ... 1878 */ 1879 SCR_COPY (sizeof (struct timeval)), 1880 (ncrcmd) &time, 1881 NADDR (header.stamp.command), 1882 /* 1883 ** ... and send the command 1884 */ 1885 SCR_MOVE_TBL ^ SCR_COMMAND, 1886 offsetof (struct dsb, cmd), 1887 SCR_JUMP, 1888 PADDR (dispatch), 1889 /* 1890 ** Send the GETCC command 1891 */ 1892/*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND, 1893 offsetof (struct dsb, scmd), 1894 SCR_JUMP, 1895 PADDR (dispatch), 1896 1897}/*-------------------------< STATUS >--------------------*/,{ 1898 /* 1899 ** set the timestamp. 1900 */ 1901 SCR_COPY (sizeof (struct timeval)), 1902 (ncrcmd) &time, 1903 NADDR (header.stamp.status), 1904 /* 1905 ** If this is a GETCC transfer, 1906 */ 1907 SCR_FROM_REG (SS_REG), 1908 0, 1909/*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (S_CHECK_COND)), 1910 40, 1911 /* 1912 ** get the status 1913 */ 1914 SCR_MOVE_ABS (1) ^ SCR_STATUS, 1915 NADDR (scratch), 1916 /* 1917 ** Save status to scsi_status. 1918 ** Mark as complete. 1919 ** And wait for disconnect. 1920 */ 1921 SCR_TO_REG (SS_REG), 1922 0, 1923 SCR_REG_REG (SS_REG, SCR_OR, S_SENSE), 1924 0, 1925 SCR_LOAD_REG (HS_REG, HS_COMPLETE), 1926 0, 1927 SCR_JUMP, 1928 PADDR (checkatn), 1929 /* 1930 ** If it was no GETCC transfer, 1931 ** save the status to scsi_status. 1932 */ 1933/*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS, 1934 NADDR (scratch), 1935 SCR_TO_REG (SS_REG), 1936 0, 1937 /* 1938 ** if it was no check condition ... 1939 */ 1940 SCR_JUMP ^ IFTRUE (DATA (S_CHECK_COND)), 1941 PADDR (checkatn), 1942 /* 1943 ** ... mark as complete. 1944 */ 1945 SCR_LOAD_REG (HS_REG, HS_COMPLETE), 1946 0, 1947 SCR_JUMP, 1948 PADDR (checkatn), 1949 1950}/*-------------------------< MSG_IN >--------------------*/,{ 1951 /* 1952 ** Get the first byte of the message 1953 ** and save it to SCRATCHA. 1954 ** 1955 ** The script processor doesn't negate the 1956 ** ACK signal after this transfer. 1957 */ 1958 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 1959 NADDR (msgin[0]), 1960 /* 1961 ** Check for message parity error. 1962 */ 1963 SCR_TO_REG (scratcha), 1964 0, 1965 SCR_FROM_REG (socl), 1966 0, 1967 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 1968 PADDR (msg_parity), 1969 SCR_FROM_REG (scratcha), 1970 0, 1971 /* 1972 ** Parity was ok, handle this message. 1973 */ 1974 SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)), 1975 PADDR (complete), 1976 SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)), 1977 PADDR (save_dp), 1978 SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)), 1979 PADDR (restore_dp), 1980 SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)), 1981 PADDR (disconnect), 1982 SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)), 1983 PADDR (msg_extended), 1984 SCR_JUMP ^ IFTRUE (DATA (M_NOOP)), 1985 PADDR (clrack), 1986 SCR_JUMP ^ IFTRUE (DATA (M_REJECT)), 1987 PADDR (msg_reject), 1988 SCR_JUMP ^ IFTRUE (DATA (M_IGN_RESIDUE)), 1989 PADDR (msg_ign_residue), 1990 /* 1991 ** Rest of the messages left as 1992 ** an exercise ... 1993 ** 1994 ** Unimplemented messages: 1995 ** fall through to MSG_BAD. 1996 */ 1997}/*-------------------------< MSG_BAD >------------------*/,{ 1998 /* 1999 ** unimplemented message - reject it. 2000 */ 2001 SCR_INT, 2002 SIR_REJECT_SENT, 2003 SCR_LOAD_REG (scratcha, M_REJECT), 2004 0, 2005 SCR_JUMP, 2006 PADDR (setmsg), 2007 2008}/*-------------------------< MSG_PARITY >---------------*/,{ 2009 /* 2010 ** count it 2011 */ 2012 SCR_REG_REG (PS_REG, SCR_ADD, 0x01), 2013 0, 2014 /* 2015 ** send a "message parity error" message. 2016 */ 2017 SCR_LOAD_REG (scratcha, M_PARITY), 2018 0, 2019 SCR_JUMP, 2020 PADDR (setmsg), 2021}/*-------------------------< MSG_REJECT >---------------*/,{ 2022 /* 2023 ** If a negotiation was in progress, 2024 ** negotiation failed. 2025 */ 2026 SCR_FROM_REG (HS_REG), 2027 0, 2028 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2029 SIR_NEGO_FAILED, 2030 /* 2031 ** else make host log this message 2032 */ 2033 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)), 2034 SIR_REJECT_RECEIVED, 2035 SCR_JUMP, 2036 PADDR (clrack), 2037 2038}/*-------------------------< MSG_IGN_RESIDUE >----------*/,{ 2039 /* 2040 ** Terminate cycle 2041 */ 2042 SCR_CLR (SCR_ACK), 2043 0, 2044 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2045 PADDR (dispatch), 2046 /* 2047 ** get residue size. 2048 */ 2049 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2050 NADDR (msgin[1]), 2051 /* 2052 ** Check for message parity error. 2053 */ 2054 SCR_TO_REG (scratcha), 2055 0, 2056 SCR_FROM_REG (socl), 2057 0, 2058 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2059 PADDR (msg_parity), 2060 SCR_FROM_REG (scratcha), 2061 0, 2062 /* 2063 ** Size is 0 .. ignore message. 2064 */ 2065 SCR_JUMP ^ IFTRUE (DATA (0)), 2066 PADDR (clrack), 2067 /* 2068 ** Size is not 1 .. have to interrupt. 2069 */ 2070/*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)), 2071 40, 2072 /* 2073 ** Check for residue byte in swide register 2074 */ 2075 SCR_FROM_REG (scntl2), 2076 0, 2077/*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)), 2078 16, 2079 /* 2080 ** There IS data in the swide register. 2081 ** Discard it. 2082 */ 2083 SCR_REG_REG (scntl2, SCR_OR, WSR), 2084 0, 2085 SCR_JUMP, 2086 PADDR (clrack), 2087 /* 2088 ** Load again the size to the sfbr register. 2089 */ 2090/*>>>*/ SCR_FROM_REG (scratcha), 2091 0, 2092/*>>>*/ SCR_INT, 2093 SIR_IGN_RESIDUE, 2094 SCR_JUMP, 2095 PADDR (clrack), 2096 2097}/*-------------------------< MSG_EXTENDED >-------------*/,{ 2098 /* 2099 ** Terminate cycle 2100 */ 2101 SCR_CLR (SCR_ACK), 2102 0, 2103 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2104 PADDR (dispatch), 2105 /* 2106 ** get length. 2107 */ 2108 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2109 NADDR (msgin[1]), 2110 /* 2111 ** Check for message parity error. 2112 */ 2113 SCR_TO_REG (scratcha), 2114 0, 2115 SCR_FROM_REG (socl), 2116 0, 2117 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2118 PADDR (msg_parity), 2119 SCR_FROM_REG (scratcha), 2120 0, 2121 /* 2122 */ 2123 SCR_JUMP ^ IFTRUE (DATA (3)), 2124 PADDR (msg_ext_3), 2125 SCR_JUMP ^ IFFALSE (DATA (2)), 2126 PADDR (msg_bad), 2127}/*-------------------------< MSG_EXT_2 >----------------*/,{ 2128 SCR_CLR (SCR_ACK), 2129 0, 2130 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2131 PADDR (dispatch), 2132 /* 2133 ** get extended message code. 2134 */ 2135 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2136 NADDR (msgin[2]), 2137 /* 2138 ** Check for message parity error. 2139 */ 2140 SCR_TO_REG (scratcha), 2141 0, 2142 SCR_FROM_REG (socl), 2143 0, 2144 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2145 PADDR (msg_parity), 2146 SCR_FROM_REG (scratcha), 2147 0, 2148 SCR_JUMP ^ IFTRUE (DATA (M_X_WIDE_REQ)), 2149 PADDR (msg_wdtr), 2150 /* 2151 ** unknown extended message 2152 */ 2153 SCR_JUMP, 2154 PADDR (msg_bad) 2155}/*-------------------------< MSG_WDTR >-----------------*/,{ 2156 SCR_CLR (SCR_ACK), 2157 0, 2158 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2159 PADDR (dispatch), 2160 /* 2161 ** get data bus width 2162 */ 2163 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2164 NADDR (msgin[3]), 2165 SCR_FROM_REG (socl), 2166 0, 2167 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2168 PADDR (msg_parity), 2169 /* 2170 ** let the host do the real work. 2171 */ 2172 SCR_INT, 2173 SIR_NEGO_WIDE, 2174 /* 2175 ** let the target fetch our answer. 2176 */ 2177 SCR_SET (SCR_ATN), 2178 0, 2179 SCR_CLR (SCR_ACK), 2180 0, 2181 2182 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2183 SIR_NEGO_PROTO, 2184 /* 2185 ** Send the M_X_WIDE_REQ 2186 */ 2187 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT, 2188 NADDR (msgout), 2189 SCR_CLR (SCR_ATN), 2190 0, 2191 SCR_COPY (1), 2192 RADDR (sfbr), 2193 NADDR (lastmsg), 2194 SCR_JUMP, 2195 PADDR (msg_out_done), 2196 2197}/*-------------------------< MSG_EXT_3 >----------------*/,{ 2198 SCR_CLR (SCR_ACK), 2199 0, 2200 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2201 PADDR (dispatch), 2202 /* 2203 ** get extended message code. 2204 */ 2205 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2206 NADDR (msgin[2]), 2207 /* 2208 ** Check for message parity error. 2209 */ 2210 SCR_TO_REG (scratcha), 2211 0, 2212 SCR_FROM_REG (socl), 2213 0, 2214 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2215 PADDR (msg_parity), 2216 SCR_FROM_REG (scratcha), 2217 0, 2218 SCR_JUMP ^ IFTRUE (DATA (M_X_SYNC_REQ)), 2219 PADDR (msg_sdtr), 2220 /* 2221 ** unknown extended message 2222 */ 2223 SCR_JUMP, 2224 PADDR (msg_bad) 2225 2226}/*-------------------------< MSG_SDTR >-----------------*/,{ 2227 SCR_CLR (SCR_ACK), 2228 0, 2229 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2230 PADDR (dispatch), 2231 /* 2232 ** get period and offset 2233 */ 2234 SCR_MOVE_ABS (2) ^ SCR_MSG_IN, 2235 NADDR (msgin[3]), 2236 SCR_FROM_REG (socl), 2237 0, 2238 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2239 PADDR (msg_parity), 2240 /* 2241 ** let the host do the real work. 2242 */ 2243 SCR_INT, 2244 SIR_NEGO_SYNC, 2245 /* 2246 ** let the target fetch our answer. 2247 */ 2248 SCR_SET (SCR_ATN), 2249 0, 2250 SCR_CLR (SCR_ACK), 2251 0, 2252 2253 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2254 SIR_NEGO_PROTO, 2255 /* 2256 ** Send the M_X_SYNC_REQ 2257 */ 2258 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT, 2259 NADDR (msgout), 2260 SCR_CLR (SCR_ATN), 2261 0, 2262 SCR_COPY (1), 2263 RADDR (sfbr), 2264 NADDR (lastmsg), 2265 SCR_JUMP, 2266 PADDR (msg_out_done), 2267 2268}/*-------------------------< COMPLETE >-----------------*/,{ 2269 /* 2270 ** Complete message. 2271 ** 2272 ** If it's not the get condition code, 2273 ** copy TEMP register to LASTP in header. 2274 */ 2275 SCR_FROM_REG (SS_REG), 2276 0, 2277/*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (S_SENSE, S_SENSE)), 2278 12, 2279 SCR_COPY (4), 2280 RADDR (temp), 2281 NADDR (header.lastp), 2282/*>>>*/ /* 2283 ** When we terminate the cycle by clearing ACK, 2284 ** the target may disconnect immediately. 2285 ** 2286 ** We don't want to be told of an 2287 ** "unexpected disconnect", 2288 ** so we disable this feature. 2289 */ 2290 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2291 0, 2292 /* 2293 ** Terminate cycle ... 2294 */ 2295 SCR_CLR (SCR_ACK|SCR_ATN), 2296 0, 2297 /* 2298 ** ... and wait for the disconnect. 2299 */ 2300 SCR_WAIT_DISC, 2301 0, 2302}/*-------------------------< CLEANUP >-------------------*/,{ 2303 /* 2304 ** dsa: Pointer to ccb 2305 ** or xxxxxxFF (no ccb) 2306 ** 2307 ** HS_REG: Host-Status (<>0!) 2308 */ 2309 SCR_FROM_REG (dsa), 2310 0, 2311 SCR_JUMP ^ IFTRUE (DATA (0xff)), 2312 PADDR (signal), 2313 /* 2314 ** dsa is valid. 2315 ** save the status registers 2316 */ 2317 SCR_COPY (4), 2318 RADDR (scr0), 2319 NADDR (header.status), 2320 /* 2321 ** and copy back the header to the ccb. 2322 */ 2323 SCR_COPY_F (4), 2324 RADDR (dsa), 2325 PADDR (cleanup0), 2326 SCR_COPY (sizeof (struct head)), 2327 NADDR (header), 2328}/*-------------------------< CLEANUP0 >--------------------*/,{ 2329 0, 2330 2331 /* 2332 ** If command resulted in "check condition" 2333 ** status and is not yet completed, 2334 ** try to get the condition code. 2335 */ 2336 SCR_FROM_REG (HS_REG), 2337 0, 2338/*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)), 2339 16, 2340 SCR_FROM_REG (SS_REG), 2341 0, 2342 SCR_JUMP ^ IFTRUE (DATA (S_CHECK_COND)), 2343 PADDR(getcc2), 2344 /* 2345 ** And make the DSA register invalid. 2346 */ 2347/*>>>*/ SCR_LOAD_REG (dsa, 0xff), /* invalid */ 2348 0, 2349}/*-------------------------< SIGNAL >----------------------*/,{ 2350 /* 2351 ** if status = queue full, 2352 ** reinsert in startqueue and stall queue. 2353 */ 2354 SCR_FROM_REG (SS_REG), 2355 0, 2356 SCR_INT ^ IFTRUE (DATA (S_QUEUE_FULL)), 2357 SIR_STALL_QUEUE, 2358 /* 2359 ** if job completed ... 2360 */ 2361 SCR_FROM_REG (HS_REG), 2362 0, 2363 /* 2364 ** ... signal completion to the host 2365 */ 2366 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)), 2367 0, 2368 /* 2369 ** Auf zu neuen Schandtaten! 2370 */ 2371 SCR_JUMP, 2372 PADDR(start), 2373 2374}/*-------------------------< SAVE_DP >------------------*/,{ 2375 /* 2376 ** SAVE_DP message: 2377 ** Copy TEMP register to SAVEP in header. 2378 */ 2379 SCR_COPY (4), 2380 RADDR (temp), 2381 NADDR (header.savep), 2382 SCR_JUMP, 2383 PADDR (clrack), 2384}/*-------------------------< RESTORE_DP >---------------*/,{ 2385 /* 2386 ** RESTORE_DP message: 2387 ** Copy SAVEP in header to TEMP register. 2388 */ 2389 SCR_COPY (4), 2390 NADDR (header.savep), 2391 RADDR (temp), 2392 SCR_JUMP, 2393 PADDR (clrack), 2394 2395}/*-------------------------< DISCONNECT >---------------*/,{ 2396 /* 2397 ** If QUIRK_AUTOSAVE is set, 2398 ** do an "save pointer" operation. 2399 */ 2400 SCR_FROM_REG (QU_REG), 2401 0, 2402/*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)), 2403 12, 2404 /* 2405 ** like SAVE_DP message: 2406 ** Copy TEMP register to SAVEP in header. 2407 */ 2408 SCR_COPY (4), 2409 RADDR (temp), 2410 NADDR (header.savep), 2411/*>>>*/ /* 2412 ** Check if temp==savep or temp==goalp: 2413 ** if not, log a missing save pointer message. 2414 ** In fact, it's a comparison mod 256. 2415 ** 2416 ** Hmmm, I hadn't thought that I would be urged to 2417 ** write this kind of ugly self modifying code. 2418 ** 2419 ** It's unbelievable, but the ncr53c8xx isn't able 2420 ** to subtract one register from another. 2421 */ 2422 SCR_FROM_REG (temp), 2423 0, 2424 /* 2425 ** You are not expected to understand this .. 2426 ** 2427 ** CAUTION: only little endian architectures supported! XXX 2428 */ 2429 SCR_COPY_F (1), 2430 NADDR (header.savep), 2431 PADDR (disconnect0), 2432}/*-------------------------< DISCONNECT0 >--------------*/,{ 2433/*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)), 2434 20, 2435 /* 2436 ** neither this 2437 */ 2438 SCR_COPY_F (1), 2439 NADDR (header.goalp), 2440 PADDR (disconnect1), 2441}/*-------------------------< DISCONNECT1 >--------------*/,{ 2442 SCR_INT ^ IFFALSE (DATA (1)), 2443 SIR_MISSING_SAVE, 2444/*>>>*/ 2445 2446 /* 2447 ** DISCONNECTing ... 2448 ** 2449 ** disable the "unexpected disconnect" feature, 2450 ** and remove the ACK signal. 2451 */ 2452 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2453 0, 2454 SCR_CLR (SCR_ACK|SCR_ATN), 2455 0, 2456 /* 2457 ** Wait for the disconnect. 2458 */ 2459 SCR_WAIT_DISC, 2460 0, 2461 /* 2462 ** Profiling: 2463 ** Set a time stamp, 2464 ** and count the disconnects. 2465 */ 2466 SCR_COPY (sizeof (struct timeval)), 2467 (ncrcmd) &time, 2468 NADDR (header.stamp.disconnect), 2469 SCR_COPY (4), 2470 NADDR (disc_phys), 2471 RADDR (temp), 2472 SCR_REG_REG (temp, SCR_ADD, 0x01), 2473 0, 2474 SCR_COPY (4), 2475 RADDR (temp), 2476 NADDR (disc_phys), 2477 /* 2478 ** Status is: DISCONNECTED. 2479 */ 2480 SCR_LOAD_REG (HS_REG, HS_DISCONNECT), 2481 0, 2482 SCR_JUMP, 2483 PADDR (cleanup), 2484 2485}/*-------------------------< MSG_OUT >-------------------*/,{ 2486 /* 2487 ** The target requests a message. 2488 */ 2489 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 2490 NADDR (msgout), 2491 SCR_COPY (1), 2492 RADDR (sfbr), 2493 NADDR (lastmsg), 2494 /* 2495 ** If it was no ABORT message ... 2496 */ 2497 SCR_JUMP ^ IFTRUE (DATA (M_ABORT)), 2498 PADDR (msg_out_abort), 2499 /* 2500 ** ... wait for the next phase 2501 ** if it's a message out, send it again, ... 2502 */ 2503 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2504 PADDR (msg_out), 2505}/*-------------------------< MSG_OUT_DONE >--------------*/,{ 2506 /* 2507 ** ... else clear the message ... 2508 */ 2509 SCR_LOAD_REG (scratcha, M_NOOP), 2510 0, 2511 SCR_COPY (4), 2512 RADDR (scratcha), 2513 NADDR (msgout), 2514 /* 2515 ** ... and process the next phase 2516 */ 2517 SCR_JUMP, 2518 PADDR (dispatch), 2519}/*-------------------------< MSG_OUT_ABORT >-------------*/,{ 2520 /* 2521 ** After ABORT message, 2522 ** 2523 ** expect an immediate disconnect, ... 2524 */ 2525 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2526 0, 2527 SCR_CLR (SCR_ACK|SCR_ATN), 2528 0, 2529 SCR_WAIT_DISC, 2530 0, 2531 /* 2532 ** ... and set the status to "ABORTED" 2533 */ 2534 SCR_LOAD_REG (HS_REG, HS_ABORTED), 2535 0, 2536 SCR_JUMP, 2537 PADDR (cleanup), 2538 2539}/*-------------------------< GETCC >-----------------------*/,{ 2540 /* 2541 ** The ncr doesn't have an indirect load 2542 ** or store command. So we have to 2543 ** copy part of the control block to a 2544 ** fixed place, where we can modify it. 2545 ** 2546 ** We patch the address part of a COPY command 2547 ** with the address of the dsa register ... 2548 */ 2549 SCR_COPY_F (4), 2550 RADDR (dsa), 2551 PADDR (getcc1), 2552 /* 2553 ** ... then we do the actual copy. 2554 */ 2555 SCR_COPY (sizeof (struct head)), 2556}/*-------------------------< GETCC1 >----------------------*/,{ 2557 0, 2558 NADDR (header), 2559 /* 2560 ** Initialize the status registers 2561 */ 2562 SCR_COPY (4), 2563 NADDR (header.status), 2564 RADDR (scr0), 2565}/*-------------------------< GETCC2 >----------------------*/,{ 2566 /* 2567 ** Get the condition code from a target. 2568 ** 2569 ** DSA points to a data structure. 2570 ** Set TEMP to the script location 2571 ** that receives the condition code. 2572 ** 2573 ** Because there is no script command 2574 ** to load a longword into a register, 2575 ** we use a CALL command. 2576 */ 2577/*<<<*/ SCR_CALLR, 2578 24, 2579 /* 2580 ** Get the condition code. 2581 */ 2582 SCR_MOVE_TBL ^ SCR_DATA_IN, 2583 offsetof (struct dsb, sense), 2584 /* 2585 ** No data phase may follow! 2586 */ 2587 SCR_CALL, 2588 PADDR (checkatn), 2589 SCR_JUMP, 2590 PADDR (no_data), 2591/*>>>*/ 2592 2593 /* 2594 ** The CALL jumps to this point. 2595 ** Prepare for a RESTORE_POINTER message. 2596 ** Save the TEMP register into the saved pointer. 2597 */ 2598 SCR_COPY (4), 2599 RADDR (temp), 2600 NADDR (header.savep), 2601 /* 2602 ** Load scratcha, because in case of a selection timeout, 2603 ** the host will expect a new value for startpos in 2604 ** the scratcha register. 2605 */ 2606 SCR_COPY (4), 2607 PADDR (startpos), 2608 RADDR (scratcha), 2609#ifdef NCR_GETCC_WITHMSG 2610 /* 2611 ** If QUIRK_NOMSG is set, select without ATN. 2612 ** and don't send a message. 2613 */ 2614 SCR_FROM_REG (QU_REG), 2615 0, 2616 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)), 2617 PADDR(getcc3), 2618 /* 2619 ** Then try to connect to the target. 2620 ** If we are reselected, special treatment 2621 ** of the current job is required before 2622 ** accepting the reselection. 2623 */ 2624 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), 2625 PADDR(badgetcc), 2626 /* 2627 ** save target id. 2628 */ 2629 SCR_FROM_REG (sdid), 2630 0, 2631 SCR_TO_REG (ctest0), 2632 0, 2633 /* 2634 ** Send the IDENTIFY message. 2635 ** In case of short transfer, remove ATN. 2636 */ 2637 SCR_MOVE_TBL ^ SCR_MSG_OUT, 2638 offsetof (struct dsb, smsg2), 2639 SCR_CLR (SCR_ATN), 2640 0, 2641 /* 2642 ** save the first byte of the message. 2643 */ 2644 SCR_COPY (1), 2645 RADDR (sfbr), 2646 NADDR (lastmsg), 2647 SCR_JUMP, 2648 PADDR (prepare2), 2649 2650#endif 2651}/*-------------------------< GETCC3 >----------------------*/,{ 2652 /* 2653 ** Try to connect to the target. 2654 ** If we are reselected, special treatment 2655 ** of the current job is required before 2656 ** accepting the reselection. 2657 ** 2658 ** Silly target won't accept a message. 2659 ** Select without ATN. 2660 */ 2661 SCR_SEL_TBL ^ offsetof (struct dsb, select), 2662 PADDR(badgetcc), 2663 /* 2664 ** save target id. 2665 */ 2666 SCR_FROM_REG (sdid), 2667 0, 2668 SCR_TO_REG (ctest0), 2669 0, 2670 /* 2671 ** Force error if selection timeout 2672 */ 2673 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)), 2674 0, 2675 /* 2676 ** don't negotiate. 2677 */ 2678 SCR_JUMP, 2679 PADDR (prepare2), 2680 2681}/*------------------------< BADGETCC >---------------------*/,{ 2682 /* 2683 ** If SIGP was set, clear it and try again. 2684 */ 2685 SCR_FROM_REG (ctest2), 2686 0, 2687 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)), 2688 PADDR (getcc2), 2689 SCR_INT, 2690 SIR_SENSE_FAILED, 2691}/*-------------------------< RESELECT >--------------------*/,{ 2692 /* 2693 ** This NOP will be patched with LED OFF 2694 ** SCR_REG_REG (gpreg, SCR_OR, 0x01) 2695 */ 2696 SCR_NO_OP, 2697 0, 2698 2699 /* 2700 ** make the DSA invalid. 2701 */ 2702 SCR_LOAD_REG (dsa, 0xff), 2703 0, 2704 SCR_CLR (SCR_TRG), 2705 0, 2706 /* 2707 ** Sleep waiting for a reselection. 2708 ** If SIGP is set, special treatment. 2709 ** 2710 ** Zu allem bereit .. 2711 */ 2712 SCR_WAIT_RESEL, 2713 PADDR(reselect2), 2714}/*-------------------------< RESELECT1 >--------------------*/,{ 2715 /* 2716 ** This NOP will be patched with LED ON 2717 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2718 */ 2719 SCR_NO_OP, 2720 0, 2721 /* 2722 ** ... zu nichts zu gebrauchen ? 2723 ** 2724 ** load the target id into the SFBR 2725 ** and jump to the control block. 2726 ** 2727 ** Look at the declarations of 2728 ** - struct ncb 2729 ** - struct tcb 2730 ** - struct lcb 2731 ** - struct ccb 2732 ** to understand what's going on. 2733 */ 2734 SCR_REG_SFBR (ssid, SCR_AND, 0x8F), 2735 0, 2736 SCR_TO_REG (ctest0), 2737 0, 2738 SCR_JUMP, 2739 NADDR (jump_tcb), 2740}/*-------------------------< RESELECT2 >-------------------*/,{ 2741 /* 2742 ** This NOP will be patched with LED ON 2743 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2744 */ 2745 SCR_NO_OP, 2746 0, 2747 /* 2748 ** If it's not connected :( 2749 ** -> interrupted by SIGP bit. 2750 ** Jump to start. 2751 */ 2752 SCR_FROM_REG (ctest2), 2753 0, 2754 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)), 2755 PADDR (start), 2756 SCR_JUMP, 2757 PADDR (reselect), 2758 2759}/*-------------------------< RESEL_TMP >-------------------*/,{ 2760 /* 2761 ** The return address in TEMP 2762 ** is in fact the data structure address, 2763 ** so copy it to the DSA register. 2764 */ 2765 SCR_COPY (4), 2766 RADDR (temp), 2767 RADDR (dsa), 2768 SCR_JUMP, 2769 PADDR (prepare), 2770 2771}/*-------------------------< RESEL_LUN >-------------------*/,{ 2772 /* 2773 ** come back to this point 2774 ** to get an IDENTIFY message 2775 ** Wait for a msg_in phase. 2776 */ 2777/*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 2778 48, 2779 /* 2780 ** message phase 2781 ** It's not a sony, it's a trick: 2782 ** read the data without acknowledging it. 2783 */ 2784 SCR_FROM_REG (sbdl), 2785 0, 2786/*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (M_IDENTIFY, 0x98)), 2787 32, 2788 /* 2789 ** It WAS an Identify message. 2790 ** get it and ack it! 2791 */ 2792 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2793 NADDR (msgin), 2794 SCR_CLR (SCR_ACK), 2795 0, 2796 /* 2797 ** Mask out the lun. 2798 */ 2799 SCR_REG_REG (sfbr, SCR_AND, 0x07), 2800 0, 2801 SCR_RETURN, 2802 0, 2803 /* 2804 ** No message phase or no IDENTIFY message: 2805 ** return 0. 2806 */ 2807/*>>>*/ SCR_LOAD_SFBR (0), 2808 0, 2809 SCR_RETURN, 2810 0, 2811 2812}/*-------------------------< RESEL_TAG >-------------------*/,{ 2813 /* 2814 ** come back to this point 2815 ** to get a SIMPLE_TAG message 2816 ** Wait for a MSG_IN phase. 2817 */ 2818/*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 2819 64, 2820 /* 2821 ** message phase 2822 ** It's a trick - read the data 2823 ** without acknowledging it. 2824 */ 2825 SCR_FROM_REG (sbdl), 2826 0, 2827/*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (M_SIMPLE_TAG)), 2828 48, 2829 /* 2830 ** It WAS a SIMPLE_TAG message. 2831 ** get it and ack it! 2832 */ 2833 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2834 NADDR (msgin), 2835 SCR_CLR (SCR_ACK), 2836 0, 2837 /* 2838 ** Wait for the second byte (the tag) 2839 */ 2840/*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 2841 24, 2842 /* 2843 ** Get it and ack it! 2844 */ 2845 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2846 NADDR (msgin), 2847 SCR_CLR (SCR_ACK|SCR_CARRY), 2848 0, 2849 SCR_RETURN, 2850 0, 2851 /* 2852 ** No message phase or no SIMPLE_TAG message 2853 ** or no second byte: return 0. 2854 */ 2855/*>>>*/ SCR_LOAD_SFBR (0), 2856 0, 2857 SCR_SET (SCR_CARRY), 2858 0, 2859 SCR_RETURN, 2860 0, 2861 2862}/*-------------------------< DATA_IN >--------------------*/,{ 2863/* 2864** Because the size depends on the 2865** #define MAX_SCATTER parameter, 2866** it is filled in at runtime. 2867** 2868** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)), 2869** PADDR (no_data), 2870** SCR_COPY (sizeof (struct timeval)), 2871** (ncrcmd) &time, 2872** NADDR (header.stamp.data), 2873** SCR_MOVE_TBL ^ SCR_DATA_IN, 2874** offsetof (struct dsb, data[ 0]), 2875** 2876** ##===========< i=1; i<MAX_SCATTER >========= 2877** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 2878** || PADDR (checkatn), 2879** || SCR_MOVE_TBL ^ SCR_DATA_IN, 2880** || offsetof (struct dsb, data[ i]), 2881** ##========================================== 2882** 2883** SCR_CALL, 2884** PADDR (checkatn), 2885** SCR_JUMP, 2886** PADDR (no_data), 2887*/ 28880 2889}/*-------------------------< DATA_OUT >-------------------*/,{ 2890/* 2891** Because the size depends on the 2892** #define MAX_SCATTER parameter, 2893** it is filled in at runtime. 2894** 2895** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)), 2896** PADDR (no_data), 2897** SCR_COPY (sizeof (struct timeval)), 2898** (ncrcmd) &time, 2899** NADDR (header.stamp.data), 2900** SCR_MOVE_TBL ^ SCR_DATA_OUT, 2901** offsetof (struct dsb, data[ 0]), 2902** 2903** ##===========< i=1; i<MAX_SCATTER >========= 2904** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2905** || PADDR (dispatch), 2906** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 2907** || offsetof (struct dsb, data[ i]), 2908** ##========================================== 2909** 2910** SCR_CALL, 2911** PADDR (dispatch), 2912** SCR_JUMP, 2913** PADDR (no_data), 2914** 2915**--------------------------------------------------------- 2916*/ 2917(u_long)&ident 2918 2919}/*-------------------------< ABORTTAG >-------------------*/,{ 2920 /* 2921 ** Abort a bad reselection. 2922 ** Set the message to ABORT vs. ABORT_TAG 2923 */ 2924 SCR_LOAD_REG (scratcha, M_ABORT_TAG), 2925 0, 2926 SCR_JUMPR ^ IFFALSE (CARRYSET), 2927 8, 2928}/*-------------------------< ABORT >----------------------*/,{ 2929 SCR_LOAD_REG (scratcha, M_ABORT), 2930 0, 2931 SCR_COPY (1), 2932 RADDR (scratcha), 2933 NADDR (msgout), 2934 SCR_SET (SCR_ATN), 2935 0, 2936 SCR_CLR (SCR_ACK), 2937 0, 2938 /* 2939 ** and send it. 2940 ** we expect an immediate disconnect 2941 */ 2942 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2943 0, 2944 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 2945 NADDR (msgout), 2946 SCR_COPY (1), 2947 RADDR (sfbr), 2948 NADDR (lastmsg), 2949 SCR_CLR (SCR_ACK|SCR_ATN), 2950 0, 2951 SCR_WAIT_DISC, 2952 0, 2953 SCR_JUMP, 2954 PADDR (start), 2955}/*-------------------------< SNOOPTEST >-------------------*/,{ 2956 /* 2957 ** Read the variable. 2958 */ 2959 SCR_COPY (4), 2960 (ncrcmd) &ncr_cache, 2961 RADDR (scratcha), 2962 /* 2963 ** Write the variable. 2964 */ 2965 SCR_COPY (4), 2966 RADDR (temp), 2967 (ncrcmd) &ncr_cache, 2968 /* 2969 ** Read back the variable. 2970 */ 2971 SCR_COPY (4), 2972 (ncrcmd) &ncr_cache, 2973 RADDR (temp), 2974}/*-------------------------< SNOOPEND >-------------------*/,{ 2975 /* 2976 ** And stop. 2977 */ 2978 SCR_INT, 2979 99, 2980}/*--------------------------------------------------------*/ 2981}; 2982 2983/*========================================================== 2984** 2985** 2986** Fill in #define dependent parts of the script 2987** 2988** 2989**========================================================== 2990*/ 2991 2992void ncr_script_fill (struct script * scr) 2993{ 2994 int i; 2995 ncrcmd *p; 2996 2997 p = scr->tryloop; 2998 for (i=0; i<MAX_START; i++) { 2999 *p++ =SCR_COPY (4); 3000 *p++ =NADDR (squeue[i]); 3001 *p++ =RADDR (dsa); 3002 *p++ =SCR_CALL; 3003 *p++ =PADDR (trysel); 3004 }; 3005 *p++ =SCR_JUMP; 3006 *p++ =PADDR(tryloop); 3007 3008 assert ((u_long)p == (u_long)&scr->tryloop + sizeof (scr->tryloop)); 3009 3010 p = scr->data_in; 3011 3012 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)); 3013 *p++ =PADDR (no_data); 3014 *p++ =SCR_COPY (sizeof (struct timeval)); 3015 *p++ =(ncrcmd) &time; 3016 *p++ =NADDR (header.stamp.data); 3017 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 3018 *p++ =offsetof (struct dsb, data[ 0]); 3019 3020 for (i=1; i<MAX_SCATTER; i++) { 3021 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 3022 *p++ =PADDR (checkatn); 3023 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 3024 *p++ =offsetof (struct dsb, data[i]); 3025 }; 3026 3027 *p++ =SCR_CALL; 3028 *p++ =PADDR (checkatn); 3029 *p++ =SCR_JUMP; 3030 *p++ =PADDR (no_data); 3031 3032 assert ((u_long)p == (u_long)&scr->data_in + sizeof (scr->data_in)); 3033 3034 p = scr->data_out; 3035 3036 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)); 3037 *p++ =PADDR (no_data); 3038 *p++ =SCR_COPY (sizeof (struct timeval)); 3039 *p++ =(ncrcmd) &time; 3040 *p++ =NADDR (header.stamp.data); 3041 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 3042 *p++ =offsetof (struct dsb, data[ 0]); 3043 3044 for (i=1; i<MAX_SCATTER; i++) { 3045 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 3046 *p++ =PADDR (dispatch); 3047 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 3048 *p++ =offsetof (struct dsb, data[i]); 3049 }; 3050 3051 *p++ =SCR_CALL; 3052 *p++ =PADDR (dispatch); 3053 *p++ =SCR_JUMP; 3054 *p++ =PADDR (no_data); 3055 3056 assert ((u_long)p == (u_long)&scr->data_out + sizeof (scr->data_out)); 3057} 3058 3059/*========================================================== 3060** 3061** 3062** Copy and rebind a script. 3063** 3064** 3065**========================================================== 3066*/ 3067 3068static void ncr_script_copy_and_bind (struct script *script, ncb_p np) 3069{ 3070 ncrcmd opcode, new, old; 3071 ncrcmd *src, *dst, *start, *end; 3072 int relocs; 3073 3074#ifndef __NetBSD__ 3075 np->script = (struct script*) vm_page_alloc_contig 3076 (round_page(sizeof (struct script)), 0x100000, 0xffffffff, PAGE_SIZE); 3077#else /* !__NetBSD___ */ 3078 np->script = (struct script *) 3079 malloc (sizeof (struct script), M_DEVBUF, M_WAITOK); 3080#endif /* __NetBSD__ */ 3081 3082 np->p_script = vtophys(np->script); 3083 3084 src = script->start; 3085 dst = np->script->start; 3086 3087 start = src; 3088 end = src + (sizeof (struct script) / 4); 3089 3090 while (src < end) { 3091 3092 *dst++ = opcode = *src++; 3093 3094 /* 3095 ** If we forget to change the length 3096 ** in struct script, a field will be 3097 ** padded with 0. This is an illegal 3098 ** command. 3099 */ 3100 3101 if (opcode == 0) { 3102 printf ("%s: ERROR0 IN SCRIPT at %d.\n", 3103 ncr_name(np), src-start-1); 3104 DELAY (1000000); 3105 }; 3106 3107 if (DEBUG_FLAGS & DEBUG_SCRIPT) 3108 printf ("%x: <%x>\n", 3109 (unsigned)(src-1), (unsigned)opcode); 3110 3111 /* 3112 ** We don't have to decode ALL commands 3113 */ 3114 switch (opcode >> 28) { 3115 3116 case 0xc: 3117 /* 3118 ** COPY has TWO arguments. 3119 */ 3120 relocs = 2; 3121 if ((src[0] ^ src[1]) & 3) { 3122 printf ("%s: ERROR1 IN SCRIPT at %d.\n", 3123 ncr_name(np), src-start-1); 3124 DELAY (1000000); 3125 }; 3126 3127 /* 3128 ** If PREFETCH feature is not enabled/supported 3129 ** remove the NO FLUSH bit if present. 3130 */ 3131 if ((opcode & SCR_NO_FLUSH)&&!(np->features & FE_PFEN)) 3132 dst[-1] = (opcode & ~SCR_NO_FLUSH); 3133 break; 3134 3135 case 0x0: 3136 /* 3137 ** MOVE (absolute address) 3138 */ 3139 relocs = 1; 3140 break; 3141 3142 case 0x8: 3143 /* 3144 ** JUMP / CALL 3145 ** dont't relocate if relative :-) 3146 */ 3147 if (opcode & 0x00800000) 3148 relocs = 0; 3149 else 3150 relocs = 1; 3151 break; 3152 3153 case 0x4: 3154 case 0x5: 3155 case 0x6: 3156 case 0x7: 3157 relocs = 1; 3158 break; 3159 3160 default: 3161 relocs = 0; 3162 break; 3163 }; 3164 3165 if (relocs) { 3166 while (relocs--) { 3167 old = *src++; 3168 3169 switch (old & RELOC_MASK) { 3170 case RELOC_REGISTER: 3171 new = (old & ~RELOC_MASK) + np->paddr; 3172 break; 3173 case RELOC_LABEL: 3174 new = (old & ~RELOC_MASK) + np->p_script; 3175 break; 3176 case RELOC_SOFTC: 3177 new = (old & ~RELOC_MASK) + vtophys(np); 3178 break; 3179 case 0: 3180 /* Don't relocate a 0 address. */ 3181 if (old == 0) { 3182 new = old; 3183 break; 3184 } 3185 /* fall through */ 3186 default: 3187 new = vtophys(old); 3188 break; 3189 } 3190 3191 *dst++ = new; 3192 } 3193 } else 3194 *dst++ = *src++; 3195 3196 }; 3197} 3198 3199/*========================================================== 3200** 3201** 3202** Auto configuration. 3203** 3204** 3205**========================================================== 3206*/ 3207 3208/*---------------------------------------------------------- 3209** 3210** Reduce the transfer length to the max value 3211** we can transfer safely. 3212** 3213** Reading a block greater then MAX_SIZE from the 3214** raw (character) device exercises a memory leak 3215** in the vm subsystem. This is common to ALL devices. 3216** We have submitted a description of this bug to 3217** <FreeBSD-bugs@freefall.cdrom.com>. 3218** It should be fixed in the current release. 3219** 3220**---------------------------------------------------------- 3221*/ 3222 3223void ncr_min_phys (struct buf *bp) 3224{ 3225 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE; 3226} 3227 3228/*---------------------------------------------------------- 3229** 3230** Maximal number of outstanding requests per target. 3231** 3232**---------------------------------------------------------- 3233*/ 3234 3235u_int32_t ncr_info (int unit) 3236{ 3237 return (1); /* may be changed later */ 3238} 3239 3240/*---------------------------------------------------------- 3241** 3242** NCR chip devices table and chip look up function. 3243** Features bit are defined in ncrreg.h. Is it the 3244** right place? 3245** 3246**---------------------------------------------------------- 3247*/ 3248typedef struct { 3249 unsigned long device_id; 3250 unsigned short revision_id; 3251 char *name; 3252 unsigned char maxburst; 3253 unsigned char maxoffs; 3254 unsigned char clock_divn; 3255 unsigned int features; 3256} ncr_chip; 3257 3258static ncr_chip ncr_chip_table[] = { 3259 {NCR_810_ID, 0x0f, "ncr 53c810 fast10 scsi", 4, 8, 4, 3260 FE_ERL} 3261 , 3262 {NCR_810_ID, 0xff, "ncr 53c810a fast10 scsi", 4, 8, 4, 3263 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF} 3264 , 3265 {NCR_815_ID, 0xff, "ncr 53c815 fast10 scsi", 4, 8, 4, 3266 FE_ERL|FE_BOF} 3267 , 3268 {NCR_820_ID, 0xff, "ncr 53c820 fast10 wide scsi", 4, 8, 4, 3269 FE_WIDE|FE_ERL} 3270 , 3271 {NCR_825_ID, 0x0f, "ncr 53c825 fast10 wide scsi", 4, 8, 4, 3272 FE_WIDE|FE_ERL|FE_BOF} 3273 , 3274 {NCR_825_ID, 0xff, "ncr 53c825a fast10 wide scsi", 7, 8, 4, 3275 FE_WIDE|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3276 , 3277 {NCR_860_ID, 0xff, "ncr 53c860 fast20 scsi", 4, 8, 5, 3278 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN|FE_RAM} 3279 , 3280 {NCR_875_ID, 0x01, "ncr 53c875 fast20 wide scsi", 7, 16, 5, 3281 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3282 , 3283 {NCR_875_ID, 0xff, "ncr 53c875 fast20 wide scsi", 7, 16, 5, 3284 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3285 , 3286 {NCR_875_ID2, 0xff, "ncr 53c875j fast20 wide scsi", 7, 16, 5, 3287 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3288 , 3289 {NCR_885_ID, 0xff, "ncr 53c885 fast20 wide scsi", 7, 16, 5, 3290 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3291 , 3292 {NCR_895_ID, 0xff, "ncr 53c895 fast40 wide scsi", 7, 31, 7, 3293 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3294 , 3295 {NCR_896_ID, 0xff, "ncr 53c896 fast40 wide scsi", 7, 31, 7, 3296 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3297}; 3298 3299static int ncr_chip_lookup(u_long device_id, u_char revision_id) 3300{ 3301 int i, found; 3302 3303 found = -1; 3304 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) { 3305 if (device_id == ncr_chip_table[i].device_id && 3306 revision_id <= ncr_chip_table[i].revision_id) { 3307 found = i; 3308 break; 3309 } 3310 } 3311 return found; 3312} 3313 3314/*---------------------------------------------------------- 3315** 3316** Probe the hostadapter. 3317** 3318**---------------------------------------------------------- 3319*/ 3320 3321#ifdef __NetBSD__ 3322 3323int 3324ncr_probe(parent, match, aux) 3325 struct device *parent; 3326 void *match, *aux; 3327{ 3328 struct cfdata *cf = match; 3329 struct pci_attach_args *pa = aux; 3330 3331#if 0 3332 if (!pci_targmatch(cf, pa)) 3333 return 0; 3334#endif 3335 if (ncr_chip_lookup(pa->pa_id, 0xff) < 0) 3336 return 0; 3337 3338 return 1; 3339} 3340 3341#else /* !__NetBSD__ */ 3342 3343 3344static char* ncr_probe (pcici_t tag, pcidi_t type) 3345{ 3346 u_char rev = pci_conf_read (tag, PCI_CLASS_REG) & 0xff; 3347 int i; 3348 3349 i = ncr_chip_lookup(type, rev); 3350 if (i >= 0) 3351 return ncr_chip_table[i].name; 3352 3353 return (NULL); 3354} 3355 3356#endif /* !__NetBSD__ */ 3357 3358 3359/*========================================================== 3360** 3361** NCR chip clock divisor table. 3362** Divisors are multiplied by 10,000,000 in order to make 3363** calculations more simple. 3364** 3365**========================================================== 3366*/ 3367 3368#define _5M 5000000 3369static u_long div_10M[] = 3370 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; 3371 3372/*=============================================================== 3373** 3374** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128 3375** transfers. 32,64,128 are only supported by 875 and 895 chips. 3376** We use log base 2 (burst length) as internal code, with 3377** value 0 meaning "burst disabled". 3378** 3379**=============================================================== 3380*/ 3381 3382/* 3383 * Burst length from burst code. 3384 */ 3385#define burst_length(bc) (!(bc))? 0 : 1 << (bc) 3386 3387/* 3388 * Burst code from io register bits. 3389 */ 3390#define burst_code(dmode, ctest4, ctest5) \ 3391 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1 3392 3393/* 3394 * Set initial io register bits from burst code. 3395 */ 3396static void ncr_init_burst(ncb_p np, u_char bc) 3397{ 3398 np->rv_ctest4 &= ~0x80; 3399 np->rv_dmode &= ~(0x3 << 6); 3400 np->rv_ctest5 &= ~0x4; 3401 3402 if (!bc) { 3403 np->rv_ctest4 |= 0x80; 3404 } 3405 else { 3406 --bc; 3407 np->rv_dmode |= ((bc & 0x3) << 6); 3408 np->rv_ctest5 |= (bc & 0x4); 3409 } 3410} 3411 3412/*========================================================== 3413** 3414** 3415** Auto configuration: attach and init a host adapter. 3416** 3417** 3418**========================================================== 3419*/ 3420 3421#ifdef __NetBSD__ 3422 3423int 3424ncr_print() 3425{ 3426} 3427 3428void 3429ncr_attach(parent, self, aux) 3430 struct device *parent, *self; 3431 void *aux; 3432{ 3433 struct pci_attach_args *pa = aux; 3434 int retval; 3435 ncb_p np = (void *)self; 3436 u_char rev = 0; 3437 u_long period; 3438 int i; 3439 ncr_chip *chip; 3440 3441 /* 3442 ** XXX NetBSD 3443 ** Perhaps try to figure what which model chip it is and print that 3444 ** out. 3445 */ 3446 printf("\n"); 3447 3448 /* 3449 ** Try to map the controller chip to 3450 ** virtual and physical memory. 3451 */ 3452 3453 retval = pci_map_mem(pa->pa_tag, 0x14, &np->vaddr, &np->paddr); 3454 if (retval) 3455 return; 3456 3457 np->sc_ih = pci_map_int(pa->pa_tag, PCI_IPL_BIO, ncr_intr, np); 3458 if (np->sc_ih == NULL) 3459 return; 3460 3461 3462#else /* !__NetBSD__ */ 3463 3464static void ncr_attach (pcici_t config_id, int unit) 3465{ 3466 ncb_p np = (struct ncb*) 0; 3467#if ! (__FreeBSD__ >= 2) 3468 extern unsigned bio_imask; 3469#endif 3470 3471#if (__FreeBSD__ >= 2) 3472 struct scsibus_data *scbus; 3473#endif 3474 u_char rev = 0; 3475 u_long period; 3476 int i; 3477 3478 /* 3479 ** allocate and initialize structures. 3480 */ 3481 3482 if (!np) { 3483 np = (ncb_p) malloc (sizeof (struct ncb), M_DEVBUF, M_WAITOK); 3484 if (!np) return; 3485 ncrp[unit]=np; 3486 } 3487 bzero (np, sizeof (*np)); 3488 3489 np->ccb = (ccb_p) malloc (sizeof (struct ccb), M_DEVBUF, M_WAITOK); 3490 if (!np->ccb) return; 3491 bzero (np->ccb, sizeof (*np->ccb)); 3492 3493 np->unit = unit; 3494 3495 /* 3496 ** Try to map the controller chip to 3497 ** virtual and physical memory. 3498 */ 3499 3500 if (!pci_map_mem (config_id, 0x14, &np->vaddr, &np->paddr)) 3501 return; 3502 3503 /* 3504 ** Make the controller's registers available. 3505 ** Now the INB INW INL OUTB OUTW OUTL macros 3506 ** can be used safely. 3507 */ 3508 3509 np->reg = (struct ncr_reg*) np->vaddr; 3510 3511#ifdef NCR_IOMAPPED 3512 /* 3513 ** Try to map the controller chip into iospace. 3514 */ 3515 3516 if (!pci_map_port (config_id, 0x10, &np->port)) 3517 return; 3518#endif 3519 3520#endif /* !__NetBSD__ */ 3521 3522 /* 3523 ** Save some controller register default values 3524 */ 3525 3526 np->rv_scntl3 = INB(nc_scntl3) & 0x77; 3527 np->rv_dmode = INB(nc_dmode) & 0xce; 3528 np->rv_dcntl = INB(nc_dcntl) & 0xa9; 3529 np->rv_ctest3 = INB(nc_ctest3) & 0x01; 3530 np->rv_ctest4 = INB(nc_ctest4) & 0x88; 3531 np->rv_ctest5 = INB(nc_ctest5) & 0x24; 3532 np->rv_gpcntl = INB(nc_gpcntl); 3533 np->rv_stest2 = INB(nc_stest2) & 0x20; 3534 3535 if (bootverbose) { 3536 printf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n", 3537 np->rv_scntl3, np->rv_dmode, np->rv_dcntl); 3538 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n", 3539 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 3540 } 3541 3542 np->rv_dcntl |= NOCOM; 3543 3544 /* 3545 ** Do chip dependent initialization. 3546 */ 3547 3548#ifndef __NetBSD__ 3549 rev = pci_conf_read (config_id, PCI_CLASS_REG) & 0xff; 3550#endif /* !__NetBSD__ */ 3551 3552 /* 3553 ** Get chip features from chips table. 3554 */ 3555#ifdef __NetBSD__ 3556 i = ncr_chip_lookup(pa->pa_id, rev); 3557#else /* !__NetBSD__ */ 3558 i = ncr_chip_lookup(pci_conf_read(config_id, PCI_ID_REG), rev); 3559#endif /* __NetBSD__ */ 3560 3561 if (i >= 0) { 3562 np->maxburst = ncr_chip_table[i].maxburst; 3563 np->maxoffs = ncr_chip_table[i].maxoffs; 3564 np->clock_divn = ncr_chip_table[i].clock_divn; 3565 np->features = ncr_chip_table[i].features; 3566 } else { /* Should'nt happen if probe() is ok */ 3567 np->maxburst = 4; 3568 np->maxoffs = 8; 3569 np->clock_divn = 4; 3570 np->features = FE_ERL; 3571 } 3572 3573 np->maxwide = np->features & FE_WIDE ? 1 : 0; 3574 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000; 3575 if (np->features & FE_QUAD) np->multiplier = 4; 3576 else if (np->features & FE_DBLR) np->multiplier = 2; 3577 else np->multiplier = 1; 3578 3579 /* 3580 ** Get the frequency of the chip's clock. 3581 ** Find the right value for scntl3. 3582 */ 3583 if (np->features & (FE_ULTRA|FE_ULTRA2)) 3584 ncr_getclock(np, np->multiplier); 3585 3586#ifdef NCR_TEKRAM_EEPROM 3587 if (bootverbose) { 3588 printf ("%s: Tekram EEPROM read %s\n", 3589 ncr_name(np), 3590 read_tekram_eeprom (np, NULL) ? 3591 "succeeded" : "failed"); 3592 } 3593#endif /* NCR_TEKRAM_EEPROM */ 3594 3595 /* 3596 * If scntl3 != 0, we assume BIOS is present. 3597 */ 3598 if (np->rv_scntl3) 3599 np->features |= FE_BIOS; 3600 3601 /* 3602 * Divisor to be used for async (timer pre-scaler). 3603 */ 3604 i = np->clock_divn - 1; 3605 while (i >= 0) { 3606 --i; 3607 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) { 3608 ++i; 3609 break; 3610 } 3611 } 3612 np->rv_scntl3 = i+1; 3613 3614 /* 3615 * Minimum synchronous period factor supported by the chip. 3616 * Btw, 'period' is in tenths of nanoseconds. 3617 */ 3618 3619 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; 3620 if (period <= 250) np->minsync = 10; 3621 else if (period <= 303) np->minsync = 11; 3622 else if (period <= 500) np->minsync = 12; 3623 else np->minsync = (period + 40 - 1) / 40; 3624 3625 /* 3626 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). 3627 */ 3628 3629 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2))) 3630 np->minsync = 25; 3631 else if (np->minsync < 12 && !(np->features & FE_ULTRA2)) 3632 np->minsync = 12; 3633 3634 /* 3635 * Maximum synchronous period factor supported by the chip. 3636 */ 3637 3638 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); 3639 np->maxsync = period > 2540 ? 254 : period / 10; 3640 3641 /* 3642 * Now, some features available with Symbios compatible boards. 3643 * LED support through GPIO0 and DIFF support. 3644 */ 3645 3646#ifdef SCSI_NCR_SYMBIOS_COMPAT 3647 if (!(np->rv_gpcntl & 0x01)) 3648 np->features |= FE_LED0; 3649#if 0 /* Not safe enough without NVRAM support or user settable option */ 3650 if (!(INB(nc_gpreg) & 0x08)) 3651 np->features |= FE_DIFF; 3652#endif 3653#endif /* SCSI_NCR_SYMBIOS_COMPAT */ 3654 3655 /* 3656 * Prepare initial IO registers settings. 3657 * Trust BIOS only if we believe we have one and if we want to. 3658 */ 3659#ifdef SCSI_NCR_TRUST_BIOS 3660 if (!(np->features & FE_BIOS)) { 3661#else 3662 if (1) { 3663#endif 3664 np->rv_dmode = 0; 3665 np->rv_dcntl = NOCOM; 3666 np->rv_ctest3 = 0; 3667 np->rv_ctest4 = MPEE; 3668 np->rv_ctest5 = 0; 3669 np->rv_stest2 = 0; 3670 3671 if (np->features & FE_ERL) 3672 np->rv_dmode |= ERL; /* Enable Read Line */ 3673 if (np->features & FE_BOF) 3674 np->rv_dmode |= BOF; /* Burst Opcode Fetch */ 3675 if (np->features & FE_ERMP) 3676 np->rv_dmode |= ERMP; /* Enable Read Multiple */ 3677 if (np->features & FE_CLSE) 3678 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ 3679 if (np->features & FE_WRIE) 3680 np->rv_ctest3 |= WRIE; /* Write and Invalidate */ 3681 if (np->features & FE_PFEN) 3682 np->rv_dcntl |= PFEN; /* Prefetch Enable */ 3683 if (np->features & FE_DFS) 3684 np->rv_ctest5 |= DFS; /* Dma Fifo Size */ 3685 if (np->features & FE_DIFF) 3686 np->rv_stest2 |= 0x20; /* Differential mode */ 3687 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */ 3688 } else { 3689 np->maxburst = 3690 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5); 3691 } 3692 3693 /* 3694 ** Bells and whistles ;-) 3695 */ 3696 printf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n", 3697 ncr_name(np), np->minsync, np->maxsync, np->maxoffs, 3698 burst_length(np->maxburst), 3699 (np->rv_ctest5 & DFS) ? "large" : "normal"); 3700 3701 /* 3702 ** Patch script to physical addresses 3703 */ 3704 3705 ncr_script_fill (&script0); 3706 ncr_script_copy_and_bind (&script0, np); 3707 np->ccb->p_ccb = vtophys (np->ccb); 3708 3709 /* 3710 ** Patch the script for LED support. 3711 */ 3712 3713 if (np->features & FE_LED0) { 3714 np->script->reselect[0] = SCR_REG_REG(gpreg, SCR_OR, 0x01); 3715 np->script->reselect1[0] = SCR_REG_REG(gpreg, SCR_AND, 0xfe); 3716 np->script->reselect2[0] = SCR_REG_REG(gpreg, SCR_AND, 0xfe); 3717 } 3718 3719 /* 3720 ** init data structure 3721 */ 3722 3723 np->jump_tcb.l_cmd = SCR_JUMP; 3724 np->jump_tcb.l_paddr = NCB_SCRIPT_PHYS (np, abort); 3725 3726 /* 3727 ** Get SCSI addr of host adapter (set by bios?). 3728 */ 3729 3730 np->myaddr = INB(nc_scid) & 0x07; 3731 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR; 3732 3733#ifdef NCR_DUMP_REG 3734 /* 3735 ** Log the initial register contents 3736 */ 3737 { 3738 int reg; 3739#ifdef __NetBSD__ 3740 u_long config_id = pa->pa_tag; 3741#endif /* __NetBSD__ */ 3742 for (reg=0; reg<256; reg+=4) { 3743 if (reg%16==0) printf ("reg[%2x]", reg); 3744 printf (" %08x", (int)pci_conf_read (config_id, reg)); 3745 if (reg%16==12) printf ("\n"); 3746 } 3747 } 3748#endif /* NCR_DUMP_REG */ 3749 3750 /* 3751 ** Reset chip. 3752 */ 3753 3754 OUTB (nc_istat, SRST); 3755 DELAY (1000); 3756 OUTB (nc_istat, 0 ); 3757 3758 3759 /* 3760 ** Now check the cache handling of the pci chipset. 3761 */ 3762 3763 if (ncr_snooptest (np)) { 3764 printf ("CACHE INCORRECTLY CONFIGURED.\n"); 3765 return; 3766 }; 3767 3768#ifndef __NetBSD__ 3769 /* 3770 ** Install the interrupt handler. 3771 */ 3772 3773 if (!pci_map_int (config_id, ncr_intr, np, &bio_imask)) 3774 printf ("\tinterruptless mode: reduced performance.\n"); 3775#endif /* __NetBSD__ */ 3776 3777 /* 3778 ** After SCSI devices have been opened, we cannot 3779 ** reset the bus safely, so we do it here. 3780 ** Interrupt handler does the real work. 3781 */ 3782 3783 OUTB (nc_scntl1, CRST); 3784 DELAY (1000); 3785 3786 /* 3787 ** Process the reset exception, 3788 ** if interrupts are not enabled yet. 3789 ** Then enable disconnects. 3790 */ 3791 ncr_exception (np); 3792 np->disc = 1; 3793 3794 /* 3795 ** Now let the generic SCSI driver 3796 ** look for the SCSI devices on the bus .. 3797 */ 3798 3799#ifdef __NetBSD__ 3800 np->sc_link.adapter_softc = np; 3801 np->sc_link.adapter_target = np->myaddr; 3802 np->sc_link.openings = 1; 3803#else /* !__NetBSD__ */ 3804 np->sc_link.adapter_unit = unit; 3805 np->sc_link.adapter_softc = np; 3806 np->sc_link.adapter_targ = np->myaddr; 3807 np->sc_link.fordriver = 0; 3808#endif /* !__NetBSD__ */ 3809 np->sc_link.adapter = &ncr_switch; 3810 np->sc_link.device = &ncr_dev; 3811 np->sc_link.flags = 0; 3812 3813#ifdef __NetBSD__ 3814 config_found(self, &np->sc_link, ncr_print); 3815#else /* !__NetBSD__ */ 3816#if (__FreeBSD__ >= 2) 3817 scbus = scsi_alloc_bus(); 3818 if(!scbus) 3819 return; 3820 scbus->adapter_link = &np->sc_link; 3821 3822 if(np->maxwide) 3823 scbus->maxtarg = 15; 3824 3825 if (bootverbose) { 3826 unsigned t_from = 0; 3827 unsigned t_to = scbus->maxtarg; 3828 unsigned myaddr = np->myaddr; 3829 3830 char *txt_and = ""; 3831 printf ("%s scanning for targets ", ncr_name (np)); 3832 if (t_from < myaddr) { 3833 printf ("%d..%d ", t_from, myaddr -1); 3834 txt_and = "and "; 3835 } 3836 if (myaddr < t_to) 3837 printf ("%s%d..%d ", txt_and, myaddr +1, t_to); 3838 printf ("(V%d " NCR_DATE ")\n", NCR_VERSION); 3839 } 3840 3841 scsi_attachdevs (scbus); 3842 scbus = NULL; /* Upper-level SCSI code owns this now */ 3843#else 3844 scsi_attachdevs (&np->sc_link); 3845#endif /* !__FreeBSD__ >= 2 */ 3846#endif /* !__NetBSD__ */ 3847 3848 /* 3849 ** start the timeout daemon 3850 */ 3851 ncr_timeout (np); 3852 np->lasttime=0; 3853 3854 /* 3855 ** use SIMPLE TAG messages by default 3856 */ 3857 3858 np->order = M_SIMPLE_TAG; 3859 3860 /* 3861 ** Done. 3862 */ 3863 3864 return; 3865} 3866 3867/*========================================================== 3868** 3869** 3870** Process pending device interrupts. 3871** 3872** 3873**========================================================== 3874*/ 3875 3876static void 3877ncr_intr(vnp) 3878 void *vnp; 3879{ 3880 ncb_p np = vnp; 3881 int oldspl = splbio(); 3882 3883 if (DEBUG_FLAGS & DEBUG_TINY) printf ("["); 3884 3885 if (INB(nc_istat) & (INTF|SIP|DIP)) { 3886 /* 3887 ** Repeat until no outstanding ints 3888 */ 3889 do { 3890 ncr_exception (np); 3891 } while (INB(nc_istat) & (INTF|SIP|DIP)); 3892 3893 np->ticks = 100; 3894 }; 3895 3896 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]\n"); 3897 3898 splx (oldspl); 3899} 3900 3901/*========================================================== 3902** 3903** 3904** Start execution of a SCSI command. 3905** This is called from the generic SCSI driver. 3906** 3907** 3908**========================================================== 3909*/ 3910 3911static int32_t ncr_start (struct scsi_xfer * xp) 3912{ 3913 ncb_p np = (ncb_p) xp->sc_link->adapter_softc; 3914 3915 struct scsi_generic * cmd = xp->cmd; 3916 ccb_p cp; 3917 lcb_p lp; 3918 tcb_p tp = &np->target[xp->sc_link->target]; 3919 3920 int i, oldspl, segments, flags = xp->flags; 3921 u_char qidx, nego, idmsg, *msgptr; 3922 u_long msglen, msglen2; 3923 3924 /*--------------------------------------------- 3925 ** 3926 ** Reset SCSI bus 3927 ** 3928 ** Interrupt handler does the real work. 3929 ** 3930 **--------------------------------------------- 3931 */ 3932 3933 if (flags & SCSI_RESET) { 3934 OUTB (nc_scntl1, CRST); 3935 DELAY (1000); 3936 return(COMPLETE); 3937 }; 3938 3939 /*--------------------------------------------- 3940 ** 3941 ** Some shortcuts ... 3942 ** 3943 **--------------------------------------------- 3944 */ 3945 3946 if ((xp->sc_link->target == np->myaddr ) || 3947 (xp->sc_link->target >= MAX_TARGET) || 3948 (xp->sc_link->lun >= MAX_LUN ) || 3949 (flags & SCSI_DATA_UIO)) { 3950 xp->error = XS_DRIVER_STUFFUP; 3951 return(COMPLETE); 3952 }; 3953 3954 /*--------------------------------------------- 3955 ** 3956 ** Diskaccess to partial blocks? 3957 ** 3958 **--------------------------------------------- 3959 */ 3960 3961 if ((xp->datalen & 0x1ff) && !(tp->inqdata[0] & 0x1f)) { 3962 switch (cmd->opcode) { 3963 case 0x28: /* READ_BIG (10) */ 3964 case 0xa8: /* READ_HUGE (12) */ 3965 case 0x2a: /* WRITE_BIG (10) */ 3966 case 0xaa: /* WRITE_HUGE(12) */ 3967 PRINT_ADDR(xp); 3968 printf ("access to partial disk block refused.\n"); 3969 xp->error = XS_DRIVER_STUFFUP; 3970 return(COMPLETE); 3971 }; 3972 }; 3973 3974 if ((unsigned)xp->datalen > 128*1024*1024) { 3975 PRINT_ADDR(xp); 3976 printf ("trying to transfer %8x bytes, mem addr = %8x\n", 3977 xp->datalen, xp->data); 3978 { 3979 int i; 3980 PRINT_ADDR(xp); 3981 printf ("command: %2x (", cmd->opcode); 3982 for (i = 0; i<11; i++) 3983 printf (" %2x", cmd->bytes[i]); 3984 printf (")\n"); 3985 } 3986 } 3987 3988 if (DEBUG_FLAGS & DEBUG_TINY) { 3989 PRINT_ADDR(xp); 3990 printf ("CMD=%x F=%x A=%x L=%x ", 3991 cmd->opcode, (unsigned)xp->flags, 3992 (unsigned) xp->data, (unsigned) xp->datalen); 3993 } 3994 3995 /*-------------------------------------------- 3996 ** 3997 ** Sanity checks ... 3998 ** copied from Elischer's Adaptec driver. 3999 ** 4000 **-------------------------------------------- 4001 */ 4002 4003 flags = xp->flags; 4004 if (!(flags & INUSE)) { 4005 printf("%s: ?INUSE?\n", ncr_name (np)); 4006 xp->flags |= INUSE; 4007 }; 4008 4009 if(flags & ITSDONE) { 4010 printf("%s: ?ITSDONE?\n", ncr_name (np)); 4011 xp->flags &= ~ITSDONE; 4012 }; 4013 4014 if (xp->bp) 4015 flags |= (SCSI_NOSLEEP); /* just to be sure */ 4016 4017 /*--------------------------------------------------- 4018 ** 4019 ** Assign a ccb / bind xp 4020 ** 4021 **---------------------------------------------------- 4022 */ 4023 4024 oldspl = splbio(); 4025 4026 if (!(cp=ncr_get_ccb (np, flags, xp->sc_link->target, xp->sc_link->lun))) { 4027 printf ("%s: no ccb.\n", ncr_name (np)); 4028 xp->error = XS_DRIVER_STUFFUP; 4029 splx(oldspl); 4030 return(TRY_AGAIN_LATER); 4031 }; 4032 cp->xfer = xp; 4033 4034 /*--------------------------------------------------- 4035 ** 4036 ** timestamp 4037 ** 4038 **---------------------------------------------------- 4039 */ 4040 4041 bzero (&cp->phys.header.stamp, sizeof (struct tstamp)); 4042 gettime(&cp->phys.header.stamp.start); 4043 4044 /*---------------------------------------------------- 4045 ** 4046 ** Get device quirks from a speciality table. 4047 ** 4048 **---------------------------------------------------- 4049 */ 4050 4051 if (tp->quirks & QUIRK_UPDATE) { 4052 int q = xp->sc_link->quirks; 4053 tp->quirks = QUIRK_NOMSG; 4054 if (q & SD_Q_NO_TAGS) 4055 tp->quirks |= QUIRK_NOTAGS; 4056 if (q & SD_Q_NO_SYNC) 4057 tp->quirks |= QUIRK_NOSYNC; 4058 if (q & SD_Q_NO_WIDE) 4059 tp->quirks |= QUIRK_NOWIDE16; 4060 if (bootverbose && tp->quirks) { 4061 PRINT_ADDR(xp); 4062 printf ("NCR quirks=0x%x\n", tp->quirks); 4063 }; 4064 /* 4065 ** set number of tags 4066 */ 4067 ncr_setmaxtags (tp, tp->usrtags); 4068 }; 4069 4070 /*--------------------------------------------------- 4071 ** 4072 ** negotiation required? 4073 ** 4074 **---------------------------------------------------- 4075 */ 4076 4077 nego = 0; 4078 4079 if (!tp->nego_cp && tp->inqdata[7]) { 4080 /* 4081 ** negotiate wide transfers ? 4082 */ 4083 4084 if (!tp->widedone) { 4085 if (tp->inqdata[7] & INQ7_WIDE16) { 4086 nego = NS_WIDE; 4087 } else 4088 tp->widedone=1; 4089 }; 4090 4091 /* 4092 ** negotiate synchronous transfers? 4093 */ 4094 4095 if (!nego && !tp->period) { 4096 if (SCSI_NCR_DFLT_SYNC 4097#if defined (CDROM_ASYNC) 4098 && ((tp->inqdata[0] & 0x1f) != 5) 4099#endif 4100 && (tp->inqdata[7] & INQ7_SYNC)) { 4101 nego = NS_SYNC; 4102 } else { 4103 tp->period =0xffff; 4104 tp->sval = 0xe0; 4105 PRINT_ADDR(xp); 4106 printf ("asynchronous.\n"); 4107 }; 4108 }; 4109 4110 /* 4111 ** remember nego is pending for the target. 4112 ** Avoid to start a nego for all queued commands 4113 ** when tagged command queuing is enabled. 4114 */ 4115 4116 if (nego) 4117 tp->nego_cp = cp; 4118 }; 4119 4120 /*--------------------------------------------------- 4121 ** 4122 ** choose a new tag ... 4123 ** 4124 **---------------------------------------------------- 4125 */ 4126 4127 if ((lp = tp->lp[xp->sc_link->lun]) && (lp->usetags)) { 4128 /* 4129 ** assign a tag to this ccb! 4130 */ 4131 while (!cp->tag) { 4132 ccb_p cp2 = lp->next_ccb; 4133 lp->lasttag = lp->lasttag % 255 + 1; 4134 while (cp2 && cp2->tag != lp->lasttag) 4135 cp2 = cp2->next_ccb; 4136 if (cp2) continue; 4137 cp->tag=lp->lasttag; 4138 if (DEBUG_FLAGS & DEBUG_TAGS) { 4139 PRINT_ADDR(xp); 4140 printf ("using tag #%d.\n", cp->tag); 4141 }; 4142 }; 4143 } else { 4144 cp->tag=0; 4145 }; 4146 4147 /*---------------------------------------------------- 4148 ** 4149 ** Build the identify / tag / sdtr message 4150 ** 4151 **---------------------------------------------------- 4152 */ 4153 4154 idmsg = M_IDENTIFY | xp->sc_link->lun; 4155 if ((cp!=np->ccb) && (np->disc)) 4156 idmsg |= 0x40; 4157 4158 msgptr = cp->scsi_smsg; 4159 msglen = 0; 4160 msgptr[msglen++] = idmsg; 4161 4162 if (cp->tag) { 4163 char tag; 4164 4165 tag = np->order; 4166 if (tag == 0) { 4167 /* 4168 ** Ordered write ops, unordered read ops. 4169 */ 4170 switch (cmd->opcode) { 4171 case 0x08: /* READ_SMALL (6) */ 4172 case 0x28: /* READ_BIG (10) */ 4173 case 0xa8: /* READ_HUGE (12) */ 4174 tag = M_SIMPLE_TAG; 4175 break; 4176 default: 4177 tag = M_ORDERED_TAG; 4178 } 4179 } 4180 msgptr[msglen++] = tag; 4181 msgptr[msglen++] = cp -> tag; 4182 } 4183 4184 switch (nego) { 4185 case NS_SYNC: 4186 msgptr[msglen++] = M_EXTENDED; 4187 msgptr[msglen++] = 3; 4188 msgptr[msglen++] = M_X_SYNC_REQ; 4189 msgptr[msglen++] = tp->minsync; 4190 msgptr[msglen++] = tp->maxoffs; 4191 if (DEBUG_FLAGS & DEBUG_NEGO) { 4192 PRINT_ADDR(cp->xfer); 4193 printf ("sync msgout: "); 4194 ncr_show_msg (&cp->scsi_smsg [msglen-5]); 4195 printf (".\n"); 4196 }; 4197 break; 4198 case NS_WIDE: 4199 msgptr[msglen++] = M_EXTENDED; 4200 msgptr[msglen++] = 2; 4201 msgptr[msglen++] = M_X_WIDE_REQ; 4202 msgptr[msglen++] = tp->usrwide; 4203 if (DEBUG_FLAGS & DEBUG_NEGO) { 4204 PRINT_ADDR(cp->xfer); 4205 printf ("wide msgout: "); 4206 ncr_show_msg (&cp->scsi_smsg [msglen-4]); 4207 printf (".\n"); 4208 }; 4209 break; 4210 }; 4211 4212 /*---------------------------------------------------- 4213 ** 4214 ** Build the identify message for getcc. 4215 ** 4216 **---------------------------------------------------- 4217 */ 4218 4219 cp -> scsi_smsg2 [0] = idmsg; 4220 msglen2 = 1; 4221 4222 /*---------------------------------------------------- 4223 ** 4224 ** Build the data descriptors 4225 ** 4226 **---------------------------------------------------- 4227 */ 4228 4229 segments = ncr_scatter (&cp->phys, (vm_offset_t) xp->data, 4230 (vm_size_t) xp->datalen); 4231 4232 if (segments < 0) { 4233 xp->error = XS_DRIVER_STUFFUP; 4234 ncr_free_ccb(np, cp, flags); 4235 splx(oldspl); 4236 return(COMPLETE); 4237 }; 4238 4239 /*---------------------------------------------------- 4240 ** 4241 ** Set the SAVED_POINTER. 4242 ** 4243 **---------------------------------------------------- 4244 */ 4245 4246 if (flags & SCSI_DATA_IN) { 4247 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in); 4248 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16; 4249 } else if (flags & SCSI_DATA_OUT) { 4250 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out); 4251 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16; 4252 } else { 4253 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data); 4254 cp->phys.header.goalp = cp->phys.header.savep; 4255 }; 4256 cp->phys.header.lastp = cp->phys.header.savep; 4257 4258 4259 /*---------------------------------------------------- 4260 ** 4261 ** fill in ccb 4262 ** 4263 **---------------------------------------------------- 4264 ** 4265 ** 4266 ** physical -> virtual backlink 4267 ** Generic SCSI command 4268 */ 4269 cp->phys.header.cp = cp; 4270 /* 4271 ** Startqueue 4272 */ 4273 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select); 4274 cp->phys.header.launch.l_cmd = SCR_JUMP; 4275 /* 4276 ** select 4277 */ 4278 cp->phys.select.sel_id = xp->sc_link->target; 4279 cp->phys.select.sel_scntl3 = tp->wval; 4280 cp->phys.select.sel_sxfer = tp->sval; 4281 /* 4282 ** message 4283 */ 4284 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg); 4285 cp->phys.smsg.size = msglen; 4286 4287 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2); 4288 cp->phys.smsg2.size = msglen2; 4289 /* 4290 ** command 4291 */ 4292 cp->phys.cmd.addr = vtophys (cmd); 4293 cp->phys.cmd.size = xp->cmdlen; 4294 /* 4295 ** sense command 4296 */ 4297 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd); 4298 cp->phys.scmd.size = 6; 4299 /* 4300 ** patch requested size into sense command 4301 */ 4302 cp->sensecmd[0] = 0x03; 4303 cp->sensecmd[1] = xp->sc_link->lun << 5; 4304 cp->sensecmd[4] = sizeof(struct scsi_sense_data); 4305 if (xp->req_sense_length) 4306 cp->sensecmd[4] = xp->req_sense_length; 4307 /* 4308 ** sense data 4309 */ 4310 cp->phys.sense.addr = vtophys (&cp->xfer->sense); 4311 cp->phys.sense.size = sizeof(struct scsi_sense_data); 4312 /* 4313 ** status 4314 */ 4315 cp->actualquirks = tp->quirks; 4316 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY; 4317 cp->scsi_status = S_ILLEGAL; 4318 cp->parity_status = 0; 4319 4320 cp->xerr_status = XE_OK; 4321 cp->sync_status = tp->sval; 4322 cp->nego_status = nego; 4323 cp->wide_status = tp->wval; 4324 4325 /*---------------------------------------------------- 4326 ** 4327 ** Critical region: start this job. 4328 ** 4329 **---------------------------------------------------- 4330 */ 4331 4332 /* 4333 ** reselect pattern and activate this job. 4334 */ 4335 4336 cp->jump_ccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag))); 4337 cp->tlimit = time.tv_sec + xp->timeout / 1000 + 2; 4338 cp->magic = CCB_MAGIC; 4339 4340 /* 4341 ** insert into start queue. 4342 */ 4343 4344 qidx = np->squeueput + 1; 4345 if (qidx >= MAX_START) qidx=0; 4346 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle); 4347 np->squeue [np->squeueput] = CCB_PHYS (cp, phys); 4348 np->squeueput = qidx; 4349 4350 if(DEBUG_FLAGS & DEBUG_QUEUE) 4351 printf ("%s: queuepos=%d tryoffset=%d.\n", ncr_name (np), 4352 np->squeueput, 4353 (unsigned)(np->script->startpos[0]- 4354 (NCB_SCRIPT_PHYS (np, tryloop)))); 4355 4356 /* 4357 ** Script processor may be waiting for reselect. 4358 ** Wake it up. 4359 */ 4360 OUTB (nc_istat, SIGP); 4361 4362 /* 4363 ** and reenable interrupts 4364 */ 4365 splx (oldspl); 4366 4367 /* 4368 ** If interrupts are enabled, return now. 4369 ** Command is successfully queued. 4370 */ 4371 4372#ifdef __NetBSD__ 4373 if (!(flags & SCSI_POLL)) { 4374#else /* !__NetBSD__ */ 4375 if (!(flags & SCSI_NOMASK)) { 4376#endif /* __NetBSD__ */ 4377 if (np->lasttime) { 4378 if(DEBUG_FLAGS & DEBUG_TINY) printf ("Q"); 4379 return(SUCCESSFULLY_QUEUED); 4380 }; 4381 }; 4382 4383 /*---------------------------------------------------- 4384 ** 4385 ** Interrupts not yet enabled - have to poll. 4386 ** 4387 **---------------------------------------------------- 4388 */ 4389 4390 if (DEBUG_FLAGS & DEBUG_POLL) printf("P"); 4391 4392 for (i=xp->timeout; i && !(xp->flags & ITSDONE);i--) { 4393 if ((DEBUG_FLAGS & DEBUG_POLL) && (cp->host_status)) 4394 printf ("%c", (cp->host_status & 0xf) + '0'); 4395 DELAY (1000); 4396 ncr_exception (np); 4397 }; 4398 4399 /* 4400 ** Abort if command not done. 4401 */ 4402 if (!(xp->flags & ITSDONE)) { 4403 printf ("%s: aborting job ...\n", ncr_name (np)); 4404 OUTB (nc_istat, CABRT); 4405 DELAY (100000); 4406 OUTB (nc_istat, SIGP); 4407 ncr_exception (np); 4408 }; 4409 4410 if (!(xp->flags & ITSDONE)) { 4411 printf ("%s: abortion failed at %x.\n", 4412 ncr_name (np), (unsigned) INL(nc_dsp)); 4413 ncr_init (np, "timeout", HS_TIMEOUT); 4414 }; 4415 4416 if (!(xp->flags & ITSDONE)) { 4417 cp-> host_status = HS_SEL_TIMEOUT; 4418 ncr_complete (np, cp); 4419 }; 4420 4421 if (DEBUG_FLAGS & DEBUG_RESULT) { 4422 printf ("%s: result: %x %x.\n", 4423 ncr_name (np), cp->host_status, cp->scsi_status); 4424 }; 4425#ifdef __NetBSD__ 4426 if (!(flags & SCSI_POLL)) 4427#else /* !__NetBSD__ */ 4428 if (!(flags & SCSI_NOMASK)) 4429#endif /* __NetBSD__ */ 4430 return (SUCCESSFULLY_QUEUED); 4431 switch (xp->error) { 4432 case 0 : return (COMPLETE); 4433 case XS_BUSY: return (TRY_AGAIN_LATER); 4434 }; 4435 return (COMPLETE); 4436} 4437 4438/*========================================================== 4439** 4440** 4441** Complete execution of a SCSI command. 4442** Signal completion to the generic SCSI driver. 4443** 4444** 4445**========================================================== 4446*/ 4447 4448void ncr_complete (ncb_p np, ccb_p cp) 4449{ 4450 struct scsi_xfer * xp; 4451 tcb_p tp; 4452 lcb_p lp; 4453 4454 /* 4455 ** Sanity check 4456 */ 4457 4458 if (!cp || (cp->magic!=CCB_MAGIC) || !cp->xfer) return; 4459 cp->magic = 1; 4460 cp->tlimit= 0; 4461 4462 /* 4463 ** No Reselect anymore. 4464 */ 4465 cp->jump_ccb.l_cmd = (SCR_JUMP); 4466 4467 /* 4468 ** No starting. 4469 */ 4470 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle); 4471 4472 /* 4473 ** timestamp 4474 */ 4475 ncb_profile (np, cp); 4476 4477 if (DEBUG_FLAGS & DEBUG_TINY) 4478 printf ("CCB=%x STAT=%x/%x\n", (unsigned)cp & 0xfff, 4479 cp->host_status,cp->scsi_status); 4480 4481 xp = cp->xfer; 4482 cp->xfer = NULL; 4483 tp = &np->target[xp->sc_link->target]; 4484 lp = tp->lp[xp->sc_link->lun]; 4485 4486 /* 4487 ** We donnot queue more than 1 ccb per target 4488 ** with negotiation at any time. If this ccb was 4489 ** used for negotiation, clear this info in the tcb. 4490 */ 4491 4492 if (cp == tp->nego_cp) 4493 tp->nego_cp = 0; 4494 4495 /* 4496 ** Check for parity errors. 4497 */ 4498 4499 if (cp->parity_status) { 4500 PRINT_ADDR(xp); 4501 printf ("%d parity error(s), fallback.\n", cp->parity_status); 4502 /* 4503 ** fallback to asynch transfer. 4504 */ 4505 tp->usrsync=255; 4506 tp->period = 0; 4507 }; 4508 4509 /* 4510 ** Check for extended errors. 4511 */ 4512 4513 if (cp->xerr_status != XE_OK) { 4514 PRINT_ADDR(xp); 4515 switch (cp->xerr_status) { 4516 case XE_EXTRA_DATA: 4517 printf ("extraneous data discarded.\n"); 4518 break; 4519 case XE_BAD_PHASE: 4520 printf ("illegal scsi phase (4/5).\n"); 4521 break; 4522 default: 4523 printf ("extended error %d.\n", cp->xerr_status); 4524 break; 4525 }; 4526 if (cp->host_status==HS_COMPLETE) 4527 cp->host_status = HS_FAIL; 4528 }; 4529 4530 /* 4531 ** Check the status. 4532 */ 4533#ifdef __NetBSD__ 4534 if (xp->error != XS_NOERROR) { 4535 4536 /* 4537 ** Don't override the error value. 4538 */ 4539 } else 4540#endif /* __NetBSD__ */ 4541 if ( (cp->host_status == HS_COMPLETE) 4542 && (cp->scsi_status == S_GOOD)) { 4543 4544 /* 4545 ** All went well. 4546 */ 4547 4548 xp->resid = 0; 4549 4550 /* 4551 ** if (cp->phys.header.lastp != cp->phys.header.goalp)... 4552 ** 4553 ** @RESID@ 4554 ** Could dig out the correct value for resid, 4555 ** but it would be quite complicated. 4556 ** 4557 ** The ah1542.c driver sets it to 0 too ... 4558 */ 4559 4560 /* 4561 ** Try to assign a ccb to this nexus 4562 */ 4563 ncr_alloc_ccb (np, xp->sc_link->target, xp->sc_link->lun); 4564 4565 /* 4566 ** On inquire cmd (0x12) save some data. 4567 */ 4568 if (xp->cmd->opcode == 0x12 && xp->sc_link->lun == 0) { 4569 bcopy ( xp->data, 4570 &tp->inqdata, 4571 sizeof (tp->inqdata)); 4572 /* 4573 ** prepare negotiation of synch and wide. 4574 */ 4575 ncr_negotiate (np, tp); 4576 4577 /* 4578 ** force quirks update before next command start 4579 */ 4580 tp->quirks |= QUIRK_UPDATE; 4581 }; 4582 4583 /* 4584 ** Announce changes to the generic driver 4585 */ 4586 if (lp) { 4587 if (lp->reqlink != lp->actlink) 4588 ncr_opennings (np, lp, xp); 4589 }; 4590 4591 tp->bytes += xp->datalen; 4592 tp->transfers ++; 4593#ifndef __NetBSD__ 4594 } else if (xp->flags & SCSI_ERR_OK) { 4595 4596 /* 4597 ** Not correct, but errors expected. 4598 */ 4599 xp->resid = 0; 4600#endif /* !__NetBSD__ */ 4601 } else if ((cp->host_status == HS_COMPLETE) 4602 && (cp->scsi_status == (S_SENSE|S_GOOD))) { 4603 4604 /* 4605 ** Check condition code 4606 */ 4607 xp->error = XS_SENSE; 4608 4609 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { 4610 u_char * p = (u_char*) & xp->sense; 4611 int i; 4612 printf ("\n%s: sense data:", ncr_name (np)); 4613 for (i=0; i<14; i++) printf (" %x", *p++); 4614 printf (".\n"); 4615 }; 4616 4617 } else if ((cp->host_status == HS_COMPLETE) 4618 && (cp->scsi_status == S_BUSY)) { 4619 4620 /* 4621 ** Target is busy. 4622 */ 4623 xp->error = XS_BUSY; 4624 4625 } else if (cp->host_status == HS_SEL_TIMEOUT) { 4626 4627 /* 4628 ** Device failed selection 4629 */ 4630 xp->error = XS_SELTIMEOUT; 4631 } else if(cp->host_status == HS_TIMEOUT) { 4632 4633 /* 4634 ** No response 4635 */ 4636 xp->error = XS_TIMEOUT; 4637 4638 } else { 4639 4640 /* 4641 ** Other protocol messes 4642 */ 4643 PRINT_ADDR(xp); 4644 printf ("COMMAND FAILED (%x %x) @%x.\n", 4645 cp->host_status, cp->scsi_status, (unsigned)cp); 4646 4647 xp->error = XS_TIMEOUT; 4648 } 4649 4650 xp->flags |= ITSDONE; 4651 4652 /* 4653 ** trace output 4654 */ 4655 4656 if (tp->usrflag & UF_TRACE) { 4657 u_char * p; 4658 int i; 4659 PRINT_ADDR(xp); 4660 printf (" CMD:"); 4661 p = (u_char*) &xp->cmd->opcode; 4662 for (i=0; i<xp->cmdlen; i++) printf (" %x", *p++); 4663 4664 if (cp->host_status==HS_COMPLETE) { 4665 switch (cp->scsi_status) { 4666 case S_GOOD: 4667 printf (" GOOD"); 4668 break; 4669 case S_CHECK_COND: 4670 printf (" SENSE:"); 4671 p = (u_char*) &xp->sense; 4672 for (i=0; i<xp->req_sense_length; i++) 4673 printf (" %x", *p++); 4674 break; 4675 default: 4676 printf (" STAT: %x\n", cp->scsi_status); 4677 break; 4678 }; 4679 } else printf (" HOSTERROR: %x", cp->host_status); 4680 printf ("\n"); 4681 }; 4682 4683 /* 4684 ** Free this ccb 4685 */ 4686 ncr_free_ccb (np, cp, xp->flags); 4687 4688 /* 4689 ** signal completion to generic driver. 4690 */ 4691 scsi_done (xp); 4692} 4693 4694/*========================================================== 4695** 4696** 4697** Signal all (or one) control block done. 4698** 4699** 4700**========================================================== 4701*/ 4702 4703void ncr_wakeup (ncb_p np, u_long code) 4704{ 4705 /* 4706 ** Starting at the default ccb and following 4707 ** the links, complete all jobs with a 4708 ** host_status greater than "disconnect". 4709 ** 4710 ** If the "code" parameter is not zero, 4711 ** complete all jobs that are not IDLE. 4712 */ 4713 4714 ccb_p cp = np->ccb; 4715 while (cp) { 4716 switch (cp->host_status) { 4717 4718 case HS_IDLE: 4719 break; 4720 4721 case HS_DISCONNECT: 4722 if(DEBUG_FLAGS & DEBUG_TINY) printf ("D"); 4723 /* fall through */ 4724 4725 case HS_BUSY: 4726 case HS_NEGOTIATE: 4727 if (!code) break; 4728 cp->host_status = code; 4729 4730 /* fall through */ 4731 4732 default: 4733 ncr_complete (np, cp); 4734 break; 4735 }; 4736 cp = cp -> link_ccb; 4737 }; 4738} 4739 4740/*========================================================== 4741** 4742** 4743** Start NCR chip. 4744** 4745** 4746**========================================================== 4747*/ 4748 4749void ncr_init (ncb_p np, char * msg, u_long code) 4750{ 4751 int i; 4752 u_long usrsync; 4753 u_char usrwide; 4754 4755 /* 4756 ** Reset chip. 4757 */ 4758 4759 OUTB (nc_istat, SRST); 4760 DELAY (1000); 4761 4762 /* 4763 ** Message. 4764 */ 4765 4766 if (msg) printf ("%s: restart (%s).\n", ncr_name (np), msg); 4767 4768 /* 4769 ** Clear Start Queue 4770 */ 4771 4772 for (i=0;i<MAX_START;i++) 4773 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle); 4774 4775 /* 4776 ** Start at first entry. 4777 */ 4778 4779 np->squeueput = 0; 4780 np->script->startpos[0] = NCB_SCRIPT_PHYS (np, tryloop); 4781 np->script->start0 [0] = SCR_INT ^ IFFALSE (0); 4782 4783 /* 4784 ** Wakeup all pending jobs. 4785 */ 4786 4787 ncr_wakeup (np, code); 4788 4789 /* 4790 ** Init chip. 4791 */ 4792 4793 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort ... */ 4794 OUTB (nc_scntl0, 0xca ); /* full arb., ena parity, par->ATN */ 4795 OUTB (nc_scntl1, 0x00 ); /* odd parity, and remove CRST!! */ 4796 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */ 4797 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */ 4798 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */ 4799 OUTB (nc_istat , SIGP ); /* Signal Process */ 4800 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */ 4801 OUTB (nc_dcntl , np->rv_dcntl); 4802 OUTB (nc_ctest3, np->rv_ctest3); 4803 OUTB (nc_ctest5, np->rv_ctest5); 4804 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */ 4805 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */ 4806 OUTB (nc_stest3, TE ); /* TolerANT enable */ 4807 OUTB (nc_stime0, 0x0b ); /* HTH = disabled, STO = 0.1 sec. */ 4808 4809 if (bootverbose) { 4810 printf ("\tACTUAL values:SCNTL3:%02x DMODE:%02x DCNTL:%02x\n", 4811 np->rv_scntl3, np->rv_dmode, np->rv_dcntl); 4812 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n", 4813 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 4814 } 4815 4816 /* 4817 ** Enable GPIO0 pin for writing if LED support. 4818 */ 4819 4820 if (np->features & FE_LED0) { 4821 OUTOFFB (nc_gpcntl, 0x01); 4822 } 4823 4824 /* 4825 ** Reinitialize usrsync. 4826 ** Have to renegotiate synch mode. 4827 */ 4828 4829 usrsync = 255; 4830 if (SCSI_NCR_DFLT_SYNC) { 4831 usrsync = SCSI_NCR_DFLT_SYNC; 4832 if (usrsync > np->maxsync) 4833 usrsync = np->maxsync; 4834 if (usrsync < np->minsync) 4835 usrsync = np->minsync; 4836 }; 4837 4838 /* 4839 ** Reinitialize usrwide. 4840 ** Have to renegotiate wide mode. 4841 */ 4842 4843 usrwide = (SCSI_NCR_MAX_WIDE); 4844 if (usrwide > np->maxwide) usrwide=np->maxwide; 4845 4846 /* 4847 ** Disable disconnects. 4848 */ 4849 4850 np->disc = 0; 4851 4852 /* 4853 ** Fill in target structure. 4854 */ 4855 4856 for (i=0;i<MAX_TARGET;i++) { 4857 tcb_p tp = &np->target[i]; 4858 4859 tp->sval = 0; 4860 tp->wval = np->rv_scntl3; 4861 4862 tp->usrsync = usrsync; 4863 tp->usrwide = usrwide; 4864 4865 ncr_negotiate (np, tp); 4866 } 4867 4868 /* 4869 ** enable ints 4870 */ 4871 4872 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST); 4873 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID); 4874 4875 /* 4876 ** Start script processor. 4877 */ 4878 4879 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start)); 4880} 4881 4882/*========================================================== 4883** 4884** Prepare the negotiation values for wide and 4885** synchronous transfers. 4886** 4887**========================================================== 4888*/ 4889 4890static void ncr_negotiate (struct ncb* np, struct tcb* tp) 4891{ 4892 /* 4893 ** minsync unit is 4ns ! 4894 */ 4895 4896 u_long minsync = tp->usrsync; 4897 4898 /* 4899 ** if not scsi 2 4900 ** don't believe FAST! 4901 */ 4902 4903 if ((minsync < 50) && (tp->inqdata[2] & 0x0f) < 2) 4904 minsync=50; 4905 4906 /* 4907 ** our limit .. 4908 */ 4909 4910 if (minsync < np->minsync) 4911 minsync = np->minsync; 4912 4913 /* 4914 ** divider limit 4915 */ 4916 4917 if (minsync > np->maxsync) 4918 minsync = 255; 4919 4920 tp->minsync = minsync; 4921 tp->maxoffs = (minsync<255 ? np->maxoffs : 0); 4922 4923 /* 4924 ** period=0: has to negotiate sync transfer 4925 */ 4926 4927 tp->period=0; 4928 4929 /* 4930 ** widedone=0: has to negotiate wide transfer 4931 */ 4932 tp->widedone=0; 4933} 4934 4935/*========================================================== 4936** 4937** Get clock factor and sync divisor for a given 4938** synchronous factor period. 4939** Returns the clock factor (in sxfer) and scntl3 4940** synchronous divisor field. 4941** 4942**========================================================== 4943*/ 4944 4945static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p) 4946{ 4947 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */ 4948 int div = np->clock_divn; /* Number of divisors supported */ 4949 u_long fak; /* Sync factor in sxfer */ 4950 u_long per; /* Period in tenths of ns */ 4951 u_long kpc; /* (per * clk) */ 4952 4953 /* 4954 ** Compute the synchronous period in tenths of nano-seconds 4955 */ 4956 if (sfac <= 10) per = 250; 4957 else if (sfac == 11) per = 303; 4958 else if (sfac == 12) per = 500; 4959 else per = 40 * sfac; 4960 4961 /* 4962 ** Look for the greatest clock divisor that allows an 4963 ** input speed faster than the period. 4964 */ 4965 kpc = per * clk; 4966 while (--div >= 0) 4967 if (kpc >= (div_10M[div] * 4)) break; 4968 4969 /* 4970 ** Calculate the lowest clock factor that allows an output 4971 ** speed not faster than the period. 4972 */ 4973 fak = (kpc - 1) / div_10M[div] + 1; 4974 4975#if 0 /* You can #if 1 if you think this optimization is usefull */ 4976 4977 per = (fak * div_10M[div]) / clk; 4978 4979 /* 4980 ** Why not to try the immediate lower divisor and to choose 4981 ** the one that allows the fastest output speed ? 4982 ** We dont want input speed too much greater than output speed. 4983 */ 4984 if (div >= 1 && fak < 6) { 4985 u_long fak2, per2; 4986 fak2 = (kpc - 1) / div_10M[div-1] + 1; 4987 per2 = (fak2 * div_10M[div-1]) / clk; 4988 if (per2 < per && fak2 <= 6) { 4989 fak = fak2; 4990 per = per2; 4991 --div; 4992 } 4993 } 4994#endif 4995 4996 if (fak < 4) fak = 4; /* Should never happen, too bad ... */ 4997 4998 /* 4999 ** Compute and return sync parameters for the ncr 5000 */ 5001 *fakp = fak - 4; 5002 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0); 5003} 5004 5005/*========================================================== 5006** 5007** Switch sync mode for current job and it's target 5008** 5009**========================================================== 5010*/ 5011 5012static void ncr_setsync (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer) 5013{ 5014 struct scsi_xfer *xp; 5015 tcb_p tp; 5016 int div; 5017 u_char target = INB (nc_ctest0) & 0x0f; 5018 5019 assert (cp); 5020 if (!cp) return; 5021 5022 xp = cp->xfer; 5023 assert (xp); 5024 if (!xp) return; 5025 assert (target == (xp->sc_link->target & 0x0f)); 5026 5027 tp = &np->target[target]; 5028 5029 if (!scntl3 || !(sxfer & 0x1f)) 5030 scntl3 = np->rv_scntl3; 5031 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07); 5032 5033 /* 5034 ** Deduce the value of controller sync period from scntl3. 5035 ** period is in tenths of nano-seconds. 5036 */ 5037 5038 div = ((scntl3 >> 4) & 0x7); 5039 if ((sxfer & 0x1f) && div) 5040 tp->period = (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz; 5041 else 5042 tp->period = 0xffff; 5043 5044 /* 5045 ** Stop there if sync parameters are unchanged 5046 */ 5047 5048 if (tp->sval == sxfer && tp->wval == scntl3) return; 5049 tp->sval = sxfer; 5050 tp->wval = scntl3; 5051 5052 /* 5053 ** Bells and whistles ;-) 5054 */ 5055 PRINT_ADDR(xp); 5056 if (sxfer & 0x1f) { 5057 unsigned f10 = 100000 << (tp->widedone ? tp->widedone -1 : 0); 5058 unsigned mb10 = (f10 + tp->period/2) / tp->period; 5059 /* 5060 ** Disable extended Sreq/Sack filtering 5061 */ 5062 if (tp->period <= 2000) OUTOFFB (nc_stest2, EXT); 5063 printf ("%d.%d MB/s (%d ns, offset %d)\n", 5064 mb10 / 10, mb10 % 10, tp->period / 10, sxfer & 0x1f); 5065 } else printf ("asynchronous.\n"); 5066 5067 /* 5068 ** set actual value and sync_status 5069 */ 5070 OUTB (nc_sxfer, sxfer); 5071 np->sync_st = sxfer; 5072 OUTB (nc_scntl3, scntl3); 5073 np->wide_st = scntl3; 5074 5075 /* 5076 ** patch ALL ccbs of this target. 5077 */ 5078 for (cp = np->ccb; cp; cp = cp->link_ccb) { 5079 if (!cp->xfer) continue; 5080 if (cp->xfer->sc_link->target != target) continue; 5081 cp->sync_status = sxfer; 5082 cp->wide_status = scntl3; 5083 }; 5084} 5085 5086/*========================================================== 5087** 5088** Switch wide mode for current job and it's target 5089** SCSI specs say: a SCSI device that accepts a WDTR 5090** message shall reset the synchronous agreement to 5091** asynchronous mode. 5092** 5093**========================================================== 5094*/ 5095 5096static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack) 5097{ 5098 struct scsi_xfer *xp; 5099 u_short target = INB (nc_ctest0) & 0x0f; 5100 tcb_p tp; 5101 u_char scntl3; 5102 u_char sxfer; 5103 5104 assert (cp); 5105 if (!cp) return; 5106 5107 xp = cp->xfer; 5108 assert (xp); 5109 if (!xp) return; 5110 assert (target == (xp->sc_link->target & 0x0f)); 5111 5112 tp = &np->target[target]; 5113 tp->widedone = wide+1; 5114 scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0); 5115 5116 sxfer = ack ? 0 : tp->sval; 5117 5118 /* 5119 ** Stop there if sync/wide parameters are unchanged 5120 */ 5121 if (tp->sval == sxfer && tp->wval == scntl3) return; 5122 tp->sval = sxfer; 5123 tp->wval = scntl3; 5124 5125 /* 5126 ** Bells and whistles ;-) 5127 */ 5128 PRINT_ADDR(xp); 5129 if (scntl3 & EWS) 5130 printf ("WIDE SCSI (16 bit) enabled"); 5131 else 5132 printf ("WIDE SCSI disabled"); 5133 5134 /* 5135 ** set actual value and sync_status 5136 */ 5137 OUTB (nc_sxfer, sxfer); 5138 np->sync_st = sxfer; 5139 OUTB (nc_scntl3, scntl3); 5140 np->wide_st = scntl3; 5141 5142 /* 5143 ** patch ALL ccbs of this target. 5144 */ 5145 for (cp = np->ccb; cp; cp = cp->link_ccb) { 5146 if (!cp->xfer) continue; 5147 if (cp->xfer->sc_link->target != target) continue; 5148 cp->sync_status = sxfer; 5149 cp->wide_status = scntl3; 5150 }; 5151} 5152 5153/*========================================================== 5154** 5155** Switch tagged mode for a target. 5156** 5157**========================================================== 5158*/ 5159 5160static void ncr_setmaxtags (tcb_p tp, u_long usrtags) 5161{ 5162 int l; 5163 for (l=0; l<MAX_LUN; l++) { 5164 lcb_p lp; 5165 if (!tp) break; 5166 lp=tp->lp[l]; 5167 if (!lp) continue; 5168 ncr_settags (tp, lp, usrtags); 5169 }; 5170} 5171 5172static void ncr_settags (tcb_p tp, lcb_p lp, u_long usrtags) 5173{ 5174 u_char reqtags, tmp; 5175 5176 if ((!tp) || (!lp)) return; 5177 5178 /* 5179 ** only devices capable of tagges commands 5180 ** only disk devices 5181 ** only if enabled by user .. 5182 */ 5183 if ((tp->inqdata[0] & 0x1f) != 0x00 5184 || (tp->inqdata[7] & INQ7_QUEUE) == 0 5185 || (tp->quirks & QUIRK_NOTAGS) != 0) { 5186 usrtags=0; 5187 } 5188 if (usrtags) { 5189 reqtags = usrtags; 5190 if (lp->actlink <= 1) 5191 lp->usetags=reqtags; 5192 } else { 5193 reqtags = 1; 5194 if (lp->actlink <= 1) 5195 lp->usetags=0; 5196 }; 5197 5198 /* 5199 ** don't announce more than available. 5200 */ 5201 tmp = lp->actccbs; 5202 if (tmp > reqtags) tmp = reqtags; 5203 lp->reqlink = tmp; 5204 5205 /* 5206 ** don't discard if announced. 5207 */ 5208 tmp = lp->actlink; 5209 if (tmp < reqtags) tmp = reqtags; 5210 lp->reqccbs = tmp; 5211 if (lp->reqlink < lp->reqccbs) 5212 lp->reqlink = lp->reqccbs; 5213} 5214 5215/*---------------------------------------------------- 5216** 5217** handle user commands 5218** 5219**---------------------------------------------------- 5220*/ 5221 5222static void ncr_usercmd (ncb_p np) 5223{ 5224 u_char t; 5225 tcb_p tp; 5226 5227 switch (np->user.cmd) { 5228 5229 case 0: return; 5230 5231 case UC_SETSYNC: 5232 for (t=0; t<MAX_TARGET; t++) { 5233 if (!((np->user.target>>t)&1)) continue; 5234 tp = &np->target[t]; 5235 tp->usrsync = np->user.data; 5236 ncr_negotiate (np, tp); 5237 }; 5238 break; 5239 5240 case UC_SETTAGS: 5241 if (np->user.data > MAX_TAGS) 5242 break; 5243 for (t=0; t<MAX_TARGET; t++) { 5244 if (!((np->user.target>>t)&1)) continue; 5245 tp = &np->target[t]; 5246 tp->usrtags = np->user.data; 5247 ncr_setmaxtags (tp, tp->usrtags); 5248 }; 5249 break; 5250 5251 case UC_SETDEBUG: 5252 ncr_debug = np->user.data; 5253 break; 5254 5255 case UC_SETORDER: 5256 np->order = np->user.data; 5257 break; 5258 5259 case UC_SETWIDE: 5260 for (t=0; t<MAX_TARGET; t++) { 5261 u_long size; 5262 if (!((np->user.target>>t)&1)) continue; 5263 tp = &np->target[t]; 5264 size = np->user.data; 5265 if (size > np->maxwide) size=np->maxwide; 5266 tp->usrwide = size; 5267 ncr_negotiate (np, tp); 5268 }; 5269 break; 5270 5271 case UC_SETFLAG: 5272 for (t=0; t<MAX_TARGET; t++) { 5273 if (!((np->user.target>>t)&1)) continue; 5274 tp = &np->target[t]; 5275 tp->usrflag = np->user.data; 5276 }; 5277 break; 5278 } 5279 np->user.cmd=0; 5280} 5281 5282 5283 5284 5285/*========================================================== 5286** 5287** 5288** ncr timeout handler. 5289** 5290** 5291**========================================================== 5292** 5293** Misused to keep the driver running when 5294** interrupts are not configured correctly. 5295** 5296**---------------------------------------------------------- 5297*/ 5298 5299static void ncr_timeout (void *arg) 5300{ 5301 ncb_p np = arg; 5302 u_long thistime = time.tv_sec; 5303 u_long step = np->ticks; 5304 u_long count = 0; 5305 long signed t; 5306 ccb_p cp; 5307 5308 if (np->lasttime != thistime) { 5309 /* 5310 ** block ncr interrupts 5311 */ 5312 int oldspl = splbio(); 5313 np->lasttime = thistime; 5314 5315 ncr_usercmd (np); 5316 5317 /*---------------------------------------------------- 5318 ** 5319 ** handle ncr chip timeouts 5320 ** 5321 ** Assumption: 5322 ** We have a chance to arbitrate for the 5323 ** SCSI bus at least every 10 seconds. 5324 ** 5325 **---------------------------------------------------- 5326 */ 5327 5328 t = thistime - np->heartbeat; 5329 5330 if (t<2) np->latetime=0; else np->latetime++; 5331 5332 if (np->latetime>2) { 5333 /* 5334 ** If there are no requests, the script 5335 ** processor will sleep on SEL_WAIT_RESEL. 5336 ** But we have to check whether it died. 5337 ** Let's try to wake it up. 5338 */ 5339 OUTB (nc_istat, SIGP); 5340 }; 5341 5342 /*---------------------------------------------------- 5343 ** 5344 ** handle ccb timeouts 5345 ** 5346 **---------------------------------------------------- 5347 */ 5348 5349 for (cp=np->ccb; cp; cp=cp->link_ccb) { 5350 /* 5351 ** look for timed out ccbs. 5352 */ 5353 if (!cp->host_status) continue; 5354 count++; 5355 if (cp->tlimit > thistime) continue; 5356 5357 /* 5358 ** Disable reselect. 5359 ** Remove it from startqueue. 5360 */ 5361 cp->jump_ccb.l_cmd = (SCR_JUMP); 5362 if (cp->phys.header.launch.l_paddr == 5363 NCB_SCRIPT_PHYS (np, select)) { 5364 printf ("%s: timeout ccb=%x (skip)\n", 5365 ncr_name (np), (unsigned)cp); 5366 cp->phys.header.launch.l_paddr 5367 = NCB_SCRIPT_PHYS (np, skip); 5368 }; 5369 5370 switch (cp->host_status) { 5371 5372 case HS_BUSY: 5373 case HS_NEGOTIATE: 5374 /* 5375 ** still in start queue ? 5376 */ 5377 if (cp->phys.header.launch.l_paddr == 5378 NCB_SCRIPT_PHYS (np, skip)) 5379 continue; 5380 5381 /* fall through */ 5382 case HS_DISCONNECT: 5383 cp->host_status=HS_TIMEOUT; 5384 }; 5385 cp->tag = 0; 5386 5387 /* 5388 ** wakeup this ccb. 5389 */ 5390 ncr_complete (np, cp); 5391 }; 5392 splx (oldspl); 5393 } 5394 5395 timeout (ncr_timeout, (caddr_t) np, step ? step : 1); 5396 5397 if (INB(nc_istat) & (INTF|SIP|DIP)) { 5398 5399 /* 5400 ** Process pending interrupts. 5401 */ 5402 5403 int oldspl = splbio (); 5404 if (DEBUG_FLAGS & DEBUG_TINY) printf ("{"); 5405 ncr_exception (np); 5406 if (DEBUG_FLAGS & DEBUG_TINY) printf ("}"); 5407 splx (oldspl); 5408 }; 5409} 5410 5411/*========================================================== 5412** 5413** 5414** ncr chip exception handler. 5415** 5416** 5417**========================================================== 5418*/ 5419 5420void ncr_exception (ncb_p np) 5421{ 5422 u_char istat, dstat; 5423 u_short sist; 5424 u_long dsp, dsa; 5425 int i, script_ofs; 5426 5427 /* 5428 ** interrupt on the fly ? 5429 */ 5430 while ((istat = INB (nc_istat)) & INTF) { 5431 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F "); 5432 OUTB (nc_istat, INTF); 5433 np->profile.num_fly++; 5434 ncr_wakeup (np, 0); 5435 }; 5436 if (!(istat & (SIP|DIP))) { 5437 return; 5438 } 5439 5440 /* 5441 ** Steinbach's Guideline for Systems Programming: 5442 ** Never test for an error condition you don't know how to handle. 5443 */ 5444 5445 sist = (istat & SIP) ? INW (nc_sist) : 0; 5446 dstat = (istat & DIP) ? INB (nc_dstat) : 0; 5447 np->profile.num_int++; 5448 5449 if (DEBUG_FLAGS & DEBUG_TINY) 5450 printf ("<%d|%x:%x|%x:%x>", 5451 INB(nc_scr0), 5452 dstat,sist, 5453 (unsigned)INL(nc_dsp), 5454 (unsigned)INL(nc_dbc)); 5455 if ((dstat==DFE) && (sist==PAR)) return; 5456 5457/*========================================================== 5458** 5459** First the normal cases. 5460** 5461**========================================================== 5462*/ 5463 /*------------------------------------------- 5464 ** SCSI reset 5465 **------------------------------------------- 5466 */ 5467 5468 if (sist & RST) { 5469 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET); 5470 return; 5471 }; 5472 5473 /*------------------------------------------- 5474 ** selection timeout 5475 ** 5476 ** IID excluded from dstat mask! 5477 ** (chip bug) 5478 **------------------------------------------- 5479 */ 5480 5481 if ((sist & STO) && 5482 !(sist & (GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5483 !(dstat & (MDPE|BF|ABRT|SIR))) { 5484 ncr_int_sto (np); 5485 return; 5486 }; 5487 5488 /*------------------------------------------- 5489 ** Phase mismatch. 5490 **------------------------------------------- 5491 */ 5492 5493 if ((sist & MA) && 5494 !(sist & (STO|GEN|HTH|SGE|UDC|RST|PAR)) && 5495 !(dstat & (MDPE|BF|ABRT|SIR|IID))) { 5496 ncr_int_ma (np, dstat); 5497 return; 5498 }; 5499 5500 /*---------------------------------------- 5501 ** move command with length 0 5502 **---------------------------------------- 5503 */ 5504 5505 if ((dstat & IID) && 5506 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5507 !(dstat & (MDPE|BF|ABRT|SIR)) && 5508 ((INL(nc_dbc) & 0xf8000000) == SCR_MOVE_TBL)) { 5509 /* 5510 ** Target wants more data than available. 5511 ** The "no_data" script will do it. 5512 */ 5513 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data)); 5514 return; 5515 }; 5516 5517 /*------------------------------------------- 5518 ** Programmed interrupt 5519 **------------------------------------------- 5520 */ 5521 5522 if ((dstat & SIR) && 5523 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5524 !(dstat & (MDPE|BF|ABRT|IID)) && 5525 (INB(nc_dsps) <= SIR_MAX)) { 5526 ncr_int_sir (np); 5527 return; 5528 }; 5529 5530 /*======================================== 5531 ** do the register dump 5532 **======================================== 5533 */ 5534 5535 if (time.tv_sec - np->regtime.tv_sec>10) { 5536 int i; 5537 gettime(&np->regtime); 5538 for (i=0; i<sizeof(np->regdump); i++) 5539 ((char*)&np->regdump)[i] = ((volatile char*)np->reg)[i]; 5540 np->regdump.nc_dstat = dstat; 5541 np->regdump.nc_sist = sist; 5542 }; 5543 5544 /*========================================= 5545 ** log message for real hard errors 5546 **========================================= 5547 5548 "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ (dsp:dbc)." 5549 " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf." 5550 5551 exception register: 5552 ds: dstat 5553 si: sist 5554 5555 SCSI bus lines: 5556 so: control lines as driver by NCR. 5557 si: control lines as seen by NCR. 5558 sd: scsi data lines as seen by NCR. 5559 5560 wide/fastmode: 5561 sxfer: (see the manual) 5562 scntl3: (see the manual) 5563 5564 current script command: 5565 dsp: script adress (relative to start of script). 5566 dbc: first word of script command. 5567 5568 First 16 register of the chip: 5569 r0..rf 5570 5571 ============================================= 5572 */ 5573 5574 dsp = (unsigned) INL (nc_dsp); 5575 dsa = (unsigned) INL (nc_dsa); 5576 5577 script_ofs = dsp - np->p_script; 5578 5579 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%x:%08x).\n", 5580 ncr_name (np), INB (nc_ctest0)&0x0f, dstat, sist, 5581 INB (nc_socl), INB (nc_sbcl), INB (nc_sbdl), 5582 INB (nc_sxfer),INB (nc_scntl3), script_ofs, 5583 (unsigned) INL (nc_dbc)); 5584 5585 if (((script_ofs & 3) == 0) && 5586 (unsigned)script_ofs < sizeof(struct script)) { 5587 printf ("\tscript cmd = %08x\n", 5588 *(ncrcmd *)((char*)np->script +script_ofs)); 5589 } 5590 5591 printf ("\treg:\t"); 5592 for (i=0; i<16;i++) 5593 printf (" %02x", ((volatile u_char*)np->reg)[i]); 5594 printf (".\n"); 5595 5596 /*---------------------------------------- 5597 ** clean up the dma fifo 5598 **---------------------------------------- 5599 */ 5600 5601 if ( (INB(nc_sstat0) & (ILF|ORF|OLF) ) || 5602 (INB(nc_sstat1) & (FF3210) ) || 5603 (INB(nc_sstat2) & (ILF1|ORF1|OLF1)) || /* wide .. */ 5604 !(dstat & DFE)) { 5605 printf ("%s: have to clear fifos.\n", ncr_name (np)); 5606 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 5607 OUTB (nc_ctest3, np->rv_ctest3 | CLF); 5608 /* clear dma fifo */ 5609 } 5610 5611 /*---------------------------------------- 5612 ** handshake timeout 5613 **---------------------------------------- 5614 */ 5615 5616 if (sist & HTH) { 5617 printf ("%s: handshake timeout\n", ncr_name(np)); 5618 OUTB (nc_scntl1, CRST); 5619 DELAY (1000); 5620 OUTB (nc_scntl1, 0x00); 5621 OUTB (nc_scr0, HS_FAIL); 5622 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup)); 5623 return; 5624 } 5625 5626 /*---------------------------------------- 5627 ** unexpected disconnect 5628 **---------------------------------------- 5629 */ 5630 5631 if ((sist & UDC) && 5632 !(sist & (STO|GEN|HTH|MA|SGE|RST|PAR)) && 5633 !(dstat & (MDPE|BF|ABRT|SIR|IID))) { 5634 OUTB (nc_scr0, HS_UNEXPECTED); 5635 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup)); 5636 return; 5637 }; 5638 5639 /*---------------------------------------- 5640 ** cannot disconnect 5641 **---------------------------------------- 5642 */ 5643 5644 if ((dstat & IID) && 5645 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5646 !(dstat & (MDPE|BF|ABRT|SIR)) && 5647 ((INL(nc_dbc) & 0xf8000000) == SCR_WAIT_DISC)) { 5648 /* 5649 ** Unexpected data cycle while waiting for disconnect. 5650 */ 5651 if (INB(nc_sstat2) & LDSC) { 5652 /* 5653 ** It's an early reconnect. 5654 ** Let's continue ... 5655 */ 5656 OUTB (nc_dcntl, np->rv_dcntl | STD); 5657 /* 5658 ** info message 5659 */ 5660 printf ("%s: INFO: LDSC while IID.\n", 5661 ncr_name (np)); 5662 return; 5663 }; 5664 printf ("%s: target %d doesn't release the bus.\n", 5665 ncr_name (np), INB (nc_ctest0)&0x0f); 5666 /* 5667 ** return without restarting the NCR. 5668 ** timeout will do the real work. 5669 */ 5670 return; 5671 }; 5672 5673 /*---------------------------------------- 5674 ** single step 5675 **---------------------------------------- 5676 */ 5677 5678 if ((dstat & SSI) && 5679 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5680 !(dstat & (MDPE|BF|ABRT|SIR|IID))) { 5681 OUTB (nc_dcntl, np->rv_dcntl | STD); 5682 return; 5683 }; 5684 5685/* 5686** @RECOVER@ HTH, SGE, ABRT. 5687** 5688** We should try to recover from these interrupts. 5689** They may occur if there are problems with synch transfers, or 5690** if targets are switched on or off while the driver is running. 5691*/ 5692 5693 if (sist & SGE) { 5694 /* clear scsi offsets */ 5695 OUTB (nc_ctest3, np->rv_ctest3 | CLF); 5696 } 5697 5698 /* 5699 ** Freeze controller to be able to read the messages. 5700 */ 5701 5702 if (DEBUG_FLAGS & DEBUG_FREEZE) { 5703 int i; 5704 unsigned char val; 5705 for (i=0; i<0x60; i++) { 5706 switch (i%16) { 5707 5708 case 0: 5709 printf ("%s: reg[%d0]: ", 5710 ncr_name(np),i/16); 5711 break; 5712 case 4: 5713 case 8: 5714 case 12: 5715 printf (" "); 5716 break; 5717 }; 5718 val = ((unsigned char*) np->vaddr) [i]; 5719 printf (" %x%x", val/16, val%16); 5720 if (i%16==15) printf (".\n"); 5721 }; 5722 5723 untimeout (ncr_timeout, (caddr_t) np); 5724 5725 printf ("%s: halted!\n", ncr_name(np)); 5726 /* 5727 ** don't restart controller ... 5728 */ 5729 OUTB (nc_istat, SRST); 5730 return; 5731 }; 5732 5733#ifdef NCR_FREEZE 5734 /* 5735 ** Freeze system to be able to read the messages. 5736 */ 5737 printf ("ncr: fatal error: system halted - press reset to reboot ..."); 5738 (void) splhigh(); 5739 for (;;); 5740#endif 5741 5742 /* 5743 ** sorry, have to kill ALL jobs ... 5744 */ 5745 5746 ncr_init (np, "fatal error", HS_FAIL); 5747} 5748 5749/*========================================================== 5750** 5751** ncr chip exception handler for selection timeout 5752** 5753**========================================================== 5754** 5755** There seems to be a bug in the 53c810. 5756** Although a STO-Interrupt is pending, 5757** it continues executing script commands. 5758** But it will fail and interrupt (IID) on 5759** the next instruction where it's looking 5760** for a valid phase. 5761** 5762**---------------------------------------------------------- 5763*/ 5764 5765void ncr_int_sto (ncb_p np) 5766{ 5767 u_long dsa, scratcha, diff; 5768 ccb_p cp; 5769 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T"); 5770 5771 /* 5772 ** look for ccb and set the status. 5773 */ 5774 5775 dsa = INL (nc_dsa); 5776 cp = np->ccb; 5777 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5778 cp = cp->link_ccb; 5779 5780 if (cp) { 5781 cp-> host_status = HS_SEL_TIMEOUT; 5782 ncr_complete (np, cp); 5783 }; 5784 5785 /* 5786 ** repair start queue 5787 */ 5788 5789 scratcha = INL (nc_scratcha); 5790 diff = scratcha - NCB_SCRIPT_PHYS (np, tryloop); 5791 5792/* assert ((diff <= MAX_START * 20) && !(diff % 20));*/ 5793 5794 if ((diff <= MAX_START * 20) && !(diff % 20)) { 5795 np->script->startpos[0] = scratcha; 5796 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start)); 5797 return; 5798 }; 5799 ncr_init (np, "selection timeout", HS_FAIL); 5800} 5801 5802/*========================================================== 5803** 5804** 5805** ncr chip exception handler for phase errors. 5806** 5807** 5808**========================================================== 5809** 5810** We have to construct a new transfer descriptor, 5811** to transfer the rest of the current block. 5812** 5813**---------------------------------------------------------- 5814*/ 5815 5816static void ncr_int_ma (ncb_p np, u_char dstat) 5817{ 5818 u_long dbc; 5819 u_long rest; 5820 u_long dsa; 5821 u_long dsp; 5822 u_long nxtdsp; 5823 u_long *vdsp; 5824 u_long oadr, olen; 5825 u_long *tblp, *newcmd; 5826 u_char cmd, sbcl, ss0, ss2, ctest5; 5827 u_short delta; 5828 ccb_p cp; 5829 5830 dsp = INL (nc_dsp); 5831 dsa = INL (nc_dsa); 5832 dbc = INL (nc_dbc); 5833 ss0 = INB (nc_sstat0); 5834 ss2 = INB (nc_sstat2); 5835 sbcl= INB (nc_sbcl); 5836 5837 cmd = dbc >> 24; 5838 rest= dbc & 0xffffff; 5839 5840 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0; 5841 if (ctest5 & DFS) 5842 delta=(((ctest5<<8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff; 5843 else 5844 delta=(INB (nc_dfifo) - rest) & 0x7f; 5845 5846 5847 /* 5848 ** The data in the dma fifo has not been transfered to 5849 ** the target -> add the amount to the rest 5850 ** and clear the data. 5851 ** Check the sstat2 register in case of wide transfer. 5852 */ 5853 5854 if (!(dstat & DFE)) rest += delta; 5855 if (ss0 & OLF) rest++; 5856 if (ss0 & ORF) rest++; 5857 if (INB(nc_scntl3) & EWS) { 5858 if (ss2 & OLF1) rest++; 5859 if (ss2 & ORF1) rest++; 5860 }; 5861 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */ 5862 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 5863 5864 /* 5865 ** locate matching cp 5866 */ 5867 dsa = INL (nc_dsa); 5868 cp = np->ccb; 5869 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5870 cp = cp->link_ccb; 5871 5872 if (!cp) { 5873 printf ("%s: SCSI phase error fixup: CCB already dequeued (0x%08lx)\n", 5874 ncr_name (np), (u_long) np->header.cp); 5875 return; 5876 } 5877 if (cp != np->header.cp) { 5878 printf ("%s: SCSI phase error fixup: CCB address mismatch (0x%08lx != 0x%08lx) np->ccb = 0x%08lx\n", 5879 ncr_name (np), (u_long) cp, (u_long) np->header.cp, np->ccb); 5880/* return;*/ 5881 } 5882 5883 /* 5884 ** find the interrupted script command, 5885 ** and the address at which to continue. 5886 */ 5887 5888 if (dsp == vtophys (&cp->patch[2])) { 5889 vdsp = &cp->patch[0]; 5890 nxtdsp = vdsp[3]; 5891 } else if (dsp == vtophys (&cp->patch[6])) { 5892 vdsp = &cp->patch[4]; 5893 nxtdsp = vdsp[3]; 5894 } else { 5895 vdsp = (u_long*) ((char*)np->script - np->p_script + dsp -8); 5896 nxtdsp = dsp; 5897 }; 5898 5899 /* 5900 ** log the information 5901 */ 5902 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) { 5903 printf ("P%x%x ",cmd&7, sbcl&7); 5904 printf ("RL=%d D=%d SS0=%x ", 5905 (unsigned) rest, (unsigned) delta, ss0); 5906 }; 5907 if (DEBUG_FLAGS & DEBUG_PHASE) { 5908 printf ("\nCP=%x CP2=%x DSP=%x NXT=%x VDSP=%x CMD=%x ", 5909 (unsigned)cp, (unsigned)np->header.cp, 5910 (unsigned)dsp, 5911 (unsigned)nxtdsp, (unsigned)vdsp, cmd); 5912 }; 5913 5914 /* 5915 ** get old startaddress and old length. 5916 */ 5917 5918 oadr = vdsp[1]; 5919 5920 if (cmd & 0x10) { /* Table indirect */ 5921 tblp = (u_long*) ((char*) &cp->phys + oadr); 5922 olen = tblp[0]; 5923 oadr = tblp[1]; 5924 } else { 5925 tblp = (u_long*) 0; 5926 olen = vdsp[0] & 0xffffff; 5927 }; 5928 5929 if (DEBUG_FLAGS & DEBUG_PHASE) { 5930 printf ("OCMD=%x\nTBLP=%x OLEN=%x OADR=%x\n", 5931 (unsigned) (vdsp[0] >> 24), 5932 (unsigned) tblp, 5933 (unsigned) olen, 5934 (unsigned) oadr); 5935 }; 5936 5937 /* 5938 ** if old phase not dataphase, leave here. 5939 */ 5940 5941 if (cmd != (vdsp[0] >> 24)) { 5942 PRINT_ADDR(cp->xfer); 5943 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n", 5944 (unsigned)cmd, (unsigned)vdsp[0] >> 24); 5945 5946 return; 5947 } 5948 if (cmd & 0x06) { 5949 PRINT_ADDR(cp->xfer); 5950 printf ("phase change %x-%x %d@%08x resid=%d.\n", 5951 cmd&7, sbcl&7, (unsigned)olen, 5952 (unsigned)oadr, (unsigned)rest); 5953 5954 OUTB (nc_dcntl, np->rv_dcntl | STD); 5955 return; 5956 }; 5957 5958 /* 5959 ** choose the correct patch area. 5960 ** if savep points to one, choose the other. 5961 */ 5962 5963 newcmd = cp->patch; 5964 if (cp->phys.header.savep == vtophys (newcmd)) newcmd+=4; 5965 5966 /* 5967 ** fillin the commands 5968 */ 5969 5970 newcmd[0] = ((cmd & 0x0f) << 24) | rest; 5971 newcmd[1] = oadr + olen - rest; 5972 newcmd[2] = SCR_JUMP; 5973 newcmd[3] = nxtdsp; 5974 5975 if (DEBUG_FLAGS & DEBUG_PHASE) { 5976 PRINT_ADDR(cp->xfer); 5977 printf ("newcmd[%d] %x %x %x %x.\n", 5978 newcmd - cp->patch, 5979 (unsigned)newcmd[0], 5980 (unsigned)newcmd[1], 5981 (unsigned)newcmd[2], 5982 (unsigned)newcmd[3]); 5983 } 5984 /* 5985 ** fake the return address (to the patch). 5986 ** and restart script processor at dispatcher. 5987 */ 5988 np->profile.num_break++; 5989 OUTL (nc_temp, vtophys (newcmd)); 5990 if ((cmd & 7) == 0) 5991 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch)); 5992 else 5993 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn)); 5994} 5995 5996/*========================================================== 5997** 5998** 5999** ncr chip exception handler for programmed interrupts. 6000** 6001** 6002**========================================================== 6003*/ 6004 6005static int ncr_show_msg (u_char * msg) 6006{ 6007 u_char i; 6008 printf ("%x",*msg); 6009 if (*msg==M_EXTENDED) { 6010 for (i=1;i<8;i++) { 6011 if (i-1>msg[1]) break; 6012 printf ("-%x",msg[i]); 6013 }; 6014 return (i+1); 6015 } else if ((*msg & 0xf0) == 0x20) { 6016 printf ("-%x",msg[1]); 6017 return (2); 6018 }; 6019 return (1); 6020} 6021 u_char scntl3; 6022 6023void ncr_int_sir (ncb_p np) 6024{ 6025 u_char chg, ofs, per, fak, wide; 6026 u_char num = INB (nc_dsps); 6027 ccb_p cp=0; 6028 u_long dsa; 6029 u_char target = INB (nc_ctest0) & 0x0f; 6030 tcb_p tp = &np->target[target]; 6031 int i; 6032 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num); 6033 6034 switch (num) { 6035 case SIR_SENSE_RESTART: 6036 case SIR_STALL_RESTART: 6037 break; 6038 6039 default: 6040 /* 6041 ** lookup the ccb 6042 */ 6043 dsa = INL (nc_dsa); 6044 cp = np->ccb; 6045 while (cp && (CCB_PHYS (cp, phys) != dsa)) 6046 cp = cp->link_ccb; 6047 6048 assert (cp); 6049 if (!cp) 6050 goto out; 6051 assert (cp == np->header.cp); 6052 if (cp != np->header.cp) 6053 goto out; 6054 } 6055 6056 switch (num) { 6057 6058/*-------------------------------------------------------------------- 6059** 6060** Processing of interrupted getcc selects 6061** 6062**-------------------------------------------------------------------- 6063*/ 6064 6065 case SIR_SENSE_RESTART: 6066 /*------------------------------------------ 6067 ** Script processor is idle. 6068 ** Look for interrupted "check cond" 6069 **------------------------------------------ 6070 */ 6071 6072 if (DEBUG_FLAGS & DEBUG_RESTART) 6073 printf ("%s: int#%d",ncr_name (np),num); 6074 cp = (ccb_p) 0; 6075 for (i=0; i<MAX_TARGET; i++) { 6076 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" t%d", i); 6077 tp = &np->target[i]; 6078 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+"); 6079 cp = tp->hold_cp; 6080 if (!cp) continue; 6081 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+"); 6082 if ((cp->host_status==HS_BUSY) && 6083 (cp->scsi_status==S_CHECK_COND)) 6084 break; 6085 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("- (remove)"); 6086 tp->hold_cp = cp = (ccb_p) 0; 6087 }; 6088 6089 if (cp) { 6090 if (DEBUG_FLAGS & DEBUG_RESTART) 6091 printf ("+ restart job ..\n"); 6092 OUTL (nc_dsa, CCB_PHYS (cp, phys)); 6093 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, getcc)); 6094 return; 6095 }; 6096 6097 /* 6098 ** no job, resume normal processing 6099 */ 6100 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" -- remove trap\n"); 6101 np->script->start0[0] = SCR_INT ^ IFFALSE (0); 6102 break; 6103 6104 case SIR_SENSE_FAILED: 6105 /*------------------------------------------- 6106 ** While trying to select for 6107 ** getting the condition code, 6108 ** a target reselected us. 6109 **------------------------------------------- 6110 */ 6111 if (DEBUG_FLAGS & DEBUG_RESTART) { 6112 PRINT_ADDR(cp->xfer); 6113 printf ("in getcc reselect by t%d.\n", 6114 INB(nc_ssid) & 0x0f); 6115 } 6116 6117 /* 6118 ** Mark this job 6119 */ 6120 cp->host_status = HS_BUSY; 6121 cp->scsi_status = S_CHECK_COND; 6122 np->target[cp->xfer->sc_link->target].hold_cp = cp; 6123 6124 /* 6125 ** And patch code to restart it. 6126 */ 6127 np->script->start0[0] = SCR_INT; 6128 break; 6129 6130/*----------------------------------------------------------------------------- 6131** 6132** Was Sie schon immer ueber transfermode negotiation wissen wollten ... 6133** 6134** We try to negotiate sync and wide transfer only after 6135** a successfull inquire command. We look at byte 7 of the 6136** inquire data to determine the capabilities if the target. 6137** 6138** When we try to negotiate, we append the negotiation message 6139** to the identify and (maybe) simple tag message. 6140** The host status field is set to HS_NEGOTIATE to mark this 6141** situation. 6142** 6143** If the target doesn't answer this message immidiately 6144** (as required by the standard), the SIR_NEGO_FAIL interrupt 6145** will be raised eventually. 6146** The handler removes the HS_NEGOTIATE status, and sets the 6147** negotiated value to the default (async / nowide). 6148** 6149** If we receive a matching answer immediately, we check it 6150** for validity, and set the values. 6151** 6152** If we receive a Reject message immediately, we assume the 6153** negotiation has failed, and fall back to standard values. 6154** 6155** If we receive a negotiation message while not in HS_NEGOTIATE 6156** state, it's a target initiated negotiation. We prepare a 6157** (hopefully) valid answer, set our parameters, and send back 6158** this answer to the target. 6159** 6160** If the target doesn't fetch the answer (no message out phase), 6161** we assume the negotiation has failed, and fall back to default 6162** settings. 6163** 6164** When we set the values, we adjust them in all ccbs belonging 6165** to this target, in the controller's register, and in the "phys" 6166** field of the controller's struct ncb. 6167** 6168** Possible cases: hs sir msg_in value send goto 6169** We try try to negotiate: 6170** -> target doesnt't msgin NEG FAIL noop defa. - dispatch 6171** -> target rejected our msg NEG FAIL reject defa. - dispatch 6172** -> target answered (ok) NEG SYNC sdtr set - clrack 6173** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad 6174** -> target answered (ok) NEG WIDE wdtr set - clrack 6175** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad 6176** -> any other msgin NEG FAIL noop defa. - dispatch 6177** 6178** Target tries to negotiate: 6179** -> incoming message --- SYNC sdtr set SDTR - 6180** -> incoming message --- WIDE wdtr set WDTR - 6181** We sent our answer: 6182** -> target doesn't msgout --- PROTO ? defa. - dispatch 6183** 6184**----------------------------------------------------------------------------- 6185*/ 6186 6187 case SIR_NEGO_FAILED: 6188 /*------------------------------------------------------- 6189 ** 6190 ** Negotiation failed. 6191 ** Target doesn't send an answer message, 6192 ** or target rejected our message. 6193 ** 6194 ** Remove negotiation request. 6195 ** 6196 **------------------------------------------------------- 6197 */ 6198 OUTB (HS_PRT, HS_BUSY); 6199 6200 /* fall through */ 6201 6202 case SIR_NEGO_PROTO: 6203 /*------------------------------------------------------- 6204 ** 6205 ** Negotiation failed. 6206 ** Target doesn't fetch the answer message. 6207 ** 6208 **------------------------------------------------------- 6209 */ 6210 6211 if (DEBUG_FLAGS & DEBUG_NEGO) { 6212 PRINT_ADDR(cp->xfer); 6213 printf ("negotiation failed sir=%x status=%x.\n", 6214 num, cp->nego_status); 6215 }; 6216 6217 /* 6218 ** any error in negotiation: 6219 ** fall back to default mode. 6220 */ 6221 switch (cp->nego_status) { 6222 6223 case NS_SYNC: 6224 ncr_setsync (np, cp, 0, 0xe0); 6225 break; 6226 6227 case NS_WIDE: 6228 ncr_setwide (np, cp, 0, 0); 6229 break; 6230 6231 }; 6232 np->msgin [0] = M_NOOP; 6233 np->msgout[0] = M_NOOP; 6234 cp->nego_status = 0; 6235 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch)); 6236 break; 6237 6238 case SIR_NEGO_SYNC: 6239 /* 6240 ** Synchronous request message received. 6241 */ 6242 6243 if (DEBUG_FLAGS & DEBUG_NEGO) { 6244 PRINT_ADDR(cp->xfer); 6245 printf ("sync msgin: "); 6246 (void) ncr_show_msg (np->msgin); 6247 printf (".\n"); 6248 }; 6249 6250 /* 6251 ** get requested values. 6252 */ 6253 6254 chg = 0; 6255 per = np->msgin[3]; 6256 ofs = np->msgin[4]; 6257 if (ofs==0) per=255; 6258 6259 /* 6260 ** if target sends SDTR message, 6261 ** it CAN transfer synch. 6262 */ 6263 6264 if (ofs) 6265 tp->inqdata[7] |= INQ7_SYNC; 6266 6267 /* 6268 ** check values against driver limits. 6269 */ 6270 6271 if (per < np->minsync) 6272 {chg = 1; per = np->minsync;} 6273 if (per < tp->minsync) 6274 {chg = 1; per = tp->minsync;} 6275 if (ofs > tp->maxoffs) 6276 {chg = 1; ofs = tp->maxoffs;} 6277 6278 /* 6279 ** Check against controller limits. 6280 */ 6281 6282 fak = 7; 6283 scntl3 = 0; 6284 if (ofs != 0) { 6285 ncr_getsync(np, per, &fak, &scntl3); 6286 if (fak > 7) { 6287 chg = 1; 6288 ofs = 0; 6289 } 6290 } 6291 if (ofs == 0) { 6292 fak = 7; 6293 per = 0; 6294 scntl3 = 0; 6295 tp->minsync = 0; 6296 } 6297 6298 if (DEBUG_FLAGS & DEBUG_NEGO) { 6299 PRINT_ADDR(cp->xfer); 6300 printf ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n", 6301 per, scntl3, ofs, fak, chg); 6302 } 6303 6304 if (INB (HS_PRT) == HS_NEGOTIATE) { 6305 OUTB (HS_PRT, HS_BUSY); 6306 switch (cp->nego_status) { 6307 6308 case NS_SYNC: 6309 /* 6310 ** This was an answer message 6311 */ 6312 if (chg) { 6313 /* 6314 ** Answer wasn't acceptable. 6315 */ 6316 ncr_setsync (np, cp, 0, 0xe0); 6317 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad)); 6318 } else { 6319 /* 6320 ** Answer is ok. 6321 */ 6322 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs); 6323 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack)); 6324 }; 6325 return; 6326 6327 case NS_WIDE: 6328 ncr_setwide (np, cp, 0, 0); 6329 break; 6330 }; 6331 }; 6332 6333 /* 6334 ** It was a request. Set value and 6335 ** prepare an answer message 6336 */ 6337 6338 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs); 6339 6340 np->msgout[0] = M_EXTENDED; 6341 np->msgout[1] = 3; 6342 np->msgout[2] = M_X_SYNC_REQ; 6343 np->msgout[3] = per; 6344 np->msgout[4] = ofs; 6345 6346 cp->nego_status = NS_SYNC; 6347 6348 if (DEBUG_FLAGS & DEBUG_NEGO) { 6349 PRINT_ADDR(cp->xfer); 6350 printf ("sync msgout: "); 6351 (void) ncr_show_msg (np->msgout); 6352 printf (".\n"); 6353 } 6354 6355 if (!ofs) { 6356 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad)); 6357 return; 6358 } 6359 np->msgin [0] = M_NOOP; 6360 6361 break; 6362 6363 case SIR_NEGO_WIDE: 6364 /* 6365 ** Wide request message received. 6366 */ 6367 if (DEBUG_FLAGS & DEBUG_NEGO) { 6368 PRINT_ADDR(cp->xfer); 6369 printf ("wide msgin: "); 6370 (void) ncr_show_msg (np->msgin); 6371 printf (".\n"); 6372 }; 6373 6374 /* 6375 ** get requested values. 6376 */ 6377 6378 chg = 0; 6379 wide = np->msgin[3]; 6380 6381 /* 6382 ** if target sends WDTR message, 6383 ** it CAN transfer wide. 6384 */ 6385 6386 if (wide) 6387 tp->inqdata[7] |= INQ7_WIDE16; 6388 6389 /* 6390 ** check values against driver limits. 6391 */ 6392 6393 if (wide > tp->usrwide) 6394 {chg = 1; wide = tp->usrwide;} 6395 6396 if (DEBUG_FLAGS & DEBUG_NEGO) { 6397 PRINT_ADDR(cp->xfer); 6398 printf ("wide: wide=%d chg=%d.\n", wide, chg); 6399 } 6400 6401 if (INB (HS_PRT) == HS_NEGOTIATE) { 6402 OUTB (HS_PRT, HS_BUSY); 6403 switch (cp->nego_status) { 6404 6405 case NS_WIDE: 6406 /* 6407 ** This was an answer message 6408 */ 6409 if (chg) { 6410 /* 6411 ** Answer wasn't acceptable. 6412 */ 6413 ncr_setwide (np, cp, 0, 1); 6414 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad)); 6415 } else { 6416 /* 6417 ** Answer is ok. 6418 */ 6419 ncr_setwide (np, cp, wide, 1); 6420 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack)); 6421 }; 6422 return; 6423 6424 case NS_SYNC: 6425 ncr_setsync (np, cp, 0, 0xe0); 6426 break; 6427 }; 6428 }; 6429 6430 /* 6431 ** It was a request, set value and 6432 ** prepare an answer message 6433 */ 6434 6435 ncr_setwide (np, cp, wide, 1); 6436 6437 np->msgout[0] = M_EXTENDED; 6438 np->msgout[1] = 2; 6439 np->msgout[2] = M_X_WIDE_REQ; 6440 np->msgout[3] = wide; 6441 6442 np->msgin [0] = M_NOOP; 6443 6444 cp->nego_status = NS_WIDE; 6445 6446 if (DEBUG_FLAGS & DEBUG_NEGO) { 6447 PRINT_ADDR(cp->xfer); 6448 printf ("wide msgout: "); 6449 (void) ncr_show_msg (np->msgout); 6450 printf (".\n"); 6451 } 6452 break; 6453 6454/*-------------------------------------------------------------------- 6455** 6456** Processing of special messages 6457** 6458**-------------------------------------------------------------------- 6459*/ 6460 6461 case SIR_REJECT_RECEIVED: 6462 /*----------------------------------------------- 6463 ** 6464 ** We received a M_REJECT message. 6465 ** 6466 **----------------------------------------------- 6467 */ 6468 6469 PRINT_ADDR(cp->xfer); 6470 printf ("M_REJECT received (%x:%x).\n", 6471 (unsigned)np->lastmsg, np->msgout[0]); 6472 break; 6473 6474 case SIR_REJECT_SENT: 6475 /*----------------------------------------------- 6476 ** 6477 ** We received an unknown message 6478 ** 6479 **----------------------------------------------- 6480 */ 6481 6482 PRINT_ADDR(cp->xfer); 6483 printf ("M_REJECT sent for "); 6484 (void) ncr_show_msg (np->msgin); 6485 printf (".\n"); 6486 break; 6487 6488/*-------------------------------------------------------------------- 6489** 6490** Processing of special messages 6491** 6492**-------------------------------------------------------------------- 6493*/ 6494 6495 case SIR_IGN_RESIDUE: 6496 /*----------------------------------------------- 6497 ** 6498 ** We received an IGNORE RESIDUE message, 6499 ** which couldn't be handled by the script. 6500 ** 6501 **----------------------------------------------- 6502 */ 6503 6504 PRINT_ADDR(cp->xfer); 6505 printf ("M_IGN_RESIDUE received, but not yet implemented.\n"); 6506 break; 6507 6508 case SIR_MISSING_SAVE: 6509 /*----------------------------------------------- 6510 ** 6511 ** We received an DISCONNECT message, 6512 ** but the datapointer wasn't saved before. 6513 ** 6514 **----------------------------------------------- 6515 */ 6516 6517 PRINT_ADDR(cp->xfer); 6518 printf ("M_DISCONNECT received, but datapointer not saved:\n" 6519 "\tdata=%x save=%x goal=%x.\n", 6520 (unsigned) INL (nc_temp), 6521 (unsigned) np->header.savep, 6522 (unsigned) np->header.goalp); 6523 break; 6524 6525/*-------------------------------------------------------------------- 6526** 6527** Processing of a "S_QUEUE_FULL" status. 6528** 6529** The current command has been rejected, 6530** because there are too many in the command queue. 6531** We have started too many commands for that target. 6532** 6533** If possible, reinsert at head of queue. 6534** Stall queue until there are no disconnected jobs 6535** (ncr is REALLY idle). Then restart processing. 6536** 6537** We should restart the current job after the controller 6538** has become idle. But this is not yet implemented. 6539** 6540**-------------------------------------------------------------------- 6541*/ 6542 case SIR_STALL_QUEUE: 6543 /*----------------------------------------------- 6544 ** 6545 ** Stall the start queue. 6546 ** 6547 **----------------------------------------------- 6548 */ 6549 PRINT_ADDR(cp->xfer); 6550 printf ("queue full.\n"); 6551 6552 np->script->start1[0] = SCR_INT; 6553 6554 /* 6555 ** Try to disable tagged transfers. 6556 */ 6557 ncr_setmaxtags (&np->target[target], 0); 6558 6559 /* 6560 ** @QUEUE@ 6561 ** 6562 ** Should update the launch field of the 6563 ** current job to be able to restart it. 6564 ** Then prepend it to the start queue. 6565 */ 6566 6567 /* fall through */ 6568 6569 case SIR_STALL_RESTART: 6570 /*----------------------------------------------- 6571 ** 6572 ** Enable selecting again, 6573 ** if NO disconnected jobs. 6574 ** 6575 **----------------------------------------------- 6576 */ 6577 /* 6578 ** Look for a disconnected job. 6579 */ 6580 cp = np->ccb; 6581 while (cp && cp->host_status != HS_DISCONNECT) 6582 cp = cp->link_ccb; 6583 6584 /* 6585 ** if there is one, ... 6586 */ 6587 if (cp) { 6588 /* 6589 ** wait for reselection 6590 */ 6591 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect)); 6592 return; 6593 }; 6594 6595 /* 6596 ** else remove the interrupt. 6597 */ 6598 6599 printf ("%s: queue empty.\n", ncr_name (np)); 6600 np->script->start1[0] = SCR_INT ^ IFFALSE (0); 6601 break; 6602 }; 6603 6604out: 6605 OUTB (nc_dcntl, np->rv_dcntl | STD); 6606} 6607 6608/*========================================================== 6609** 6610** 6611** Aquire a control block 6612** 6613** 6614**========================================================== 6615*/ 6616 6617static ccb_p ncr_get_ccb 6618 (ncb_p np, u_long flags, u_long target, u_long lun) 6619{ 6620 lcb_p lp; 6621 ccb_p cp = (ccb_p) 0; 6622 int oldspl; 6623 6624 oldspl = splhigh(); 6625 /* 6626 ** Lun structure available ? 6627 */ 6628 6629 lp = np->target[target].lp[lun]; 6630 if (lp) { 6631 cp = lp->next_ccb; 6632 6633 /* 6634 ** Look for free CCB 6635 */ 6636 6637 while (cp && cp->magic) { 6638 cp = cp->next_ccb; 6639 } 6640 } 6641 6642 /* 6643 ** if nothing available, take the default. 6644 */ 6645 6646 if (!cp) cp = np->ccb; 6647 6648 /* 6649 ** Wait until available. 6650 */ 6651 6652 while (cp->magic) { 6653 if (flags & SCSI_NOSLEEP) break; 6654 if (tsleep ((caddr_t)cp, PRIBIO|PCATCH, "ncr", 0)) 6655 break; 6656 }; 6657 6658 if (cp->magic) { 6659 splx(oldspl); 6660 return ((ccb_p) 0); 6661 } 6662 6663 cp->magic = 1; 6664 splx(oldspl); 6665 return (cp); 6666} 6667 6668/*========================================================== 6669** 6670** 6671** Release one control block 6672** 6673** 6674**========================================================== 6675*/ 6676 6677void ncr_free_ccb (ncb_p np, ccb_p cp, int flags) 6678{ 6679 /* 6680 ** sanity 6681 */ 6682 6683 assert (cp != NULL); 6684 6685 cp -> host_status = HS_IDLE; 6686 cp -> magic = 0; 6687 if (cp == np->ccb) 6688 wakeup ((caddr_t) cp); 6689} 6690 6691/*========================================================== 6692** 6693** 6694** Allocation of resources for Targets/Luns/Tags. 6695** 6696** 6697**========================================================== 6698*/ 6699 6700static void ncr_alloc_ccb (ncb_p np, u_long target, u_long lun) 6701{ 6702 tcb_p tp; 6703 lcb_p lp; 6704 ccb_p cp; 6705 6706 assert (np != NULL); 6707 6708 if (target>=MAX_TARGET) return; 6709 if (lun >=MAX_LUN ) return; 6710 6711 tp=&np->target[target]; 6712 6713 if (!tp->jump_tcb.l_cmd) { 6714 6715 /* 6716 ** initialize it. 6717 */ 6718 tp->jump_tcb.l_cmd = (SCR_JUMP^IFFALSE (DATA (0x80 + target))); 6719 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr; 6720 6721 tp->getscr[0] = 6722 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1); 6723 tp->getscr[1] = vtophys (&tp->sval); 6724 tp->getscr[2] = np->paddr + offsetof (struct ncr_reg, nc_sxfer); 6725 tp->getscr[3] = 6726 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1); 6727 tp->getscr[4] = vtophys (&tp->wval); 6728 tp->getscr[5] = np->paddr + offsetof (struct ncr_reg, nc_scntl3); 6729 6730 assert (( (offsetof(struct ncr_reg, nc_sxfer) ^ 6731 offsetof(struct tcb , sval )) &3) == 0); 6732 assert (( (offsetof(struct ncr_reg, nc_scntl3) ^ 6733 offsetof(struct tcb , wval )) &3) == 0); 6734 6735 tp->call_lun.l_cmd = (SCR_CALL); 6736 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun); 6737 6738 tp->jump_lcb.l_cmd = (SCR_JUMP); 6739 tp->jump_lcb.l_paddr = NCB_SCRIPT_PHYS (np, abort); 6740 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb); 6741 6742 tp->usrtags = SCSI_NCR_DFLT_TAGS; 6743 ncr_setmaxtags (tp, tp->usrtags); 6744 } 6745 6746 /* 6747 ** Logic unit control block 6748 */ 6749 lp = tp->lp[lun]; 6750 if (!lp) { 6751 /* 6752 ** Allocate a lcb 6753 */ 6754 lp = (lcb_p) malloc (sizeof (struct lcb), M_DEVBUF, M_NOWAIT); 6755 if (!lp) return; 6756 6757 /* 6758 ** Initialize it 6759 */ 6760 bzero (lp, sizeof (*lp)); 6761 lp->jump_lcb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (lun))); 6762 lp->jump_lcb.l_paddr = tp->jump_lcb.l_paddr; 6763 6764 lp->call_tag.l_cmd = (SCR_CALL); 6765 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag); 6766 6767 lp->jump_ccb.l_cmd = (SCR_JUMP); 6768 lp->jump_ccb.l_paddr = NCB_SCRIPT_PHYS (np, aborttag); 6769 6770 lp->actlink = 1; 6771 6772 /* 6773 ** Chain into LUN list 6774 */ 6775 tp->jump_lcb.l_paddr = vtophys (&lp->jump_lcb); 6776 tp->lp[lun] = lp; 6777 6778 } 6779 6780 /* 6781 ** Limit possible number of ccbs. 6782 ** 6783 ** If tagged command queueing is enabled, 6784 ** can use more than one ccb. 6785 */ 6786 6787 if (np->actccbs >= MAX_START-2) return; 6788 if (lp->actccbs && (lp->actccbs >= lp->reqccbs)) 6789 return; 6790 6791 /* 6792 ** Allocate a ccb 6793 */ 6794 cp = (ccb_p) malloc (sizeof (struct ccb), M_DEVBUF, M_NOWAIT); 6795 6796 if (!cp) 6797 return; 6798 6799 if (DEBUG_FLAGS & DEBUG_ALLOC) { 6800 printf ("new ccb @%x.\n", (unsigned) cp); 6801 } 6802 6803 /* 6804 ** Count it 6805 */ 6806 lp->actccbs++; 6807 np->actccbs++; 6808 6809 /* 6810 ** Initialize it 6811 */ 6812 bzero (cp, sizeof (*cp)); 6813 6814 /* 6815 ** Fill in physical addresses 6816 */ 6817 6818 cp->p_ccb = vtophys (cp); 6819 6820 /* 6821 ** Chain into reselect list 6822 */ 6823 cp->jump_ccb.l_cmd = SCR_JUMP; 6824 cp->jump_ccb.l_paddr = lp->jump_ccb.l_paddr; 6825 lp->jump_ccb.l_paddr = CCB_PHYS (cp, jump_ccb); 6826 cp->call_tmp.l_cmd = SCR_CALL; 6827 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp); 6828 6829 /* 6830 ** Chain into wakeup list 6831 */ 6832 cp->link_ccb = np->ccb->link_ccb; 6833 np->ccb->link_ccb = cp; 6834 6835 /* 6836 ** Chain into CCB list 6837 */ 6838 cp->next_ccb = lp->next_ccb; 6839 lp->next_ccb = cp; 6840} 6841 6842/*========================================================== 6843** 6844** 6845** Announce the number of ccbs/tags to the scsi driver. 6846** 6847** 6848**========================================================== 6849*/ 6850 6851static void ncr_opennings (ncb_p np, lcb_p lp, struct scsi_xfer * xp) 6852{ 6853 /* 6854 ** want to reduce the number ... 6855 */ 6856 if (lp->actlink > lp->reqlink) { 6857 6858 /* 6859 ** Try to reduce the count. 6860 ** We assume to run at splbio .. 6861 */ 6862 u_char diff = lp->actlink - lp->reqlink; 6863 6864 if (!diff) return; 6865 6866#ifdef __NetBSD__ 6867 if (diff > xp->sc_link->openings) 6868 diff = xp->sc_link->openings; 6869 6870 xp->sc_link->openings -= diff; 6871#else /* !__NetBSD__ */ 6872 if (diff > xp->sc_link->opennings) 6873 diff = xp->sc_link->opennings; 6874 6875 xp->sc_link->opennings -= diff; 6876#endif /* __NetBSD__ */ 6877 lp->actlink -= diff; 6878 if (DEBUG_FLAGS & DEBUG_TAGS) 6879 printf ("%s: actlink: diff=%d, new=%d, req=%d\n", 6880 ncr_name(np), diff, lp->actlink, lp->reqlink); 6881 return; 6882 }; 6883 6884 /* 6885 ** want to increase the number ? 6886 */ 6887 if (lp->reqlink > lp->actlink) { 6888 u_char diff = lp->reqlink - lp->actlink; 6889 6890#ifdef __NetBSD__ 6891 xp->sc_link->openings += diff; 6892#else /* !__NetBSD__ */ 6893 xp->sc_link->opennings += diff; 6894#endif /* __NetBSD__ */ 6895 lp->actlink += diff; 6896 wakeup ((caddr_t) xp->sc_link); 6897 if (DEBUG_FLAGS & DEBUG_TAGS) 6898 printf ("%s: actlink: diff=%d, new=%d, req=%d\n", 6899 ncr_name(np), diff, lp->actlink, lp->reqlink); 6900 }; 6901} 6902 6903/*========================================================== 6904** 6905** 6906** Build Scatter Gather Block 6907** 6908** 6909**========================================================== 6910** 6911** The transfer area may be scattered among 6912** several non adjacent physical pages. 6913** 6914** We may use MAX_SCATTER blocks. 6915** 6916**---------------------------------------------------------- 6917*/ 6918 6919static int ncr_scatter 6920 (struct dsb* phys, vm_offset_t vaddr, vm_size_t datalen) 6921{ 6922 u_long paddr, pnext; 6923 6924 u_short segment = 0; 6925 u_long segsize, segaddr; 6926 u_long size, csize = 0; 6927 u_long chunk = MAX_SIZE; 6928 int free; 6929 6930 bzero (&phys->data, sizeof (phys->data)); 6931 if (!datalen) return (0); 6932 6933 paddr = vtophys (vaddr); 6934 6935 /* 6936 ** insert extra break points at a distance of chunk. 6937 ** We try to reduce the number of interrupts caused 6938 ** by unexpected phase changes due to disconnects. 6939 ** A typical harddisk may disconnect before ANY block. 6940 ** If we wanted to avoid unexpected phase changes at all 6941 ** we had to use a break point every 512 bytes. 6942 ** Of course the number of scatter/gather blocks is 6943 ** limited. 6944 */ 6945 6946 free = MAX_SCATTER - 1; 6947 6948 if (vaddr & PAGE_MASK) free -= datalen / PAGE_SIZE; 6949 6950 if (free>1) 6951 while ((chunk * free >= 2 * datalen) && (chunk>=1024)) 6952 chunk /= 2; 6953 6954 if(DEBUG_FLAGS & DEBUG_SCATTER) 6955 printf("ncr?:\tscattering virtual=0x%x size=%d chunk=%d.\n", 6956 (unsigned) vaddr, (unsigned) datalen, (unsigned) chunk); 6957 6958 /* 6959 ** Build data descriptors. 6960 */ 6961 while (datalen && (segment < MAX_SCATTER)) { 6962 6963 /* 6964 ** this segment is empty 6965 */ 6966 segsize = 0; 6967 segaddr = paddr; 6968 pnext = paddr; 6969 6970 if (!csize) csize = chunk; 6971 6972 while ((datalen) && (paddr == pnext) && (csize)) { 6973 6974 /* 6975 ** continue this segment 6976 */ 6977 pnext = (paddr & (~PAGE_MASK)) + PAGE_SIZE; 6978 6979 /* 6980 ** Compute max size 6981 */ 6982 6983 size = pnext - paddr; /* page size */ 6984 if (size > datalen) size = datalen; /* data size */ 6985 if (size > csize ) size = csize ; /* chunksize */ 6986 6987 segsize += size; 6988 vaddr += size; 6989 csize -= size; 6990 datalen -= size; 6991 paddr = vtophys (vaddr); 6992 }; 6993 6994 if(DEBUG_FLAGS & DEBUG_SCATTER) 6995 printf ("\tseg #%d addr=%x size=%d (rest=%d).\n", 6996 segment, 6997 (unsigned) segaddr, 6998 (unsigned) segsize, 6999 (unsigned) datalen); 7000 7001 phys->data[segment].addr = segaddr; 7002 phys->data[segment].size = segsize; 7003 segment++; 7004 } 7005 7006 if (datalen) { 7007 printf("ncr?: scatter/gather failed (residue=%d).\n", 7008 (unsigned) datalen); 7009 return (-1); 7010 }; 7011 7012 return (segment); 7013} 7014 7015/*========================================================== 7016** 7017** 7018** Test the pci bus snoop logic :-( 7019** 7020** Has to be called with interrupts disabled. 7021** 7022** 7023**========================================================== 7024*/ 7025 7026#ifndef NCR_IOMAPPED 7027static int ncr_regtest (struct ncb* np) 7028{ 7029 register volatile u_long data, *addr; 7030 /* 7031 ** ncr registers may NOT be cached. 7032 ** write 0xffffffff to a read only register area, 7033 ** and try to read it back. 7034 */ 7035 addr = (volatile u_long*) &np->reg->nc_dstat; 7036 data = 0xffffffff; 7037 *addr= data; 7038 data = *addr; 7039#if 1 7040 if (data == 0xffffffff) { 7041#else 7042 if ((data & 0xe2f0fffd) != 0x02000080) { 7043#endif 7044 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", 7045 (unsigned) data); 7046 return (0x10); 7047 }; 7048 return (0); 7049} 7050#endif 7051 7052static int ncr_snooptest (struct ncb* np) 7053{ 7054 u_long ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc, err=0; 7055 int i; 7056#ifndef NCR_IOMAPPED 7057 err |= ncr_regtest (np); 7058 if (err) return (err); 7059#endif 7060 /* 7061 ** init 7062 */ 7063 pc = NCB_SCRIPT_PHYS (np, snooptest); 7064 host_wr = 1; 7065 ncr_wr = 2; 7066 /* 7067 ** Set memory and register. 7068 */ 7069 ncr_cache = host_wr; 7070 OUTL (nc_temp, ncr_wr); 7071 /* 7072 ** Start script (exchange values) 7073 */ 7074 OUTL (nc_dsp, pc); 7075 /* 7076 ** Wait 'til done (with timeout) 7077 */ 7078 for (i=0; i<NCR_SNOOP_TIMEOUT; i++) 7079 if (INB(nc_istat) & (INTF|SIP|DIP)) 7080 break; 7081 /* 7082 ** Save termination position. 7083 */ 7084 pc = INL (nc_dsp); 7085 /* 7086 ** Read memory and register. 7087 */ 7088 host_rd = ncr_cache; 7089 ncr_rd = INL (nc_scratcha); 7090 ncr_bk = INL (nc_temp); 7091 /* 7092 ** Reset ncr chip 7093 */ 7094 OUTB (nc_istat, SRST); 7095 DELAY (1000); 7096 OUTB (nc_istat, 0 ); 7097 /* 7098 ** check for timeout 7099 */ 7100 if (i>=NCR_SNOOP_TIMEOUT) { 7101 printf ("CACHE TEST FAILED: timeout.\n"); 7102 return (0x20); 7103 }; 7104 /* 7105 ** Check termination position. 7106 */ 7107 if (pc != NCB_SCRIPT_PHYS (np, snoopend)+8) { 7108 printf ("CACHE TEST FAILED: script execution failed.\n"); 7109 printf ("\tstart=%08x, pc=%08x, end=%08x\n", 7110 NCB_SCRIPT_PHYS (np, snooptest), pc, 7111 NCB_SCRIPT_PHYS (np, snoopend) +8); 7112 return (0x40); 7113 }; 7114 /* 7115 ** Show results. 7116 */ 7117 if (host_wr != ncr_rd) { 7118 printf ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n", 7119 (int) host_wr, (int) ncr_rd); 7120 err |= 1; 7121 }; 7122 if (host_rd != ncr_wr) { 7123 printf ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n", 7124 (int) ncr_wr, (int) host_rd); 7125 err |= 2; 7126 }; 7127 if (ncr_bk != ncr_wr) { 7128 printf ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n", 7129 (int) ncr_wr, (int) ncr_bk); 7130 err |= 4; 7131 }; 7132 return (err); 7133} 7134 7135/*========================================================== 7136** 7137** 7138** Profiling the drivers and targets performance. 7139** 7140** 7141**========================================================== 7142*/ 7143 7144/* 7145** Compute the difference in milliseconds. 7146**/ 7147 7148static int ncr_delta (struct timeval * from, struct timeval * to) 7149{ 7150 if (!from->tv_sec) return (-1); 7151 if (!to ->tv_sec) return (-2); 7152 return ( (to->tv_sec - from->tv_sec - 2)*1000+ 7153 +(to->tv_usec - from->tv_usec + 2000000)/1000); 7154} 7155 7156#define PROFILE cp->phys.header.stamp 7157static void ncb_profile (ncb_p np, ccb_p cp) 7158{ 7159 int co, da, st, en, di, se, post,work,disc; 7160 u_long diff; 7161 7162 gettime(&PROFILE.end); 7163 7164 st = ncr_delta (&PROFILE.start,&PROFILE.status); 7165 if (st<0) return; /* status not reached */ 7166 7167 da = ncr_delta (&PROFILE.start,&PROFILE.data); 7168 if (da<0) return; /* No data transfer phase */ 7169 7170 co = ncr_delta (&PROFILE.start,&PROFILE.command); 7171 if (co<0) return; /* command not executed */ 7172 7173 en = ncr_delta (&PROFILE.start,&PROFILE.end), 7174 di = ncr_delta (&PROFILE.start,&PROFILE.disconnect), 7175 se = ncr_delta (&PROFILE.start,&PROFILE.select); 7176 post = en - st; 7177 7178 /* 7179 ** @PROFILE@ Disconnect time invalid if multiple disconnects 7180 */ 7181 7182 if (di>=0) disc = se-di; else disc = 0; 7183 7184 work = (st - co) - disc; 7185 7186 diff = (np->disc_phys - np->disc_ref) & 0xff; 7187 np->disc_ref += diff; 7188 7189 np->profile.num_trans += 1; 7190 if (cp->xfer) 7191 np->profile.num_bytes += cp->xfer->datalen; 7192 np->profile.num_disc += diff; 7193 np->profile.ms_setup += co; 7194 np->profile.ms_data += work; 7195 np->profile.ms_disc += disc; 7196 np->profile.ms_post += post; 7197} 7198#undef PROFILE 7199 7200/*========================================================== 7201** 7202** Determine the ncr's clock frequency. 7203** This is essential for the negotiation 7204** of the synchronous transfer rate. 7205** 7206**========================================================== 7207** 7208** Note: we have to return the correct value. 7209** THERE IS NO SAVE DEFAULT VALUE. 7210** 7211** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. 7212** 53C860 and 53C875 rev. 1 support fast20 transfers but 7213** do not have a clock doubler and so are provided with a 7214** 80 MHz clock. All other fast20 boards incorporate a doubler 7215** and so should be delivered with a 40 MHz clock. 7216** The future fast40 chips (895/895) use a 40 Mhz base clock 7217** and provide a clock quadrupler (160 Mhz). The code below 7218** tries to deal as cleverly as possible with all this stuff. 7219** 7220**---------------------------------------------------------- 7221*/ 7222 7223/* 7224 * Select NCR SCSI clock frequency 7225 */ 7226static void ncr_selectclock(ncb_p np, u_char scntl3) 7227{ 7228 if (np->multiplier < 2) { 7229 OUTB(nc_scntl3, scntl3); 7230 return; 7231 } 7232 7233 if (bootverbose >= 2) 7234 printf ("%s: enabling clock multiplier\n", ncr_name(np)); 7235 7236 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */ 7237 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */ 7238 int i = 20; 7239 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0) 7240 DELAY(20); 7241 if (!i) 7242 printf("%s: the chip cannot lock the frequency\n", ncr_name(np)); 7243 } else /* Wait 20 micro-seconds for doubler */ 7244 DELAY(20); 7245 OUTB(nc_stest3, HSC); /* Halt the scsi clock */ 7246 OUTB(nc_scntl3, scntl3); 7247 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ 7248 OUTB(nc_stest3, 0x00); /* Restart scsi clock */ 7249} 7250 7251/* 7252 * calculate NCR SCSI clock frequency (in KHz) 7253 */ 7254static unsigned 7255ncrgetfreq (ncb_p np, int gen) 7256{ 7257 int ms = 0; 7258 /* 7259 * Measure GEN timer delay in order 7260 * to calculate SCSI clock frequency 7261 * 7262 * This code will never execute too 7263 * many loop iterations (if DELAY is 7264 * reasonably correct). It could get 7265 * too low a delay (too high a freq.) 7266 * if the CPU is slow executing the 7267 * loop for some reason (an NMI, for 7268 * example). For this reason we will 7269 * if multiple measurements are to be 7270 * performed trust the higher delay 7271 * (lower frequency returned). 7272 */ 7273 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */ 7274 OUTW (nc_sien , 0); /* mask all scsi interrupts */ 7275 (void) INW (nc_sist); /* clear pending scsi interrupt */ 7276 OUTB (nc_dien , 0); /* mask all dma interrupts */ 7277 (void) INW (nc_sist); /* another one, just to be sure :) */ 7278 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */ 7279 OUTB (nc_stime1, 0); /* disable general purpose timer */ 7280 OUTB (nc_stime1, gen); /* set to nominal delay of (1<<gen) * 125us */ 7281 while (!(INW(nc_sist) & GEN) && ms++ < 1000) 7282 DELAY(1000); /* count ms */ 7283 OUTB (nc_stime1, 0); /* disable general purpose timer */ 7284 OUTB (nc_scntl3, 0); 7285 /* 7286 * Set prescaler to divide by whatever "0" means. 7287 * "0" ought to choose divide by 2, but appears 7288 * to set divide by 3.5 mode in my 53c810 ... 7289 */ 7290 OUTB (nc_scntl3, 0); 7291 7292 if (bootverbose) 7293 printf ("\tDelay (GEN=%d): %lu msec\n", gen, ms); 7294 /* 7295 * adjust for prescaler, and convert into KHz 7296 */ 7297 return ms ? ((1 << gen) * 4440) / ms : 0; 7298} 7299 7300static void ncr_getclock (ncb_p np, u_char multiplier) 7301{ 7302 unsigned char scntl3; 7303 unsigned char stest1; 7304 scntl3 = INB(nc_scntl3); 7305 stest1 = INB(nc_stest1); 7306 7307 np->multiplier = 1; 7308 /* always false, except for 875 with clock doubler selected */ 7309 if ((stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) { 7310 np->multiplier = multiplier; 7311 np->clock_khz = 40000 * multiplier; 7312 } else { 7313 if ((scntl3 & 7) == 0) { 7314 unsigned f1, f2; 7315 /* throw away first result */ 7316 (void) ncrgetfreq (np, 11); 7317 f1 = ncrgetfreq (np, 11); 7318 f2 = ncrgetfreq (np, 11); 7319 7320 if (bootverbose) 7321 printf ("\tNCR clock is %luKHz, %luKHz\n", f1, f2); 7322 if (f1 > f2) f1 = f2; /* trust lower result */ 7323 if (f1 > 45000) { 7324 scntl3 = 5; /* >45Mhz: assume 80MHz */ 7325 } else { 7326 scntl3 = 3; /* <45Mhz: assume 40MHz */ 7327 } 7328 } 7329 else if ((scntl3 & 7) == 5) 7330 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */ 7331 } 7332} 7333 7334/*=========================================================================*/ 7335 7336#ifdef NCR_TEKRAM_EEPROM 7337 7338struct tekram_eeprom_dev { 7339 u_char devmode; 7340#define TKR_PARCHK 0x01 7341#define TKR_TRYSYNC 0x02 7342#define TKR_ENDISC 0x04 7343#define TKR_STARTUNIT 0x08 7344#define TKR_USETAGS 0x10 7345#define TKR_TRYWIDE 0x20 7346 u_char syncparam; /* max. sync transfer rate (table ?) */ 7347 u_char filler1; 7348 u_char filler2; 7349}; 7350 7351 7352struct tekram_eeprom { 7353 struct tekram_eeprom_dev 7354 dev[16]; 7355 u_char adaptid; 7356 u_char adaptmode; 7357#define TKR_ADPT_GT2DRV 0x01 7358#define TKR_ADPT_GT1GB 0x02 7359#define TKR_ADPT_RSTBUS 0x04 7360#define TKR_ADPT_ACTNEG 0x08 7361#define TKR_ADPT_NOSEEK 0x10 7362#define TKR_ADPT_MORLUN 0x20 7363 u_char delay; /* unit ? (table ???) */ 7364 u_char tags; /* use 4 times as many ... */ 7365 u_char filler[60]; 7366}; 7367 7368static void 7369tekram_write_bit (ncb_p np, int bit) 7370{ 7371 u_char val = 0x10 + ((bit & 1) << 1); 7372 7373 DELAY(10); 7374 OUTB (nc_gpreg, val); 7375 DELAY(10); 7376 OUTB (nc_gpreg, val | 0x04); 7377 DELAY(10); 7378 OUTB (nc_gpreg, val); 7379 DELAY(10); 7380} 7381 7382static int 7383tekram_read_bit (ncb_p np) 7384{ 7385 OUTB (nc_gpreg, 0x10); 7386 DELAY(10); 7387 OUTB (nc_gpreg, 0x14); 7388 DELAY(10); 7389 return INB (nc_gpreg) & 1; 7390} 7391 7392static u_short 7393read_tekram_eeprom_reg (ncb_p np, int reg) 7394{ 7395 int bit; 7396 u_short result = 0; 7397 int cmd = 0x80 | reg; 7398 7399 OUTB (nc_gpreg, 0x10); 7400 7401 tekram_write_bit (np, 1); 7402 for (bit = 7; bit >= 0; bit--) 7403 { 7404 tekram_write_bit (np, cmd >> bit); 7405 } 7406 7407 for (bit = 0; bit < 16; bit++) 7408 { 7409 result <<= 1; 7410 result |= tekram_read_bit (np); 7411 } 7412 7413 OUTB (nc_gpreg, 0x00); 7414 return result; 7415} 7416 7417static int 7418read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer) 7419{ 7420 u_short *p = (u_short *) buffer; 7421 u_short sum = 0; 7422 int i; 7423 7424 if (INB (nc_gpcntl) != 0x09) 7425 { 7426 return 0; 7427 } 7428 for (i = 0; i < 64; i++) 7429 { 7430 u_short val; 7431if((i&0x0f) == 0) printf ("%02x:", i*2); 7432 val = read_tekram_eeprom_reg (np, i); 7433 if (p) 7434 *p++ = val; 7435 sum += val; 7436if((i&0x01) == 0x00) printf (" "); 7437 printf ("%02x%02x", val & 0xff, (val >> 8) & 0xff); 7438if((i&0x0f) == 0x0f) printf ("\n"); 7439 } 7440printf ("Sum = %04x\n", sum); 7441 return sum == 0x1234; 7442} 7443#endif /* NCR_TEKRAM_EEPROM */ 7444 7445/*=========================================================================*/ 7446#endif /* KERNEL */ 7447